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Download SED1355 TECHNICAL MANUAL
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Epson Research and Development Vancouver Design Center Page 141 Table 14-2: Maximum PCLK Frequency with FPM-DRAM Ink off on Display type NRC • Single Panel. • CRT. • Dual Monochrome/Color Panel with Half Frame Buffer Disabled. • Simultaneous CRT + Single Panel. • Simultaneous CRT + Dual Monochrome/Color Panel with Half Frame Buffer Disabled. 5, 4, 3 Maximum PCLK allowed 1 bpp 2 bpp 4 bpp 8 bpp 16 bpp MCLK • Dual Monochrome with Half Frame Buffer Enabled. • Simultaneous CRT + Dual Monochrome Panel with Half Frame Buffer Enable. 5 MCLK/2 MCLK/2 MCLK/2 MCLK/2 MCLK/3 4 MCLK/2 MCLK/2 MCLK/2 MCLK/2 MCLK/2 3 MCLK MCLK MCLK MCLK/2 MCLK/2 • Dual Color with Half Frame Buffer Enabled. • Simultaneous CRT + Dual Color Panel with Half Frame Buffer Enable. 5 MCLK/2 MCLK/2 MCLK/2 MCLK/2 MCLK/3 4 MCLK/2 MCLK/2 MCLK/2 MCLK/2 MCLK/3 3 MCLK/2 MCLK/2 MCLK/2 MCLK/2 MCLK/2 • Single Panel. • CRT. • Dual Monochrome/Color Panel with Half Frame Buffer Disabled. • Simultaneous CRT + Single Panel. • Simultaneous CRT + Dual Monochrome/Color Panel with Half Frame Buffer Disabled. 5 MCLK/2 MCLK/2 MCLK/2 MCLK/2 MCLK/3 4 MCLK MCLK MCLK/2 MCLK/2 MCLK/2 3 MCLK MCLK MCLK MCLK/2 MCLK/2 • Dual Monochrome with Half Frame Buffer Enabled. • Simultaneous CRT + Dual Monochrome Panel with Half Frame Buffer Enable. 5 MCLK/2 MCLK/2 MCLK/3 MCLK/3 MCLK/3 4 MCLK/2 MCLK/2 MCLK/2 MCLK/2 MCLK/3 3 MCLK/2 MCLK/2 MCLK/2 MCLK/2 MCLK/3 • Dual Color with Half Frame Buffer Enabled. • Simultaneous CRT + Dual Color Panel with Half Frame Buffer Enable. 5 MCLK/3 MCLK/3 MCLK/3 MCLK/3 MCLK/4 4 MCLK/2 MCLK/2 MCLK/2 MCLK/3 MCLK/3 3 MCLK/2 MCLK/2 MCLK/2 MCLK/2 MCLK/3 Hardware Functional Specification Issue Date: 99/05/18 SED1355 X23A-A-001-11
