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Download Cable MAC
Transcript
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About This Guide
This guide is a service manual for the InfoRanger SCM-120R and SCM-120U. The size, the shape and color of
the SCM-120R and SCM-120U are same and both of them have one Ethernet port. Different from SCM-120R,
SCM-120U has one USB port besides Ethernet port. This guide explains first the common features of SCM120R and SCM-120U and then the specific features of each with marking ‘Only for SCM-120R’ or ‘Only for
SCM-120U ’.
This guide consists of following :
Chapter 1 Introduction to InfoRanger describes the features and specification of InfoRanger and shows RF signal
information.
Chapter 2 Prior to Installation explains how to configure PC before installing the InfoRanger and the necessary
items to install InfoRanger.
Chapter 3 Installing and Provisioning InfoRanger explains how to install the InfoRanger and connect cables.
Chapter 4 Using InfoRanger describes the function of each connector and the way of using LED.
Chapter 5 Using Diagnostic Program explains how to use diagnostic program to diagnose the memory, Ethernet,
Cookie parameters, Upstream and Downstream status of InfoRanger.
Chapter 6 Using Management Commands explains the management commands used to test and debug the
InfoRanger.
Chapter 7 Structure of InfoRanger explains the cable interface, microprocessor, memory, Ethernet interface and
other miscellaneous part which constitutes the InfoRanger.
Chapter 8 Network Component describes the network component to support the DOCSIS-compatible Cable
modem.
Chapter 9 Network Layer Properties describes the cable layer such as Protocol Stack, Ethernet Driver, Cable
driver, Bridging.
Chapter 10 Web-based Management System explains how to check the current status of InfoRanger and change
the configuration through the website.
Appendix A Troubleshooting shows how to solve the InfoRanger problems occurred in the field or service line.
Appendix B Testing InfoRanger explains breifly how to test the InfoRanger in the field.
Appendix C Part List lists the numbers and description of each part which constitutes the InfoRanger.
Appendix D Servicing Diagram shows the overall diagrams and exploded view of InfoRanger.
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Table of Contents
Chapter 1
Introduction to InfoRanger
Features of the InfoRanger .................................................................................................................
Examples of Network Connection .......................................................................................................
Product Specifications ........................................................................................................................
RF Specifications ................................................................................................................................
1-1
1-2
1-3
1-4
Chapter 2 Prior to Installation .......................................................................... 2-1~2-6
Subscribing to Cable Internet Service .................................................................................................. 2-1
Environment Preparation for Installation .............................................................................................. 2-2
Preparing Necessary Items ................................................................................................................. 2-3
Configuring TCP/IP Protocol ............................................................................................................... 2-5
Installing TCP/IP Protocol on IBM Compatible PC ...................................................................................... 2-5
Installing TCP/IP Protocol on Macintosh PC ................................................................................................. 2-6
Chapter 3 Installing and Provisioning InfoRanger ............................................. 3-1~3-16
Installing InfoRanger........................................................................................................................... 3-1
Locating in a place ............................................................................................................................. 3-1
Connecting the Coaxial Cable ............................................................................................................ 3-3
Connecting PCs ................................................................................................................................. 3-4
Single PC Connection .......................................................................................................................................... 3-4
Multiple PCs Connection.................................................................................................................................... 3-6
Connecting the Power Adapter ............................................................................................................ 3-8
Inspecting Cable Connection .............................................................................................................. 3-9
Provisioning InfoRanger .................................................................................................................... 3-11
Procedure of Provisioning InfoRanger ........................................................................................................... 3-11
Power on and Initialization Sequence............................................................................................................. 3-11
Scan and Synchronize With Downstream Channel ...................................................................................... 3-12
Obtain Upstream Parameters........................................................................................................................... 3-12
Ranging ............................................................................................................................................................... 3-12
Establish IP Connectivity.................................................................................................................................. 3-13
Transfer Operational Parameters..................................................................................................................... 3-13
Registration......................................................................................................................................................... 3-14
Enable Ethernet Interface.................................................................................................................................. 3-14
Baseline Privacy Initialization.......................................................................................................................... 3-14
Chapter 4 Using InfoRanger .............................................................................. 4-1~4-4
Front View.......................................................................................................................................... 4-1
Rear View .......................................................................................................................................... 4-3
Chapter 5 Using Diagnostics Program ............................................................... 5-1~5-18
Equipment Preparation ...................................................................................................................... 5-1
Functional Test .................................................................................................................................. 5-2
Set Up ................................................................................................................................................................... 5-2
Starting Diagnostic Program ............................................................................................................................. 5-4
Memory Test Menu ............................................................................................................................................. 5-5
Ethernet Test Menu ........................................................................................................................................... 5-11
Miscellaneous Test Menu ................................................................................................................................. 5-13
Cookie Menu ...................................................................................................................................................... 5-13
Cable Downstream Test Menu......................................................................................................................... 5-14
Cable Upstream Test Menu .............................................................................................................................. 5-16
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Chapter 6 Using Management Commands ........................................................... 6-1~6-9
List of Management Commands ......................................................................................................... 6-1
MacAddr ............................................................................................................................................................... 6-1
CmacMcast............................................................................................................................................................ 6-2
UsbMcast............................................................................................................................................................... 6-2
SnmpStat ............................................................................................................................................................... 6-2
ShowBpi ................................................................................................................................................................ 6-3
IfShow.................................................................................................................................................................... 6-4
UniShowPCMAC................................................................................................................................................. 6-5
Sdf .......................................................................................................................................................................... 6-5
cdf , cmSetDsFrequency...................................................................................................................................... 6-5
showUcd ............................................................................................................................................................... 6-6
upStat..................................................................................................................................................................... 6-8
dmdStat .................................................................................................................................................................. 6-8
reboot..................................................................................................................................................................... 6-9
Chapter 7 Structure of the InfoRanger ............................................................. 7-1~7-16
Introduction ....................................................................................................................................... 7-1
Cable Interface .................................................................................................................................. 7-2
Introduction .......................................................................................................................................................... 7-2
Downstream ......................................................................................................................................................... 7-3
Upstream........................................................................................................................................... 7-5
Microprocessor and Momory Interface ................................................................................................. 7-6
Microprocessor (CN9414) ................................................................................................................................... 7-6
Flash Memory (AMD29DL323D, Intel28F320)............................................................................................... 7-12
SDRAM (K4S641632D) ...................................................................................................................................... 7-14
User Interface .................................................................................................................................. 7-15
Ethernet Tranceiver (LXT 972) ......................................................................................................................... 7-15
Ethernet Line Interface ...................................................................................................................................... 7-16
Others ............................................................................................................................................. 7-16
Power................................................................................................................................................................... 7-16
Display ................................................................................................................................................................ 7-16
Switch .................................................................................................................................................................. 7-16
Connectors .......................................................................................................................................................... 7-16
Chapter 8 Network Component
Provisioning Model ............................................................................................................................
Cable Modem Configuration File .......................................................................................................
DHCP Server Configuration ...............................................................................................................
TFTP Server .......................................................................................................................................
Web Server .......................................................................................................................................
CMTS Configuration ..........................................................................................................................
8-1
8-3
8-4
8-4
8-4
8-5
Chapter 9 Network Layer Properties ................................................................. 9-1~9-6
Protocol Stack ...................................................................................................................................
Cable Driver .....................................................................................................................................
Ethernet Driver ..................................................................................................................................
USB Driver (InfoRanger SCM-120U) ....................................................................................................
Bridging ............................................................................................................................................
TCP and UDP/IP ................................................................................................................................
DHCP ...............................................................................................................................................
TFTP .................................................................................................................................................
SNMP ...............................................................................................................................................
9-1
9-2
9-2
9-2
9-2
9-4
9-5
9-5
9-5
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Chapter 10
Web-based Management System ............................................... 10-1~10-10
Check IP Address ............................................................................................................................ 10-1
Windows 98 SE (Second Edition) ................................................................................................................... 10-1
Windows 2000 .................................................................................................................................................... 10-2
Connecting the website .....................................................................................................................10-3
Information Lists............................................................................................................................... 10-4
Cable Modem General Information ................................................................................................................ 10-4
Headend Infomatino ......................................................................................................................................... 10-5
RF Signal Information ...................................................................................................................................... 10-6
Upstream Information....................................................................................................................................... 10-7
Changing the Downstream Frequency ........................................................................................................... 10-8
Selecting Regions ............................................................................................................................................... 10-9
Appendix A Troubleshooting ......................................................................... A-1~A-22
Troubleshooting in Physical Layer ....................................................................................................... A-1
Instruments Needed .......................................................................................................................................... A-1
Location of Test Points ...................................................................................................................................... A-2
On-site Check ..................................................................................................................................................... A-3
Power Check ....................................................................................................................................................... A-4
Oscillator Check ................................................................................................................................................. A-5
Display Check .................................................................................................................................................... A-6
Down Stream Chcek .......................................................................................................................................... A-7
Up Stream Check ............................................................................................................................................. A-13
Ping Test ............................................................................................................................................................ A-17
Troubleshooting in Network Layer ..................................................................................................... A-20
Appendix B
Testing InfoRanger .......................................................................B-1~B-10
Purpose of the Plan ........................................................................................................................... B-1
Feature Set ........................................................................................................................................ B-1
Typical Hardware Setup ..................................................................................................................... B-1
InfoRanger Test Topology ................................................................................................................... B-2
Typical Suggested Tests ...................................................................................................................... B-3
Test Environment and Setup Overview ................................................................................................. B-3
Setting Up the Test Environment .......................................................................................................... B-3
Understanding the Test Environment ................................................................................................... B-4
Setting Up the Headend ..................................................................................................................... B-4
About the Up Converter, Diplexer, and Attenuators .............................................................................. B-5
Setting Up the Support Services .......................................................................................................... B-6
Setting Up the TFTP Server ............................................................................................................................... B-6
Setting Up the DHCP Server ............................................................................................................................. B-7
Setting Up the TOD Server ................................................................................................................................ B-7
Configuring the Client PCs ................................................................................................................. B-8
Setting Up InfoRanger for the First Time ............................................................................................. B-8
To Begin the Debugging Process ......................................................................................................... B-9
Basic Information ................................................................................................................................................ B-9
InfoRanger Resets ............................................................................................................................................... B-9
Gathering Debug Information ............................................................................................................ B-9
Begin by Describing the Problem ..................................................................................................................... B-9
Tracing the Module Status ................................................................................................................. B-10
Appendix C Part List ...................................................................................... C-1~C-16
InfoRanger SCM-120R Part List .......................................................................................................... C-1
InfoRanger SCM-120U Part List ......................................................................................................... C-9
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Appendix D Servicing Diagrams ....................................................................... D-1~D-3
Block Diagram ................................................................................................................................. D-1
Exploded View................................................................................................................................... D-2
InfoRanger SCM-120R........................................................................................................................................ D-2
InfoRanger SCM-120U ....................................................................................................................................... D-3
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7-1
Chapter 7 Structure of the InfoRanger
Introduction
InfoRanger is a user terminal within Cable Modem System that consists of ISP (Internet Service Provider),
Internet network, Headend, HFC network, InfoRanger, and PC, which receives ISP-provided Internet service
through Headend into PC to display (figure 7-1). InfoRanger also send signals to Headend (upstream), so a
two-way communication takes place between Headend and InfoRanger.
Internet Network
PC
PC
InfoRanger
InfoRanger
Headend
ISP
Figure 7-1
HFC net
InfoRanger
InfoRanger
PC
PC
Cable Modem System
While the existing phone line modem uses baseband phone line (Up to 30 KHz), InfoRanger, by using
broadband HFC network (Up to 1 GHz), realizes high data transmission rate ( Up to 40 Mbps for download,
up to 5 Mbps for upload).
InfoRanger consists of cable interface, microprocessor memory, Ethernet interface and circuits. This chapter
explains the signal streams sent to each part and the roles of each element.
7-2
Chapter 7
Structure of the InfoRanger
Cable Interface
Introduction
First, let’s have a brief look at the signal methods of downstream (receiving signal) and upstream (sending
signal).
Downstream (Receiving Signal)
1. RF signal: The Input downstream signal into InfoRanger is QAM converted (64-QAM/256-QAM) RF signal
whose Center Frequency is between 90 and 858MHz and its bandwidth 6 MHz.
2. IF signal: This RF signal is inputted through F-connector of tuner, then down converted in the tuner to be
IF signal whose center frequency of 43.75MHz and bandwidth of 6 MHz.
3. Secondary amplification: After going through SAW (Surface Acoustic Wave) filter, the converted IF signal
is authorized for uPC2798 with the built- in Down Converter/AGC Amp to be amplified to become
center frequency of 43.75MHz and bandwidth of 6 MHz.
4. Authorized as CN9414 IC: The amplified secondary IF signal, after going through DS filter, is inputted to
CN9414 IC with the built-in 64/256 QAM receiver.
Upstream (Sending Signal)
1. Data Occurrence: Upstream digital data occurred in the microprocessor inside the CN9414 is converted to
QPSK/16-QAM analog signal with center frequency of 5 ~42 MHz and bandwidth of 200K ~3.2 MHz.
2. Signal Conversion: The converted signal, after going through BPF in 5 M ~ 42 MHz, is inputted as
programmable power amp MAX3510.
3. Output for Cable: First the input signal is output with appropriate power level in MAX3510. Second, it
goes through BPF. Finally, it is output for the cable through the F-connector of the tuner.
The following displays briefly the signal streams in the cable interface part.
Downstream
90~858 MHz
RF
TRNER
SAW
AGC/
Down conv
LPF
RF AGC
frequency control
MPU/MAC/PHY/CN9414
MEMORY
DIPLEXER
10base-T
Ethernet
Transceiver
Power control
BPF
5~42 MHz
Amplifier
RJ45 IF
BPF
(Anti-aliasing filter)
Upstream
Figure 7-2 Cable Interface Part Block Diagram
7-3
Downstream
Tuner (4737PY5)
IF Signal Conversion
In order to convert input RF signal with center frequency of fc (90<fc<860MHz) into IF signal with center
frequency of43.75MHz, I2C Bus Line (Data, Clock) is put into SDA (#10), SCL (#9) terminals in the tuner
from RF_SDA (#C5), RF_SCL (#A5) terminals of CN9414, respectively. CN9414 has the tuning frequency
information.
The following is the timing diagram of I2C Bus interface.
Figure 7-3 Tuner Control Signal Timing diagram
Also, control signal on tuner AGC comes out of AGC_RF (#D3) of CN9414 to be converted into a 3.6V DC
value in a circuit composed of R124, C147, R422, C407 and U404. Then, the converted signal is put into AGC
(#5) of the tuner. Here, the control signal is a PWM (Pulse Width Modulation) signal and the larger the Duty
Cycle, the bigger the DC value that the control signal is converted into.
DC-DC Converter
Composed of U802 (TK11819), L807, L808, C821, C822, C823, C824 and R809, DC-DC converter generates
33V DC for the tuner from 5V power. The voltage is put into 33V (#7) terminal of the tuner.
Down converter/AGC Amp (uPC2798)
IF signal input
IF signal that is put out through IF_OUT (#12, #13) terminals of the tuner, after going through SAW filter
(X6964M100) and built-in R414, R415, C411, C412 and R401 for Impedance Matching, is authorized for
AGC_IN1, AGC_IN2 (#1, #2) terminals in Down-Converter/AGC Amp (uPC2798).
Here, the IF signal is sent in Differential Mode along the two lines in order to reduce the effect of the
Common Mode Noise in each line.
IF Signal Amplification
Input IF signal is amplified through AGC Amp within uPC2798. Then, the control signal that comes out of
AGC_IF(#C2) terminal in CN9414 goes through LPF composed of R123, C162, R402, C413, R403, and R404 to
be filtered as DC value and finally be put into VAGC (#3) terminal in uPC2798 for controlling the degree of
amplification.
IF Signal Output
The secondary IF signal identical to the first IF signal is filtered through LPF composed of C418, R407, C419,
L403, L404, L405, C421, C422, C423, and L407, and again goes through the amplifier within the IC before it is
put out through OUT1, OUT2 (#12, #11) terminals of uPC2798. The output secondary IF signal is put into
+IF_OUT, -IF_OUT (#H1, #G1) terminals of CN9414 through R412, R413, C429, C431 and C430.
7-4
Chapter 7
Structure of the InfoRanger
DC-DC Converter
DC-DC converter, composed of U403, C434, and C435, generates 9V DC for AGC amplification inside
uPC2798 from 12V power. The generated power is put into VCC2(#13) terminal of uPC2798.
100MHz Clock
100 MHz(120MHz) clock needed in CN9414 is generated in Crystal (Y101), C102, C103, C104 and L101, and
then put into XTI,XTO (#J1,#K1) terminals.
Dual AGC Operatrions
As shown in the Fig. 2 (Downstream Block Picture), the downstream circuit composed of tuner (4737PY5),
SAW filter (X6964M), down converter/AGC Amp (uPC2798), Cable MAC/PHY (CN9414) is in dual AGC
loop.
Measuring AGC Control Voltage (AGC (#5), uPC2798 VAGC (#3) of the tuner) according to input signal
level reveals that the tuner AGC works as critical control signal for stronger input signals while uPC2798
AGC works as major control signal for weaker ones. Therefore, for the entire input signal level, a linear AGC
control is in the works through Dual AGC Operations.
64-QAM
256-QAM
Input Signal Level
(dBmV)
Tuner AGC Input
Voltage (Volt)
uPC2798 AGC
Input Voltage (Volt)
Tuner AGC Input
Voltage (Volt)
uPC2798 AGC
Input Voltage (Volt)
+20
1.52
1.18
1.53
1.18
+15
1.65
1.18
1.72
1.18
+10
2.06
1.18
2.08
1.18
+5
2.53
1.18
2.55
1.18
0
2.71
1.18
2.71
1.18
-5
2.94
1.18
2.93
1.18
-10
3.65
1.19
3.61
1.18
-15
3.65
1.32
3.65
1.31
-20
3.65
1.40
3.65
1.39
Table 7-1 AGC Control Voltage Chnges according to Input Signal Level
7-5
Upstream
As shown in Figure 7-2, upstream is composed of Cable MAC/PHY (CN9414), OP Amp Driver (MAX3510)
and other peripheral circuits.
BPF(Anti-alias Filter)
The output Analog converted upstream signal through +TX_IN, -TX_IN (#T1, #R1) terminals of CN9414,
goes in the Differential Mode. It goes through BPF that passes signals in 5~42MHz only.
Composed of C807, L803, C808, R804, R805, R806, R807, C804, C805, L801, L802, L804 and L805, BPF filters
out the Harmonics and the signal noise from CN9414.
Power Amp (MAX3510)
The three signals (TXASEL, TX_SDA,TX_SCL) for controlling upstream power is transmitted from CN9414
IC to MAX3510 IC. How the three signals are combined determines the level satisfying DOCSIS SPEC
between 8dBmV and 58dBmV.
1. Input : Upstream signal comes out of CN9414 to go through the first BPF is put into +VIN (#5), -VIN (#6)
terminals of MAX3510.
2. Output : Input signal goes through PGA (Programmable-Gain Amplifier) inside the ARA05050 and is
put out of +VOUT (#16), -VOUT (#15) terminals. Output signal from +VOUT, -VOUT terminals
is processed impedance matching as 300ohm and becomes Single-ended signal with impedance
matching of 75ohm as it goes through the transformer (T801) with voltage ratio of 2 to 1.
Cable MAC/PHY (CN9414)
CN9414 is an integrated IC of four features: 64/256 QAM receiver with downstream PHY function,
QPSK/16 QAM Transmitter with upstream PHY function, Cable MAC and microprocessor.
64/256 QAM Receiver
Downstream signal in Differential Mode that is put into +IF_OUT, -IF_OUT (#H1, #G1) terminals of CN9414
first goes through the following steps.
1. amplified by PGA(Programmable Gain Amplifier)
2. converted to digital by 10-Bit A/D converter
3. demodulated as digital data after going through QAM Demodulator
First, digital signal processes such as phase recovery and adaptive equalizer are done on the demodulated
digital data. Then, as it goes through FEC (Forward Error Correction) such as Trellis, Decoding,
Deinterleaving, and Reed-Solomon decoding, it is converted into the original Serial digital data with errors
corrected. The corrected data is finally sent to cable MAC.
16 QAM/QPSK Transmitter
Upstream data that has been through Cable MAC of CN9414 is sent to the upstream transmitter part.
The transmitted data will in for channel coding such as Randomizing, Reed-Solomon encoding to recover
the errors generated during the transmission. And then, it is converted into digital QAM data by the
processes such as Pre-Equalizing, Pulse Shaping, Interpolation, and QAM modulation.
The modulated data is converted into analog data by D/A converter inside the CN9414 to be put out
through +TX_IN, -TX_IN (#T1, #R1) terminals in the Differential Mode.
Cable MAC
This is where MAC algorithm is realized to enable multiple users to communicate in the cable network.
This extracts MAC frame from downstream data to store in SRAM and transmits it to the transmitter part of
an authorized time slot after the upstream data stored in SRAM is made as MAC frame.
7-6
Chapter 7
Structure of the InfoRanger
Microprocessor and Momory Interface
Microprocessor and memory interface part consists of a memory device, Ethernet and a microprocessor
(CN9414) that controls the entire operation by Operation Code. See the following diagram.
Power
+5.0Va
+5.0V
+3.3V
+3.3Va
+2.5v
SDRAM
1x16bitx4bank
Flash
2Mx16bit
ETX
Tx Control
Ethernet
Tranceiver
LXT972
Ethernet
ERX
RF part
Tuner
RF Control
CPU
CN9414
USB
AGC
RS 232
Figure 7-4 SCM120R Board Block Diagram (CN9414 solution)
Microprocessor(CN9414)
Configuration
There are two 32 Bit RISC processors in CN9414. As shown in Figure 7-5, the processor consists of memory
related modules and peripheral modules.
The following is a brief description of critical modules to the circuit and their function.
- The Two 32-bit RISC microprocessors operating in100MHz, 120MHz internal clock, respectively.
(35.84MHz for external clock)
- SRAM internal memory
- Timer, Clock pulse generator (Watchdog timer, Interrupt)
- Host interface for external memory access (Address decoding, Wait state generation)
- SDRAM Interface (RAS, CAS signals)
- DMA Controller
- Ethernet PHY
- Cable MAC
- Cable PHY
- Serial Interface (UART)
7-7
Figure 7-5 CN9414 Block Diagram
Interrupt
ARM has two interrupts FIQ and IRQ. FIQ interrupt has a higher priority over IRQ interrupt. In the circuit,
there is no interrupt generated by external hardware.
Apart from FIQ and IRQ, there are two additional internal interrupts as follows.
- Software watchdog and other timers (internal interrupt)
- UART (internal interrupt)
7-8
Chapter 7
Structure of the InfoRanger
Host Interface
ARM, with built-in host interface, manages external memory access. CN9414 has a direct access to eight flash
memories and other memory devices using host interface controller. The memories used through the host
interface of InfoRanger are flash ones.
Flash memories are allocated for CS0 (HCS0) and the interface can be set as either 8 bit or 16bit. The interface
range is determined by HSEL Pin (W10) in CPU. For InfoRanger that its HSEL pin is set as "Low", the
interface is 16bit. CN9414 is connectable for up to 4Mbyte.
Though rarely the case currently, InfoRanger can use PROM, NVRAM or peripheral elements in
proper parts.
The following table shows the source and Chip Select Signal available for CN9414.
AREA
ADDRESS
DEVICE
DATA WIDTH
USE
0
0x0040_0000
0x007F_FFFF
Flash memory($Mbyte)
16bit
/HCS[0]
1
0x0020_0000
0x0023_FFFF
256Kbyte
space
/HCS[1]
2
0x0024_0000
0x0027_FFFF
256Kbyte
space
/HCS[2]
3
0x0028_0000
0x0028_FFFF
64Kbyte
space
/HCS[3]
4
0x0029_0000
0x0029_FFFF
64Kbyte
space
/HCS[4]
5
0x002A_0000
0x002A_FFFF
64Kbyte
space
/HCS[5]
6
0x002B_0000
0x002B_FFFF
64Kbyte
space
/HCS[6]
7
0x002C_0000
0x002C_FFFF
64Kbyte
space
/HCS[7]
8
0x002D_0000
0x002F_FFFF
192Kbyte
Table 7-2
Reserved for ASB Registers
Memory Map
SDRAM Controller
There is an XMAC (eXpansion Memory Acess Controller) inside ARM, which works as SDRM for up to
8Mbyte SDARM and 16bit interface. Here, SDRAM is driven as 100MHz.
The available SDRAM configuration is following:
Total
Memory
Memory
Configuration
# SDRAMs
SDRAM
Configuration
SDRAM
Capacity
SDRAM #
Banks
SDRAM #
Rows
SDRAM #
Cols
2MB
1M x 16
1
1M x 16
16Mb
2
2K
256
4MB
2M x 16
2
2M x 8
16Mb
2
2K
512
8MB
4M x 16
1
4M x 16
64Mb
4
4K
256
Table 7-3 SDARM Configuration
7-9
Internal Memory and Memory MAP
There are Internal memory (SRAM) and Register inside ARM, and their address allocation is as follows.
AREA
1
2
ADDRESS
0x0000 0000
0x0000 001F
0x0000 0020
0x000F FFFF
0x0010 0000
0x0010 001F
0x0010 0020
0x0011 FFFF
DEVICE
DATA
WIDTH
32
USE
Read Only Memory
Descriptions
ARM #1 Vector table
ROM/FLASH
32
ROM/FLASH
32
ARM #2 Vector table
(Internal)
32
ARM #2 Instruction
Memory (Internal)
24K*32 SRAM(AIM)
3
0x0014 0000
0x0014 FFFF
16K*32 SRAM(ADM)
32
ARM #2 Data
Memory (Internal)
4
0x0018 0000
0x0018 7FFF
8K*32 SRAM
32
ASB SRAM(Internal)
0x0020 0000
0x0023 FFFF
EPROM(256Kbyte)
space
/HCS[1]
0x0024 0000
0x0027 FFFF
EPROM(256Kbyte)
space
/HCS[2]
0x0028 0000
0x0028 FFFF
64Kbyte
space
/HCS[3]
0x0029 0000
0x0029 FFFF
64Kbyte
space
/HCS[4]
0x002A 0000
0x002A FFFF
64Kbyte
space
/HCS[5]
0x002B 0000
0x002B FFFF
64Kbyte
space
/HCS[6]
0x002C 0000
0x002C FFFF
64Kbyte
space
/HCS[7]
0x002D 0000
0x002F FFFF
192Kbyte
64
5
6
Reserved for ASB
Registers
0x0030 0000
0x0030 0070
32bit
Reserved for internal
DMA Controller Registers
0x0031 0000
0x0031 0023
32bit
Reserved for internal
Cable MAC Registers
0x0032 0000
0x0032 0023
64, 32, 16
Reserved for internal
Ethernet MAC Registers
0x0033 0000
0x0033 0023
64, 32, 16
Reserved for internal
USB Registers
0x0034 0000
0x0034 0028
8.32bit
Reserved for internal
DES#1
0x0036 0000
0x0036 0007
32bit
0x0035 0010
0x0037 000c
0x0038 0000
0x0038 0028
Reserved as Cable PHY
Register Interface
Reserved for internal
Miscellaneous Registers
8.32bit
Host Mast-mode
Peripherals I/F
Reserved for internal
DES#2
APB Bridge
dword access only
7-10
Chapter 7
Structure of the InfoRanger
AREA
ADDRESS
DEVICE
7
0x0040_0000
0x007F_FFFF
8
0x0080 0000
0x00FF FFFF
DATA
WIDTH
USE
16bit
/HCS[0]
Host Master mode
Flash Interface
SDRAM
External DRAM
Interface
Descriptions
Table 7-4 Memory MAP
Clock Pulse Generator
InfoRanger requires Clock Sources, which are set as follows.
y CPU : 35.8MHz or 46.8MHz crystal (for CN9414)- determined by the pin A10 in CPU.
- H : 46.8MHz
- L : 35.8MHz
y Ethernet tranceiver : 25 MHz (from CPU (all pins) Ethernet tranceiver (pin 1))
y SDRAM (KM416S4030CT-F8) : 100 MHz (from CPU (pin M18) SDRAM (pin 38))
y USB : 60MHz
y Upstream : 143.36MHz
y Downstream : 45.84MHz
Clock
Reference
Source
FCLK
XFCK
Typ
Freq(MHz)
PLL
Frequency
Oper
Output
frequency
45.84MHz
120MHz
Fout=Fx*M.N
Programmable
45.84MHz
60MHz
Fout/2
45.84MHz
100MHz
Fout=Fx*M.N
45.84MHz
50MHz
Fout/2
APB Bus Clock
Cable Upstream
D/A Clk
Crystal
UCLK
XBCK
Reference
Freq(MHz)
BCLK
PCLK
Crystal
Description
ARM940T fast
clock in
USB timing
reference
Programmable
ASB Bus Clock
CUCK
Crystal
45.84MHz
143.36MHz
Fout=4*Fs
CDUK
Crystal
45.84MHz
35.84MHz
N/A
Cable
Downstream
Clock
EPCLK
BCLK
100MHz
25MHz
N/A
Ethernet Phy
Clock
Table 7-5 Clock Sources
PLL
CPU has three built-in PLLs. One is used for the analog part while other two are for digital.
- Analog PLL :
when PLL is used for analog, four-fold frequency of the input (crystal) frequency is in use.
- Digital PLL :
the two remaining PLLs used for digital are adjusted as program through the internal register.
The InfoRanger part is used as 120MHz and 100MHz.
7-11
CPU Pin E1
CPU Pin E1 (PLLtst) is used to determine at hardware level whether to bypass PLL part in CPU. When the
pin is in ‘H’, PLL part is bypassed and then pin TBUCK (pin M1) is used to drive the analog part.
The function can be controlled at software level using a software bit, BYPASS_PLL. When controlling at
software, set PLLtst and TBUCK as 'L'.
CPU Pin B10
When CPU pin B10 (XPB) is in ‘H’, PLL is bypassed, so XFCK(pin C10) and XBCK are used as input.
When the pin is in ‘L’, XFCK (pin C10), XBCK are used as output.
CPU Pin A11
CPU pin A11(XBCK) is used as system clock input in PLL mode while it is used as Ethernet mast clock out
put in normal mode.
Cable Media Access Controller Interface
CN9414 has Cable MAC, Cable PHY and others. Cable PHY is divided into downstream and upstream.
y Downstream: Downstream sends signal that is modulated and encoded in Headend equipment. The
modulated signal is sent to cable MAC after it is demodulated and decoded in the user cable modem.
y Upstream: Upstream modulates and encodes signal to send to cable Headend equipment.
Downstream part is composed of as follows.
y A/D Converter
y Demodulator
y Forward Error correction
- Trellis Decoder
- Differential Decoder
- FEC Frame Synchronizer
- Derandomizer
- Deinterleaver
- Reed-Solomon Decoder Error Detection
- MPEG Transport Packet Synchronizer
y Clock smoother
Upstream part is composed of as follows.
y Modulator
- Preamble
- Reed-Solomon Encoder
- Scrambler, Bit-to-symbol Mapper
- Differential Encoder
- FIR and interpolation filters, Barrel shifter, and Quadrature Modulator
y Amplifier Control Supporter
7-12
Chapter 7
Structure of the InfoRanger
Ethernet MAC
Since Conexant CPU CN9414 has built-in EMAC (Ethernet Media Access controller), it sends and receives
data by externally connecting to MII (Media Independent Interface).
EMAC makes both 10/100M MII-compatible Ethernet device mode and 7-wire HomeLan device mode
programmable.
PIN
Ethernet Mode
HomeLAN Mode
ETXCK
Tx clock
Tx clock
ETXEN
Tx enable
Tx enable
ETXD[0,1,2,3]
bit 0 of 4 bit parallel Tx data
Serial Tx data
ECOL
Collision
Collision
ECRS
Carrial
Carrial
ERXCK
Rx clock
Rx clock
ERXD[0,1,2,3]
bit 0 of 4 bit parallel Rx data
Serial Rx data
Table 7-6
Media Independent Interface Signal
Flash Memory(AMD29DL323D, Intel28F320)
InfoRanger uses one flash memory with 4Mbyte capacity. The memory consists of 16Bit data bus (HAD0 ~
HAD15) and 21 Bit address bus (HC1~HC7, HAD16 ~ HAD29).
The size of flash memory must be no larger than 4Mbyte in CN9414.
Memory Part
4MByte flash memory largely consists of three parts.
1. First 1Mbyte : Bootrom Image
2. The next 1Mbyte : Working Image 1
3. The final 1Mbyte : Working Image2
Memory Access
Read Access Time of Flash Memory is 100ns. Access time is defined by setting HST_WST (0x002D004) register
inside the microprocessor. Holding Time is set in the register HST_XFER_CNTL (0x002D008).
7-13
Reading and Writing
Flash memory access is selected by HC [0] (pin Y17), HC [8] (pin V12) and HC [9] (pin Y11) of the
microprocessor and address. The addresses allocated for flash memory are from 0x400000 to 0x7FFFFF.
You can both read and write on Flash memory. The major control signals for the memory are HC [0] pin
Y17), HC [8] (pin V12), and HC [9] (pin Y11). These signals all operate as Active Low.
1. When writing, Chip Enable signal (HC [0]) and Write enable (HC [9]) operate as Active “Low”.
2. When reading, Chip Enable signal (HC [0]) and Output enable (HC [9]) operate as Active “Low”
The following pictures Figure 7-6 and Figure 7-7 show Flash Read and Write Timing, respectively.
Figure 7-6 Flash Memory Read Timing
Figure 7-7
Flash Memory Write Timing
7-14
Chapter 7
Structure of the InfoRanger
SDRAM(K4S641632D)
DRAM
SDRAM is in use for InfoRanger. The memory consists of 16 Bit Data bus (D0 ~ D15) and 12 Bit Address bus
(A0 ~ A11). The access time for DRAM is 80ns. Control signal for DRAM consists of RAS (#18), CAS (#17),
WE (#16) and CS (#19).
SDRAM
SDRAM memory access is driven by RAS signal generated in MRAS (#G18) of microprocessor and CAS
signal generated in MCAS (#H19).
SDRAM memory address consists of 11 Bit (row) and 8 Bit (column). When RAS is Low addresses in the
rows are valid and when CAS is Low addresses in columns are valid. The final address is determined by the
combination of row and the column addresses.
Reading and Wrinting
- When reading, the equipment is selected by Chip Select (Low) signal generated in microprocessor _MCS
(G19) terminal while the data is read by the addresses composed of RAS and CAS, and the signal (High)
generated in microprocessor _MWE (#L18) terminal.
- When writing, the equipment is selected by Chip Select (Low) signal generated in microprocessor _MCS
(G19) terminal while the data is written by the addresses composed of RAS and CAS, and the signal (High)
generated in microprocessor _MWE (#L18) terminal.
The compressed image stored in flash memory is decompressed in SDRAM when the power is provided.
The image consists of operation code, Configuration Parameter and Data Buffer.
7-15
User Interface
Ethernet Tranceiver (LXT 972)
Sending and Receicing Signals
y Sending signal : Ethernet tranceiver interfaces the CPU and Ethernet line. When sending signal, it
Menchester encodes digital data to convert into analog data for output.
y Receiving signal : When receiving signal, it demodulates analog data into digital signal and Menchester
decodes to send to the processor.
Register
Ethernet tranceiver has 32 internal registers. When the power is provided, these registers are set as default
value and can be also set by users through CPU.
Register setting data is transmitted by MDIO (#42) while the clock is sent by MDC (#43).
Clock and Loopback
LXT972 supports 10/100Mbps Full-duplex and operates as 3.3V. Power consumption is about300mW.
1) External clock requirements
External clock sources (25 MHz for100 Mbps, 2.5MHz for 10Mbps) or crystal
2) MDIO clock requirements
MII management channel (MDIO) uses external clock of up to 8MHz.
3) Loopback
- operational loopback
; 10Mbps half duplex support (register 16 , 8bit = 0)
- test loopback
; 100TX, 10TX support (register 0, 14bit = 1
register 0, 8bit = 1
register 0, 12bit = 0)
The following is a brief block diagram of Ethernet tranceiver and CPU.
7-16
Chapter 7
Structure of the InfoRanger
Ethernet Line Interface
Ethernet Line interface part is composed of a transformer and several passive elements.
Others
Power
InfoRanger uses 12 V DC power adapter and the power is provided through power jack (P501).
The power voltage in use for board is 5Va, 5V, 3,3Va, 3.3V, and 2.5V. Internally DC-DC converter is used for
each voltage.
Display
InfoRanger has four LEDs (LED601, LED602, LED603, LED604) each of which is controlled by CPU GPIO
port. The content for each is POWER_LED, RECEIVE_OK_LED, SEND_OK_LED, and PC_LED.
Switch
Reset Switch
InfoRanger has MAX708S, a Voltage Monitoring Supervisor. When power is authorized, MAX708S _MR (#1)
terminal maintains 3.3V. However if you press and release S101, a circuit connected to Ground from
+3.3_VCC through R219 is set and _MR terminal generates pulse that drops to 0V and surges back to 3.3V.
MAX708S detects the pulse and sends Falling Pulse to microprocessor _HRST (#W4).
Pulse drop and surge as hardware reset signal reboots InfoRanger.
Connectors
F-connector( withinTU401)
Downstream and upstream signals are sent and received through this cable port. .
Ethernet connector (P301)
During communicating with PC, the connector Ethernet sends and receives Ethernet packets.
Power Jack (P501)
The 12V DC power is input through this connector from power adapter.
JTAG Port(U601)
JTAG port is used for loading data into flash memory through Multi-ICE.
RS-232C Port (P602)
RS-232C port is used for communication, when InfoRanger is being debugged in connection with Console.
Here, RS-232C cable is required as well as Console Jig board that changes the signal level between the
InfoRanger and Console. (3.3V Volt ↔ +10/-10 Volt)
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Part No
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Regulator
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U504
Regulator
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U502
Regulator
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SN75240
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TK11819
M401
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T801
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U503
Regulator
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93MHz~855MHz
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RESET
P301
RJ-45
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25.0MHz
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7
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