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LED TV SERVICE MANUAL CHASSIS : LA32B MODEL : 32LN5300 32LN5300-UB CAUTION BEFORE SERVICING THE CHASSIS, READ THE SAFETY PRECAUTIONS IN THIS MANUAL. P/NO : MFL67647401 (1212-REV00) Printed in Korea CONTENTS CONTENTS .............................................................................................. 2 PRODUCT SAFETY ................................................................................. 3 SPECIFICATION ....................................................................................... 4 ADJUSTMENT INSTRUCTION ................................................................ 9 TROUBLE SHOOTING ............................................................................ 16 BLOCK DIAGRAM.................................................................................. 22 EXPLODED VIEW .................................................................................. 24 SCHEMATIC CIRCUIT DIAGRAM .............................................................. -2- SAFETY PRECAUTIONS IMPORTANT SAFETY NOTICE Many electrical and mechanical parts in this chassis have special safety-related characteristics. These parts are identified by in the Schematic Diagram and Exploded View. It is essential that these special safety parts should be replaced with the same components as recommended in this manual to prevent Shock, Fire, or other Hazards. Do not modify the original design without permission of manufacturer. General Guidance Leakage Current Hot Check (See below Figure) Plug the AC cord directly into the AC outlet. An isolation Transformer should always be used during the servicing of a receiver whose chassis is not isolated from the AC power line. Use a transformer of adequate power rating as this protects the technician from accidents resulting in personal injury from electrical shocks. It will also protect the receiver and it's components from being damaged by accidental shorts of the circuitry that may be inadvertently introduced during the service operation. If any fuse (or Fusible Resistor) in this TV receiver is blown, replace it with the specified. When replacing a high wattage resistor (Oxide Metal Film Resistor, over 1 W), keep the resistor 10 mm away from PCB. Keep wires away from high voltage or high temperature parts. Do not use a line Isolation Transformer during this check. Connect 1.5 K / 10 watt resistor in parallel with a 0.15 uF capacitor between a known good earth ground (Water Pipe, Conduit, etc.) and the exposed metallic parts. Measure the AC voltage across the resistor using AC voltmeter with 1000 ohms/volt or more sensitivity. Reverse plug the AC cord into the AC outlet and repeat AC voltage measurements for each exposed metallic part. Any voltage measured must not exceed 0.75 volt RMS which is corresponds to 0.5 mA. In case any measurement is out of the limits specified, there is possibility of shock hazard and the set must be checked and repaired before it is returned to the customer. Leakage Current Hot Check circuit Before returning the receiver to the customer, always perform an AC leakage current check on the exposed metallic parts of the cabinet, such as antennas, terminals, etc., to be sure the set is safe to operate without damage of electrical shock. Leakage Current Cold Check(Antenna Cold Check) With the instrument AC plug removed from AC source, connect an electrical jumper across the two AC plug prongs. Place the AC switch in the on position, connect one lead of ohm-meter to the AC plug prongs tied together and touch other ohm-meter lead in turn to each exposed metallic parts such as antenna terminals, phone jacks, etc. If the exposed metallic part has a return path to the chassis, the measured resistance should be between 1 MΩ and 5.2 MΩ. When the exposed metal has no return path to the chassis the reading must be infinite. An other abnormality exists that must be corrected before the receiver is returned to the customer. Copyright © LG Electronics. Inc. All rights reserved. Only for training and service purposes -3- LGE Internal Use Only SERVICING PRECAUTIONS CAUTION: Before servicing receivers covered by this service manual and its supplements and addenda, read and follow the SAFETY PRECAUTIONS on page 3 of this publication. NOTE: If unforeseen circumstances create conflict between the following servicing precautions and any of the safety precautions on page 3 of this publication, always follow the safety precautions. Remember: Safety First. General Servicing Precautions 1. Always unplug the receiver AC power cord from the AC power source before; a. Removing or reinstalling any component, circuit board module or any other receiver assembly. b. Disconnecting or reconnecting any receiver electrical plug or other electrical connection. c. Connecting a test substitute in parallel with an electrolytic capacitor in the receiver. CAUTION: A wrong part substitution or incorrect polarity installation of electrolytic capacitors may result in an explosion hazard. 2. Test high voltage only by measuring it with an appropriate high voltage meter or other voltage measuring device (DVM, FETVOM, etc) equipped with a suitable high voltage probe. Do not test high voltage by "drawing an arc". 3. Do not spray chemicals on or near this receiver or any of its assemblies. 4. Unless specified otherwise in this service manual, clean electrical contacts only by applying the following mixture to the contacts with a pipe cleaner, cotton-tipped stick or comparable non-abrasive applicator; 10 % (by volume) Acetone and 90 % (by volume) isopropyl alcohol (90 % - 99 % strength) CAUTION: This is a flammable mixture. Unless specified otherwise in this service manual, lubrication of contacts in not required. 5. Do not defeat any plug/socket B+ voltage interlocks with which receivers covered by this service manual might be equipped. 6. Do not apply AC power to this instrument and/or any of its electrical assemblies unless all solid-state device heat sinks are correctly installed. 7. Always connect the test receiver ground lead to the receiver chassis ground before connecting the test receiver positive lead. Always remove the test receiver ground lead last. 8. Use with this receiver only the test fixtures specified in this service manual. CAUTION: Do not connect the test fixture ground strap to any heat sink in this receiver. Electrostatically Sensitive (ES) Devices Some semiconductor (solid-state) devices can be damaged easily by static electricity. Such components commonly are called Electrostatically Sensitive (ES) Devices. Examples of typical ES devices are integrated circuits and some field-effect transistors and semiconductor “chip” components. The following techniques should be used to help reduce the incidence of component damage caused by static by static electricity. 1. Immediately before handling any semiconductor component or semiconductor-equipped assembly, drain off any electrostatic charge on your body by touching a known earth ground. Alternatively, obtain and wear a commercially available discharging wrist strap device, which should be removed to prevent potential shock reasons prior to applying power to the unit under test. Copyright © LG Electronics. Inc. All rights reserved. Only for training and service purposes 2. After removing an electrical assembly equipped with ES devices, place the assembly on a conductive surface such as aluminum foil, to prevent electrostatic charge buildup or exposure of the assembly. 3. Use only a grounded-tip soldering iron to solder or unsolder ES devices. 4. Use only an anti-static type solder removal device. Some solder removal devices not classified as “anti-static” can generate electrical charges sufficient to damage ES devices. 5. Do not use freon-propelled chemicals. These can generate electrical charges sufficient to damage ES devices. 6. Do not remove a replacement ES device from its protective package until immediately before you are ready to install it. (Most replacement ES devices are packaged with leads electrically shorted together by conductive foam, aluminum foil or comparable conductive material). 7. Immediately before removing the protective material from the leads of a replacement ES device, touch the protective material to the chassis or circuit assembly into which the device will be installed. CAUTION: Be sure no power is applied to the chassis or circuit, and observe all other safety precautions. 8. Minimize bodily motions when handling unpackaged replacement ES devices. (Otherwise harmless motion such as the brushing together of your clothes fabric or the lifting of your foot from a carpeted floor can generate static electricity sufficient to damage an ES device.) General Soldering Guidelines 1. Use a grounded-tip, low-wattage soldering iron and appropriate tip size and shape that will maintain tip temperature within the range or 500 °F to 600 °F. 2. Use an appropriate gauge of RMA resin-core solder composed of 60 parts tin/40 parts lead. 3. Keep the soldering iron tip clean and well tinned. 4. Thoroughly clean the surfaces to be soldered. Use a mall wirebristle (0.5 inch, or 1.25 cm) brush with a metal handle. Do not use freon-propelled spray-on cleaners. 5. Use the following unsoldering technique a. Allow the soldering iron tip to reach normal temperature. (500 °F to 600 °F) b. Heat the component lead until the solder melts. c. Quickly draw the melted solder with an anti-static, suctiontype solder removal device or with solder braid. CAUTION: Work quickly to avoid overheating the circuit board printed foil. 6. Use the following soldering technique. a. Allow the soldering iron tip to reach a normal temperature (500 °F to 600 °F) b. First, hold the soldering iron tip and solder the strand against the component lead until the solder melts. c. Quickly move the soldering iron tip to the junction of the component lead and the printed circuit foil, and hold it there only until the solder flows onto and around both the component lead and the foil. CAUTION: Work quickly to avoid overheating the circuit board printed foil. d. Closely inspect the solder area and remove any excess or splashed solder with a small wire-bristle brush. -4- LGE Internal Use Only IC Remove/Replacement Some chassis circuit boards have slotted holes (oblong) through which the IC leads are inserted and then bent flat against the circuit foil. When holes are the slotted type, the following technique should be used to remove and replace the IC. When working with boards using the familiar round hole, use the standard technique as outlined in paragraphs 5 and 6 above. 3. Solder the connections. CAUTION: Maintain original spacing between the replaced component and adjacent components and the circuit board to prevent excessive component temperatures. Circuit Board Foil Repair Excessive heat applied to the copper foil of any printed circuit board will weaken the adhesive that bonds the foil to the circuit board causing the foil to separate from or "lift-off" the board. The following guidelines and procedures should be followed whenever this condition is encountered. Removal 1. Desolder and straighten each IC lead in one operation by gently prying up on the lead with the soldering iron tip as the solder melts. 2. Draw away the melted solder with an anti-static suction-type solder removal device (or with solder braid) before removing the IC. Replacement 1. Carefully insert the replacement IC in the circuit board. 2. Carefully bend each IC lead against the circuit foil pad and solder it. 3. Clean the soldered areas with a small wire-bristle brush. (It is not necessary to reapply acrylic coating to the areas). At IC Connections To repair a defective copper pattern at IC connections use the following procedure to install a jumper wire on the copper pattern side of the circuit board. (Use this technique only on IC connections). "Small-Signal" Discrete Transistor Removal/Replacement 1. Remove the defective transistor by clipping its leads as close as possible to the component body. 2. Bend into a "U" shape the end of each of three leads remaining on the circuit board. 3. Bend into a "U" shape the replacement transistor leads. 4. Connect the replacement transistor leads to the corresponding leads extending from the circuit board and crimp the "U" with long nose pliers to insure metal to metal contact then solder each connection. Power Output, Transistor Device Removal/Replacement 1. Heat and remove all solder from around the transistor leads. 2. Remove the heat sink mounting screw (if so equipped). 3. Carefully remove the transistor from the heat sink of the circuit board. 4. Insert new transistor in the circuit board. 5. Solder each transistor lead, and clip off excess lead. 6. Replace heat sink. Diode Removal/Replacement 1. Remove defective diode by clipping its leads as close as possible to diode body. 2. Bend the two remaining leads perpendicular y to the circuit board. 3. Observing diode polarity, wrap each lead of the new diode around the corresponding lead on the circuit board. 4. Securely crimp each connection and solder it. 5. Inspect (on the circuit board copper side) the solder joints of the two "original" leads. If they are not shiny, reheat them and if necessary, apply additional solder. 1. Carefully remove the damaged copper pattern with a sharp knife. (Remove only as much copper as absolutely necessary). 2. carefully scratch away the solder resist and acrylic coating (if used) from the end of the remaining copper pattern. 3. Bend a small "U" in one end of a small gauge jumper wire and carefully crimp it around the IC pin. Solder the IC connection. 4. Route the jumper wire along the path of the out-away copper pattern and let it overlap the previously scraped end of the good copper pattern. Solder the overlapped area and clip off any excess jumper wire. At Other Connections Use the following technique to repair the defective copper pattern at connections other than IC Pins. This technique involves the installation of a jumper wire on the component side of the circuit board. 1. Remove the defective copper pattern with a sharp knife. Remove at least 1/4 inch of copper, to ensure that a hazardous condition will not exist if the jumper wire opens. 2. Trace along the copper pattern from both sides of the pattern break and locate the nearest component that is directly connected to the affected copper pattern. 3. Connect insulated 20-gauge jumper wire from the lead of the nearest component on one side of the pattern break to the lead of the nearest component on the other side. Carefully crimp and solder the connections. CAUTION: Be sure the insulated jumper wire is dressed so the it does not touch components or sharp edges. Fuse and Conventional Resistor Removal/Replacement 1. Clip each fuse or resistor lead at top of the circuit board hollow stake. 2. Securely crimp the leads of replacement component around notch at stake top. Copyright © LG Electronics. Inc. All rights reserved. Only for training and service purposes -5- LGE Internal Use Only SPECIFICATION NOTE : Specifications and others are subject to change without notice for improvement. 1. Application range 3. Test method This spec sheet is applied LED TV with LA32Bchassis 1) Performance: LGE TV test method followed 2) Demanded other specification - Safety : UL, CSA, IEC specification - EMC: FCC, ICES, IEC specification 2. Test condition Each part is tested as below without special notice. 1) Temperature : 25 ºC ± 5 ºC(77 ± 9 ºF) , CST : 40 ºC±5 ºC 2) Relative Humidity: 65 % ± 10 % 3) Power Voltage Market Input voltage Frequency USA 110~240V 50/60Hz Remark Standard Voltage of each product is marked by models 4) Specification and performance of each parts are followed each drawing and specification by part number in accordance with BOM 5) The receiver must be operated for about 20 minutes prior to the adjustment 4. General Specification No Item Specification Result Remark 1. Receiving System 1) ATSC / NTSC-M / 64 QAM / 256 QAM 2. Available Channel 1) VHF : 02~13 2) UHF : 14~69 3) DTV : 02-69 4) CATV : 01~135 5) CADTV : 01~135 3. Input Voltage AC 100 ~ 240V 50/60Hz 4. Market NORTH AMERICA 5. Screen Size 32/39/42/47/50/55inch Wide (1920 × 1080) 55LN5400-UA 50LN5400-UA 47LN5400-UA 42LN5400-UA 42LN5300-UB 39LN5300-UB 32LN5300-UB 55LN5200-UA 47LN5200-UA 42LN5200-UA 32/37inch Wide (1366 × 768) 37LN530B-UA 32LN530B-UA 32LN520B-UA 6. Aspect Ratio 16:9 7. Tuning System FS Copyright © LG Electronics. Inc. All rights reserved. Only for training and service purposes -6- Mark : 110V, 60Hz (N.America) LGE Internal Use Only No 8. Item Module Specification Result Remark POLA LC550DUK-SEE1 LGD 55LN5400-UA Direct LC500DUE-SFR1 LGD 50LN5400-UA Direct LC470DUE-SFR1 LGD 47LN5400-UA Direct LC420DUE-SFR1 LGD 42LN5400-UA Direct LC420DUE-SFR1 LGD 42LN5300-UB POLA TBD AUO 42LN5300-UB POLA HC420DUN-SLFP1 LGD 42LN5300-UB POLA HC390DUN-VCFP1 CMI 39LN5300-UB POLA TBD AUO 39LN5300-UB POLA HC320DXN-VSFP1 CSOT 32LN5300-UB Direct LC320DUE-SFR1 LGD 32LN5300-UB Direct LC370DXE-SFR1 LGD 37LN530B-UA Direct LC320DXE-SFR1 LGD 32LN530B-UA POLA HC320DXN-SLFP1 LGD 32LN530B-UA Direct i-D LGD 55LN5200-UA Direct i-D LGD 47LN5200-UA Direct i-D LGD 42LN5200-UA Direct i-D LGD 32LN520B-UA 9. Operating Environment 1) Temp : 0 ~ 40 deg 2) Humidity : ~ 80 % 10. Storage Environment 1) Temp : -20 ~ 60 deg 2) Humidity : ~ 85 % Copyright © LG Electronics. Inc. All rights reserved. Only for training and service purposes -7- LGE Internal Use Only 5. Supported video resolutions 5.1. Component input(Y, CB/PB, CR/PR) No Resolution H-freq(kHz) V-freq.(kHz) Pixel clock Proposed 1. 720*480 15.73 60.00 13.5135 SDTV ,DVD 480I 2. 720*480 15.73 59.94 13.50 SDTV ,DVD 480I 3. 720*480 31.50 60.00 27.027 SDTV 480P 4. 720*480 31.47 59.94 27.00 SDTV 480P 5. 1280*720 45.00 60.00 74.25 HDTV 720P 6. 1280*720 44.96 59.94 74.176 HDTV 720P 7. 1920*1080 33.75 60.00 74.25 HDTV 1080I 8. 1920*1080 33.72 59.94 74.176 HDTV 1080I 9. 1920*1080 67.50 60.00 148.50 HDTV 1080P 10. 1920*1080 67.432 59.94 148.352 HDTV 1080P 11. 1920*1080 27.00 24.00 74.25 HDTV 1080P 12. 1920*1080 26.97 23.94 74.176 HDTV 1080P 13. 1920*1080 33.75 30.00 74.25 HDTV 1080P 14. 1920*1080 33.71 29.97 74.176 HDTV 1080P Resolution H-freq(kHz) V-freq.(kHz) Pixel clock Proposed 720*480 31.47 60.00 27.027 SDTV 480P 2. 720*480 31.47 59.94 27.00 SDTV 480P 3. 1280*720 45.00 60.00 74.25 HDTV 720P 4. 1280*720 44.96 59.94 74.176 HDTV 720P 5. 1920*1080 33.75 60.00 74.25 HDTV 1080I 6. 1920*1080 33.72 59.94 74.176 HDTV 1080I 7. 1920*1080 67.50 60.00 148.50 HDTV 1080P 8. 1920*1080 67.432 59.94 148.352 HDTV 1080P 5.2. HDMI Input (DTV) No DTV 1. 9. 1920*1080 27.00 24.00 74.25 HDTV 1080P 10. 1920*1080 26.97 23.976 74.176 HDTV 1080P 11. 1920*1080 33.75 30.00 74.25 HDTV 1080P 12. 1920*1080 33.71 29.97 74.176 HDTV 1080P Copyright © LG Electronics. Inc. All rights reserved. Only for training and service purposes -8- LGE Internal Use Only ADJUSTMENT INSTRUCTION 1. Application This spec. sheet applies to LA32B Chassis applied LED TV all models manufactured in TV factory 4. MAIN PCBA Adjustments 2. Specification (1) Because this is not a hot chassis, it is not necessary to use an isolation transformer. However, the use of isolation transformer will help protect test instrument. (2) Adjustment must be done in the correct order. (3) The adjustment must be performed in the circumstance of 25 ±5 ºC of temperature and 65±10% of relative humidity if there is no specific designation (4) The input voltage of the receiver must keep 100~240V, 50/60Hz (5) At first Worker must turn on the SET by using Power Only key. (6) The receiver must be operated for about 5 minutes prior to the adjustment when module is in the circumstance of over 15 ºC In case of keeping module is in the circumstance of 0°C, it should be placed in the circumstance of above 15°C for 2 hours In case of keeping module is in the circumstance of below -20°C, it should be placed in the circumstance of above 15°C for 3 hours. ※ Caution When still image is displayed for a period of 20 minutes or longer (especially where W/B scale is strong. Digital pattern 13ch and/or Cross hatch pattern 09ch), there can some afterimage in the black level area * Download (1) Execute ISP program “Mstar ISP Utility” and then click “Config” tab. (2) Set as below, and then click “Auto Detect” and check “OK” message If display “Error”, Check connect computer, jig, and set. (3) Click “Connect” tab. If display “Can’t ”, Check connect computer, jig, and set. (1) (2) (3) OK Please Check the Speed : To use speed between from 200KHz to 400KHz (4) Click “Read” tab, and then load download file(XXXX.bin) by clicking “Read” (4) filexxx.bin 3. Adjustment items 3.1. Main PCBA Adjustments (1) ADC adjustment : ADC adjustment is OTP (Auto ADC) (2) EDID download : HDMI ■ Above adjustment items can be also performed in Final Assembly if needed. Both Board-level and Final assembly adjustment items can be check using In-Start Menu (1.Adjust Check). 3.2. Final assembly adjustment (1) White Balance adjustment (2) RS-232C functionality check (3) Factory Option setting per destination (4) Shipment mode setting (In-Stop) (5) GND and HI-POT test (5) (7) ……….OK 3.3. Appendix (1) Shipment conditions (2) Tool option menu (3) USB Download (S/W Update, Option and Service only) (4) Preset CH Information Copyright © LG Electronics. Inc. All rights reserved. Only for training and service purposes (5) Click “Auto” tab and set as below. (6) Click “Run”. (7) After downloading, check “OK” message. (6) -9- LGE Internal Use Only 4.1. ADC Adjustment 4.2.5. EDID DATA 4.1.1. Overview ▪ ADC adjustment is needed to find the optimum black level and gain in Analog-to-Digital device and to compensate RGB deviation. ▪ ADC adjustment is OTP (Auto ADC) 4.2. EDID Download 4.2.1. Overview ▪ I t is a VESA regulation. A PC or a MNT will display an optimal resolution through information sharing without any necessity of user input. It is a realization of “Plug and Play”. 4.2.2. Equipment (1) Since EDID data is embedded, EDID download JIG, HDMI cable is not need. (2) Adjust by using remote controller 4.2.3. Download method (using DFT) ※ PC(for communication through RS-232C), UART baud rate: 115200 bps Command : aa 00 00 (Start Factory mode) Command : ae 00 10 (Download All EDID) Command : aa 00 90 (End of Factory mode) 4.2.4. Download method (using Service Remocon) (1) Press Adj. key on the Adj. R/C. (2) Select EDID D/L menu. (3) By pressing Enter key, EDID download will begin (4) If Download is successful, OK is display, but If Download is failure, NG is displayed. (5) If Download is failure, Re-try downloads. ※Caution : W hen EDID Download, must remove HDMI Cable. (6) EDID Write confirmation EDID D/L (PCM) HDMI1 : OK HDMI2 : OK 4.2.5.1. North America (PCM) 4.2.5.1.1. FHD Model ■ HDMI 1-FHD-8BIT (C/S : E808) EDID Block 0, Bytes 0-127 [00H-7FH] 0 10 20 30 40 50 60 70 0 1 2 3 4 5 6 7 8 9 A B C D E F ----------------------------------------------------------------------------| 00 FF FF FF FF FF FF 00 1E 6D 01 00 01 01 01 01 | 01 17 01 03 80 A0 5A 78 0A EE 91 A3 54 4C 99 26 | 0F 50 54 A1 08 00 31 40 45 40 61 40 71 40 81 80 | 01 01 01 01 01 01 02 3A 80 18 71 38 2D 40 58 2C | 45 00 40 84 63 00 00 1E 66 21 50 B0 51 00 1B 30 | 40 70 36 00 40 84 63 00 00 1E 00 00 00 FD 00 3A | 3E 1E 53 10 00 0A 20 20 20 20 20 20 00 00 00 FC | 00 4C 47 20 54 56 0A 20 20 20 20 20 20 20 01 E8 EDID Block 1, Bytes 128-255 [80H-FFH] 0 10 20 30 40 50 60 70 0 1 2 3 4 5 6 7 8 9 A B C D E F ----------------------------------------------------------------------------| 02 03 19 F1 48 90 22 20 05 04 03 02 01 23 09 57 | 07 67 03 0C 00 10 00 80 1E 02 3A 80 18 71 38 2D | 40 58 2C 04 05 40 84 63 00 00 1E 01 1D 80 18 71 | 1C 16 20 58 2C 25 00 40 84 63 00 00 9E 01 1D 00 | 72 51 D0 1E 20 6E 28 55 00 40 84 63 00 00 1E 8C | 0A D0 8A 20 E0 2D 10 10 3E 96 00 40 84 63 00 00 | 18 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 08 ■ HDMI 2-FHD-8BIT (C/S : E8F8) EDID Block 0, Bytes 0-127 [00H-7FH] 0 10 20 30 40 50 60 70 0 1 2 3 4 5 6 7 8 9 A B C D E F ----------------------------------------------------------------------------| 00 FF FF FF FF FF FF 00 1E 6D 01 00 01 01 01 01 | 01 17 01 03 80 A0 5A 78 0A EE 91 A3 54 4C 99 26 | 0F 50 54 A1 08 00 31 40 45 40 61 40 71 40 81 80 | 01 01 01 01 01 01 02 3A 80 18 71 38 2D 40 58 2C | 45 00 40 84 63 00 00 1E 66 21 50 B0 51 00 1B 30 | 40 70 36 00 40 84 63 00 00 1E 00 00 00 FD 00 3A | 3E 1E 53 10 00 0A 20 20 20 20 20 20 00 00 00 FC | 00 4C 47 20 54 56 0A 20 20 20 20 20 20 20 01 E8 EDID Block 1, Bytes 128-255 [80H-FFH] 0 10 20 30 40 50 60 70 Copyright © LG Electronics. Inc. All rights reserved. Only for training and service purposes - 10 - 0 1 2 3 4 5 6 7 8 9 A B C D E F ----------------------------------------------------------------------------| 02 03 19 F1 48 90 22 20 05 04 03 02 01 23 09 57 | 07 67 03 0C 00 20 00 80 1E 02 3A 80 18 71 38 2D | 40 58 2C 04 05 40 84 63 00 00 1E 01 1D 80 18 71 | 1C 16 20 58 2C 25 00 40 84 63 00 00 9E 01 1D 00 | 72 51 D0 1E 20 6E 28 55 00 40 84 63 00 00 1E 8C | 0A D0 8A 20 E0 2D 10 10 3E 96 00 40 84 63 00 00 | 18 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 F8 LGE Internal Use Only 4.2.5.1.2. HD Model 4.2.5.2. AC3 EDID Data 4.2.5.2.1. FHD Model ■ HDMI 1-HD (C/S : 7008) EDID Block 0, Bytes 0-127 [00H-7FH] 0 10 20 30 40 50 60 70 0 1 2 3 4 5 6 7 8 9 A B C D E F ----------------------------------------------------------------------------| 00 FF FF FF FF FF FF 00 1E 6D 01 00 01 01 01 01 | 01 17 01 03 80 A0 5A 78 0A EE 91 A3 54 4C 99 26 | 0F 50 54 A1 08 00 31 40 45 40 61 40 71 40 01 01 | 01 01 01 01 01 01 66 21 50 B0 51 00 1B 30 40 70 | 36 00 40 84 63 00 00 1E 64 19 00 40 41 00 26 30 | 18 88 36 00 40 84 63 00 00 1E 00 00 00 FD 00 3A | 3E 1E 53 10 00 0A 20 20 20 20 20 20 00 00 00 FC | 00 4C 47 20 54 56 0A 20 20 20 20 20 20 20 01 70 EDID Block 1, Bytes 128-255 [80H-FFH] 0 10 20 30 40 50 60 70 0 1 2 3 4 5 6 7 8 9 A B C D E F ----------------------------------------------------------------------------| 02 03 19 F1 48 10 22 20 05 84 03 02 01 23 09 57 | 07 67 03 0C 00 10 00 80 1E 02 3A 80 18 71 38 2D | 40 58 2C 04 05 40 84 63 00 00 1E 01 1D 80 18 71 | 1C 16 20 58 2C 25 00 40 84 63 00 00 9E 01 1D 00 | 72 51 D0 1E 20 6E 28 55 00 40 84 63 00 00 1E 8C | 0A D0 8A 20 E0 2D 10 10 3E 96 00 40 84 63 00 00 | 18 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 08 ■ HDMI 2-HD (C/S : 70F8) EDID Block 0, Bytes 0-127 [00H-7FH] 0 10 20 30 40 50 60 70 0 1 2 3 4 5 6 7 8 9 A B C D E F ----------------------------------------------------------------------------| 00 FF FF FF FF FF FF 00 1E 6D 01 00 01 01 01 01 | 01 17 01 03 80 A0 5A 78 0A EE 91 A3 54 4C 99 26 | 0F 50 54 A1 08 00 31 40 45 40 61 40 71 40 01 01 | 01 01 01 01 01 01 66 21 50 B0 51 00 1B 30 40 70 | 36 00 40 84 63 00 00 1E 64 19 00 40 41 00 26 30 | 18 88 36 00 40 84 63 00 00 1E 00 00 00 FD 00 3A | 3E 1E 53 10 00 0A 20 20 20 20 20 20 00 00 00 FC | 00 4C 47 20 54 56 0A 20 20 20 20 20 20 20 01 70 EDID Block 1, Bytes 128-255 [80H-FFH] 0 10 20 30 40 50 60 70 0 1 2 3 4 5 6 7 8 9 A B C D E F ----------------------------------------------------------------------------| 02 03 19 F1 48 10 22 20 05 84 03 02 01 23 09 57 | 07 67 03 0C 00 20 00 80 1E 02 3A 80 18 71 38 2D | 40 58 2C 04 05 40 84 63 00 00 1E 01 1D 80 18 71 | 1C 16 20 58 2C 25 00 40 84 63 00 00 9E 01 1D 00 | 72 51 D0 1E 20 6E 28 55 00 40 84 63 00 00 1E 8C | 0A D0 8A 20 E0 2D 10 10 3E 96 00 40 84 63 00 00 | 18 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 F8 Copyright © LG Electronics. Inc. All rights reserved. Only for training and service purposes - 11 - ■ HDMI 1-FHD-8BIT (C/S : E896) EDID Block 0, Bytes 0-127 [00H-7FH] 0 10 20 30 40 50 60 70 0 1 2 3 4 5 6 7 8 9 A B C D E F ----------------------------------------------------------------------------| 00 FF FF FF FF FF FF 00 1E 6D 01 00 01 01 01 01 | 01 17 01 03 80 A0 5A 78 0A EE 91 A3 54 4C 99 26 | 0F 50 54 A1 08 00 31 40 45 40 61 40 71 40 81 80 | 01 01 01 01 01 01 02 3A 80 18 71 38 2D 40 58 2C | 45 00 40 84 63 00 00 1E 66 21 50 B0 51 00 1B 30 | 40 70 36 00 40 84 63 00 00 1E 00 00 00 FD 00 3A | 3E 1E 53 10 00 0A 20 20 20 20 20 20 00 00 00 FC | 00 4C 47 20 54 56 0A 20 20 20 20 20 20 20 01 E8 EDID Block 1, Bytes 128-255 [80H-FFH] 0 10 20 30 40 50 60 70 0 1 2 3 4 5 6 7 8 9 A B C D E F ----------------------------------------------------------------------------| 02 03 1C F1 48 90 22 20 05 04 03 02 01 26 15 07 | 50 09 57 07 67 03 0C 00 10 00 80 1E 02 3A 80 18 | 71 38 2D 40 58 2C 04 05 40 84 63 00 00 1E 01 1D | 80 18 71 1C 16 20 58 2C 25 00 40 84 63 00 00 9E | 01 1D 00 72 51 D0 1E 20 6E 28 55 00 40 84 63 00 | 00 1E 8C 0A D0 8A 20 E0 2D 10 10 3E 96 00 40 84 | 63 00 00 18 00 00 00 00 00 00 00 00 00 00 00 00 | 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 96 ■ HDMI 2-FHD-8BIT (C/S : E886) EDID Block 0, Bytes 0-127 [00H-7FH] 0 10 20 30 40 50 60 70 0 1 2 3 4 5 6 7 8 9 A B C D E F ----------------------------------------------------------------------------| 00 FF FF FF FF FF FF 00 1E 6D 01 00 01 01 01 01 | 01 17 01 03 80 A0 5A 78 0A EE 91 A3 54 4C 99 26 | 0F 50 54 A1 08 00 31 40 45 40 61 40 71 40 81 80 | 01 01 01 01 01 01 02 3A 80 18 71 38 2D 40 58 2C | 45 00 40 84 63 00 00 1E 66 21 50 B0 51 00 1B 30 | 40 70 36 00 40 84 63 00 00 1E 00 00 00 FD 00 3A | 3E 1E 53 10 00 0A 20 20 20 20 20 20 00 00 00 FC | 00 4C 47 20 54 56 0A 20 20 20 20 20 20 20 01 E8 EDID Block 1, Bytes 128-255 [80H-FFH] 0 10 20 30 40 50 60 70 0 1 2 3 4 5 6 7 8 9 A B C D E F ----------------------------------------------------------------------------| 02 03 1C F1 48 90 22 20 05 04 03 02 01 26 15 07 | 50 09 57 07 67 03 0C 00 20 00 80 1E 02 3A 80 18 | 71 38 2D 40 58 2C 04 05 40 84 63 00 00 1E 01 1D | 80 18 71 1C 16 20 58 2C 25 00 40 84 63 00 00 9E | 01 1D 00 72 51 D0 1E 20 6E 28 55 00 40 84 63 00 | 00 1E 8C 0A D0 8A 20 E0 2D 10 10 3E 96 00 40 84 | 63 00 00 18 00 00 00 00 00 00 00 00 00 00 00 00 | 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 86 LGE Internal Use Only 5. Final Assembly Adjustment 4.2.5.2.2. HD Model 5.1. White Balance Adjustment ■ HDMI 1-HD (C/S : 7096) EDID Block 0, Bytes 0-127 [00H-7FH] 0 10 20 30 40 50 60 70 5.1.1. Overview 0 1 2 3 4 5 6 7 8 9 A B C D E F ----------------------------------------------------------------------------| 00 FF FF FF FF FF FF 00 1E 6D 01 00 01 01 01 01 | 01 17 01 03 80 A0 5A 78 0A EE 91 A3 54 4C 99 26 | 0F 50 54 A1 08 00 31 40 45 40 61 40 71 40 01 01 | 01 01 01 01 01 01 66 21 50 B0 51 00 1B 30 40 70 | 36 00 40 84 63 00 00 1E 64 19 00 40 41 00 26 30 | 18 88 36 00 40 84 63 00 00 1E 00 00 00 FD 00 3A | 3E 1E 53 10 00 0A 20 20 20 20 20 20 00 00 00 FC | 00 4C 47 20 54 56 0A 20 20 20 20 20 20 20 01 70 EDID Block 1, Bytes 128-255 [80H-FFH] 0 10 20 30 40 50 60 70 0 1 2 3 4 5 6 7 8 9 A B C D E F ----------------------------------------------------------------------------| 02 03 1C F1 48 10 22 20 05 84 03 02 01 26 15 07 | 50 09 57 07 67 03 0C 00 10 00 80 1E 02 3A 80 18 | 71 38 2D 40 58 2C 04 05 40 84 63 00 00 1E 01 1D | 80 18 71 1C 16 20 58 2C 25 00 40 84 63 00 00 9E | 01 1D 00 72 51 D0 1E 20 6E 28 55 00 40 84 63 00 | 00 1E 8C 0A D0 8A 20 E0 2D 10 10 3E 96 00 40 84 | 63 00 00 18 00 00 00 00 00 00 00 00 00 00 00 00 | 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 96 ■ HDMI 2-HD (C/S : 7086) EDID Block 0, Bytes 0-127 [00H-7FH] 0 10 20 30 40 50 60 70 0 1 2 3 4 5 6 7 8 9 A B C D E F ----------------------------------------------------------------------------| 00 FF FF FF FF FF FF 00 1E 6D 01 00 01 01 01 01 | 01 17 01 03 80 A0 5A 78 0A EE 91 A3 54 4C 99 26 | 0F 50 54 A1 08 00 31 40 45 40 61 40 71 40 01 01 | 01 01 01 01 01 01 66 21 50 B0 51 00 1B 30 40 70 | 36 00 40 84 63 00 00 1E 64 19 00 40 41 00 26 30 | 18 88 36 00 40 84 63 00 00 1E 00 00 00 FD 00 3A | 3E 1E 53 10 00 0A 20 20 20 20 20 20 00 00 00 FC | 00 4C 47 20 54 56 0A 20 20 20 20 20 20 20 01 70 5.1.1.1. W/B adj. Objective & How-it-works (1) Objective: To reduce each Panel’s W/B deviation (2) How-it-works: When R/G/B gain in the OSD is at 192, it means the panel is at its Full Dynamic Range. In order to prevent saturation of Full Dynamic range and data, one of R/G/B is fixed at 192, and the other two is lowered to find the desired value. (3) Adj. condition: normal temperature - Surrounding Temperature: 25±5 ºC - Warm-up time: About 5 Min - Surrounding Humidity: 20% ~ 80% - Before White balance adjustment, Keep power on status, don’t power off 5.1.1.2. Adj. condition and cautionary items (1) Lighting condition in surrounding area surrounding lighting should be lower 10 lux. Try to isolate adj. area into dark surrounding. (2) Probe location: Color Analyzer (CA-210) probe should be within 10cm and perpendicular of the module surface (80°~ 100°) (3) Aging time - A fter Aging Start, Keep the Power ON status during 5 Minutes. - In case of LCD, Back-light on should be checked using no signal or Full-white pattern. 5.1.2. Equipment (1) Color Analyzer: CA-210 (NCG: CH 9 / WCG: CH12 / LED: CH14) (2) A dj. Computer(During auto adj., RS-232C protocol is needed) (3) Adjust Remocon (4) V ideo Signal Generator MSPG-925F 720p/204-Gray (Model:217, Pattern:49) → Only when internal pattern is not available ※ C olor Analyzer Matrix should be calibrated using CS-1000 EDID Block 1, Bytes 128-255 [80H-FFH] 0 10 20 30 40 50 60 70 0 1 2 3 4 5 6 7 8 9 A B C D E F ----------------------------------------------------------------------------| 02 03 1C F1 48 10 22 20 05 84 03 02 01 26 15 07 | 50 09 57 07 67 03 0C 00 20 00 80 1E 02 3A 80 18 | 71 38 2D 40 58 2C 04 05 40 84 63 00 00 1E 01 1D | 80 18 71 1C 16 20 58 2C 25 00 40 84 63 00 00 9E | 01 1D 00 72 51 D0 1E 20 6E 28 55 00 40 84 63 00 | 00 1E 8C 0A D0 8A 20 E0 2D 10 10 3E 96 00 40 84 | 63 00 00 18 00 00 00 00 00 00 00 00 00 00 00 00 | 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 86 4.3. Tool Option Input - Input Model Tool Option according to BOM Copyright © LG Electronics. Inc. All rights reserved. Only for training and service purposes - 12 - LGE Internal Use Only 5.1.3. Equipment connection 5.1.5. Adjustment method Color Analyzer Probe RS-232C Computer RS-232C RS-232C ※ Pattern Generator Signal Source ※If TV internal pattern is used, not needed 5.1.5.2. Manual adj. method (1) Set TV in Adj. mode using POWER ON (2) Zero Calibrate the probe of Color Analyzer, then place it on the center of LCD module within 10cm of the surface.. (3) Press ADJ key -> EZ adjust using adj. R/C -> 6. WhiteBalance then press the cursor to the right (KEY►). ( When KEY(►) is pressed 204 Gray(80IRE) internal pattern will be displayed) (4) One of R Gain / G Gain / B Gain should be fixed at 192, and the rest will be lowered to meet the desired value. (5) Adj. is performed in COOL, MEDIUM, WARM 3 modes of color temperature. 5.1.4. Adjustment Command (Protocol) (1) RS-232C Command used during auto-adj RS-232C COMMAND Explanation CMD DATA ID Wb 00 00 Begin White Balance adj. Wb 00 ff End White Balance adj. (internal pattern disappears ) 5.1.5.1. Auto WB calibration (1) Set TV in ADJ mode using P-ONLY key (or POWER ON key) (2) Place optical probe on the center of the display - It need to check probe condition of zero calibration before adjustment. (3) Connect RS-232C Cable (4) Select mode in ADJ Program and begin a adjustment. (5) When WB adjustment is completed with OK message, check adjustment status of pre-set mode (Cool, Medium, Warm) (6) Remove probe and RS-232C cable. ※ W/B Adj. must begin as start command “wb 00 00” , and finish as end command “wb 00 ff”, and Adj. offset if need. (2) Adjustment Map Adj. item Command (lower case ASCII) CMD1 Cool Medium CMD2 Data Range (Hex.) MIN MAX R Gain j g 00 C0 172 G Gain j h 00 C0 172 B Gain j i 00 C0 192 R Cut 128 G Cut 128 B Cut 128 R Gain j a 00 C0 192 G Gain j b 00 C0 192 B Gain j c 00 C0 192 R Cut 128 G Cut 128 B Cut Warm ※ CASE First adjust the coordinate far away from the target value(x, y). (1) x, y > target i) Decrease the R, G. (2) x, y < target i) First decrease the B gain, ii) Decrease the one of the others. (3) x >target , y < target i) First decrease B, so make y a little more than the target. ii) Adjust x value by decreasing the R (4) x < target , y > target i) First decrease B, so make x a little more than the target. ii) Adjust x value by decreasing the G Default (Decimal) ► How to adjust (1) Fix G gain at least 172 Adjust R, B Gain (In Case of Mostly Blue Gain Saturation) (2) When R or B Gain > 255, Release Fixed G Gain and Readjust 128 R Gain j d 00 C0 192 G Gain j e 00 C0 192 B Gain j f 00 C0 172 R Cut 128 G Cut 128 B Cut 128 Copyright © LG Electronics. Inc. All rights reserved. Only for training and service purposes ※ CASE Medium / Warm First adjust the coordinate far away from the target value(x, y). (1) x, y > target i) Decrease the R, G. (2) x, y < target i) First decrease the B gain, ii) Decrease the one of the others. (3) x > target , y < target i) First decrease B, so make y a little more than the target. ii) Adjust x value by decreasing the R (4) x < target , y > target i) First decrease B, so make x a little more than the target. ii) Adjust x value by decreasing the G - 13 - LGE Internal Use Only 5.1.6. Reference ( White Balance Adj. coordinate and color temperature) 5.2. Option selection per country 5.2.1. Overview (1) Tool option selection is only done for models in Non-USA North America due to rating (2) Applied model: LA32B Chassis applied to CANADA and MEXICO ▪ Luminance: 204 Gray, 80IRE ▪ Normal line model: (normal line)LN5xxx, LA6xxx, LA7xxx, LA8xxx Cool H/R Time(Min) Medium Warm x y x x y x 269 273 285 293 313 329 1 0-2 281 290 297 310 322 342 2 3-5 280 288 296 308 321 340 3 6-9 279 287 295 307 320 339 4 10-19 277 284 293 304 318 336 5 20-35 275 280 291 300 316 332 6 36-49 273 277 289 297 314 329 7 50-79 271 275 287 295 312 327 8 80-119 270 274 286 294 311 326 9 Over 120 269 273 285 293 310 325 5.2.2. Country Group selection (1) Press ADJ key on the Adj. R/C, and then select Country Group Menu (2) Depending on destination, select US, then on the lower Country option, select US, CA, MX. Selection is done using +, - KEY (3) Using DFT(Auto) ※ PC (for communication through RS-232C) -> UART Baud rate : 115200 bps Command : ah 00 00 DATA(Area Number(hexadecimal)) ITEM AREA OPTION1 ▪ Aging chamber line (Aging chamber) Model : LN5xxx, LA6xxx, LA7xxx, LA8xxx ▪ S tandard color coordinate and temperature using CA-210(CH-14) – by aging time Cool H/R Time(Min) Medium DATA(Area Number) AREA 0 USA 1 CANADA 2 MEXICO 5.2.3. Tool Option inspection ▪ Press Adj. key on the Adj. R/C, then select Tool option Warm Model Module Tool option1 Tool option2 Tool option3 Tool option4 x y x x y x 32LN5300-UB LGD 545 41478 37004 12031 269 273 285 293 313 329 47LN5400-UA LGD 1569 33286 37004 46847 1 0-5 280 288 296 308 321 340 55LN5400-UA LGD(POLA) 2065 33286 37004 40703 2 6-10 276 283 292 303 317 335 50LN5400-UA LGD 1825 33286 37004 48895 3 11-20 273 278 289 298 314 330 42LN5400-UA LGD 1313 33286 37004 36607 4 21-30 270 275 286 295 311 327 42LN5300-UB LGD 1313 41478 37004 03839 5 31-40 267 272 283 292 308 324 42LN5300-UB AUO 9505 41478 37004 03839 6 41-50 266 270 282 290 307 322 42LN5300-UB LGD(POLA) 1297 41478 37004 03839 7 51-80 265 269 281 289 306 321 39LN5300-UB CMI(POLA) 5137 41478 37004 03839 8 81-119 264 267 280 287 305 319 39LN5300-UB AUO(POLA) 9233 41478 37004 03839 9 Over 120 263 266 279 286 304 318 32LN5300-UB CSOT(POLA) 4625 41478 37004 03839 32LN530B-UB LGD 545 45574 37004 03839 32LN530B-UB LGD(POLA) 545 45574 37004 03839 ※ Tool option can be reconstructed by Software 5.3. Ship-out mode check (In-stop) - After final inspection, press In-Stop key of the Adj. R/C and check that the unit goes to Stand-by mode Copyright © LG Electronics. Inc. All rights reserved. Only for training and service purposes - 14 - LGE Internal Use Only 6. GND and HI-POT Test * USB S/W Download (option, Service only) 6.1. GND & HI-POT auto-check preparation (1) Check the POWER CABLE and SIGNAL CABE insertion condition 6.2. GND & HI-POT auto-check (1) Pallet moves in the station. (POWER CORD / AV CORD is tightly inserted) (2) Connect the AV JACK Tester. (3) Controller (GWS103-4) on. (4) GND Test (Auto) - If Test is failed, Buzzer operates. - If Test is passed, execute next process (Hi-pot test). (Remove A/V CORD from A/V JACK BOX) (5) HI-POT test (Auto) - If Test is failed, Buzzer operates. - If Test is passed, GOOD Lamp on and move to next process automatically (1) Put the USB Stick to the USB socket. (2) Automatically detecting update file in USB Stick. - If your downloaded program version in USB Stick is Low, it didn't work. But your downloaded version is High, USB data is automatically detecting (3) Show the message "Copying files from memory" (4) Updating is staring. 6.3. Checkpoint (1) Test voltage - GND: 1.5KV/min at 100mA - SIGNAL: 3KV/min at 100mA (2) TEST time: 1 second (3) TEST POINT - GND Test = P OWER CORD GND and SIGNAL CABLE GND. - Hi-pot Test = POWER CORD GND and LIVE & NEUTRAL. (4) LEAKAGE CURRENT: At 0.5mArms 7. AUDIO output check 7.1. Audio input condition (1) RF input: Mono, 1KHz sine wave signal, 100% Modulation (2) CVBS, Component: 1KHz sine wave signal (0.4Vrms) 7.2. Specification No 1 Item Audio practical max Output, L/R (Distortion=10% max Output) Min 9.0 8.5 Typ Max Unit 10.9 9.3 12.0 9.8 W Vrms Remark (1) Measurement condition - EQ/AVL/Clear Voice: Off (2) Speaker (8Ω Impedance) (5) After updating is complete, The TV will restart automatically. (6) If TV turns on, check your updated version and Tool option. (refer to the next page about tool option) * If downloading version is higher than your TV have, TV can lost all channel data. In this case, you have to channel recover. If all channel data is cleared, you didn't have a DTV/ATV test on production line. ※After downloading, TOOL OPTION setting is needed again. (1) Push "IN-START" key in service remote controller. (2) Select "Tool Option 1" and Push “OK” button. (3) Punch in the number. (Each model has their number.) Copyright © LG Electronics. Inc. All rights reserved. Only for training and service purposes - 15 - LGE Internal Use Only TROUBLE SHOOTING 1. Power-up boot check Check stand-by Voltage. P401 3, 5pin : +3.5V_ST No Check 18pin Power connector ok Main B/D 3.5V Line Short Check ok Replace Power board. ok Check stand-by Voltage L404, L408 : +3.5V No Replace L404, L408 No Replace X201 No Re-download software. ok Check X201 clock 24 MHz ok Check P401 PWR_ON. 1pin : 3.3V ok Check Multi Voltage P401 9, 10pin : 24V / 13, 14, 15pin:12V ok Check IC402/3/7 Output Voltage IC402 : 2.5V IC403 : 1.15V IC407 : 1.5V Q403 : 3.3V No No No Replace Mstar(IC101) or Main board Replace Power Board Replace IC402, IC403, IC407, Q403 ok Check LVDS Power Voltage Q409 : 12V No Replace Q409 ok Check Mstar LVDS Output No Replace Mstar(IC101) or Main Board ok Check DRV ON Control P403 2 pin : High No Check Power Board ok Change Module Copyright © LG Electronics. Inc. All rights reserved. Only for training and service purposes - 16 - LGE Internal Use Only 2. Digital/Analog TV Video Check RF Cable & Signal ok Check Tuner 3.3V Power L3703 No Replace L3703 ok Check Tuner 1.8V Power IC3703 2 pin : 1.8V No Replace IC3703 ok Check IF_P/N Signal TU3700 10/11 Pin No Bad Tuner. Replace Tuner. ok Check Mstar LVDS Output No Replace Mstar(IC101) or Main Board. 3. AV Video Check input signal format. Is it supported? ok Check AV Cable for damage for damage or open conductor ok Check JK1702, CVBS Signal Line R1722 No Replace Jack ok Check CVBS_DET Signal No Replace R1713 ok Check Mstar LVDS Output No Copyright © LG Electronics. Inc. All rights reserved. Only for training and service purposes - 17 - LGE Internal Use Only 4. Component Video Check input signal format. Is it supported? ok Check Component Cable for damage or open conductor. ok No Check JK1702 Y/PB/PR signal Line Replace Jack ok No Check COMP_DET Signal Replace R1712 or R1713 ok No Check Mstar LVDS Output Replace Mstar(IC101) or Main Board. 5. HDMI Video Check input signal format. Is it supported? ok Check HDMI Cable conductors for damage or open conductor. ok Check EDID R832, R833, R834, R835 I2C Signal No Replace the defective IC or re-download EDID data ok Check JK801, JK803 No Replace Jack ok Check HDMI_DET (HPD) No Replace R803, R801, R826, R807, R817, Q801, R819, R818, R830 ok Check HDMI Signal No Check other set If no problem, check signal line No Replace Main Board ok Check Mstar LVDS Output No Replace Mstar(IC101) or Main Board. Copyright © LG Electronics. Inc. All rights reserved. Only for training and service purposes - 18 - LGE Internal Use Only 6. MHL Video Check input signal format. Is it supported? ok Check MHL Cable conductors for damage or open conductor. ok Check MHL Signal (R214, R215) No Replace the defective IC or re-download EDID data ok Check JK803 No Replace Jack ok Check CD_Sense, Cbus, Vbus No Replace R810, R802, R831, R830, IC802, D800 ok Check MHL Signal No Check other set If no problem, check signal line No Replace Main Board ok Check Mstar LVDS Output No Replace Mstar(IC101) or Main Board. Copyright © LG Electronics. Inc. All rights reserved. Only for training and service purposes - 19 - LGE Internal Use Only 7. All Source Audio Check the TV Speaker Menu (Menu -> Audio -> TV Speaker) Off Toggle the Menu On Check AMP IC(IC3401) Power 24V, 3.3V No Replace Amp IC(IC501) ok No Check Mstar AUDIO_MASTER_CLK R148 Replace Mstar(IC101) or Main Board. ok Check AMP I2C Line R3406, R3407 No Check signal line. Or replace Mstar(IC101) ok Check Mstar I2S Output IC3401 37,38,39 Pin No Check signal line. Or replace Mstar(IC101) ok Check Output Signal P3401 1, 2, 3, 4 pin. No Replace Audio AMP IC(IC3401) ok Check Connector & P3401 No Replace connector if found to be damaged. ok Check speaker resistance and connector damage. No Replace speaker. 8. Digital/Analog TV Audio Check RF Cable & Signal ok Check Tuner 3.3V Power L3703 No Replace L3703 ok Check Tuner 1.8V Power IC3703 2 pin : 1.8V No Replace IC3703 ok Check IF_P/N Signal TU3700 10/11 Pin No Bad Tuner. Replace Tuner. ok Follow procedure ‘7. All source audio’ trouble shooting guide. Copyright © LG Electronics. Inc. All rights reserved. Only for training and service purposes - 20 - LGE Internal Use Only 9. AV Audio Check AV Cable for damage for damage or open conductor ok Check JK1702 Signal Line R1714,R1715 No Replace Jack ok Follow procedure ‘7. All source audio’ trouble shooting guide. 10. Component Audio Check Component Cable for damage or open conductor. ok Check JK1702 Signal Line R1714,R1715 No Replace Jack ok Follow procedure ‘7. All source audio’ trouble shooting guide. Copyright © LG Electronics. Inc. All rights reserved. Only for training and service purposes - 21 - LGE Internal Use Only Copyright © LG Electronics. Inc. All rights reserved. Only for training and service purposes - 22 - SPK L/R SPDIF Component AV HDMI SPDIF CVBS, L/R Y/Pb/Pr, L/R TMDS L/R I2S Rear I2C A_IF AMP STA380BWE Half NIM (SI2158_ATSC_1INPUT) D_IF Internal Micom (PM) M1 X-tal 24MHz MX25L6406EMI SERIAL FLASH MXIC 8MB(64Mb) TMDS DP/D M RS232C I2C MAX3232 HDMI MHL USB2.0 RS-232C AT24C512C-SSHD-T 512k bit DDR3 128MB(1Gb) Hynic H5TQ1G63DFR (CLK 800MHz) DDR3 Add. DDR3 Data CLK 667MHz SPI LVDS (FHD/HD 60z) Side IR LED_R KEY1 FPC(30P/HD) FPC(51P/FHD) CONTROL IR & LED BLOCK DIAGRAM LGE Internal Use Only 33 1.8k 3.3V 1k TU _SCL TU _SDA CH 6 CH 5 TU _SCL TU _SDA M1 CH 2 I2C_SCL I2C_SDA 22 3.3V 0 22 18p 0xC0 Tuner 0x20 Amp 0xA0 EEPROM 2.2k 3.3V Copyright © LG Electronics. Inc. All rights reserved. Only for training and service purposes - 23 - LGE Internal Use Only EXPLODED VIEW IMPORTANT SAFETY NOTICE 510 Copyright © LG Electronics. Inc. All rights reserved. Only for training and service purposes Set + Stand Stand Base + Stand Body A9 A2 300 500 A10 910 900 120 122 200 123 LV1 120 530 540 521 400 Many electrical and mechanical parts in this chassis have special safety-related characteristics. These parts are identified by in the Schematic Diagram and EXPLODED VIEW. It is essential that these special safety parts should be replaced with the same components as recommended in this manual to prevent X-RADIATION, Shock, Fire, or other Hazards. Do not modify the original design without permission of manufacturer. - 24 - LGE Internal Use Only TP for NON-EU models(except EU and China) TP for CI slot /PCM_REG PCM_D[0] TP for SCART PCM_A[8] CI_TS_CLK SCART1_MUTE TP for Headphone HP_LOUT /PCM_OE PCM_D[1] PCM_A[9] CI_TS_VAL SC1_ID HP_ROUT /PCM_WE PCM_D[2] PCM_A[10] CI_TS_SYNC SC1_FB SIDE_HP_MUTE /PCM_IORD PCM_D[3] PCM_A[11] CI_TS_DATA[0] SC1_SOG_IN HP_DET /PCM_IOWR PCM_D[4] PCM_A[12] CI_TS_DATA[1] DTV/MNT_VOUT /PCM_CE PCM_D[5] PCM_A[13] CI_TS_DATA[2] SCART1_Lout /PCM_IRQA PCM_D[6] PCM_A[14] CI_TS_DATA[3] SCART1_Rout /PCM_CD PCM_D[7] CI_TS_DATA[4] SC1_CVBS_IN /PCM_WAIT CI_TS_DATA[5] SC1_R+/COMP1_Pr+ PCM_RST CI_TS_DATA[6] SC1_G+/COMP1_Y+ PCM_5V_CTL CI_TS_DATA[7] SC1_B+/COMP1_Pb+ CI_DET SC1/COMP1_DET SC1/COMP1_L_IN SC1/COMP1_R_IN TP for FE_TS_DATA TP for S2 S2_RESET FE_TS_DATA[1] FE_TS_DATA[2] FE_TS_DATA[3] FE_TS_DATA[4] FE_TS_DATA[5] FE_TS_DATA[6] FE_TS_DATA[7] THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. Copyright ⓒ 2013 LG Electronics. Inc. All right reserved. Only for training and service purposes NC4_S7LRM TP_NON_EN 2012.07.02 3 LGE Internal Use Only L13 POWER BLOCK (POWER DETECT 2) PANEL_POWER FROM LIPS & POWER B/D +3.5V_ST --> 3.375V --> 3.46V +24V --> 3.78V --> 3.92V (3.79V) +12V --> 3.58V --> 3.82V (3.68V) Power_DET R402-*1 100 +12V +3.5V_SOC_RESET +12V L412 120 CIS21J121 Q402 +3.3V_Normal +3.5V_ST 3 R461 10K 2 R415 100 R426 10K R401 10K R462 10K B R405 5.6K Q407 MMBT3904(NXP) E POWER_DET_RESET Q405 MMBT3904(NXP) C406 0.1uF 16V CIC21J501NE PWR ON 1 2 DRV ON 3.5V 3 4 PDIM#1 3.5V 5 6 PDIM#2 GND 7 8 GND 24V 9 10 24V L407 +24V C418 0.1uF 50V MLB-201209-0120P-N2 L402 +12V C404 0.1uF PWM_DIM_PULL_DOWN *For 55LN54 Power ON Noise +1.5V_DDR 2 3 VCC 1 3 PD_+24V R403 1.5K 1% 2 GND PD_+24V R480 100 RESET PWR_DET_ON_DIODES IC409-*1 APX803D29 1 GND RESET 2 3 VCC 1 GND PD_+24V_PWR_DET_DIODES PWM_DIM R408 100 PWM1 PWM2_2CH_POWER +3.5V_ST IC407 AP7173-SPG-13 HF(DIODES) GND 11 12 GND 12V 13 14 12V L420 12V 15 16 N.C BLM18PG121SN1D GND 17 18 GND MLB-201209-0120P-N2 RESET PD_+24V_PWR_DET_ON_SEMI IC409 NCP803SN293 +1.5V_DDR [EP] IN 16V 1 19 . PG VCC 2 EN 7 3 1.5A6 4 5 +3.3V_Normal R433 10K 8 OUT +3.3V_Normal R1 R457 FB 4.3K 1/16W 1% SS R2 C467 560pF 50V GND R456 4.7K 1/16W 1% C472 22uF 10V C476 0.1uF 16V +3.5V_ST D403 5V OPT +3.3V_Normal FET_2.5V_AOS AO3435 Q403 S L404 3.9K 9 CIC21J501NE L408 +3.5V_ST R412 PD_+24V C412 0.1uF 16V THERMAL 5V OPT IC408-*1 PD_+24V R404 100K VCC D401 POWER_DET C474 0.1uF GND PD_+24V R482 8.2K 1% E P401 SMAW200-H18S1 RESET 1 +24V E INV_CTL 2 RESET_IC_SOC_RESET RESET_IC_SOC_RESET R402 300 APX803D29 R489 10K Q401 MMBT3904(NXP) 3 PD_+12V R447 1.2K 1% R407 5.6K 001:AL22 R421 10K B C B C411 0.1uF 16V C R430 10K PANEL_CTL C RL_ON R440 5.6K R419 1K OPT R411 33K PWR_DET_ON_SEMI IC408 NCP803SN293 5% VCC +3.5V_ST R406 4.7K OPT R463 10K PD_+3.5V R450 0 C461 10uF 10V R434 10K C423 2.2uF 10V R438 22K L403 BLM18PG121SN1D D R416 10K PD_+12V R448 2.7K 1% PANEL_VCC G C437 22uF 10V C425 0.1uF 16V G 1 C443 10uF 16V R439 33K C438 0.1uF 25V OPT MMBT3906(NXP) +3.5V_ST R488 100K D S +3.5V_ST +3.5V_ST Q409 AO3407A D405 5V R445 Vout=0.8*(1+R1/R2)=1.5319 2.2K Q400 MMBT3904(NXP) G E +2.5V_Normal IC402 +3.3V_Normal OUT S7LR core 1.15V volt R1 R454 R2 SW_IN 9 +5V_USB C430 10uF 10V 8 PGND SW_OUT L413 CIC21J501NE +5V_Normal +3.3V_Normal VIN_1 1 VIN_2 2 GND_1 3 11 PH_2 IC403 10 TPS54319TRE 9 PH_1 THERMAL 17 5 C453 22uF 10V SS/TR C444 0.1uF 16V C456 22uF 10V RT/CLK USB1_CTL D404 5V OPT C488 8 7 6 L415 3.6uH 3300pF USB1_OCD COMP R417 4.7K OPT 5 R414 10K FAULT R432 1/16W 330K 5% R436 15K R1 C448 3300pF R442 30K 1/16W 1% C439 50V 100pF R409 2K 4 50V RLIM 3 ROSC COMP SS C426 100pF 50V OPT 2 EN_SW 1 EN [EP] 4 PH_3 AGND 15 16 V7V AGND 6 IC401 TPS65281RGV VIN THERMAL 17 C419 4.7uF 10V 12 7 14 GND_2 +1.10V_VDDC C441 0.1uF 16V VSENSE 10 11 LX BST 12 13 L401 CIC21J501NE FB 11K 1% C417 CAP_10uF_X5R 10uF CHANGE TO 10V 10UF/10V/X5R 85C +3.5V_ST C403-*1 10uF 10V CAP_10uF_X7R BOOT C422 0.1uF 16V OPT C424 330pF 50V 0.33uF 16V R428 10K PWRGD R453 27K 1% C447 +3.3V_Normal CHANGE TO 10UF/10V/X5R 13 R452 33K 1% EN C421 22uF 16V OPT D402 5V OPT 14 C420 22uF 16V C440 0.1uF 16V 15 L406 3.6uH C413 0.047uF 25V CHANGE TO 16V/X5R C403 10uF 10V 85C CAP_10uF_X5R EP[GND] +5V_Normal VIN_3 2 GND 16 Vout=0.8*(1+R1/R2) +12V R410 100K 3 1 R491 0 C405 10uF 16V +2.5V_Normal TJ1118S-2.5 IN +5V_Normal & +5V_USB D B S R443 10K POWER_ON/OFF_1 FET_2.5V_DIODE DMP2130L Q403-*1 C C417-*1 R413 16K C410 3300pF 50V THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. Copyright ⓒ 2013 LG Electronics. Inc. All right reserved. Only for training and service purposes 10uF 10V CAP_10uF_X7R R2 3A R441 75K 1/16W 1% Vout=0.827*(1+R1/R2) NC4_S7LRM Power_PD2 2012/09/19 4 LGE Internal Use Only IR/LED and Control +3.5V_ST R602 10K 1% R603 10K 1% CONTROL_NO_FILTER R611 0 CONTROL_FILTER L601 BLM18PG121SN1D R600 100 KEY1 CONTROL_FILTER C608 0.1uF 16V CONTROL_FILTER L602 BLM18PG121SN1D R601 100 P600 12507WR-08L KEY2 CONTROL_NO_FILTER R612 0 CONTROL_FILTER C609 0.1uF 16V 1 2 +3.5V_ST 3 L600 BLM18PG121SN1D 4 +3.5V_ST C602 0.1uF 16V C603 1000pF 50V R610 1.8K 5 LED_R/BUZZ OPT C607 0.1uF 16V R607 3.3K 6 7 IR C604 100pF 50V 8 9 THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. Copyright ⓒ 2013 LG Electronics. Inc. All right reserved. Only for training and service purposes NC4_S7LRM IR/CONTROL 2012/07/18 6 LGE Internal Use Only USB (SIDE) +5V_USB C700 22uF 10V 3 1 2 SIDE_USB1_DM SIDE_USB1_DP 5 4 USB DOWN STREAM 3AU04S-305-ZC-(LG) JK700 D700 RCLAMP0502BA OPT THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. Copyright ⓒ 2013 LG Electronics. Inc. All right reserved. Only for training and service purposes NC4_S7LRM USB 12/06/20 7 LGE Internal Use Only HDMI (REAR 1 / SIDE 1 MHL) HDMI_1 SIDE_HDMI (MHL) 5V_HDMI_4 GND BODY_SHIELD 5V_DET_HDMI_2 R807 20 19 R830 HP_DET C 19 R803 R832 100 R833 100 R805 0 HDMI_ARC 14 HDMI1_ARC HDMI_CEC EAG59023302 13 1 D826 RCLAMP0524PA 10 CK-_HDMI2 2 9 CK+_HDMI2 3 8 4 7 D0-_HDMI2 5 6 D0+_HDMI2 12 11 10 CK+ D0- 9 D0_GND 8 4 3 DDC_CLK 14 NC D1-_HDMI2 D1+ 2 9 D1+_HDMI2 D2- 3 8 4 7 D2-_HDMI2 5 6 D2+_HDMI2 VA806 ESD_HDMI VA807 ESD_HDMI CE_REMOTE CK- 11 CK_GND D828 RCLAMP0524PA 1 10 CK+ 2 9 D0- 3 8 4 7 5 6 8 6 3 2 1 R835 100 DDC_SDA_4 DDC_SCL_4 HDMI_CEC D0_GND D0+ CK-_HDMI4 CK+_HDMI4 D0-_HDMI4 D0+_HDMI4 ESD_HDMI_SEMTECH D1D1_GND 1 D829 RCLAMP0524PA 10 D1+ 2 9 3 8 D2- 4 7 D2_GND 5 6 D1-_HDMI4 D1+_HDMI4 D2-_HDMI4 D2+_HDMI4 ESD_HDMI_SEMTECH D2+ OPT D811 JK803 VA801-*1 1uF 10V ESD_HDMI1_CAP JK801 100 +3.5V_ST ESD_HDMI_SEMTECH D801 ESD_HDMI1_VARISTOR R834 VA808 ESD_HDMI 13 7 D827 RCLAMP0524PA 10 VA805 ESD_HDMI HPD4 12 9 1 D2+ 1 15 4 D2_GND 2 DDC_DATA ESD_HDMI_SEMTECH D1_GND 5 16 10 D1- 6 1.8K 5 D0+ 7 GND DDC_SDA_2 VA803 ESD_HDMI 15 17 DDC_SCL_2 VA804 ESD_HDMI ESD_HDMI1_VARISTOR 16 HPD2 VA802 ESD_HDMI 3.3K 1.8K VA801 17 R817 10K E R801 18 B Q801 MMBT3904(NXP) 5V R810 0 D812 5.6V D801-*1 1uF 10V ESD_HDMI1_CAP C801 0.047uF 25V OPT 1K EAG62611204 20 18 100 OPT R811 10K R826 R819 3.3K 10K SHIELD R818 5V_HDMI_2 5V_DET_HDMI_4 E R812 10K OPT C Q803 OPT B C B Q802 OPT MHL_CD_SENSE E D826-*1 IP4283CZ10-TBA TMDS_CH1- CEC TMDS_CH1+ GND_1 TMDS_CH2- R820 100 HDMI_CEC TMDS_CH2+ CEC_REMOTE_S7 1 10 2 9 3 8 4 7 5 6 R802 0 D827-*1 IP4283CZ10-TBA NC_4 TMDS_CH1- NC_3 TMDS_CH1+ GND_2 R831 300K GND_1 NC_2 TMDS_CH2- NC_1 TMDS_CH2+ 1 10 2 9 3 8 4 7 5 6 NC_4 NC_3 GND_2 NC_2 NC_1 ESD_HDMI_NXP ESD_HDMI_NXP D828-*1 IP4283CZ10-TBA D829-*1 IP4283CZ10-TBA MHL OCP AVDD5V_MHL IC802 BD82020FVJ 5V_HDMI_4 +5V_Normal GND_1 5V_HDMI_2 5V_HDMI_4 +5V_Normal +5V_Normal +3.5V_ST TMDS_CH2- 9 3 8 4 7 5 6 TMDS_CH1- NC_3 TMDS_CH1+ GND_2 GND_1 NC_2 TMDS_CH2- NC_1 TMDS_CH2+ 1 10 2 9 3 8 4 7 5 6 +3.3V_Normal NC_4 D800 MBR230LSFT1G NC_3 GND_2 NC_2 R809 10 NC_1 OUT_3 8 1 7 2 6 3 5 4 GND 30V C809 10uF 10V 100K OPT R808 ESD_HDMI_NXP OUT_2 OUT_1 MMBD6100 D825 OC C C C 2 NC_4 A2 MMBD6100 D824 MMBD6100 D822 10 ESD_HDMI_NXP A1 A2 A1 A2 A1 TMDS_CH2+ 1 +3.3V_Normal IN_1 IN_2 EN C802 0.1uF R821 10K R814 2.7K E TMDS_CH1+ C TMDS_CH1- Q804 R822 2.7K R823 R824 2.7K 2.7K DDC_SDA_2 R825 /MHL_OCP_DET 2.7K R804 0 B C R806 R827 20K B /VBUS_EN R813 10K E B THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. R816 10K MHL_OCP_EN DDC_SCL_4 E Copyright ⓒ 2013 LG Electronics. Inc. All right reserved. Only for training and service purposes (Active Low) Q806 DDC_SDA_4 C DDC_SCL_2 R815 10K 10K Q805 NC4_S7LRM HDMI_R1_S1 (Active High) 2012/11/07 8 LGE Internal Use Only SPDIF SPDIF OPTIC JACK +3.3V_Normal 5.15 Mstar Circuit Application THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. Copyright ⓒ 2013 LG Electronics. Inc. All right reserved. Only for training and service purposes SHIELD C1002 100pF 50V VINPUT 1 2 3 4 C1001 0.1uF 16V VCC 3 VIN GND 4 2 Fiber Optic 1 VCC Fiber Optic SPDIF_OUT GND SPDIF-JACK-SOLTEAM JK1001-*1 JST1223-001 FIX_POLE SPDIF-JACK-FOXCONN JK1001 2F01TC1-CLM97-4F NC4_S7LRM SPDIF 12/06/12 10 LGE Internal Use Only LVDS (NON EU) [51Pin LVDS Connector] (For FHD 60Hz) FOR FHD REVERSE(10bit) [30Pin LVDS Connector] (For HD 60Hz_Normal) Change in S7LR HD FHD MIRROR P1100 Pol-change P1101 FF10001-30 FI-RE51S-HF-J-R1500 LVDS_SEL 1 RXA0- RXA4+ RXA0+ RXA4- RXA0- RXA0+ RXA3+ RXA1+ RXA1- RXA3- RXA1- RXA1+ RXACK+ RXA2+ RXA2- RXACK- RXA2- RXA2+ RXA2+ RXACK+ RXACK- 1 +3.3V_Normal 2 2 OPT R1100 3.3K 3 3 4 4 5 5 OPT R1101 10K 6 RXA2- RXACK- RXACK+ RXA1+ RXA3+ RXA3- RXA1- RXA3- RXA3+ RXA0+ RXA4+ RXA4- RXA0- RXA4- RXA4+ 7 6 RXA0- 7 RXA0+ 8 8 9 10 9 RXA1- 10 RXA1+ 11 11 12 RXA4+ 13 RXA4- 14 RXA3+ 15 RXA3- 16 RXACK+ 17 RXACK- 12 RXA2- RXB4+ RXB0+ RXB0- 13 RXA2+ RXB4- RXB0- RXB0+ 14 RXB3+ RXB1+ RXB1- 15 RXACK- RXB3- RXB1- RXB1+ 16 RXACK+ RXBCK+ RXB2+ RXB2- 17 LVDS_SEL 18 RXBCK- RXB2- RXB2+ 18 19 RXA2+ RXB2+ RXBCK+ RXBCK- 19 20 RXA2- RXB2- RXBCK- RXBCK+ 20 21 RXB1+ RXB3+ RXB3- 21 22 RXA1+ RXB1- RXB3- RXB3+ 22 23 RXA1- RXB0+ RXB4+ RXB4- 23 RXB0- RXB4- RXB4+ 24 24 RXA0+ 25 RXA0- 28 29 RXB4- 29 RXB3+ RXB3- 32 RXBCK+ 33 RXBCK- FOR FHD REVERSE(8bit) MIRROR 36 HD C1101 0.1uF 16V 30 31 Change in S7LR 34 35 HD L1101 120 CIS21J121 27 RXB4+ 31 OPT R1104 10K 26 28 30 OPT R1103 3.3K 25 0 NON_AUO/CMI_39inch 27 RXA3+ +3.3V_Normal PANEL_VCC R1111 26 RXA3- Pol-change Shift RXA4+ RXA4+ RXA4- RXA0- RXA4- RXA4- RXA4+ RXA0+ RXA1- RXB2+ RXB2RXA3+ RXA0+ RXA0- RXA3- RXA0- RXA0+ RXA1+ RXACK+ RXA1+ RXA1- RXA2- RXACK- RXA1- RXA1+ RXA2+ RXA2+ RXA2+ RXA2- RXACKRXACK+ 37 38 RXB1+ 39 RXB1- 40 RXB0+ 41 RXB0- 42 NON_AUO39inch R1112 0 43 R1113 44 NON_AUO39inch 0 RXA2- RXA2- RXA2+ RXA1+ RXACK+ RXACK- RXA3- RXA1- RXACK- RXACK+ RXA3+ RXA0+ RXA3+ RXA3- RXA4- RXA0- RXA3- RXA3+ RXA4+ RXB4+ RXB4+ RXB4- RXB0- RXB4- RXB4- RXB4+ RXB0+ RXB3+ RXB0+ RXB0- RXB1- RXB3- RXB0- RXB0+ RXB1+ PANEL_VCC 45 46 47 FHD L1100 120 CIS21J121 48 49 50 51 FHD C1100 0.1uF 16V RXBCK+ RXB1+ RXB1- RXB2- RXBCK- RXB1- RXB1+ RXB2+ EU pin assign is different from NON EU. Because of position of HD wafer. 52 THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. Copyright ⓒ 2013 LG Electronics. Inc. All right reserved. Only for training and service purposes RXB2+ RXB2+ RXB2- RXBCK- RXB2- RXB2- RXB2+ RXBCK+ RXB1+ RXBCK+ RXBCK- RXB3- RXB1- RXBCK- RXBCK+ RXB3+ RXB0+ RXB3+ RXB3- RXB4- RXB0- RXB3- RXB3+ RXB4+ NC4_S7LRM LVDS_NON_EU 2012/09/19 11 LGE Internal Use Only GLOBAL tuner block except EU and China BR_RESET_DEMOD LNA_CTRL_1 FE_TS_SYNC FE_AGC_SPEED_CTL IF_AGC_SEL FE_TS_VAL_ERR FE_BOOSTER_CTL LNA2_CTL FE_TS_CLK DEMOD_SCL LNA_CTRL_2 RF_SWITCH_CTL Pull-up can’t be applied because of MODEL_OPT_2 TU3700 TDSS-G201D TU3702 TDSH-G501D(B) TUNER_ISOLATOR_DVB_1INPUT_H DEMOD_SDA FE_TS_DATA[0] TUNER_OPT +3.3V_TU R3740-*1 1K TU_IIC_NON_ATSC_1K +3.3V_TU R3733 100K close to TUNER 1 2 3 4 5 6 7 8 9 10 11 R3705 NC C3701 0.1uF 16V RESET 0 1 OPT 2 3 SCL SDA 4 +B1[3.3V] 5 SIF 6 7 CVBS 8 IF_AGC 9 DIF[P] 10 DIF[N] 11 B1 A1 C3710 0.1uF 16V RESET R3740 1.8K TU_IIC_ATSC_1.8K R3741 1.8K TU_IIC_ATSC_1.8K SCL SDA +B1[3.3V] C3711 18pF 50V NC_2 C3702 R3735 33 R3736 33 TU_SCL TU_SDA OPT C3742 20pF 50V C3713 18pF 50V OPT C3743 20pF 50V close to TUNER R3758 82 TU_SIF 16V OPT +B2[1.8V] OPT R3784 0 NC_3 TU_CVBS OPT HALF_NIM/IF_FILTER HALF_NIM/IF_FILTER R3761-*1 R3760-*1 10 10 IF_AGC DIF[P] R3761 0 HALF_NIM/IF_NON_FILTER DIF[N] R3760 0 HALF_NIM/IF_NON_FILTER B1 B1 TUNER_RESET 0.1uF +B2[1.8V] R3741-*1 1K TU_IIC_NON_ATSC_1K R3732 100 NC_1 A1 B1 A1 A1 Close to the tuner IF_P_MSTAR SHIELD A2 B2 A2 TU_GND_A 12 B2 IF_N_MSTAR 1. should be guarded by ground 2. No via on both of them 3. Signal Width >= 12mils Signal to Signal Width = 12mils Ground Width >= 24mils TU_GND_A +3.3V_TU +1.8V_TU C3737 100pF 50V NON_ASIA 0 R3715 NON_ASIA 0 R3714 TU_GND_A GND seperation for ASIS tuner C3708 0.1uF 16V C3707 100pF 50V C3738 0.1uF 16V close to the tuner pin, add,09029 R3704 C3716 0.1uF 16V 100 IF_AGC_MAIN should be guarded by ground +3.3V_TU IC3703 +1.8V_TU AP1117E18G-13 TUNER MULTI-OPTION TU3700-*1 TDSS-H501F(B) 3 TW_FE_LNA FILTER_SETTING CTRL_1 CTRL_2 54MHz~350MHz 1 0 LPF 350Hz~450MHz 0 0 Through 450Hz~870MHz 0 1 HPF Frequence C3717 0.1uF 16V Filter_Type IN ADJ/GND 1 OUT 2 TUNER_ATSC 1 2 3 4 5 6 7 8 9 10 11 X B1 A1 NC_1 RESET R3766 1 +3.3V_Normal +3.3V_TU C3740 0.1uF 16V SCL SDA Size change,0929 L3703 CIS21J121 +B1[3.3V] NC_2 C3741 10uF 10V 85C CAP_10uF_X5R CHANGE TO 10UF 10V X5R +B2[1.8] NC_3 IF_AGC C3723 22uF 6.3V C3725 0.1uF 16V C3715 22uF 6.3V C3727 0.1uF 16V C3741-*1 DIF[P] 10uF 10V CAP_X7R_MP DIF[N] A1 CHANGE TO 6.3V 2012 X5R CHANGE TO 6.3V 2012 X5R 12 SHIELD THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. Copyright ⓒ 2013 LG Electronics. Inc. All right reserved. Only for training and service purposes NC4_S7LRM TUNER_NON_EU 2012.06.21 14 LGE Internal Use Only COMPONENT1 & AV(COMMON), AV2 COMP_AV1/2 JK1701 PPJ248-01 7C [RD3]E-LUG R1716 10K AV2_R_IN AV2 6C [RD3]C-SPRING 4C [RD3]CONTACT D1700 5.6V AV2_LR_ZENER R1700 470K AV2 R1718 12K AV2 C1701 1000pF 50V OPT R1717 10K AV2_L_IN AV2 AV2 5B D1701 5.6V AV2_LR_ZENER [WH2]C-SPRING R1701 470K AV2 R1719 12K AV2 C1702 1000pF 50V OPT +3.3V_Normal 4A R1708 10K AV2 [YL]CONTACT R1711 6A 1K AV2_CVBS_DET AV2 D1702 5.6V OPT [YL]C-SPRING AV2_CVBS_IN COMP_AV1 JK1702 PPJ245-01 D1713 AV2_CVBS_ZENER_ROHM 7E [RD2]E-LUG 7A [YL]E-LUG 7H [RD2]E-LUG D1714 AV2_CVBS_ZENER_ROHM D1713-*1 AV2_CVBS_ZENER_KEC C1703 47pF 50V AV2 R1702 75 AV2 D1714-*1 AV2_CVBS_ZENER_KEC R1714 10K COMP2_R_IN 6E [RD2]C-SPRING 4E [RD2]CONTACT 6H D1704 5.6V COMP_LR_ZENER [RD2]C-SPRING C1704 1000pF 50V OPT R1703 470K R1720 12K R1715 10K 4H COMP2_L_IN [RD2]CONTACT D1705 5.6V COMP_LR_ZENER C1705 1000pF 50V OPT R1704 470K R1721 12K +3.3V_Normal COMPONENT & AV1 5G [WH1]C-SPRING [RD1]CONTACT 4F [RD1]CONTACT [RD1]C-SPRING 6F [RD1]C-SPRING 5D [WH]C-SPRING 4C 6C R1709 10K COMP2_DET R1712 1K D1706 5.6V OPT COMP2_Pr+ D1703 COMP_Pr_ZENER_ROHM 8C [RD1]E-LUG-S 8F [RD1]E-LUG-S 5B [BL]C-SPRING 5E [BL]C-SPRING D1707 COMP_Pr_ZENER_ROHM D1703-*1 COMP_Pr_ZENER_KEC R1705 75 D1707-*1 COMP_Pr_ZENER_KEC COMP2_Pb+ D1708 COMP_Pb_ZENER_ROHM 4A [GN]CONTACT 6A [GN]C-SPRING 4D [GN]CONTACT 6D [GN]C-SPRING D1708-*1 COMP_Pb_ZENER_KEC R1706 75 D1710 COMP_Pb_ZENER_ROHM D1710-*1 COMP_Pb_ZENER_KEC +3.3V_Normal R1710 10K AV_CVBS_DET R1713 1K 7A [GN]E-LUG 7D D1709 5.6V OPT [GN]E-LUG R1722 0 COMP2_Y+/AV_CVBS_IN D1711 COMP_Y_ZENER_ROHM D1712 COMP_Y_ZENER_ROHM D1711-*1 COMP_Y_ZENER_KEC R1707 D1712-*1 COMP_Y_ZENER_KEC 75 CVBS_TEST IC1700 MM1756DURE VCC PS OUT 6 1 5 2 4 3 IN DTV/MNT_VOUT GND BIAS 4.7uF CVBS_TEST R1723 75 CVBS_TEST C1706 0.1uF CVBS_TEST C1707 0.1uF +3.3V_Normal C1708 CVBS_TEST THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. Copyright ⓒ 2013 LG Electronics. Inc. All right reserved. Only for training and service purposes NC4_S7LRM REAR_NON_EU_L 2012.08.14 17 LGE Internal Use Only ETHERNET * H/W option : ETHERNET +2.5V_Normal ETHERNET L2101 BLM18PG121SN1D RJ45VT-01SN002 XRJV-01V-0-D12-080 1 2 3 4 5 6 7 8 1 2 3 4 ETHERNET_XMULTIPLE JK2100 ETHERNET_XML_EMI JK2100-*1 1 R2101 49.9 2 ETHERNET R2102 49.9 C2101 0.1uF ETHERNET 3 EPHY_TN 4 5 EPHY_RP ETHERNET R2103 49.9 ETHERNET R2104 49.9 5 6 6 7 C2102 0.1uF ETHERNET EPHY_RN 7 8 9 EPHY_TP ETHERNET 8 9 9 9 ETHERNET C2104 0.01uF 50V THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. Copyright ⓒ 2013 LG Electronics. Inc. All right reserved. Only for training and service purposes NC4_S7LRM LAN 2012/06/21 21 LGE Internal Use Only NC_1 NC_2 NC_3 NC_4 NC_5 NC_6 NC_7 L3402 10uH R3408 43 13 14 15 16 17 18 NC_8 19 20 NC_9 NC_10 21 NC_11 22 24 +3.3V_Normal 23 NC_12 AUDIO AMP(STA380BWEF) 12 GND_REG AUD_SCK C3414 330pF 50V R3410 43 R3411 43 [EP] 48 VDDDIG2 47 C3408 0.1uF 16V C3426 1000pF 50V C3419 0.22uF 50V C3423 0.22uF 50V C3427 1000pF 50V SPEAKER_R L3405 10uH L3401 CIS21J121 +3.3V_Normal SPK_R+ SPK_R- +24V AUD_LRCK R3402 10K AUD_LRCH C3407 0.1uF 16V R3403 10K R3404 100 R3401 10K GNDDIG2 AUD_MASTER_CLK +3.5V_ST 2 VSS_REG 1 VCC_REG 46 36 TESTMODE 35 MCLK 3 OUT2B 45 AGNDPLL C3422 0.22uF 50V SPK_L- L3404 10uH 5 VCC2 49 SA 34 44 VREGFILT C3425 1000pF 50V SPEAKER_L L3403 10uH 6 OUT2A 4 GND2 SCL 33 43 TWARNEXT/FFX4B BICKI C3404 2.2uF 10V SDA 32 42 EAPD/FFX4A C3421 0.22uF 50V SPK_L+ 7 OUT1B IC3401 STA380BWF INTLINE 31 41 30 FFX3B C3424 1000pF 50V 8 VCC1 PWDN 29 FFX3A C3413 330pF 50V C3418 0.22uF 50V C3420 0.22uF 50V 9 GND1 40 GNDDIG1 C3409 0.1uF 16V 10 OUT1A RESET VDDDIG1 28 38 39 27 37 NC_15 11 VDD_REG LRCKI SDI NC_14 26 C3403 0.1uF 16V THERMAL NC_13 25 R3409 43 B Q3401 MMBT3904(NXP) C3412 1uF 50V C3415 1uF 50V C3416 0.1uF 50V C3417 10uF 35V 3216 AMP_RESET C AMP_MUTE C3411 0.1uF 50V C3401 AMP_SDA 1000pF AMP_SCL 50V R3406 0 R3407 0 E P3401 WAFER-ANGLE OPT R3405 0 SPK_L+ POWER_DET SPK_L- SPK_R+ SPK_R- THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. Copyright ⓒ 2013 LG Electronics. Inc. All right reserved. Only for training and service purposes NC4_S7LRM AMP_STA380BWEF 4 3 2 1 2012/08/29 34 LGE Internal Use Only MSTART DEBUG_4PIN JP_GND4 JP_GND3 JP_GND1 P3900 12505WS-04A00 JP_GND2 MSTAR_DEBUG_4P 1 2 3 RGB_DDC_SCL 4 RGB_DDC_SDA 5 THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. Copyright ⓒ 2013 LG Electronics. Inc. All right reserved. Only for training and service purposes NC4_S7LRM MSTAR DEBUG_4PIN 2012/06/20 39 LGE Internal Use Only RS-232C RS232C_DEBUG_4P +3.5V_ST P4000 12507WS-04L R4001 100 VCC R4000 100 PM_RXD PM_TXD PM_RXD GND RM_TXD 1 2 3 4 5 GND THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. Copyright ⓒ 2013 LG Electronics. Inc. All right reserved. Only for training and service purposes NC4_S7LRM RS232C_4P_OS 2012/06/20 40 LGE Internal Use Only IC102 H27U1G8F2CTR-BC +3.3V_Normal NC_10 CLE ALE /PF_CE1 PF_ALE WE /PF_WE WP /PF_WP AR104 22 OS OS R106 1K OS R102 3.3K NC_11 NC_12 NC_13 NC_14 NC_15 34 16 33 17 32 18 31 19 30 20 29 21 28 22 27 23 26 24 25 C103 0.1uF OS VSS_2 NC_22 1K 15 PCM_D[3] AE20 PCM_D[4] AA15 PCM_D[5] PCM_D[6] AE21 AB21 Y15 LED_R/BUZZ NC_21 OS AR102 NC_20 AUD_MASTER_CLK I/O3 PCM_A[3] I/O2 PCM_A[2] I/O1 PCM_A[1] I/O0 OPT C112 100pF 50V NC_18 W22 PCM_A[3] AB18 PCM_A[4] AA20 PCM_A[5] AA21 PCM_A[6] Y19 PCM_A[7] AB17 PCM_A[8] Y16 AUD_MASTER_CLK_0 PCM_A[9] AB19 PCM_A[10] AB20 PWM1 PCM_A[11] AA16 PWM0 PCM_A[12] AA19 PCM_A[13] AC21 PCM_A[14] AA17 56 PCM_A[0] 22 NC_19 V20 PCM_A[2] AUD_SCK R148 SYM.D PCMDATA[0]/GPIO129 PCMDATA[1]/GPIO130 PCMDATA[2]/GPIO131 PCMDATA[3]/GPIO123 PCMDATA[4]/GPIO122 PCMDATA[5]/GPIO121 AE18 PCMDATA[6]/GPIO120 NF_CE1Z/GPIO141 PCMDATA[7]/GPIO119 NF_WPZ/GPIO196 NF_CEZ/GPIO140 W20 PCM_A[1] OPT 35 10uF 10V CAP_10uF_X7R_OS CHANGE TO 10UF 10V X5R VCC_2 1K 36 14 AB22 PCM_A[0] OPT 13 C102-*1 C102 10uF 10V 85C R152 37 CAP_10uF_X5R_OS NC_23 R123 NC_9 38 12 W21 AA18 PCM_D[2] PCM_A[0-14] NC_24 1K VSS_1 11 PCM_D[0] PCM_D[1] PCM_D[7] 1K VCC_1 39 10 +3.3V_Normal NC_25 PCMADR[0]/GPIO128 NF_CLE/GPIO139 PCMADR[1]/GPIO127 NF_REZ/GPIO142 PCMADR[2]/GPIO125 NF_WEZ/GPIO143 PCMADR[3]/GPIO124 NF_ALE/GPIO144 PCMADR[4]/GPIO102 NF_RBZ/GPIO145 /PCM_OE PCMADR[8]/GPIO111 NC_16 /PCM_IORD /PCM_WE AD22 AD20 /PCM_IOWR GPIO_PM[0]/GPIO6 PCMADR[10]/GPIO117 PM_UART_TX/GPIO_PM[1]/GPIO7 PCMADR[11]/GPIO115 GPIO_PM[2]/GPIO8 PCMADR[12]/GPIO107 GPIO_PM[3]/GPIO9 PCMADR[13]/GPIO110 GPIO_PM[4]/GPIO10 PM_UART_RX/GPIO_PM[5]/GPIO11 PM_SPI_SCZ1/GPIO_PM[6]/GPIO12 GPIO_PM[7]/GPIO13 GPIO_PM[8]/GPIO14 PCMOE_N/GPIO116 GPIO_PM[9]/GPIO15 PCMWE_N/GPIO195 PM_SPI_SCZ2/GPIO_PM[10]/GPIO16 PCMIORD_N/GPIO114 PCMIOWR_N/GPIO112 /PCM_CE AC20 Y18 /PCM_CD Y21 /PCM_WAIT Y22 PCM_RST NAND_FLASH_2G_HYNIX NAND_FLASH_1G_TOSHIBA EAN60708702 IC102-*1 H27U2G8F2CTR IC102-*2 TC58NVG0S3ETA0BBBH NC_2 NC_3 NC_4 NC_5 NC_6 R/B RE CE NC_7 NC_8 VCC_1 VSS_1 NC_9 NC_10 CLE ALE WE WP NC_11 NC_12 NC_13 NC_14 NC_15 1 48 2 47 3 46 4 45 5 44 6 43 7 42 8 41 9 40 10 39 11 38 12 37 13 36 14 35 15 34 16 33 17 32 18 31 30 19 20 29 21 28 22 27 23 26 24 25 NC_29 NC_28 NC_27 NC_26 I/O7 NC_2 NC_3 NC_4 NC_5 I/O6 NC_6 I/O5 RY/BY I/O4 RE NC_25 NC_24 NC_23 VCC_2 VSS_2 NC_22 NC_21 CE NC_7 NC_8 VCC_1 VSS_1 NC_9 NC_10 NC_20 CLE I/O3 ALE I/O2 WE I/O1 WP I/O0 NC_11 NC_19 NC_18 NC_17 NC_16 NC_12 NC_13 NC_14 NC_15 1 48 2 47 3 46 4 45 5 44 6 43 7 42 8 41 9 40 10 39 11 38 12 37 13 36 14 35 15 34 16 33 17 32 18 31 19 30 20 29 21 28 22 27 23 26 24 25 NC_29 NC_1 NC_28 NC_2 NC_27 NC_3 NC_26 NC_4 I/O8 NC_5 I/O7 NC_6 I/O6 RY/BY I/O5 RE NC_25 CE NC_24 NC_7 NC_23 NC_8 VCC_2 VCC_1 VSS_2 VSS_1 NC_22 NC_9 NC_21 NC_10 NC_20 CLE I/O4 ALE WE I/O3 WP I/O2 I/O1 NC_11 NC_19 NC_12 NC_18 NC_13 NC_17 NC_14 NC_16 NC_15 1 48 2 47 3 46 4 45 5 44 6 43 7 42 8 41 9 40 10 39 11 38 12 37 13 36 14 35 15 34 16 33 17 32 18 31 19 30 21 28 22 27 23 26 24 25 NC_1 NC_28 NC_2 NC_27 NC_3 NC_26 NC_4 I/O8 NC_5 I/O7 NC_6 I/O6 R/B I/O5 RE NC_25 CE NC_24 NC_7 NC_23 NC_8 VCC_2 VCC_1 VSS_2 VSS_1 NC_22 NC_9 NC_21 NC_10 NC_20 CLE I/O4 ALE I/O3 WE I/O2 29 20 NC_29 WP I/O1 NC_11 NC_19 NC_12 V21 USB1_CTL NC_18 NC_13 NC_17 NC_14 NC_16 NC_15 1 48 2 47 3 46 4 45 5 44 6 43 7 42 8 41 9 40 10 39 11 38 12 37 13 36 14 35 15 34 16 33 17 32 18 31 19 30 29 20 /F_RB POWER_DET K6 PM_TXD K5 INV_CTL J6 RL_ON K4 POWER_ON/OFF_1 L6 C2 R146 PM_RXD 33 /SPI_CS L5 /FLASH_WP M6 SIDE_HP_MUTE M5 PM_SPI_CZ0/GPIO_PM[12]/GPIO0 PCMIRQA_N/GPIO108 PM_SPI_SDI/GPIO2 PCMCD_N/GPIO133 PM_SPI_SDO/GPIO3 R20 21 28 22 27 23 26 24 25 U22 NC_29 NC_28 PM_MODEL_OPT_0 M4 AMP_MUTE R147 R180 4.7K 33 SPI_SCK D3 B2 B1 R151 SPI_SDI 33 SPI_SDO for SERIAL FLASH PCMWAIT_N/GPIO103 TS0CLK/GPIO90 E4 MHL_OCP_EN N25 PM_TXD NC_26 N24 PM_RXD I/O7 for SYSTEM EEPROM (IC104) I/O6 I/O5 I2C_SCL I/O4 I2C_SDA NC_25 PCM2_CE_N/GPIO134 PCM2_IRQA_N/GPIO135 S7LR-M Multi Package B8 MODEL_OPT_6 A8 MODEL_OPT_7 CI_TS_CLK CI_TS_VAL CI_TS_SYNC R136 22 P23 R137 22 P24 TS0DATA_[0]/GPIO80 PCM2_RESET/GPIO137 TS0DATA_[1]/GPIO81 TS0DATA_[2]/GPIO82 UART1_TX/GPIO46 TS0DATA_[3]/GPIO83 UART1_RX/GPIO47 TS0DATA_[4]/GPIO84 UART2_TX/GPIO68 TS0DATA_[5]/GPIO85 UART2_RX/GPIO67 TS0DATA_[6]/GPIO86 UART3_TX/GPIO50 TS0DATA_[7]/GPIO87 I2C_SCKM2/DDCR_CK/GPIO75 TS1VALID/GPI99 I2C_SDAM2/DDCR_DA/GPIO74 TS1SYNC/GPIO100 D2 D1 RGB_DDC_SCL NC_23 VCC_2 DDCA_DA/UART0_TX TS1DATA_[0]/GPIO91 DDCA_CK/UART0_RX TS1DATA_[1]/GPIO92 TS1DATA_[2]/GPIO93 IC101-*1 LGE2121-MS (M1_L13_MS10) N23 PWM1 VSS_2 NC_22 NC_21 E6 F5 NC_20 B6 I/O3 E5 D5 I/O2 I/O1 B7 E7 F7 I/O0 AB5 NC_19 AB3 A9 NC_18 F4 NC_17 AB1 N6 NC_16 P22 PWM2 C7 AB2 AC2 R21 AB25 GPIO39 LVA0P GPIO40 LVA0N GPIO41 LVA1P GPIO42 LVA1N GPIO43 LVA2P GPIO44 LVA2N GPIO45 LVA3P GPIO48 LVA3N GPIO49 LVA4P GPIO52 LVA4N GPIO53 P20 AB23 F6 LED_R/BUZZ AC25 LVB0P GPIO55 LVB0N I2C_SCKM0/GPIO56 LVB1P I2C_SDAM0/GPIO57 LVB1N GPIO76 LVB2P GPIO77 LVB2N LVB3P LVB3N LVB4P CI_TS_DATA[0-7] Y13 CI_TS_DATA[0] Y11 CI_TS_DATA[1] AA12 CI_TS_DATA[2] AB12 CI_TS_DATA[3] from CI SLOT CI_TS_DATA[4] AA14 AB14 CI_TS_DATA[5] AA13 CI_TS_DATA[6] AB11 CI_TS_DATA[7] FE_TS_CLK FE_TS_VAL_ERR FE_TS_SYNC FE_TS_DATA[0-7] PWM0/GPIO69 TS1DATA_[4]/GPIO95 PWM1/GPIO70 TS1DATA_[5]/GPIO96 PWM2/GPIO71 TS1DATA_[6]/GPIO97 PWM3/GPIO72 TS1DATA_[7]/GPIO98 AD15 AC16 AD16 FE_TS_DATA[0] AE15 FE_TS_DATA[1] AE14 FE_TS_DATA[2] AC13 FE_TS_DATA[3] AC14 FE_TS_DATA[4] AD12 FE_TS_DATA[5] AD13 FE_TS_DATA[6] AD14 FE_TS_DATA[7] Internal demod out FE_TS_DATA[0] FE_TS_DATA[0] PWM4/GPIO73 PWM_PM/GPIO197 AB24 AD25 H6 KEY1 AC24 G5 KEY2 AE23 G4 AC23 J5 AC22 J4 AD23 SAR0/GPIO34 SAR1/GPIO35 SAR2/GPIO36 SAR3/GPIO37 SAR4/GPIO38 SCART1_MUTE V23 GPIO54 TS1DATA_[3]/GPIO94 P21 PWM0 Y12 AC15 TS1CLK/GPIO101 S7LR-M_MS10 AA10 TS0SYNC/GPIO89 PCM2_WAIT_N/GPIO136 UART3_RX/GPIO51 RGB_DDC_SDA NC_24 TS0VALID/GPIO88 PCM2_CD_N/GPIO138 D4 /MHL_OCP_DET NC_27 +3.5V_ST PANEL_CTL C1 Y14 USB1_OCD PCM_5V_CTL NC_1 PF_ALE AD19 PCM_RESET/GPIO132 T20 NC_1 PCMCE_N/GPIO118 U21 EAN61857001 IC102-*4 K9F1G08U0D-SCB0 EAN60991001 IC102-*3 TC58NVG1S3ETA00 /PF_WE AE17 A2 PM_SPI_SCK/GPIO1 NAND_FLASH_1G_SS NAND_FLASH_2G_TOSHIBA EAN61508001 /PF_OE AD17 GPIO_PM[11]/GPIO17 AD21 /PCM_IRQA /PF_CE1 AC19 H5 PCMADR[9]/GPIO113 PCMREG_N/GPIO126 AA22 /PF_CE0 AC18 PCMADR[7]/GPIO106 AB15 NC_17 /PF_WP AD18 PCMADR[6]/GPIO105 Y20 /PCM_REG AC17 PCMADR[5]/GPIO104 PCMADR[14]/GPIO109 R153 OPT R105 1K NC_8 PCM_A[4] R124 +3.3V_Normal OS C101 0.1uF PCM_A[5] I/O4 PCM_D[0-7] Boot from 8051 with SPI flash Secure B51 without scramble Secure B51 with scramble Boot from MIPS with SPI flash Boot from MIPS with SPI flash Boot from MIPS with SPI flash Secure MIPS without scramble Scerur MIPS with SCRAMBLE 1K OPT R108 1K 40 9 I/O5 4’b0000 4’b0001 4’b0010 4’b0100 4’b0101 4’b0110 4’b1001 4’b1010 OS NC_7 41 8 PCM_A[6] : : : : : : : : NON_OS /PF_CE0 42 I/O6 B51_no_EJ SB51_WOS SB51_WS MIPS_SPE_NO_EJ MIPS_SPI_EJ_1 MIPS_SPI_EJ_2 MIPS_WOS MIPS_WS 1K CE 43 7 PCM_A[7] OPT /PF_OE 6 I/O7 R165 RE S7LR-M_NON_MS10 IC101 MSD804KKX <CHIP Config> (I2S_OUT_BCK,I2S_OUT_MCK,PAD_PWM1PAD_PWM0) R117 R/B /F_RB 44 5 NC_26 1K NC_6 45 4 PCM_A[0-7] OS 22 AR101 NC_27 1K OS AR103 22 NC_5 46 3 1’b0 1’b1 NC_28 R121 OS R109 3.9K 47 R118 OS R107 1K EAN35669103 2 1K NC_4 NAND_FLASH_1G_HYNIX NC_29 OPT NC_3 48 R115 NC_2 <CHIP Config(LED_R/BUZZ)> Boot from SPI CS1N(EXT_FLASH) Boot from SPI_CS0N(INT_FLASH) +3.3V_Normal 1 1K NC_1 R116 NAND FLASH MEMORY R23 VSYNC_LIKE/GPIO146 U24 V25 R24 V24 R25 W25 T21 W23 T22 SPI1_CK/GPIO199 SPI1_DI/GPIO200 SPI2_CK/GPIO201 SPI2_DI/GPIO202 AA23 Y24 AA25 AA24 LVB4N AE24 DIMMING LVACLKP I2C +3.3V_Normal LVACLKN LVBCLKP AD24 Y23 W24 S7LR-M_NON_MS10 IC101 MSD804KKX LVBCLKN OPT R156 T25 10K R157 PWM0 GPIO194 R140 1K 100 R141 1K R144 2.2K GPIO191 R145 2.2K GPIO192 PWM2 PWM_DIM U23 T24 T23 OPT C111 2.2uF AMP_RESET FRC_RESET AMP_SDA AMP_SCL FRC_RESET 5V_DET_HDMI_2 5V_DET_HDMI_4 I2C_SDA AV_CVBS_DET I2C_SCL AV2_CVBS_DET SC1/COMP1_DET HP_DET S2_RESET TUNER_RESET PM MODEL OPTION EEPROM MODEL_OPT_0 +3.5V_ST NAND_EN NAND_EN MODEL_OPT_1 +3.3V_Normal LNA_CTRL_1 LNA_CTRL_2 NVRAM_RENESAS NVRAM_ST IC104 M24256-BRMN6TP C105 0.1uF IC104-*1 R1EX24256BSAS0A NON_OS_512k_ST NON_OS_512k_ATMEL IC104-*2 M24512-RMN6TP IC104-*3 AT24C512C-SSHD-T R174 10K S/W_TW R177 10K HD_LVDS_NON_EU PM_MODEL_OPT_0 PM_MODEL_OPT_1 E0 E1 8 1 2 7 VCC A0 VSS 3 4 6 5 8 VCC E0 1 8 VCC A0 1 8 VCC WC A1 A0’h E2 1 SCL R111 SDA R112 C104 8pF OPT 22 22 I2C_SCL I2C_SDA C106 8pF OPT A2 VSS 2 7 3 6 4 5 WP E1 SCL E2 SDA 7 3 6 4 5 A1 SCL A2 SDA GND 2 7 3 6 4 5 WP SCL SDA R175 10K S/W_EU/AJ R176 10K HD_LVDS_EU MODEL_OPT_2 PM_MODEL_OPT_0 HIGH : HD_NON_EU LOW : HD_EU HD_LVDS_pattern is different. Between EU and NON_EU PM_MODEL_OPT_1 HIGH : S/W_NON_EU LOW : S/W_EU/AJ S/W is different. Between TW BR_RESET_DEMOD E6 F5 B6 E5 D5 B7 E7 F7 AB5 AB3 A9 F4 AB1 N6 AB2 AC2 GPIO39 LVA0P GPIO40 LVA0N GPIO41 LVA1P GPIO42 LVA1N GPIO43 LVA2P GPIO44 LVA2N GPIO45 LVA3P GPIO48 LVA3N GPIO49 LVA4P GPIO52 LVA4N GPIO53 EAN43349003 AB25 AB23 AC25 AB24 AD25 AC24 AE23 AC23 AC22 AD23 V23 GPIO54 LVB0P GPIO55 LVB0N I2C_SCKM0/GPIO56 LVB1P I2C_SDAM0/GPIO57 LVB1N GPIO76 LVB2P GPIO77 LVB2N LVB3P LVB3N LVB4P U24 V25 V24 W25 W23 AA23 Y24 AA25 AA24 LVB4N AE24 LVACLKP LVACLKN LVBCLKP AD24 Y23 W24 LVBCLKN RXA0+ RXA0RXA1+ RXA1RXA2+ RXA2RXA3+ RXA3RXA4+ RXA4RXB0+ RXB0RXB1+ RXB1RXB2+ RXB2RXB3+ RXB3RXB4+ RXB4RXACK+ RXACKRXBCK+ RXBCK- T25 GPIO194 GPIO191 EAN62389501 THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. Copyright ⓒ 2013 LG Electronics. Inc. All right reserved. Only for training and service purposes VSS 2 WC SYM.A C7 GPIO193 GPIO192 EAN43349004 MODEL_OPT_3 U23 MODEL_OPT_4 T24 MODEL_OPT_5 T23 MODEL_OPT_8 GPIO193 NC4_S7LRM MAIN1_NON_EU 2012/09/19 51 LGE Internal Use Only Memory OPTION MODEL OPTION MODEL_OPT_0 MODEL_OPT_1 R225 R228 OPT 100 MODEL_OPT_5 R230 OPT 100 MODEL_OPT_6 R229 OPT 100 MODEL_OPT_7 R213 OPT 100 MODEL_OPT_8 MODEL_OPT_3 MODEL_OPT_4 MODEL_OPT_6 PIN NO. U23 PIN NO. B8 0 0 +1.10V_VDDC Note VDDC 1.05V NON_M120 128M+128M 0 1 256M 1 0 256M+128M 1 1 M120 MODEL_OPT_4 U23 MIU0-128M MIU0-256M MODEL_OPT_5 T24 NON_DVB_S DVB_S MODEL_OPT_6 B8 MIU1-NO_DDR MIU1-128M MODEL_OPT_7 A8 NON_DUALSTREAM DUALSTREAM 0.1uF T25 C283 MODEL_OPT_3 DVB_T2 1uF PHM_ON PHM_OFF 1uF NON_DVB_T2 C280 AB2 C277 F4 MODEL_OPT_2 128M 10V MODEL_OPT_1 +1.10V_VDDC VDDC : 2026mA HD FHD MODEL_OPT_2 OPT 100 OPT 100 Ginga Normal Power 3.3V IF_P_MSTAR H9 L204 BLM18PG121SN1D J3 K3 J1 K2 K1 L2 L3 T5 POWER_ON/OFF_2 T4 V5 POWER_ON/OFF_2 RXACKP RXACKN SYM.C 0.1uF R216 47 C251 0.1uF R218 47 TU_SIF C264 1000pF OPT 50V AC4 NC_8 ANALOG SIF Close to MSTAR AD3 NC_9 RXA0P CHANGE TO 10UF 10V X5R IP RXA1P IM RXA1N SIFP RXA2N SIFM N12 P14 10uF 10V CAP_10uF_X7R P15 R10 R14 FB_CORE R15 T10 L208 BLM18PG121SN1D L227 BLM18PG121SN1D HALF_NIM/EU_NON_T2 DDCDA_CK/GPIO26 C240 0.1uF AD2 GND_33 GND_34 VDDC_2 GND_35 VDDC_3 GND_36 VDDC_4 GND_37 VDDC_5 GND_38 VDDC_6 GND_39 VDDC_7 GND_40 VDDC_8 GND_41 VDDC_9 GND_42 VDDC_10 GND_43 VDDC_11 GND_44 VDDC_12 GND_45 VDDC_13 GND_46 VDDC_14 GND_47 GND_49 P10 C241 0.1uF P19 FB_CORE HALF_NIM/EU_NON_T2 R220 10K HALF_NIM/EU_NON_T2 R219 0 HOTPLUGA/GPIO22 GND_32 VDDC_1 GND_48 AC5 HALF_NIM/EU_NON_T2 C282 0.1uF R16 L11 M14 MIUVDDC NC_2 GND_50 FB_CORE GND_51 AVDDL_MOD GND_52 NC_1 GND_53 DVDD_DDR GND_54 IF_AGC_MAIN AE2 TUNER_I2C AE6 GND_55 C285 0.047uF 25V HALF_NIM/EU_NON_T2 RF_AGC I2C_SCKM1/GPIO78 M13 C204-*1 +3.3V_Normal AE3 DDCDA_DA/GPIO27 IF_AGC M12 AVDD_AU33 AD4 RXA2P L10 10uF 10V CAP_10uF_X7R CHANGE TO 10UF 10V X5R AC3 RXA0N K11 0.1uF 0.1uF C255 J2 C250 C259 S7LR-M_NON_MS10 IC101 MSD804KKX 0.1uF HALF_NIM/IF_FILTER C289 33pF CAP_10uF_X5R C284 HALF_NIM/EU_NON_T2 HALF_NIM/EU_NON_T2 K10 C284-*1 0.1uF IF_N_MSTAR C245 0.1uF C235 C258 0.1uF 100 G10 AVDDLV_USB G9 C209 R289 K12 VDD33 +3.3V_Normal HALF_NIM/IF_FILTER C288 33pF 10V 85C OPT 10uF C287 C204 0.1uF 10V85C C257 100 HALF_NIM/EU_NON_T2 HALF_NIM/EU_NON_T2 10uF R288 MODEL_OPT_6 MODEL_OPT_4 AVDD2P5 W10 W11 W12 TU_SDA I2C_SDAM1/GPIO79 GND_56 W9 TU_SCL AD6 AVDD2P5_ADC_1 GND_57 AVDD2P5_ADC_2 GND_58 AVDD2P5_ADC_3 GND_59 AVDD2P5_ADC_4 GND_60 Close to MSTAR XTAL_LOAD_27pF C261 27pF AD1 AE9 CK+_HDMI4 AC9 CK-_HDMI4 R214 D0+_HDMI4 R215 D0-_HDMI4 D1+_HDMI4 AC10 2.2 AD9 2.2 AC11 AD10 D1-_HDMI4 AE11 D2+_HDMI4 AD11 D2-_HDMI4 AE8 DDC_SDA_4 AD8 DDC_SCL_4 AC8 HPD4 SPDIF_IN/GPIO150 RXCCKN SPDIF_OUT/GPIO151 USB0_DM RXC1N USB0_DP RXC2P F3 G3 D0+_HDMI2 F1 D0-_HDMI2 D1+_HDMI2 G2 G1 D1-_HDMI2 H2 D2+_HDMI2 H3 D2-_HDMI2 R6 DDC_SDA_2 U6 DDC_SCL_2 P5 HPD2 R4 CEC_REMOTE_S7 USB1_DM DDCDC_DA/GPIO31 USB1_DP RXBCKP I2S_IN_SD/GPIO149 RXBCKN I2S_IN_WS/GPIO147 RXB0P N3 N1 M3 SC1_ID M2 SC1_FB M1 SC1_R+/COMP1_Pr+ R296 100 I2S_OUT_BCK/GPIO154 RXB1P I2S_OUT_MCK/GPIO152 RXB1N I2S_OUT_SD/GPIO155 SPDIF_OUT AVDD25_PGA SPDIF_OPTIC Normal 2.5V SIDE USB +2.5V_Normal GND_65 GND_67 NC_3 GND_68 NC_4 GND_69 GND_70 AVDD_NODIE GND_71 AVDD2P5 GND_72 L7 L211 BLM18PG121SN1D SIDE_USB1_DM AE12 M7 AVDD2P5:172mA P7 SIDE_USB1_DP CAP_10uF_X5R AMP_SCL D8 AMP_SDA D9 CHANGE TO 10UF 10V X5R COMP2_DET R7 10uF 10V 85C C273 0.1uF C260 1uF C274 0.1uF AVDD_AU33 AUD_SCK AVDD25_PGA:13mA AUD_MASTER_CLK_0 B9 VDD33 L229 BLM18PG121SN1D AUD_LRCH I2S_I/F C10 AUD_LRCK I2S_OUT_WS/GPIO153 GND_74 AVDD3P3_MPLL GND_75 AVDD_DMPLL GND_76 GND_77 GND_78 GND_79 AVDD_AU33 GND_80 AVDD_EAR33 GND_81 GND_82 R19 VDDP_1 GND_83 VDDP_2 GND_84 GND_85 W18 C269-*1 W19 10uF 10V CAP_10uF_X7R HOTPLUGB/GPIO23 AVDD_DVI_USB_2 V7 T19 C291 0.1uF 16V GND_73 DVDD_NODIE AVDD2P5_MOD C9 AVDD_DVI_USB_1 M19 W7 RXB2N DDCDB_CK/GPIO28 AVDD_MOD_2 U7 AVDD_NODIE E2 W15 AVSS_PGA RXB2P DDCDB_DA/GPIO29 GND_64 W14 B10 RXB0N VDD33 AVDD_LPLL_1 GND_86 AVDD_LPLL_2 GND_87 GND_88 V19 VDDP_NAND GND_89 GND_90 AB9 AUR0 P2 P3 D6 C8 I2S_IN_BCK/GPIO148 GND_63 AVDD_MOD_1 GND_66 DDCDC_CK/GPIO30 AUL0 N2 U19 AVDD_DMPLL CEC/GPIO5 R3 27pF GND_62 V18 AVDD2P5_MOD AC12 RXC2N F2 CK+_HDMI2 AVDD25_LAN XTAL_LOAD_30pF C262-*1 30pF E3 RXC1P Y17 CI_DET RXC0P RXC0N C262 GND_61 XTAL_LOAD_27pF D7 RXCCKP HOTPLUGC/GPIO24 CK-_HDMI2 1M HOTPLUGD/GPIO25 X201 24MHz XTAL_LOAD_30pF C261-*1 30pF C269 HDMI R5 PM_MODEL_OPT_1 AC1 R287 XIN XOUT HSYNC0 AUL1 VSYNC0 AUR1 RIN0P AUL2 RIN0M AUR2 GIN0P AUL3 GIN0M AUR3 BIN0P AUL4 BIN0M AUR4 AA11 AVDD_MIU K15 AA9 K16 AA7 C238 2.2uF AV2 AB8 C239 2.2uF AV2 C242 2.2uF C243 2.2uF Y8 Y10 L15 AV2_L_IN AV2_R_IN AVDD_DDR0_D_1 GND_92 AVDD_DDR0_D_2 GND_93 AVDD_DDR0_D_3 GND_94 AVDD_DDR0_C GND_95 GND_96 K17 COMP2_L_IN L17 COMP2_R_IN AC7 GND_91 J17 Y9 M17 L16 AD7 AVDD_DDR1_D_1 GND_97 AVDD_DDR1_D_2 GND_98 AVDD_DDR1_D_3 GND_99 AVDD_DDR1_C SOGIN0 GND_100 GND_101 AUDIO IN CHANGE TO X5R SC1_G+/COMP1_Y+ GND_102 E9 SC1_B+/COMP1_Pb+ GND_EFUSE V2 SC1_SOG_IN V3 SC1_CVBS_IN U3 SC1/COMP1_L_IN U2 SC1/COMP1_R_IN T1 DEMOD_SCL T2 DEMOD_SDA R2 R1 T3 HSYNC1 VSYNC1 W6 GPIO_PM[13]/GPIO19 RIN1P AUOUTL2 RIN1M AVDD5V_MHL GIN1P GPIO_PM[14]/GPIO20 GIN1M AUOUTR2 BIN1P GPIO_PM[15]/GPIO21 AUDIO OUT MHL_CD_SENSE V6 B17 AVDD5V_MHL Y7 C23 DDR3 1.5V /VBUS_EN W5 A5 SCART1_Rout U5 C11 TP209 C19 BIN1M C22 D14 AVDD_DDR0:55mA +1.5V_DDR D18 AVDD_MIU AA2 R242 68 C223 0.047uF W3 C224 V1 1000pF W1 GIN2M AUVAG BIN2M AUVRP SOGIN2 TU_CVBS 33 C225 Y4 COMP2_Y+/AV_CVBS_IN AV2_CVBS_IN R246 33 C227 0.047uF R249 33 C230 0.047uF AA5 AV2 Y5 AV2 W4 AA4 Y6 AA1 DTV/MNT_VOUT 50V R252 68 C233 0.047uF CVBS1 C263 10uF AB6 L205 5.6uH 5.6uH RP/GPIO63 CVBS3 TP/GPIO60 NC_5 HEAD_PHONE F18 F19 EPHY_RP C5 EPHY_TP C268 4.7uF 10V HEAD_PHONE G8 AVDD_DDR1:55mA HP_ROUT H8 C272 4.7uF 10V HEAD_PHONE N22 N21 N20 M22 M21 RN/GPIO66 NC_6 LED1/GPIO59 EPHY_RN C4 M20 SOC_RESET F10 V15 B5 TN/GPIO62 GPIO61 GPIO64 GPIO65 EPHY_TN C3 URSA_SCL B4 URSA_SCL N4 IRIN/GPIO4 ARC0 HWRESET SWICH SW200 JTP-1127WEM URSA_SDA B3 T6 N5 R210 0 HDMI1_ARC C231 1uF HDMI1_ARC IR HDMI_ARC SOC_RESET W16 POWER_DET_RESET +3.5V_ST A3 URSA_SDA RESET_IC_SOC_RESET R266 470 C202 4.7uF 10V RESET_IC_SOC_RESET C200 4.7uF 10V V8 T18 STby 3.5V +3.5V_ST SWICH R205 100 +3.5V_SOC_RESET GND_106 GND_2 GND_107 GND_3 GND_108 GND_4 GND_109 GND_5 GND_110 GND_6 GND_111 GND_7 GND_112 GND_8 GND_113 GND_9 GND_114 GND_10 GND_115 GND_11 GND_116 GND_12 GND_117 GND_13 GND_118 GND_14 GND_119 GND_15 GND_120 GND_16 GND_121 GND_17 GND_122 GND_18 GND_123 GND_19 GND_124 GND_20 GND_125 GND_21 GND_126 GND_22 GND_127 GND_23 GND_128 GND_24 GND_129 GND_25 GND_130 GND_26 GND_131 GND_27 GND_132 GND_28 GND_133 GND_29 GND_134 GND_30 GND_135 GND_31 GND_136 G12 G13 G14 G17 G18 G19 G24 H11 H12 H13 H14 H15 H16 H17 H18 H19 J9 J10 J11 J12 J13 J14 J15 J16 J18 J19 J25 K9 K13 K14 H10 K18 K19 K22 L8 L9 J8 L12 L13 L18 L19 M8 K8 M10 M11 L14 M15 M16 M18 M25 N10 N11 N13 N14 N15 N16 N17 N19 K7 P8 P9 M9 P11 P13 P16 P17 P18 P12 R8 R9 R11 R12 R13 R17 T8 T9 N7 T11 T12 T13 T14 T15 T16 T17 U8 U9 U10 U11 U12 U13 U14 U15 U16 U17 R18 V9 V10 V11 V12 V14 V17 T7 E8 MIUVDDC AVDD_NODIE L228 BLM18PG121SN1D AVDD_DMPLL SOC_RESET C201 0.1uF GND_1 G11 +1.10V_VDDC L206 BLM18PG121SN1D R217 0 R200 62K Copyright ⓒ 2013 LG Electronics. Inc. All right reserved. Only for training and service purposes F17 HP_LOUT LED0/GPIO58 THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. F8 A6 NC_7 VCOM E22 H/P OUT HEAD_PHONE C6 CVBS2 AB4 Close to MSTAR C256 0.1uF CVBS0 CVBSOUT1 C203 1000pF OPT L203 EARPHONE_OUTR 0.047uF AA8 C253 1uF AC6 AA6 EARPHONE_OUTL R244 C249 4.7uF AE5 BIN2P CVBS In/OUT E19 AD5 AUVRM 1uF 0.047uF 0.047uF GIN2P C254 C221 C222 Y3 R241 68 33 RIN2M 0.1uF W2 C207 0.047uF C248 C220 0.1uF 33 E18 10uF 10V R239 E17 C278 0.047uF AA3 0.1uF C219 C266 68 L209 BLM18PG121SN1D L202 BLM18SG121TN1D RIN2P 2 Y2 4 0.047uF R238 R240 COMP2_Pb+ C218 3 COMP2_Y+/AV_CVBS_IN 33 D19 HSYNC2 1 R237 COMP2_Pr+ GND_105 A23 SCART1_Lout V4 GND_103 GND_104 SOGIN1 COMP2 SYM.E S7LR-M_NON_MS10 DTV_IF CAP_10uF_X5R Close to MSTAR FHD 1K +1.10V_VDDC 1K PHM_OFF R212 IC101 MSD804KKX * Dual Stream is only Korea 3D spec R227 NON_DVB_T2 1K 1K NON_M120 R207 R209 MIU0-128M 1K NON_DVB_S R223 1K MIU1-NO_DDR R224 R294 1K OPT R293 R297 1K MODEL_OPT_4 1K R204 AB3 Memory 10V 1K HD 1K PHM_ON R211 R226 1K DVB_T2 1K M120 R208 R206 1K MIU0-256M DVB_S R221 1K 1K MIU1-128M R291 R222 1K OPT 100 R201 R202 BOOSTER_OPT100 R203 RF_SW_OPT 0 NON_DUALSTREAM RF_SWITCH_CTL S/W_AJ 1K LNA2_CTL R290 R298 IF_AGC_SEL DUALSTREAM MODEL_OPT_0 HIGH LOW C275 MODEL OPTION PIN NO. 10uF PIN NAME +3.3V_Normal C228 +2.5V_Normal 10uF +2.5V_Normal +3.3V_Normal C286 0.1uF C252 0.1uF C296 10uF 10V L207 BLM18PG121SN1D C279 0.1uF C205 0.1uF NC4_S7LRM MAIN2_NON_EU 2012.09.19 52 LGE Internal Use Only RS-232C HEAD_PHONE HEAD_PHONE R5309 0 RS232_PHONE M6 R5302 100 +3.5V_ST M1 M3_DETECT OPT D5301 ADUC 20S 02 010L 20V RS232_PHONE C5306 0.1uF RS232_PHONE IC5301 OPT D5302 ADUC 20S 02 010L 20V GND 5 L 4 DETECT 3 R 1 6 1 RS232_PHONE R5301 100 JK5301-*1 KJA-PH-0-0177 RS232_PHONE 3 M4 4 M5_GND 5 KJA-PH-1-0177 JK5301 MAX3232CDR C1+ RS232_PHONE C5302 0.1uF RS232_PHONE C5303 0.1uF V+ C1- C2+ RS232_PHONE C5304 0.1uF C2- V- RS232_PHONE C5305 0.1uF DOUT2 RIN2 1 16 2 15 3 14 4 13 5 12 6 11 7 10 8 9 VCC GND DOUT1 RIN1 HEAD_PHONE ROUT1 PM_RXD HP_LOUT C5307 10uF 16V DIN1 PM_TXD OPT C5309 1000pF 50V HEAD_PHONE R5307 1K OPT C5310 1000pF 50V HEAD_PHONE R5308 1K DIN2 ROUT2 EAN41348201 HEAD_PHONE HP_ROUT C5308 10uF 16V +3.3V_Normal R5306 HEAD_PHONE 10K R5305 1K HP_DET THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. Copyright ⓒ 2013 LG Electronics. Inc. All right reserved. Only for training and service purposes HEAD_PHONE NC4_S7LRM RS232C_PHONE 2012/06/21 53 LGE Internal Use Only AVDD_DDR0 AVDD_DDR0 1uF 1uF C1241 1uF C1238 1uF C1219 1uF C1218 C1217 0.1uF 0.1uF C1239 C1206 C1251 A-MVREFCA 10uF10V 1000pF 0.1uF C1204 R1204 1K 1% 1% R1205 1K C1203 C1202 AVDD_DDR0 L1202 CIC21J501NE A-MVREFDQ 1000pF 0.1uF 1K 1% 1% R1202 1K C1201 R1201 +1.5V_DDR CLose to Saturn7M IC CLose to DDR3 DDR_1600_2G_HYNIX IC101 MSD804KKX IC1201 H5TQ2G63DFR-PBC EAN61829203 N3 M8 A0 A1 A2 A3 A4 R1203 A5 L8 ZQ 240 1% AVDD_DDR0 A7 A8 B2 10V 10uF C1205 D9 10V 10uF C1227 G7 C1207 0.1uF K2 C1208 0.1uF K8 C1210 0.1uF N1 C1211 0.1uF N9 C1212 0.1uF R1 C1213 0.1uF R9 C1214 0.1uF C1215 0.1uF VDD_1 A9 VDD_2 A10/AP VDD_3 A11 VDD_4 A12/BC VDD_5 A13 VDD_6 VDD_7 VDD_9 C1 C9 D2 E9 F1 H2 H9 L1 L9 T7 R8 R2 T8 R3 L7 R7 N7 T3 M2 BA0 N8 M3 BA2 VDDQ_1 CK VDDQ_3 CK VDDQ_4 K9 CS VDDQ_7 ODT VDDQ_8 RAS VDDQ_9 CAS K1 J3 K3 L3 WE NC_1 T2 RESET NC_4 F3 DQSL G3 C7 A9 G8 J2 J8 M1 M9 P1 P9 T1 T9 VSS_1 DQSU VSS_2 DQSU VSS_3 VSS_4 DML VSS_5 DMU VSS_6 D8 E2 DDR_1600_2G_SS DDR_1600_2G_NANYA DDR_1600_1G_HYNIX IC1201-*1 K4B2G1646E-BCK0 IC1201-*2 NT5CB128M16FP-DI IC1201-*3 H5TQ1G63EFR-PBC EAN61848802 EAN61859702 N3 P7 P3 N2 P8 P2 R8 R2 T8 R3 L7 R7 N7 T3 M8 A0 A3 L8 K7 T8 A9 VDD_1 A10/AP VDD_2 A11 VDD_3 A12/BC VDD_4 A13 VDD_5 NC_5 VDD_7 BA0 VDD_9 VDD_6 VDD_8 K3 L3 R7 N7 K8 T3 N1 N9 R9 CK VDDQ_3 VDDQ_4 VDDQ_5 CS VDDQ_6 ODT VDDQ_7 RAS VDDQ_8 CAS VDDQ_9 RESET NC_2 NC_3 NC_4 F3 DQSL C1 K7 K9 K1 J3 H9 K3 L3 J9 DQSU DQSU F7 F2 F8 H3 H8 G2 H7 DML VSS_4 VSS_5 VSS_6 DQL0 VSS_7 DQL1 VSS_8 DQL2 VSS_9 DQL3 VSS_10 DQL4 VSS_11 DQL5 VSS_12 C3 C8 C2 A7 A2 B8 A3 VDD_5 NC_6 VDD_7 BA0 VDD_9 VDD_6 VDD_8 R3 L7 G7 R7 K2 N7 K8 T3 N1 N9 R9 VDDQ_2 CK VDDQ_3 VDDQ_4 VDDQ_5 CS VDDQ_6 ODT VDDQ_7 RAS VDDQ_8 CAS VDDQ_9 A9 C7 B7 NC_2 NC_4 DQSL G8 E7 J2 D3 J8 M1 C1 K7 K9 K1 J3 H9 K3 L3 M9 F7 F2 P9 F8 T1 H3 H8 G2 H7 VSSQ_2 DQU1 VSSQ_3 DQU2 VSSQ_4 DQU3 VSSQ_5 DQU4 VSSQ_6 DQU5 VSSQ_7 DQU6 VSSQ_8 DQU7 VSSQ_9 B9 DML VSS_4 DMU VSS_5 VSS_6 DQL0 VSS_7 DQL1 VSS_8 DQL2 VSS_9 DQL3 VSS_10 DQL4 VSS_11 DQL5 VSS_12 D1 C3 D8 C8 E2 C2 E8 A7 F9 A2 G1 B8 G9 A3 VDD_1 VDD_2 A11 VDD_3 A12/BC VDD_4 NC_7 VDD_5 NC_5 VDD_7 BA0 VDD_9 VDD_6 VDD_8 R3 L7 G7 R7 K2 N7 K8 T3 N1 N9 EAN61836301 EAN61859501 R9 VDDQ_2 CK VDDQ_3 VDDQ_4 VDDQ_5 CS VDDQ_6 ODT VDDQ_7 RAS VDDQ_8 CAS VDDQ_9 NC_2 NC_4 DQSL C1 K7 K9 K1 J3 H9 K3 L3 A9 C7 B7 G8 E7 J2 D3 J8 M1 M9 F7 F2 P9 F8 T1 H3 H8 G2 H7 VSSQ_2 DQU1 VSSQ_3 DQU2 VSSQ_4 DQU3 VSSQ_5 DQU4 VSSQ_6 DQU5 VSSQ_7 DQU6 VSSQ_8 DQU7 VSSQ_9 B9 DML VSS_4 DMU VSS_5 VSS_6 DQL0 VSS_7 DQL1 VSS_8 DQL2 VSS_9 DQL3 VSS_10 DQL4 VSS_11 DQL5 VSS_12 D1 C3 D8 C8 E2 C2 E8 A7 F9 A2 G1 B8 G9 A3 VDD_3 A12/BC VDD_4 A13 VDD_5 NC_5 VDD_7 BA0 VDD_9 VDD_6 VDD_8 R3 L7 G7 R7 K2 N7 K8 T3 N1 N9 R9 VDDQ_2 CK VDDQ_3 VDDQ_4 VDDQ_5 CS VDDQ_6 ODT VDDQ_7 RAS VDDQ_8 CAS VDDQ_9 NC_2 NC_4 DQSL C1 K7 C9 K9 K1 J3 H9 K3 L3 J9 A9 C7 B7 G8 E7 J2 D3 J8 M1 M9 F7 F2 P9 F8 T1 H3 H8 G2 H7 VSSQ_2 DQU1 VSSQ_3 DQU2 VSSQ_4 DQU3 VSSQ_5 DQU4 VSSQ_6 DQU5 VSSQ_7 DQU6 VSSQ_8 DQU7 VSSQ_9 B9 DML VSS_4 DMU VSS_5 VSS_6 DQL0 VSS_7 DQL1 VSS_8 DQL2 VSS_9 DQL3 VSS_10 DQL4 VSS_11 DQL5 VSS_12 D1 C3 D8 C8 E2 C2 E8 A7 F9 A2 G1 B8 G9 A3 VDD_3 A12 VDD_4 NC_6 VDD_5 NC_5 VDD_7 BA0 VDD_9 VDD_6 VDD_8 A-MA10 A-MA11 A-MA11 A-MA12 A-MA12 A-MA13 A-MA13 A-MA14 C16 C13 A15 E11 B13 B_DDR3_A[5] A_DDR3_A[6] B_DDR3_A[6] A_DDR3_A[7] B_DDR3_A[7] A_DDR3_A[8] B_DDR3_A[8] A_DDR3_A[9] B_DDR3_A[9] A_DDR3_A[10] B_DDR3_A[10] A_DDR3_A[11] B_DDR3_A[11] A_DDR3_A[12] B_DDR3_A[12] A_DDR3_A[13] B_DDR3_A[13] A_DDR3_A[14] B_DDR3_A[14] A_DDR3_BA[0] B_DDR3_BA[0] A_DDR3_BA[1] B_DDR3_BA[1] A_DDR3_BA[2] B_DDR3_BA[2] E24 F21 E23 D22 D24 D21 C24 C25 F23 E21 D23 A-MBA0 A-MBA1 A-MBA2 A-MCK A-MBA0 A-MBA1 C1209 0.01uF 50V A-MCKE A-MBA2 A-MCK A-MCKB A-MCKE F13 B15 E13 G20 C17 A17 B16 F24 F20 G25 A_DDR3_MCLK B_DDR3_MCLK A_DDR3_MCLKZ B_DDR3_MCLKZ A_DDR3_MCLKE B_DDR3_MCLKE G23 F25 A-MCKB A-MODT A-MRASB A-MODT AVDD_DDR0 A-MCASB R1231 A-MWEB 10K A-MRESETB A-MRASB A-MCASB A-MWEB A-MRESETB E14 B12 A12 C12 D20 A_DDR3_ODT B_DDR3_ODT A_DDR3_RASZ B_DDR3_RASZ A_DDR3_CASZ B_DDR3_CASZ A_DDR3_WEZ B25 B24 A24 B_DDR3_WEZ F11 E20 A_DDR3_RESET B_DDR3_RESET DQL0 VSS_8 DQL1 VSS_9 DQL2 VSS_10 DQL3 VSS_11 DQL4 VSS_12 DQL5 F7 F2 F8 H3 H8 G2 H7 DQL7 VSSQ_1 D7 VSSQ_2 DQU0 VSSQ_3 DQU1 VSSQ_4 DQU2 VSSQ_5 DQU3 VSSQ_6 DQU4 VSSQ_7 DQU5 VSSQ_8 DQU6 VSSQ_9 DQU7 C3 C8 C2 A7 A2 B8 A3 A-MDQSL A-MDQSLB A-MDQSU A-MDQSUB A-MDQSL A-MDQSLB A-MDQSU A-MDQSUB A-MDML A-MDML A-MDMU A-MDMU A-MDQL0 A-MDQL1 A-MDQL0 A-MDQL1 A-MDQL2 A-MDQL2 A-MDQL3 A-MDQL3 A-MDQL4 A-MDQL4 A-MDQL5 A-MDQL5 A-MDQL6 A-MDQL6 A-MDQL7 A-MDQL7 A-MDQU0 A-MDQU0 A-MDQU1 A-MDQU1 A-MDQU2 A-MDQU2 A-MDQU3 A-MDQU3 A-MDQU4 A-MDQU4 A-MDQU5 A-MDQU5 A-MDQU6 A-MDQU6 A-MDQU7 A-MDQU7 B19 C18 K24 A_DDR3_DQSL A_DDR3_DQSLB B_DDR3_DQSL B18 A18 J21 A_DDR3_DQSU A_DDR3_DQSUB B_DDR3_DQSU H24 A_DDR3_DQML B_DDR3_DQML A_DDR3_DQMU B_DDR3_DQMU D17 G15 B21 F15 B22 F14 A22 D15 F16 C21 E16 A20 D16 C20 L20 L23 A_DDR3_DQL[0] B_DDR3_DQL[0] A_DDR3_DQL[1] B_DDR3_DQL[1] A_DDR3_DQL[2] B_DDR3_DQL[2] A_DDR3_DQL[3] B_DDR3_DQL[3] A_DDR3_DQL[4] B_DDR3_DQL[4] A_DDR3_DQL[5] B_DDR3_DQL[5] A_DDR3_DQL[6] B_DDR3_DQL[6] A_DDR3_DQL[7] B_DDR3_DQL[7] A_DDR3_DQU[0] B_DDR3_DQU[0] A_DDR3_DQU[1] B_DDR3_DQU[1] A_DDR3_DQU[2] B_DDR3_DQU[2] A_DDR3_DQU[3] B_DDR3_DQU[3] A_DDR3_DQU[4] B_DDR3_DQU[4] A_DDR3_DQU[5] B_DDR3_DQU[5] A_DDR3_DQU[6] B_DDR3_DQU[6] A_DDR3_DQU[7] B_DDR3_DQU[7] G16 B20 J20 B_DDR3_DQSUB E15 A21 K25 B_DDR3_DQSLB J24 L24 J23 M24 H23 M23 K23 G21 L22 H22 K20 H20 L21 H21 K21 D9 G7 K2 K8 N1 N9 R1 R9 BA1 A1 VDDQ_1 CK VDDQ_2 CK VDDQ_3 VDDQ_4 VDDQ_5 CS VDDQ_6 ODT VDDQ_7 RAS VDDQ_8 CAS VDDQ_9 NC_2 NC_4 F3 DQSL A8 C1 C9 D2 E9 F1 H2 H9 J1 NC_1 NC_3 A9 C7 B7 G8 E7 J2 D3 J8 M1 J9 L1 L9 T7 NC_7 M9 F7 F2 P9 F8 T1 H3 H8 G2 VSSQ_2 DQU1 VSSQ_3 DQU2 VSSQ_4 DQU3 VSSQ_5 DQU4 VSSQ_6 DQU5 VSSQ_7 DQU6 VSSQ_8 DQU7 VSSQ_9 B9 VSS_2 DML VSS_4 DMU VSS_5 VSS_6 DQL0 VSS_7 DQL1 VSS_8 DQL2 VSS_9 DQL3 VSS_10 DQL4 VSS_11 DQL5 VSS_12 D1 C3 C8 E2 C2 E8 A7 F9 A2 G1 B8 G9 A3 E1 G8 J2 J8 M1 M9 P1 P9 T1 T9 B1 VSSQ_1 D7 D8 B3 DQL6 DQL7 B1 VSSQ_1 DQU0 VSS_1 VSS_3 E3 P1 T9 A9 DQSU DQSU E1 H7 THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. Copyright ⓒ 2013 LG Electronics. Inc. All right reserved. Only for training and service purposes VDD_1 VDD_2 A11 RESET B3 DQL6 D7 A-MA10 D12 A_DDR3_A[5] G22 DQSL VSS_2 DQL7 B1 VSSQ_1 DQU0 A-MA9 B14 B_DDR3_A[4] F22 B2 A9 T2 G3 A-MA9 D11 A_DDR3_A[4] D25 L8 A10/AP L9 T7 NC_6 VSS_1 VSS_3 E3 P1 T9 DQSU DQSU E1 A-MA8 A14 B_DDR3_A[3] ZQ WE L1 A-MA7 A-MA8 E12 B_DDR3_A[2] A_DDR3_A[3] A7 L2 F1 H2 A-MA7 C15 A_DDR3_A[2] B23 H1 A8 CKE D2 E9 A-MA5 A-MA6 F12 S7LR-M_NON_MS10 A_DDR3_A[0] SYMBOL.B B_DDR3_A[0] A_DDR3_A[1] B_DDR3_A[1] VREFDQ A5 A6 J7 J1 NC_1 F3 A8 A3 G9 A-MA5 A-MA6 B11 A4 BA2 A1 VDDQ_1 CK A2 M2 N8 VREFCA A1 M7 R1 M3 NC_3 G3 B2 D9 BA1 RESET B3 DQL6 D7 VDD_1 VDD_2 A11 DQSL VSS_2 DQL7 B1 VSSQ_1 DQU0 T8 A9 A10/AP T2 R8 R2 A7 L9 T7 NC_6 VSS_1 VSS_3 E3 P1 T9 DQSU DQSU E1 L8 WE L1 P8 ZQ A8 L2 F1 H2 N2 P2 A5 CKE D2 J9 P3 H1 VREFDQ A6 J7 C9 E9 A3 F9 M8 A0 E8 G1 N3 P7 A4 BA2 J1 NC_1 F3 A8 VREFCA A2 M2 N8 A1 VDDQ_1 CK M8 A0 A1 M7 R1 M3 NC_3 G3 B2 D9 BA1 RESET B3 DQL6 D7 T8 A9 A10/AP T2 R8 R2 DQSL VSS_2 DQL7 B1 VSSQ_1 DQU0 L8 A7 L9 T7 P8 ZQ WE L1 N2 P2 A8 L2 F1 H2 J9 P3 H1 VREFDQ A5 A6 CKE D2 E9 A3 J7 C9 NC_5 VSS_1 VSS_3 E3 P1 T9 DQSU DQSU E1 IC1201-*5 NT5CB64M16DP-DH N3 P7 A4 BA2 J1 NC_1 F3 A8 VREFCA A2 M2 N8 A1 VDDQ_1 CK M8 A0 A1 M7 R1 M3 NC_3 G3 B2 D9 BA1 RESET B3 DQL6 DQL7 D7 VDD_4 A13 DQSL VSS_2 DMU E3 VDD_3 A12/BC L9 T7 NC_6 VSS_1 VSS_3 E7 D3 VDD_1 VDD_2 A11 T2 L1 R8 R2 T8 A9 A10/AP WE DQSL C7 B7 L8 A7 L2 F1 H2 P8 ZQ A8 CKE D2 N2 P2 A5 A6 J7 C9 E9 P3 H1 VREFDQ BA2 J1 NC_1 T2 A8 A3 N3 P7 A4 M2 N8 VREFCA A2 M7 R1 A1 VDDQ_1 VDDQ_2 WE G3 R3 L7 G7 K2 M3 CK CKE K1 J3 B2 D9 BA1 L2 R8 R2 A7 BA2 K9 P8 ZQ A8 J7 N2 P2 A5 A6 M2 M3 H1 VREFDQ A4 M8 A0 A1 DDR_1600_1G_NANYA IC1201-*4 K4B1G1646G-BCK0 EAN61829003 N3 P7 P3 A2 M7 N8 VREFCA A1 DDR_1600_1G_SS D3 E3 VSS_7 B1 D1 B7 E7 DQL6 B9 A-MA4 C14 NC_3 DQSL E1 A-MA4 L2 VDDQ_6 NC_6 B3 A-MA3 K7 CKE VDDQ_5 NC_2 A-MA2 A-MA3 J7 VDDQ_2 J1 J9 P2 A-MA2 A11 NC_5 BA1 A8 P8 A-MA0 A-MA1 M7 VDD_8 A1 A-MA14 A6 N2 A-MA0 A-MA1 1% VREFDQ P3 1% H1 A-MVREFDQ P7 R1235 56 VREFCA R1236 56 A-MVREFCA DQU0 VSSQ_2 DQU1 VSSQ_3 DQU2 VSSQ_4 DQU3 VSSQ_5 DQU4 VSSQ_6 DQU5 VSSQ_7 DQU6 VSSQ_8 DQU7 VSSQ_9 B9 D1 D8 E2 E8 F9 G1 G9 NC4_S7LRM M1_DDR (1DDR) 2012/06/21 54 LGE Internal Use Only Serial Flash for SPI boot_NON_OS +3.5V_ST +3.5V_ST OPT R5503 4.7K +3.5V_ST SFLASH_NON_OS_WINBOND IC1300 W25Q64FVSSIG CS /SPI_CS OPT R5501 10K SPI_SDO R5502 0 WP[IO2] /FLASH_WP GND SFLASH_NON_OS_MX CS SO/SIO1 WP GND Copyright ⓒ 2013 LG Electronics. Inc. All right reserved. Only for training and service purposes 8 0.1uF VCC 1 8 2 7 3 6 4 5 2 7 3 6 4 5 %HOLD[IO3] CLK SPI_SCK DI[IO0] VCC CS DO[IO1] SCLK %WP[IO2] SI/SIO0 SFLASH_OS_MACRONIX IC1300-*2 W25Q80BVSSIG HOLD GND 1 8 2 7 3 6 4 5 R5504 33 SPI_SDI SFLASH_OS_WINBOND IC1300-*1 MX25L6406EM2I-12G THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. 1 C5501 DO[IO1] IC1300-*3 MX25L8006EM2I-12G VCC HOLD[IO3] CS# SO/SIO1 CLK WP# DI[IO0] GND 1 8 2 7 3 6 4 5 VCC HOLD# SCLK SI/SIO0 NC4_S7LRM S_FLASH_NON_OS 2012.06.21 55 LGE Internal Use Only