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LCD TV
SERVICE MANUAL
CHASSIS : LD91D
MODEL : 32LH7000
32LH7000-ZA
CAUTION
BEFORE SERVICING THE CHASSIS,
READ THE SAFETY PRECAUTIONS IN THIS MANUAL.
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CONTENTS
CONTENTS .............................................................................................. 2
PRODUCT SAFETY ..................................................................................3
SPECIFICATION ........................................................................................6
ADJUSTMENT INSTRUCTION ...............................................................10
TROUBLE SHOOTING ............................................................................15
BLOCK DIAGRAM...................................................................................19
EXPLODED VIEW .................................................................................. 20
SVC. SHEET ...............................................................................................
Copyright © 2009 LG Electronics. Inc. All right reserved.
Only for training and service purposes
Downloaded From TV-Manual.com Manuals
-2-
LGE Internal Use Only
SAFETY PRECAUTIONS
IMPORTANT SAFETY NOTICE
Many electrical and mechanical parts in this chassis have special safety-related characteristics. These parts are identified by
in the
Schematic Diagram and Exploded View.
It is essential that these special safety parts should be replaced with the same components as recommended in this manual to prevent
Shock, Fire, or other Hazards.
Do not modify the original design without permission of manufacturer.
Leakage Current Hot Check (See below Figure)
Plug the AC cord directly into the AC outlet.
General Guidance
An isolation Transformer should always be used during the
servicing of a receiver whose chassis is not isolated from the AC
power line. Use a transformer of adequate power rating as this
protects the technician from accidents resulting in personal injury
from electrical shocks.
It will also protect the receiver and it's components from being
damaged by accidental shorts of the circuitry that may be
inadvertently introduced during the service operation.
If any fuse (or Fusible Resistor) in this TV receiver is blown,
replace it with the specified.
When replacing a high wattage resistor (Oxide Metal Film Resistor,
over 1W), keep the resistor 10mm away from PCB.
Do not use a line Isolation Transformer during this check.
Connect 1.5K/10watt resistor in parallel with a 0.15uF capacitor
between a known good earth ground (Water Pipe, Conduit, etc.)
and the exposed metallic parts.
Measure the AC voltage across the resistor using AC voltmeter
with 1000 ohms/volt or more sensitivity.
Reverse plug the AC cord into the AC outlet and repeat AC voltage
measurements for each exposed metallic part. Any voltage
measured must not exceed 0.75 volt RMS which is corresponds to
0.5mA.
In case any measurement is out of the limits specified, there is
possibility of shock hazard and the set must be checked and
repaired before it is returned to the customer.
Leakage Current Hot Check circuit
Keep wires away from high voltage or high temperature parts.
AC Volt-meter
Before returning the receiver to the customer,
always perform an AC leakage current check on the exposed
metallic parts of the cabinet, such as antennas, terminals, etc., to
be sure the set is safe to operate without damage of electrical
shock.
Leakage Current Cold Check(Antenna Cold Check)
With the instrument AC plug removed from AC source, connect an
electrical jumper across the two AC plug prongs. Place the AC
switch in the on position, connect one lead of ohm-meter to the AC
plug prongs tied together and touch other ohm-meter lead in turn to
each exposed metallic parts such as antenna terminals, phone
jacks, etc.
If the exposed metallic part has a return path to the chassis, the
measured resistance should be between 1MΩ and 5.2MΩ.
When the exposed metal has no return path to the chassis the
reading must be infinite.
An other abnormality exists that must be corrected before the
receiver is returned to the customer.
Copyright © 2009 LG Electronics. Inc. All right reserved.
Only for training and service purposes
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-3-
To Instrument's
exposed
METALLIC PARTS
Good Earth Ground
such as WATER PIPE,
CONDUIT etc.
0.15uF
1.5 Kohm/10W
When 25A is impressed between Earth and 2nd Ground
for 1 second, Resistance must be less than 0.1 Ω
*Base on Adjustment standard
LGE Internal Use Only
SERVICING PRECAUTIONS
CAUTION: Before servicing receivers covered by this service
manual and its supplements and addenda, read and follow the
SAFETY PRECAUTIONS on page 3 of this publication.
NOTE: If unforeseen circumstances create conflict between the
following servicing precautions and any of the safety precautions on
page 3 of this publication, always follow the safety precautions.
Remember: Safety First.
General Servicing Precautions
1. Always unplug the receiver AC power cord from the AC power
source before;
a. Removing or reinstalling any component, circuit board
module or any other receiver assembly.
b. Disconnecting or reconnecting any receiver electrical plug or
other electrical connection.
c. Connecting a test substitute in parallel with an electrolytic
capacitor in the receiver.
CAUTION: A wrong part substitution or incorrect polarity
installation of electrolytic capacitors may result in an
explosion hazard.
2. Test high voltage only by measuring it with an appropriate high
voltage meter or other voltage measuring device (DVM,
FETVOM, etc) equipped with a suitable high voltage probe.
Do not test high voltage by "drawing an arc".
3. Do not spray chemicals on or near this receiver or any of its
assemblies.
4. Unless specified otherwise in this service manual, clean
electrical contacts only by applying the following mixture to the
contacts with a pipe cleaner, cotton-tipped stick or comparable
non-abrasive applicator; 10% (by volume) Acetone and 90% (by
volume) isopropyl alcohol (90%-99% strength)
CAUTION: This is a flammable mixture.
Unless specified otherwise in this service manual, lubrication of
contacts in not required.
5. Do not defeat any plug/socket B+ voltage interlocks with which
receivers covered by this service manual might be equipped.
6. Do not apply AC power to this instrument and/or any of its
electrical assemblies unless all solid-state device heat sinks are
correctly installed.
7. Always connect the test receiver ground lead to the receiver
chassis ground before connecting the test receiver positive
lead.
Always remove the test receiver ground lead last.
8. Use with this receiver only the test fixtures specified in this
service manual.
CAUTION: Do not connect the test fixture ground strap to any
heat sink in this receiver.
Electrostatically Sensitive (ES) Devices
Some semiconductor (solid-state) devices can be damaged easily
by static electricity. Such components commonly are called
Electrostatically Sensitive (ES) Devices. Examples of typical ES
devices are integrated circuits and some field-effect transistors and
semiconductor "chip" components. The following techniques
should be used to help reduce the incidence of component
damage caused by static by static electricity.
1. Immediately before handling any semiconductor component or
semiconductor-equipped assembly, drain off any electrostatic
charge on your body by touching a known earth ground.
Alternatively, obtain and wear a commercially available
discharging wrist strap device, which should be removed to
prevent potential shock reasons prior to applying power to the
Copyright © 2009 LG Electronics. Inc. All right reserved.
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unit under test.
2. After removing an electrical assembly equipped with ES
devices, place the assembly on a conductive surface such as
aluminum foil, to prevent electrostatic charge buildup or
exposure of the assembly.
3. Use only a grounded-tip soldering iron to solder or unsolder ES
devices.
4. Use only an anti-static type solder removal device. Some solder
removal devices not classified as "anti-static" can generate
electrical charges sufficient to damage ES devices.
5. Do not use freon-propelled chemicals. These can generate
electrical charges sufficient to damage ES devices.
6. Do not remove a replacement ES device from its protective
package until immediately before you are ready to install it.
(Most replacement ES devices are packaged with leads
electrically shorted together by conductive foam, aluminum foil
or comparable conductive material).
7. Immediately before removing the protective material from the
leads of a replacement ES device, touch the protective material
to the chassis or circuit assembly into which the device will be
installed.
CAUTION: Be sure no power is applied to the chassis or circuit,
and observe all other safety precautions.
8. Minimize bodily motions when handling unpackaged
replacement ES devices. (Otherwise harmless motion such as
the brushing together of your clothes fabric or the lifting of your
foot from a carpeted floor can generate static electricity
sufficient to damage an ES device.)
General Soldering Guidelines
1. Use a grounded-tip, low-wattage soldering iron and appropriate
tip size and shape that will maintain tip temperature within the
range or 500°F to 600°F.
2. Use an appropriate gauge of RMA resin-core solder composed
of 60 parts tin/40 parts lead.
3. Keep the soldering iron tip clean and well tinned.
4. Thoroughly clean the surfaces to be soldered. Use a mall wirebristle (0.5 inch, or 1.25cm) brush with a metal handle.
Do not use freon-propelled spray-on cleaners.
5. Use the following unsoldering technique
a. Allow the soldering iron tip to reach normal temperature.
(500°F to 600°F)
b. Heat the component lead until the solder melts.
c. Quickly draw the melted solder with an anti-static, suctiontype solder removal device or with solder braid.
CAUTION: Work quickly to avoid overheating the circuit
board printed foil.
6. Use the following soldering technique.
a. Allow the soldering iron tip to reach a normal temperature
(500°F to 600°F)
b. First, hold the soldering iron tip and solder the strand against
the component lead until the solder melts.
c. Quickly move the soldering iron tip to the junction of the
component lead and the printed circuit foil, and hold it there
only until the solder flows onto and around both the
component lead and the foil.
CAUTION: Work quickly to avoid overheating the circuit
board printed foil.
d. Closely inspect the solder area and remove any excess or
splashed solder with a small wire-bristle brush.
-4-
LGE Internal Use Only
IC Remove/Replacement
Some chassis circuit boards have slotted holes (oblong) through
which the IC leads are inserted and then bent flat against the
circuit foil. When holes are the slotted type, the following technique
should be used to remove and replace the IC. When working with
boards using the familiar round hole, use the standard technique
as outlined in paragraphs 5 and 6 above.
Removal
1. Desolder and straighten each IC lead in one operation by gently
prying up on the lead with the soldering iron tip as the solder
melts.
2. Draw away the melted solder with an anti-static suction-type
solder removal device (or with solder braid) before removing the
IC.
Replacement
1. Carefully insert the replacement IC in the circuit board.
2. Carefully bend each IC lead against the circuit foil pad and
solder it.
3. Clean the soldered areas with a small wire-bristle brush.
(It is not necessary to reapply acrylic coating to the areas).
"Small-Signal" Discrete Transistor
Removal/Replacement
1. Remove the defective transistor by clipping its leads as close as
possible to the component body.
2. Bend into a "U" shape the end of each of three leads remaining
on the circuit board.
3. Bend into a "U" shape the replacement transistor leads.
4. Connect the replacement transistor leads to the corresponding
leads extending from the circuit board and crimp the "U" with
long nose pliers to insure metal to metal contact then solder
each connection.
Power Output, Transistor Device
Removal/Replacement
1. Heat and remove all solder from around the transistor leads.
2. Remove the heat sink mounting screw (if so equipped).
3. Carefully remove the transistor from the heat sink of the circuit
board.
4. Insert new transistor in the circuit board.
5. Solder each transistor lead, and clip off excess lead.
6. Replace heat sink.
Circuit Board Foil Repair
Excessive heat applied to the copper foil of any printed circuit
board will weaken the adhesive that bonds the foil to the circuit
board causing the foil to separate from or "lift-off" the board. The
following guidelines and procedures should be followed whenever
this condition is encountered.
At IC Connections
To repair a defective copper pattern at IC connections use the
following procedure to install a jumper wire on the copper pattern
side of the circuit board. (Use this technique only on IC
connections).
1. Carefully remove the damaged copper pattern with a sharp
knife. (Remove only as much copper as absolutely necessary).
2. carefully scratch away the solder resist and acrylic coating (if
used) from the end of the remaining copper pattern.
3. Bend a small "U" in one end of a small gauge jumper wire and
carefully crimp it around the IC pin. Solder the IC connection.
4. Route the jumper wire along the path of the out-away copper
pattern and let it overlap the previously scraped end of the good
copper pattern. Solder the overlapped area and clip off any
excess jumper wire.
At Other Connections
Use the following technique to repair the defective copper pattern
at connections other than IC Pins. This technique involves the
installation of a jumper wire on the component side of the circuit
board.
1. Remove the defective copper pattern with a sharp knife.
Remove at least 1/4 inch of copper, to ensure that a hazardous
condition will not exist if the jumper wire opens.
2. Trace along the copper pattern from both sides of the pattern
break and locate the nearest component that is directly
connected to the affected copper pattern.
3. Connect insulated 20-gauge jumper wire from the lead of the
nearest component on one side of the pattern break to the lead
of the nearest component on the other side.
Carefully crimp and solder the connections.
CAUTION: Be sure the insulated jumper wire is dressed so the
it does not touch components or sharp edges.
Diode Removal/Replacement
1. Remove defective diode by clipping its leads as close as
possible to diode body.
2. Bend the two remaining leads perpendicular y to the circuit
board.
3. Observing diode polarity, wrap each lead of the new diode
around the corresponding lead on the circuit board.
4. Securely crimp each connection and solder it.
5. Inspect (on the circuit board copper side) the solder joints of
the two "original" leads. If they are not shiny, reheat them and if
necessary, apply additional solder.
Fuse and Conventional Resistor
Removal/Replacement
1. Clip each fuse or resistor lead at top of the circuit board hollow
stake.
2. Securely crimp the leads of replacement component around
notch at stake top.
3. Solder the connections.
CAUTION: Maintain original spacing between the replaced
component and adjacent components and the circuit board to
prevent excessive component temperatures.
Copyright © 2009 LG Electronics. Inc. All right reserved.
Only for training and service purposes
Downloaded From TV-Manual.com Manuals
-5-
LGE Internal Use Only
SPECIFICATION
NOTE : Specifications and others are subject to change without notice for improvement.
3. Test method
1. Application range
This specification is applied to the LCD TV used LD91D
chassis.
2. Requirement for Test
1) Performance: LGE TV test method followed
2) Demanded other specification
- Safety: CE/IEC specification
- EMC: CE/IEC
Each part is tested as below without special appointment.
1) Temperature : 25±5ºC (77±9ºF), CST : 40±5ºC
2) Relative Humidity : 65±10%
3) Power Voltage : Standard input voltage(100~240V@50/60Hz)
* Standard Voltage of each products is marked by models.
4) Specification and performance of each parts are followed
each drawing and specification by part number in
accordance with BOM.
5) The receiver must be operated for about 5 minutes prior to
the adjustment.
4. General specification
No
Item
Specification
1
Display Screen Device
32 wide Color Display Module
2
Aspect Ratio
16:9
3
LCD Module
32” TFT LCD FHD 100Hz
4
Operating Environment
Temp. : 0 ~50 deg
Remark
LCD
LGD
Humidity : 20 ~90 %
5
Storage Environment
Temp. : -20 ~60 deg
Humidity : 10 ~90 %
6
Input Voltage
AC100-240V~, 50/60Hz
7
Power consumption
Power on (White)
32” LGD
Typ : 110, Max : 120
LCD(Module) + Backlight(Lamp)
With inverter
8
Module Size
32” LGD
760.0(H) x 450.0(V) x 48.00mm(D)
9
Pixel Pitch
32” LGD
0.36375(H) x 0.36375(V)
10
Backlight
16 EEFL
11
Display Colors
1.06B(true) colors
12
Coating
3H(Hard coating)
Copyright © 2009 LG Electronics. Inc. All right reserved.
Only for training and service purposes
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-6-
LGE Internal Use Only
5. Chroma& Brightness
(1) Module optical specification
No.
1.
Item
Specification
Viewing Angle<CR>10>
Min.
Right/Left/Up/Down
Typ.
Max.
89/89
Remark
CR>10
89/89
2.
Luminance
Luminance (cd/m2)
400
500
PSM:Vivid,CSM:Cool,
White(100IRE)
Dynamic contrast :off
Dynamic color L off
Variation
3.
Contrast Ratio
CR
4.
CIE Color Coordinates
White
RED
1.3
MAX /MIN
PSM:Vivid,CSM:Cool,
900
1300
Wx
Typ
0.279
Typ
Wy
-0.03
0.292
+0.03
Xr
White(85IRE)
0.638
Dynamic contrast :off
Dynamic color L off
Yr
0.334
Xg
0.291
Green
Yg
0.607
Xb
0.145
Blue
Yb
0.062
1) Stable for approximately 60 minutes in a dark environment at 25ºC
2) Operating Ambient Humidity : Min 10, Max 90 %RH
3) Supply Voltage : 24V
4) Frame Frequency : 120Hz
(2) Chroma (PSM: Vivid, Color Temperature: Cool)
- except “RGB PC Mode PSM:Standard,Color Temperature:Medium”
**The W/B Tolerance is ±0.002 for Adjustment, but for DQA ±0.015
No
Item
Min
Typ
Max
0.274
0.276
0.278
Remark
1.
Cool
White Balance,X axis
DQA :±0.015
White Balance,Y axis
0.281
0.283
0.285
DQA :±0.015
2.
Medium
White Balance,X axis
0.283
0.285
0.287
DQA :±0.015
White Balance,Y axis
0.291
0.293
0.295
DQA :±0.015
3.
Warm
White Balance,X axis
0.311
0.313
0.315
DQA :±0.015
White Balance,Y axis
0.327
0.329
0.331
DQA :±0.015
(3) SET Optical Feature
1) General feature
No
1.
Item
Luminance (min)
C/R(min)
AV,COMPONENT,HDMI
AV,COMPONENT,HDMI
400cd/m2
900
Module
32 inch
Remark
LGD
except from the PC mode.
* Measurement Condition: Full white/Dynamic) -> Measure the black luminance after 30 seconds.
2) Special feature (Dynamic CR 15000:1)
No
1
Item
Dynamic CR
Min
typ
10000
15000
Max
Inch
Power Board P/N
32”
EAY58473201
Remark
HDMI 720p Full Black Pattern
(Only HDMI mode)
Copyright © 2009 LG Electronics. Inc. All right reserved.
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-7-
LGE Internal Use Only
6. Component Video Input (Y, PB, PR)
Specification
No
Remark
Resolution
H-freq(kHz)
V-freq(Hz)
1.
720x480
15.73
60.00
SDTV,DVD 480i
2.
720x480
15.63
59.94
SDTV,DVD 480i
3.
720x480
31.47
59.94
480p
4.
720x480
31.50
60.00
480p
5.
720x576
15.625
50.00
SDTV,DVD 625 Line
6.
720x576
31.25
50.00
HDTV 576p
7.
1280x720
45.00
50.00
HDTV 720p
8.
1280x720
44.96
59.94
HDTV 720p
9.
1280x720
45.00
60.00
HDTV 720p
10.
1920x1080
31.25
50.00
HDTV 1080i
11.
1920x1080
33.75
60.00
HDTV 1080i
12.
1920x1080
33.72
59.94
HDTV 1080i
13.
1920x1080
26.97/27
23.97/24
HDTV 1080p
14.
1920x1080
33.716/33.75
29.976/30.00
HDTV 1080p
15.
1920x1080
56.250
50
HDTV 1080p
16.
1920x1080
67.43/67.5
59.94/60
HDTV 1080p
7. RGB PC INPUT
No
V-freq.(Hz)
Pixel clock(MHz)
1.
720x400
Resolution
H-freq(kHz)
31.468
70.08
28.321
Proposed
2.
640x480
31.469
59.94
25.17
37.684
75.00
31.50
3.
800x600
37.879
60.31
40.00
46.875
75.00
49.50
4.
832x624
49.725
74.55
57.283
Macintosh
5.
1024x768
48.363
60.00
65.00
VESA(XGA)
56.470
70.00
75.00
60.123
75.029
78.75
47.78
59.87
79.5
VESA
VESA
6.
1280x768
7.
1360x768
47.72
59.8
84.75
WXGA
8.
1366x768
47.56
59.6
84.75
WXGA
9.
1280x1024
63.595
60.0
108.875
SXGA
10.
1920x1080
66.647
59.988
138.625
WUXGA
Copyright © 2009 LG Electronics. Inc. All right reserved.
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-8-
Remark
WXGA
LGE Internal Use Only
8. HDMI Input (PC/DTV)
(1) DTV Mode
No
Resolution
H-freq(kHz)
V-freq.(Hz)
Pixel clock(MHz)
Proposed
1
720x480
15.734 /15.6
59.94 /60
27.00
SDTV 480I
2
720x480
31.469 /31.5
59.94 /60
27.00/27.03
SDTV 480P
3
720x576
15.625
50
27(54)
SDTV 576
4
720x576
31.25
50
54
SDTV 576P
5
1280x720
37.500
50
74.25
HDTV 720P
6
1280x720
44.96 /45
59.94 /60
74.17/74.25
HDTV 720P
7
1920x1080
33.72 /33.75
59.94 /60
74.17/74.25
HDTV 1080I
8
1920x1080
28.125
50.00
74.25
HDTV 1080I
9
1920x1080
26.97 /27
23.97 /24
74.17/74.25
HDTV 1080P
10
1920x1080
33.716 /33.75
29.976 /30.00
74.25
HDTV 1080P
11
1920x1080
56.250
50
148.5
HDTV 1080P
12
1920x1080
67.43 /67.5
59.94 /60
148.35/148.50
HDTV 1080P
Remark
(2) PC Mode
No
Resolution
H-freq(kHz)
V-freq.(Hz)
Pixel clock(MHz)
1
720x400
31.468
70.08
28.321
2
640x480
31.469
59.94
25.17
37.684
75.00
31.50
3
800x600
37.879
60.31
40.00
46.875
75.00
49.50
4
832x624
49.725
74.55
5
1024x768
48.363
Proposed
Remark
HDCP
VESA
HDCP
VESA
HDCP
57.283
Macintosh
HDCP
60.00
65.00
VESA(XGA)
HDCP
56.470
70.00
75.00
60.123
75.029
78.75
6
1280x768
47.78
59.87
79.5
WXGA
HDCP
7
1360x768
47.72
59.8
84.75
WXGA
HDCP
8
1366x768
47.56
59.6
84.75
WXGA
HDCP
9
280x1024
63.595
60.0
108.875
SXGA
HDCP
10
1920x1080
66.647
59.988
138.625
WUXGA
HDCP
Copyright © 2009 LG Electronics. Inc. All right reserved.
Only for training and service purposes
Downloaded From TV-Manual.com Manuals
-9-
LGE Internal Use Only
ADJUSTMENT INSTRUCTION
1. Application Range
This specification sheet is applied to all of the LCD TV with
LD91D chassis.
4) Click “Connect” tab. If “Can’t ” is displayed, Check
connection between computer, jig, and set.
(1)
(4)
2. Designation
1) The adjustment is according to the order which is
designated and which must be followed, according to the plan
which can be changed only on agreeing.
2) Power Adjustment: Free Voltage
3) Magnetic Field Condition: Nil.
4) Input signal Unit: Product Specification Standard
5) Reserve after operation: Above 5 Minutes (Heat Run)
Temperature : at 25±5ºC
Relative humidity : 65±10%
Input voltage : 220V, 60Hz
6) Adjustment equipments: Color Analyzer (CA-210 or CA110), Pattern Generator(MSPG-925 series or Equivalent)
DDC Adjustment Jig equipment, SVC remote controller
7) Push The “IN STOP KEY” - For memory initialization.
Case1 : Software version up
1. After downloading S/W by USB , TV set will reboot
automatically
2. Push “In-stop” key
3. Push “Power on” key
4. Function inspection
5. After function inspection, Push “I n-stop” key.
Case2 : Function check at the assembly line
1. When TV set is entering on the assembly line, Push
“In-stop” key at first.
2. Push “Power on” key for turning it on.
-> If you push “Power on” key, TV set will recover channel
information by itself.
3. After function inspection, Push “In-stop” key.
Please Check the Speed :
To use speed between
from 200KHz to 400KHz
5) Click “Auto” tab and set as below
6) Click “Run”.
7) After downloading, check “OK” message.
(5)
filexxx.bin
(5)
(7) ……….OK
(6)
* USB DOWNLOAD
1) Put the USB Stick to the USB socket.
2) Automatically detecting update file in USB Stick.
- If your downloaded program version in USB Stick is
Low, it didn’t work. But your downloaded version is
High, USB data is automatically detecting.
3) Show the message “Copying files from memory”.
3. Main PCB check process
* APC - After Manual-Insult, executing APC
* Boot file Download
1) Execute ISP program “Mstar ISP Utility” and then click
“Config” tab.
2) Set as below, and then click “Auto Detect” and check
“OK” message
If “Error” is displayed, Check connection between
computer, jig, and set.
3) Click “Read” tab, and then load download file (XXXX.bin)
by clicking “Read”
(3)
fi lexxx.bin
Copyright © 2009 LG Electronics. Inc. All right reserved.
Only for training and service purposes
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- 10 -
LGE Internal Use Only
4) Updating is staring.
3.1. ADC Process
(1) External ADC (Only adjust in the component mode 480I)
• Input the Signal in the Component 1 -Component 480I
(Adjusted only this mode)
MODEL: 209 in Pattern Generator(480i Mode)
PATTERN : 65 in Pattern Generator( MSPG-925 Series)
<Adjustment pattern(PC)>
• After enter Service Mode by pushing “ADJ” key,
• Enter the 5 item and then Push the “Start” button
(2) Internal ADC(Only adjust in the RGB mode)
• After enter Service Mode by pushing “ADJ” key
• Enter ADC Calibration mode by pushing “G” key at “5.
ADC Calibration
• Push the Start button
5) Fishing the version uploading, you have to put USB stick
and “AC Power” off.
6) After putting “AC Power” on and check updated version
on your TV.
* If downloading version is more high than your TV have, TV
can lost all channel data. In this case, you have to
channel recover. if all channel data is cleared, you didn’t
have a DTV/ATV test on production line.
* After downloading, have to adjust TOOL
OPTION again.
(3) Function Check
- Check display and sound
• Check Input and Signal items. (cf. work instructions)
1) TV
2) AV (SCART1/SCART2/ CVBS)
3) COMPONENT (480i)
4) RGB (PC : 1024 x 768 @ 60hz)
5) HDMI
6) PC Audio In
* Display and Sound check is executed by Remote
controller.
4. Total Assembly line process
4.1. Adjustment Preparation
• W/B Equipment condition
CA210 : CH 9, Test signal : Inner pattern (85IRE)
• Above 5 minutes H/run in the inner pattern. (“power on” key
of adjust remote control)
1) Push "IN-START" key in service remote controller
2) Select “Tool Option 1” and Push “OK” button.
3) Punch in the number. (Each model hax their number)
Tool
1
2
3
4
Option
13824
3382
56744
2304
Cool
11,000k
Medium 9,300k
ºK
ºK
4) Completed selecting Tool option.
Warm
6,500k
ºK
X=0.276(±0.002)
Y=0.283(±0.002)
<Test Signal>
X=0.285(±0.002)
Inner pattern
Y=0.293(±0.002)
(216gray,85IRE)
X=0.313(±0.002)
Y=0.329(±0.002)
Copyright © 2009 LG Electronics. Inc. All right reserved.
Only for training and service purposes
Downloaded From TV-Manual.com Manuals
- 11 -
LGE Internal Use Only
* Connecting picture of the measuring instrument
(On Automatic control )
Inside PATTERN is used when W/B is controlled. Connect to
auto controller or push Adjustment R/C POWER ON ->
Enter the mode of White-Balance, the pattern will come out.
Full White Pattern
* After done all adjustments, Press “In-start” button and
compare Tool option and Area option value with its BOM, if it
is correctly same then unplug the AC cable. If it is not same,
then correct it same with BOM and unplug AC cable.
For correct it to the model’s module from factory JIG model.
* Push The “IN STOP” key after completing the function
inspection.
4.2. DPM operation confirmation
CA-210
COLOR
ANALYZER
TYPE: CA-210
(Only Apply for MNT Model)
Check if Power LED Color and Power Consumption operate
as standard.
• Set Input to RGB and connect D-sub cable to set
• Measurement Condition: (100~240V@ 50/60Hz)
• Confirm DPM operation at the state of screen without Signal.
RS-232C Communication
<Connecting picture ( On Automatic Control)>
*Auto-control interface and directions
1) Adjust in the place where the influx of light like floodlight
around is blocked. (illumination is less than 10ux).
2) Adhere closely the Color Analyzer (CA210) to the module
less than 10cm distance, keep it with the surface of the
Module and Color Analyzer’s Prove vertically.(80~100°).
3) Aging time
- After aging start, keep the power on (no suspension of
power supply) and heat-run over 15minutes.
- Using ‘no signal’ or ‘full white pattern’ or the others,
check the back light on.
• Auto adjustment Map(RS-232C)
• Write EDID DATA to EEPROM (24C02) by using DDC2B
protocol.
• Check whether written EDID data is correct or not.
* For SVC main Ass’y, EDID have to be downloaded to Insert
Process in advance.
4.4. DDC EDID Write (HDMI 256Byte)
• Check whether written EDID data is correct or not.
* For SVC main Ass’y, EDID have to be downloaded to Insert
Process in advance.
4.5. EDID DATA
RS-232C COMMAND
CENTER
[CMD ID DATA]
(DEFAULT)
Cool
Mid
R Gain
jg
Ja
jd
00
172
192
192
255
G Gain
jh
Jb
je
00
172
192
192
255
B Gain
ji
Jc
jf
00
192
192
172
255
64
64
64
128
R Cut
4.3. DDC EDID Write (RGB 128Byte )
Warm MIN Cool
Mid
Warm MAX
G Cut
64
64
64
128
B Cut
64
64
64
128
** Caution **
Color Temperature : COOL, Medium, Warm.
One of R Gain/G Gain/ B Gain should be kept on 0xC0, and
adjust other two lower than C0.
(when R/G/B Gain are all C0, it is the FULL Dynamic Range
of Module)
1) All Data : HEXA Value
2) Changeable Data :
*: Serial No : Controlled / Data:01
**: Month : Controlled / Data:00
***:Year : Controlled
****:Check sum
- Auto Download
• After enter Service Mode by pushing “ADJ” key,
• Enter EDID D/L mode.
• Enter “START” by pushing “OK” key.
* Caution
- Never connect HDMI & D-sub Cable when the user
downloading .
- Use the proper cables below for EDID Writing.
* Manual W/B process using adjusts Remote control.
• After enter Service Mode by pushing “ADJ” key,
• Enter White Balance by pushing “ G ” key at “3. White
Balance”.
Copyright © 2009 LG Electronics. Inc. All right reserved.
Only for training and service purposes
Downloaded From TV-Manual.com Manuals
- 12 -
LGE Internal Use Only
* Edid data and Model option download (RS232)
NO.
Item
CMD1 CMD2
Data 0
Enter
download MODE
Download
‘ModeIn’
A
E
Edid data and
Model option
download
Download
A
E
Adjust ‘Mode Out’
A
E
9
0
A
E
9
9
Adjustment
Confirmation
* Detail EDID Options are below
ⓐ Product ID
Product ID
HEX
EDID Table
0
When transfer the ‘Mode In’,
Carry the command.
0
*Note1*Note2
Automatically download
(The use of a internal Data)
40450
0x9E02
029E
Analog
40451
0x9E03
039E
Digital
ⓑ Serial No: Controlled on production line.
To check Download
on Assembly line.
ⓒ Month, Year : Controlled on production line:
ex) Monthly : ‘09’ -> ‘09’
Year : ‘2006’ -> ‘10’
ⓓ Model Name(Hex):
- Manual Download
* Caution
Use the proper signal cable for EDID Download
- Analog EDID : Pin3 exists
- Digital EDID : Pin3 exists
For Analog EDID
D-sub to D-sub
DDC Function
MODEL
MODEL NAME(HEX)
42LH7000 00 00 00 FC 00 34 32 4C 48 37 30 30 30 0A 20 20 20 20
For HDMI EDID
DVI-D to HDMI or HDMI to HDMI
ⓔ Checksum: Changeable by total EDID data.
ⓕ Vendor Specific(HDMI)
No.
1
2
3
Item
Manufacturer ID
Version
Revision
Condition
GSM
Digital : 1
Digital : 3
Hex Data
1E6D
01
03
INPUT
MODEL NAME(HEX)
HDMI1
67030C001000B82D
HDMI2
67030C002000B82D
HDMI3
67030C003000B82D
HDMI4
67030C004000B82D
4.6. Outgoing condition Configuration
• When pressing IN-STOP key by SVC remocon, Red LED
are blinked alternatively. And then Automatically turn off.
(Must not AC power OFF during blinking)
(1) Analog Data 128Byte (2Bi)
0x00
0x00
0x01
00
FF
FF
c
0x02 0x03
0x04 0x05
0x06 0x07
0x08 0x09
FF
FF
FF
FF
00
1E
6D
0x0A 0x0B
0x0C
0x0D 0x0E
a
0x0F
b
01
03
08
46
27
78
EA
D9
B0
A3
57
49
9C
25
0x02
11
49
4B
A5
6E
00
31
40
45
40
61
40
0x03
D1
(01)
C0
(01)
01
01
01
01
1A
(1B)
36
(21)
80
(50)
A0
(A0)
70
(51)
38
(00)
81
(D1)
1F
(1E)
80
(C0)
40
(30)
90
(01)
30
(48)
40
(01)
20
(88)
0x04
35
00
E8
(BC)
26
(86)
32
(21)
00
00
1A
(1C)
DA
(26)
2F
(36)
78
(80)
E0
(A0)
51
(70)
1A
(38)
25
(1F)
40
(40)
0x05
58
(50)
4B
(32)
98
(20)
1F
(4C)
14
(85)
54
(47)
00
(00)
12
(35)
E8
(BC)
00
(35)
26
(86)
0A
(30)
32
(21)
20
(30)
00
1A
(18)
00
(00)
00
(00)
00
(00)
FD
(FC)
00
(00)
39
(33)
20
20
20
20
00
e
0x0E
0x0F
0x01
0x06
0x07
00
20
(0A)
4.7. Internal pressure
Confirm whether is normal or not when between power
board's ac block and GND is impacted on 1.5kV(dc) or
2.2kV(dc) for one second
d
d
(2) DIGITAL DATA(HDMI-1/2/3/4) 256Byte
0x00
0x00
0x01
0x02
0x03
0x04
0x05
0x06
00
FF
FF
FF
FF
FF
FF
c
0x01
0x07 0x08
0x09
00
1E
6D
0x0A
0x0B 0x0C 0x0D
a
b
01
03
80
46
27
78
EA
D9
B0
A3
57
49
9C
25
0x02
11
49
4B
A5
6E
00
31
40
45
40
61
40
0x03
A9
(01)
35
(45)
40
(01)
00
(00)
D1
(01)
E8
(C4)
C0
(01)
26
(8E)
01
01
80
(80)
A0
(18)
70
(71)
38
(38)
90
(01)
30
(58)
40
(01)
20
(2C)
00
(00)
36
(3A)
1A
(1E)
80
(C0)
40
(40)
32
(21)
1A
(02)
00
(00)
81
(D1)
1F
(2D)
1B
21
50
A0
51
00
1E
30
0x05
48
88
35
00
BC
86
21
00
00
1C
00
(00)
00
(00)
00
(00)
FD
(FC)
00
(00)
39
(33)
0x06
4B
(32)
1F
(4C)
54
(47)
12
(35)
00
(35)
0A
(30)
20
(30)
20
(0A)
20
20
20
20
01
e
20
(21)
21
(1F)
00
(8E)
3E
(00)
40
(2C)
1C
(20)
80
(00)
00
BC
(21)
96
(C4)
58
(25)
16
(0C)
51
(1E)
0x04
0x00
02
03
0x01
22
(20)
1F
(22)
88
(00)
00
(8E)
2C
(80)
20
(40)
00
(30)
21
(00)
13
(21)
45
(C4)
58
(55)
1E
(40)
0x04
0x05
0x06
0x07
23
(21)
10
f
0x02
0x03
d
d
0x07
00
(1E)
8E
(00)
00
(8E)
2C
(00)
30
(80)
F1
4E
02
(11)
07
03
(01)
83
15
(03)
01
13
09
81
(02)
07
12
23
00
00
01
(00)
00
(01)
21
(00)
06
(21)
25
(C4)
40
(37)
1D
(BC)
1E
(1D)
00
(1E)
44
(00)
00
(8E)
80
(00)
00
(52)
8C
(00)
00
(01)
21
(00)
C4
(21)
37
(BC)
80
(D0)
0A
(72)
18
(1D)
00
(9E)
8E
(00)
00
(88)
51
(1E)
D0
(51)
02
(80)
00
(8C)
21
(00)
BC
(21)
D0
(20)
8A
(D0)
3A
(D0)
1E
(0A)
00
(18)
88
(00)
1C
(B8)
20
(1E)
80
(72)
01
(D0)
00
(4E)
21
(00)
20
(28)
E0
(20)
18
(1C)
1D
(90)
9E
(1F)
00
(18)
04
14
f
40
(55)
2D
(6E)
71
(16)
80
(20)
4E
(00)
00
80
(40)
10
(28)
38
(20)
18
(40)
1F
(80)
18
(00)
Copyright © 2009 LG Electronics. Inc. All right reserved.
Only for training and service purposes
Downloaded From TV-Manual.com Manuals
05
35
(C4)
10
(55)
2D
(10)
71
(31)
00
(51)
00
e
- 13 -
LGE Internal Use Only
5. Serial number D/L
• press “Power on” key of service remocon.
(Baud rate : 115200 bps)
• Connect RS232 Signal Cable to RS-232 Jack.
• Write Serial number by use RS-232.
• Must check the serial number at the Diagnostics of SET UP
menu. (Refer to below).
5.1. Signal TABLE
CMD
LENGTH
ADH
ADL
DATA_1
...
Data_n
CS
DELAY
CMD : A0h
LENGTH : 85~94h (1~16 bytes)
ADH : EEPROM Sub Address high (00~1F)
ADL : EEPROM Sub Address low (00~FF)
Data : Write data
CS : CMD + LENGTH + ADH + ADL + Data_1 + … + Data_n
Delay : 20ms
5.2. Command Set
No.
1
Adjust mode
EEPROM WRITE
CMD(hex)
A0h
LENGTH(hex)
Description
84h+n
n-bytes Write (n = 1~16)
* Description
FOS Default write : <7mode data> write
Vtotal, V_Frequency, Sync_Polarity, Htotal, Hstart, Vstart, 0,
Phase
Data write : Model Name and Serial Number write in
EEPROM,.
5.3. method & notice
(1) Serial number D/L is using of scan equipment.
(2) Setting of scan equipment operated by Manufacturing
Technology Group.
(3) Serial number D/L must be conformed when it is produced
in production line, because serial number D/L is mandatory
by D-book 4.0
Copyright © 2009 LG Electronics. Inc. All right reserved.
Only for training and service purposes
Downloaded From TV-Manual.com Manuals
- 14 -
LGE Internal Use Only
TROUBLESHOOTING
1. TV/CATV doesn’t display
Check IC104.
Can you see t he normal signal?
NO
Could you measu re voltag e of IC104 in the
Jack Bo ard & IIC lin es?
Are they all normal?
NO
You shou ld check power line
& IIC lines.
YES
YES
You should rep lace Jack Board .
Check the output of TRQ105 in th e Jack
Board.
Can you see t he normal wavefo rm?
NO
You sh ou ld decid e to rep lace
TR Q105 in the Jack Board or not.
YES
Check the output of Main IC(IC100).
Esp ecially you sh ould ch eck
The H,V sync and cloc k.
Can you see t he normal wavefo rm?
NO
After checking th e Power of Main IC(IC100) you
should decide to replace Main IC or not .
YES
This bo ard has b ig problem becau se Main
IC(IC100) have some troubles.
Afte r checking thoroughly all path once again,
You sh ou ld decid e to rep lace Main Bo ard or not.
2. DTV doesn’t display
Check th e outp ut data o f IC104 in th e Jack
Bo ard Pin 52.
Can you see t he normal sign al?
NO
Could you measu re voltag e of IC104 in the
Jack Bo ard & IIC lin es?
Are they all normal?
NO
You sh ou ld ch eck p ower lin e
& IIC li nes.
YES
You sh ou ld rep lace Jack Bo ard .
YES
Check th e output of Main IC(IC100).
Esp ecially you sh ould ch eck
The H,V sync and c loc k.
Can you see t he normal wavefo rm?
NO
After ch eckin g th e Power of Main IC(IC100) you
should decide to replace Main IC or not .
YES
This bo ard has b ig problem becau se Main
IC(IC100) have some troubles.
Afte r c hecking thoro ugh ly all pa th onc e again,
You sh ou ld decid e to rep lace Main Bo ard or no t.
Copyright © 2009 LG Electronics. Inc. All right reserved.
Only for training and service purposes
Downloaded From TV-Manual.com Manuals
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LGE Internal Use Only
3. AV 1/2 doesn’t display
Check JK 200, JK20 1
Can you see t he normal wavefo rm?
NO
JK20 0, JK20 1 may have problem. Rep lace th is
Jack.
YES
Check th e output of Main IC(IC100).
Esp ecially you sh ould ch eck
The H,V sync and c loc k.
Can you see t he normal wavefo rm?
NO
After ch eckin g th e Power of Main IC(IC100) you
should decide to replace Main IC or not .
YES
This bo ard has b ig problem becau se Main
IC(IC100) have some troubles.
Afte r c hecking thoroughly all path once again,
You sh ou ld decid e to rep lace Main Bo ard or no t.
4. Component doesn’t display
Check JK 304
Can you see t he normal wavefo rm?
NO
JK30 4
may have problem. Rep lace th is Jack.
YES
Check th e in pu t o f Compo nent Audio
switch (IC405 in th e Jack Bo ard ),
Can you see t he normal wavefo rm?
NO
Afte r c hecking the Power of compone nt Audio
switch, y ou should decide to replace component
Audio s witch or not.
NO
Afte r c hecking the Power of compone nt Audio
switch y ou should decide to replace component
Audio s witch or not.
NO
After ch eckin g th e Power of Main IC(IC100) you
should decide to replace Main IC or not.
YES
Check th e output of Comp on ent Audio
switch (IC405 in th e Jack Bo ard ) ,
Can you see t he normal wavefo rm?
YES
Check th e output of Main IC(IC100).
Esp ecially you sh ould ch eck
The H,V sync and c loc k.
Can you see t he normal wavefo rm?
YES
This bo ard has b ig problem becau se Main
IC(IC100) have some troubles.
Afte r c hecking thoro ugh ly all pa th onc e again,
You sh ou ld decid e to rep lace Main Bo ard or no t.
Copyright © 2009 LG Electronics. Inc. All right reserved.
Only for training and service purposes
Downloaded From TV-Manual.com Manuals
- 16 -
LGE Internal Use Only
5. RGB PC doesn’t display
Check P30 0 ,
Can you see t he normal wavefo rm?
NO
JP300
may have problem. Rep lace th is Jack.
YES
Check th e in pu t o f RGB Audio
switch (IC405 in th e Jack Bo ard ) ,
Can you see t he normal wavefo rm?
NO
After ch eckin g th e Power of RGB Audio sw itc h,
you should decide to replace RGB Audio s witch
or not.
NO
After ch eckin g th e Power of RGB Audio sw itc h
you should decide to replace RGB Audio s witch
or not.
NO
After ch eckin g th e Power of Main IC(IC100) you
should decide to replace Main IC or not .
YES
Check th e output of RGB Audio
switch (IC405 in th e Jack Bo ard ) ,
Can you see t he normal wavefo rm?
YES
Check th e output of Main IC(IC100).
Esp ecially you sh ould ch eck
The H,V sync and c loc k.
Can you see t he normal wavefo rm?
YES
This bo ard has b ig problem becau se Main
IC(IC100) have some troubles.
Afte r c hecking thoroughly all path once again,
You sh ou ld decid e to rep lace Main Bo ard or no t.
Copyright © 2009 LG Electronics. Inc. All right reserved.
Only for training and service purposes
Downloaded From TV-Manual.com Manuals
- 17 -
LGE Internal Use Only
6. HDMI doesn’t display
Check input c onnect JK600, JK601, JK602,
JK60 3
Can you see t he normal wavefo rm?
NO
JK60 0, JK60 1, JK602, JK 603
may have problem. Rep lace th is Jack.
YES
NO
After ch eckin g th e Power of th is ch ip , you
should decide to replace this or not.
Check DD C commu nication lin es(IC600,
IC601)
YES
NO
After ch eckin g th e Power of th is ch ip , you
should decide to replace this or not.
Check HD CP co mmu nicatio n lin es(IC601)
YES
Check th e in pu t o f HDMI Switch (IC600)
This sign al is TMDS.
Can you see t he normal wavefo rm?
NO
After ch eckin g th e trace o f TMDS lin es and power of
HDMI Switch, you should decide to replace HDMI
Switch or not .
YES
Check th e output of HDMI Switc h(IC600).
Can you see t he normal wavefo rm?
NO
After ch eckin g th e Power of HDMI Switch y ou
should decide to replace HDMI S witch or not.
YES
Check th e output of Main IC(IC100).
Esp ecially you sh ould ch eck
The H,V sync and c loc k.
Can you see t he normal wavefo rm?
NO
After ch eckin g th e Power of Main IC(IC100) you
should decide to replace Main IC or not .
YES
This bo ard has b ig problem becau se Main
IC(IC100) have some troubles.
Afte r c hecking thoroughly all path once again,
You sh ou ld decid e to rep lace Main Bo ard or no t.
Copyright © 2009 LG Electronics. Inc. All right reserved.
Only for training and service purposes
Downloaded From TV-Manual.com Manuals
- 18 -
LGE Internal Use Only
Downloaded From TV-Manual.com Manuals
Copyright © 2009 LG Electronics. Inc. All right reserved.
Only for training and service purposes
- 19 -
MAX3232CDR
IC300
TEA6420D
IC405
SPDIF
RS-232C
L/R
TPA6110A
IC700
CI Slot
(P500)
Head
Phone
PC L/R
F-SCART L/R, H-SCART L/R
AV L/R, COMP L/R
RGB
COMPONENT
AV3
SPDIF_OUT
MC74HC4006
IC702
L/R
PC RGB, H/V SYNC
YPbPr
SCART-RGB
CVBS, Y/C
DTV/MNT_V_OUT
CVBS
CVBS
CVBS
Address[0:7]
CI_DATA[0:7], Control,
Address[8:14]
CI_TS_DATA[0:7]
CLK,ERR,SYN,DATA[0]
74LCX244
Buffer
IC501
H-SCART
F-SCART
TUNER V_OUT
DRX3913K
IC104
74LVC541A
Buffer
IC502
FE_TS_DATA[0:7
]
<JACK BOARD >
SIF
XC5000
IC102
(LGE3369A)
IC100
DDR2 Data[0:15]
LED A’ssy
L (Audio)
DP, DM
TMDS[0:7]
DP, DM
I2S
Host Address[0:7]
DDR2 Address[0:12]
DDR2 Data[0:15]
DDR2 Address[0:12]
FHD 100Hz
Panel
Local Key
HDMI1
HDMI2
HDMI3
HDMI4
EEPROM
AT24C512
Bluetooth
A’ssy
USB
L/R
IR Assy
& RGB Sensor
TDA9996
IC600
Digital amp
(NTP3100)
IC701
SERIAL FLASH
IC103
NAND Flash
HYNIX
IC402
DDR2 SDRAM
(128MB)
IC301
DDR2 SDRAM
(256MB)
IC300
FRC
(LGE7329A)
URSA_C/D[10bit]
IC900
URSA_A/B[10bit]
DDR2 (128MB * 2)
IC1000/1001
BLOCK DIAGRAM
LGE Internal Use Only
EXPLODED VIEW
IMPORTANT SAFETY NOTICE
570
A10
900
550
310
301
300
500
580
510
560
120
123
122
200
A5
910
802
803
801
804
806
830
530
805
540
820
A2
400
Many electrical and mechanical parts in this chassis have special safety-related characteristics. These
parts are identified by
in the Schematic Diagram and EXPLODED VIEW.
It is essential that these special safety parts should be replaced with the same components as
recommended in this manual to prevent X-RADIATION, Shock, Fire, or other Hazards.
Do not modify the original design without permission of manufacturer.
Copyright
LG Electronics. Inc. All right reserved.
Only for training and service purposes
Downloaded From TV-Manual.com Manuals
- 20 -
LGE Internal Use Only
E
C
R1551
1.1K
1%
12K
R1550
+12V
Q100
KRC103S
/PF_WE
PF_ALE
1K
E
C
Q102
2SC3052
10K
R108
+3.3V
Q101
KRC103S
OPT
0 B
0
+3.3V
R106
1K
R109
10K
R113
10K
OPT
E
C
SPI_DO
SPI_CS
+3.3V
R1539
1K
E
NC_15
NC_14
NC_13
NC_12
NC_11
WP
WE
ALE
CLE
NC_10
NC_9
VSS_1
VCC_1
NC_8
NC_7
CE
RE
R/B
NC_6
3.9K
R111
Q103
2SC3052
22
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
R1565
OPT
RESET
R1554
10K
+3.3V_ST
R1563
0.1uF
1K
0
0
0
0
0
0
0
R134
R135
R136
R137
R138
R139
GND
WP#
SO
CS#
4
3
2
PCM_A[11]
PCM_D[6]
PCM_A[10]
/PCM_OE
/PCM_CE
PCM_D[7]
PCM_D[5]
JTINT
SI
SCLK
HOLD#
VCC
/RST
JTDI
JTDO
JTMS
JTCK
/JTRST
5
6
7
1 SPI_Boot_Mem 8
+3.3V
IC103
MX25L3205DM2I-12G
R133
33
R1530
B
OPT
R1561
2.2K
C
C103
L102
1
3
GND
VCC
BLM18PG121SN1D
2
IC107
NCP803SN293
OPT
R1532
POWER_DET
SPI_DI
SPI_CK
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
R102
R101
Flash_WP_1
1K
R1553
R1552
10K
+5V_GENERAL
R1549
B
R105
1K
OPT
/PF_CE1
POWER DETECT
OPT
B
R151
0
+3.3V
Serial FLASH MEMORY
for BOOT
PF_WP
R158
OPT
+3.3V_ST
/F_RB
/PF_OE
R103
10K
/PF_CE0
R104
10K
R1533
4.7K
R1540
1K
R112
3
0.1uF
C104
NC_5
R1541
OPT
C113
0.1uF
16V
OPT
4
3
2
1
8
+5V_GENERAL
5
6
7
WC
VCC
SDA
SCL
SCL_SUB/AMP
TDA9996_SCL
SDA_SUB/AMP
TDA9996_SDA
0
R128
0
0
R127
R129
0
0
0
R126
R122
R123
0
0
FE_DEMOD_SDA
R131
R130
R1505
1.2K
FE_DEMOD_SCL
MEMC_SCL
MEMC_SDA
FE_TUNER_SCL
FE_TUNER_SDA
I2C
R100
0 VSS
E2
E1
E0
IC105
M24512-WMW6
EEPROM
R1567
5.1K
1/10W
5%
R1566
30K
1/10W
1%
+24V
NC_16
NC_17
NC_18
R1544
OPT
PCM_A[0]
I/O0
+12V
PCM_A[1]
NC_19
PCM_A[2]
I/O1
22
0.1uF
AR103
C106
I/O2
I/O3
NC_20
NC_21
NC_22
VSS_2
VCC_2
PRE
NC_23
PCM_A[3]
PCM_A[4]
I/O4
22
PCM_A[5]
I/O5
C105
10uF 6.3V
PCM_A[6]
I/O6
NC_24
PCM_A[7]
AR102
I/O7
NC_25
NC_26
C101
8pF
R1506
1.2K
NC_4
L103
+3.3V
C102
8pF
R1572
R1571
C100
0.1uF
R1507
1.2K
NC_3
R1504
1.2K
PCM_A[0-7]
R1508
OPT
NC_27
22
22
R119
0
1
IC106
GND
3
RESET
+3.3V
EEPROM_SDA
EEPROM_SCL
NCP810 : Open Drain
2
R110
OPT
1K
1K
+3.3V
R1501
+5V_ST
1K
1K
MAX810RTR
OPT
R198
MAX810 : CMOS
VCC
+3.3V_ST
R1500
R199
OPT
10 : BOOT 51
11 : BOOT RISC
MCU BOOT STRAP
R1503
1.2K
47
R1509
OPT
2
R1502
1.2K
SDA0
SCL0
SDA0
SCL0
B
B
E
C
SDA1
SCL1
Q105
2SC3052
R116
10K
Q107
2SC3052
EEPROM_SCL
SDA1
SCL1
E
C
+3.3V_ST
EEPROM_SDA
C107
4.7uF
10V
10K
R118
R114
4.7K
PWM1
PWM0
PWM_DIM
C108
10uF
6.3V
R117 100
OPT
POWER_ON_DELAY
ISP_TXD_TR
ISP_RXD_TR
C110
1uF
OPT
4
3
2
1
22
AR101
R144
SB_MUTE
0
R149
R154
OPT
+3.3V
Y10
0
0
0
J2
PWM2
MODEL_OPT_0
C5
D5
D6
E10
E8
E11
D7
D10
0
100
R166
100
0
100
R168
R160
R157
R189
D9
AC11
100
TP154
C4
E4
F4
B4
A4
AA13
AD12
AB12
AB13
R156
R146
NTP_MUTE
PWM2
PWM1
PWM0
0
J1
V5
W5
22
22
22
22
R143
R142
TP153
F8
D11
AB21
AC21
0
R140
R141
R164
R165
R162
R163
AB11
Y14
AC9
AA11
AA12
AF6
AE6
T4
W4
AC7
AA5
AC8
33
R1516
Y5
AB15
AA10
33
33
R1515
33
33
R1514
33
33
R1513
R1519
33
R1512
AB18
AA14
AD6
AA7
AB9
Y4
V4
AA4
AB5
AA9
AC13
AB8
AC12
AB14
AC14
AC15
R1517
33
R1511
Y13
AB16
R1518
33
R1510
PCM_A[14]
PCM_A[13]
PCM_A[12]
PCM_A[11]
PCM_A[10]
PCM_A[9]
PCM_A[8]
PCM_A[7]
PCM_A[6]
PCM_A[5]
PCM_A[4]
PCM_A[3]
PCM_A[2]
PCM_A[1]
PCM_A[0]
PCM_D[7]
Y12
AC6
Y11
AA16
PCM_D[6]
PCM_D[4]
PCM_D[5]
PCM_D[3]
AA15
AC16
D4
SPI_DI
USB_DM_1
USB_DM_2
USB_DP_2
PCM_A5/CI_A5
PCM_A6/CI_A6
PCM_A7/CI_A7
GPIO_PM3/GPIO137
GPIO130/LCK
GPIO131/LDE/SPI_WPn1
GPIO_PM6/INT2/GPIO140
GPIO102
GPIO103/I2S_OUT_SD3
GPIO99
GPIO98
GPIO97
GPIO91
GPIO90/I2S_OUT_MUTE
GPIO88
GPIO96
GPIO44
IRIN
SAR3
SAR2
SAR1
SAR0
PWM3
PWM2
PWM1
PWM0
UART_TX2
UART_RX2
DDCA_DA
22
B8
A7
A11
B9
A10
B10
C9
C11
A9
B11
C10
AA19
AC19
AA20
AB19
AB4
AD5
SPI_DI
SPI_CS
SPI_DO
SPI_CK
FE_TUNER_SCL
OPC_EN
FE_TUNER_SDA
HP_AU_SW
BUF_TS_SYN
MODEL_OPT_3
VGA_EEPROM_WP
SC_RE1
SIDE_HP_MUTE
HP_DET
SC_RE2
BUF_TS_VAL_ERR
BUF_TS_CLK
USB_CTL
SC1_MUTE
FLASH/EEPROM/GPIO
0
100
R1602
100
100
SCL1
+3.3V
100
100
100
POWER_DET
DBG_RX
POWER_ON_PM4
DBG_TX
1
10
08/12/19 (MP)
MODEL_OPT_3 (B9) : FHD (H) / HD (L)
NO LED NORMAL (L)
MODEL_OPT_2 (E11) : LED NORMAL (H)
MODEL_OPT_1 (D7) : FRC (H) / NO FRC (L)
MODEL_OPT_0 (D6) : LCD (H) / PDP (L)
PULL UP is applied on the JACK
MODEL_OPT_3
MODEL_OPT_1
PULL UP is applied on the FRC
MODEL_OPT_2
MODEL_OPT_0
Interrupt for ISP Wake up in STB Mode
R180
R186
CI_TS_DATA[0-7]
Flash_WP_1
BUF_TS_DATA[0]
CI_TS_CLK
CI_TS_VAL
CI_TS_SYN
BT_AU_SW
PCM_5V_CTL
R1601
100
BT_ON/OFF
PANEL_CTL
INV_CTL
R182
PM GPIO Assignment Recommended by MStar
FE_BOOSTER_CTRL
SDA1
USB_DP
USB_DM
USB
SUB_WARM_ST
FE_ANT5V_MONITOR
USB_OCD
5V Tolerance
R1600
R192
R155
20pF
BT_DM
MEMC_RESET
/FE_RESET
20pF
C111
C112
BT_DP
+3.3V_ST
MODEL OPTION
100
R177
R183
0
0
R193
1M
X100
FE_AGC_SPEED_CTL
R190
TP155
100
100
CI_TS_DATA[7]
CI_TS_DATA[5]
CI_TS_DATA[6]
CI_TS_DATA[3]
AC4
AC5
CI_TS_DATA[4]
CI_TS_DATA[2]
AB6
U4
AB7
Y9
AA6
CI_TS_DATA[1]
Y8
22
CI_TS_DATA[0]
AA8
AF10
TP125
R170
B6
AF5
22
0
R1534
R1538
R169
A6
F10
F9
C6
AC18
0
0
0
100
100
R1537
R1536
AA17
E7
R159
R1535
R188
AA18
R167
AF11
AB17
H6
AC17
100
100
100
R184
G6
F6
R185
100
G5
R181
R179
33
33
33
H5
F5
E5
AB10
AC10
A5
0
0
R178
R1526
B5
R1525
AD11
R1524
R173
R172
AE12
AF12
AE11
E6
A3
B3
MSD3369GV Platform
GPIO68
GPIO67
ET_COL
ET_MDIO
ET_MDC
ET_TX_EN
ET_RXD1
ET_RXD0
ET_TX_CLK
ET_TXD1
ET_TXD0
TS1_CLK
TS1_VLD
TS1_SYNC
TS1_D0
TS0_CLK
TS0_VLD
TS0_SYNC
TS0_D7
TS0_D6
TS0_D5
TS0_D4
TS0_D3
TS0_D2
TS0_D1
TS0_D0
GPIO43/PCM2_IRQA_N
GPIO42/PCM2_CE_N
UART1_TX/GPIO87
UART1_RX/GPIO86
DDCR_CK
DDCA_CLK
UART2_TX/GPIO85
UART2_RX/GPIO84
GPIO79/LVSYNC2/TX1
LVSYNC/GPIO133
LHSYNC2/I2S_OUT_MUTE/RX1
GPIO62/PCM2_CD_N/TX1
GPIO60/PCM2_RESET/RX1
GPIO132/LHSYNC/SPI_WPn
DDCR_DA
UART2_RX/SDAM
UART2_TX/SCKM
F_RBZ
PF_AD15
PF_ALE
/PF_WE
/PF_OE
/PF_CE1
/PF_CE0
/PCM_CE
PCM_IOR/CI_RD
PCM_IOWR/CI_WR
/PCM_WE
GPIO_PM5/INT1/GPIO139
GPIO_PM4/GPIO138
GPIO_PM2/GPIO136
/PCM_IRQA
PCM_WAIT/CI_WACK
PCM_REG/CI_CLK
GPIO_PM1/GPIO135
PCM_CD/CI_CD
/PCM_OE
GPIO_PM0/GPIO134
PCM_RST/CI_RST
PCM_A14/CI_A14
PCM_A13/CI_A13
PCM_A12/CI_A12
PCM_A11/CI_A11
PCM_A10/CI_A10
PCM_A9/CI_A9
PCM_A8/CI_A8
USB_DP_1
PCM_A4/CI_A4
PCM_A3/CI_A3
PCM_A2/CI_A2
PCM_A1/CI_A1
PCM_A0/CI_A0
SPI_CK
SPI_DO
/SPI_CS
PCMD6/CI_D6
PCMD7/CI_D7
PCMD5/CI_D5
TESTPIN/GND
XOUT
XIN
PCMD4/CI_D4
PCMD3/CI_D3
PCMD2/CI_D2
PCMD1/CI_D1
PCMD0/CI_D0
HWRESET
IC100
LGE3369A (Saturn6 Non RM)
PCM_D[2]
PCM_D[1]
PCM_D[0]
MODEL_OPT_2
ERROR_OUT
PWM0
0
AMP_RST
SC2_MUTE
IR
KEY2
KEY1
/PCM_CE
/PCM_IORD
/PCM_WE
/PCM_IOWR
/PCM_IRQA
MODEL_OPT_1
0
22
R150
AR100
/PCM_OE
/PCM_REG
PCM_RST
/PCM_CD
/PCM_WAIT
PCM_A[0-14]
R148
10K
DBG_TX
DBG_RX
ISP_TXD
ISP_RXD
SCL0
SDA0
EEPROM_SDA
EEPROM_SCL
LED_ON
100
/F_RB
PF_WP
PF_ALE
/PF_WE
/PF_OE
/PF_CE1
C109
2.2uF
OPT
P102
SMW250-04
/PF_CE0
R153
A_DIM
S6_Reset
ISP Port for MEMC
PCM_D[0-7]
S6_Reset
R195
NC_2
R124
12MHz
OPT
+3.3V
2.7K
R196
15K
NC_28
R125
10K
48
2.7K
1
3
4
NAND FLASH
R1603
R1604
IC102
HY27US08121B-TPCB
OPT
R1605
OPT
R1606
1
R1609
NC_1
R1607
+3.3V
OPT
OPT
/PF_CE0
H : Serial Flash
L : NAND Flash
/PF_CE1
H : 16 bit
L :
8 bit
1K
OPT
2
R197
15K
OPT
OPT
4.7K
Downloaded From TV-Manual.com Manuals
R1608
Copyright © 2009 LG Electronics. Inc. All right reserved.
Only for training and service purposes
R1610
NAND FLASH MEMORY
SCHEMATIC DIAGRAM
LGE Internal Use Only
HDMI
R243
10K
EU_SCART
R274
0
R202
C203
C204
C205
470
47
47
47
R214
R215
R217
47
47
47
470
47
47
47
470
R219
R222
R224
47
47
47
47
47
47
47
100
100
R206
R226
R227
R207
R208
R235
R236
R228
R209
47
R205
470
R258
CH_COMP_SOG
SC2_ID
R225
R223
R221
R220
R218
R244
10K
R216
R213
U2
C2019
C222
C221
0.047uF
0.047uF
0.047uF
AA2
Y2
Y3
W1
M3
N3
M2
0.047uF
M1
0.047uF
0.047uF
C219
C220
C2024
CVBS2/SC2_CVBS
CVBS1/SC1_CVBS
CVBSOUT1
CVBSOUT0/SC2_MNTOUT
VCOM0
CVBS0/RF_CVBS
CVBS7
CVBS5
CVBS6/S-VIDEO_C
CVBS4/S-VIDEO_Y
T1 CVBS3/SIDE_CVBS
T2 VCOM1
U3
0.047uF
0.047uF
GIN2P/COMP_Y+
RIN2P/COMP_PR+
BIN2P/COMP_PB+
SOGIN2
J 5 VSYNC2
V3
V2
V1
BIN1P/DSUB_B
L2 SOGIN1
K1
U1
0.047uF
VSYNC1/DSUB_VSYNC
HSYNC1/DSUB_HSYNC
GINM
L1 RIN1P/DSUB_R
L3 GIN1P/DSUB_G
K2
K3
R2
P1 RINM
T3 BINM
BIN0P/SC1_B
P3 SOGIN0/SC1_CVBS
R1
0.047uF
C218
HSYNC0/SC1_ID
CEC
VSYNC0/SC1_FB
P2 RIN0P/SC1_R
R3 GIN0P/SC1_G
N1
N2
J3
C210
C217
RXC2N
RXC2P
RXC1N
RXC1P
RXC0N
RXC0P
RXCCKN
RXCCKP
AE7 DDCD_C_DA
AF7 DDCD_C_CK
AD7 HOTPLUG_C
AD10
AE10
AE9
AF9
AF8
AD9
AD8
AE8
E2 HOTPLUG_B
RXB2N
E1 DDCD_B_DA
F3 DDCD_B_CK
D1
1000pF
0
RXB1N
RXB1P
RXB0N
RXB0P
RXBCKN
RXBCKP
E3 RXB2P
D3
D2
C2
C1
B1
C3
A2 HOTPLUG_A
0.047uF
0.047uF
0.047uF
1000pF
0.047uF
0.047uF
22
0.047uF
22
0.047uF
0.047uF
0.047uF
1000pF
RXA2P
RXA1N
RXA1P
RXA0N
RXA0P
RXA2N
A1 DDCD_A_DA
B2 DDCD_A_CK
H2
H1
G1
H3
G3
G2
SIDE_HP_MUTE
SB_MUTE
NTP_MUTE
SB_MUTE
SC1_MUTE
SB_MUTE
SC2_MUTE
AUVAG
AUVRP
AUVRM
AUCOM
REXT
REFM
REFP
VCLAMP
I2S_IN_SD
I2S_OUT_SD
I2S_OUT_BCK
I2S_OUT_WS
I2S_OUT_MCK
AUOUTL2/SC2_LOUT
AUOUTR2/SC2_ROUT
AUOUTL1/SC1_LOUT
AUOUTR1/SC1_ROUT
AUOUTL0/HP_LOUT
AUOUTR0/HP_ROUT
SPDIF_OUT
SPDIF_IN
SIF0M
SIF0P
AUL5
AUR5
AUL4
AUR4
AUL3
AUR3
AUR2
AUL2
AUL1
AUR1
AUL0
AUR0
LVBCKM
LVBCKP
LVB4M
LVB4P
LVB3M
LVB3P
LVB2M
LVB2P
LVB1M
LVB1P
LVB0M
LVB0P
LVACKM
LVACKP
LVA4M
LVA4P
LVA3M
LVA3P
LVA2M
LVA2P
LVA1M
LVA1P
LVA0M
LVA0P
IC100
LGE3369A (Saturn6 Non RM)
F1 RXACKP
F2 RXACKN
C211
R247
C209
C216
C214
C215
C208
C213
C212
C207
R245
R246
C206
C202
0.047uF
0.047uF
C201
47
47
R212
10K
0.047uF
47
R211
R275
C200
47
A2
R210
100
0
R201
C
EU_HP
R204
A2
D203
ENKMC2838-T112
A1
C
D202
ENKMC2838-T112
A1
A2
D201
ENKMC2838-T112
A1
C
EU_SCART
10K
EU_SCART
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
DTV/MNT_VOUT
FE_VMAIN
S_C_IN
S_Y_IN
AV_CVBS_IN
SC2_CVBS_IN
SC1_CVBS_IN
SC1_CVBS_IN
SC1_B
SC1_G
SC1_R
DSUB_B
DSUB_G
DSUB_R
DSUB_VSYNC
DSUB_HSYNC
COMP_Pb
COMP_Y
COMP_Pr
SC1_FB
SC1_ID
HDMI_CEC
HDMI_SCL
HDMI_SDA
HDMI_RX2-
HDMI_RX2+
HDMI_RX1-
HDMI_RX0HDMI_RX1+
HDMI_RX0+
HDMI_CLK-
HDMI_CLK+
HP_MUTE
007:H7;007:Q5
AMP_MUTE
007:Y15
SCART1_MUTE
004:AK23
SB_MUTE
2.2uF
2.2uF
C2008
AE3
0.1uF
2.2uF
C2006
C2007
C223
2.2uF
C230
C2013
AB2
AD4
AF4
AE4
AE5
G4
J4
H4
K4
C8
C233
1uF
4.7uF
C227
10uF 10V
0.1uF
0.1uF
Close to IC
as close as possible
C228
22
22
22
22
100
100
100
100
100
100
100
0.1uF
+3.3V
R276
100 OPT
R234
C226
C225
C224
390
1%
Check
R229
R232
R233
R231
D8
C7
B7
R250
R251
A8
R240
R239
AC1
AD3
AD2
R238
AD1
R237
AF2
R230
0.1uF
C234
0.1uF
C235
0.1uF
0.1uF
C231
AF1
E9
F11
W2
2.2uF
2.2uF
C232
C2016
AC3
W3
C2015
AB3
2.2uF
2.2uF
C2012
AB1
C2014
2.2uF
C2011
AA1
AC2
2.2uF
2.2uF
C2009
AE2
Y1
AE1
2.2uF
R242
R241
47
47
C236
22pF
OPT
C2031
0.1uF
16V
C2010
330uF
4V
SUB_SPK_MONO
FE_AM_AUDIO
AV_L_OUT
C237
22pF
OPT
C243
0.1uF
C2032
0.1uF
C238
22pF
OPT
C239
22pF
OPT
004:J15
SPDIF_OUT
FE_SIF
004:U5
004:C16
MS_SCK
MS_LRCH
MS_LRCK
AUDIO_MASTER_CLK
007:K16
007:K17
007:K16
007:K22
004:C12
AA23
Y21
W13
U5
T18
T17
T16
T15
T14
T13
T12
T11
T10
T9
T5
R18
R17
R16
R15
R14
R13
R12
R11
SCART1_Rout
SCART1_Lout
SCART2_Rout
R4
P18
P17
P16
P15
P14
P13
P12
P11
P10
P9
P4
N18
N17
N16
N15
N14
N13
N12
N11
N10
N9
N4
M18
M17
M16
M15
M14
M13
M12
M11
M10
M9
L18
L17
L16
L15
L14
L13
L12
L11
L10
L9
F7
E18
E17
E16
R9
SCART2_Lout
C2042
0.1uF
C296
0.1uF
C291
0.1uF
C297
0.1uF
C2041
0.1uF
C294
0.1uF
C2027
10uF
C2043
10uF
C2000
0.1uF
C2001
0.1uF
C2005
0.1uF
C244
0.1uF
VDDC_23
VDDC_24
VDDC_25
VDDC_26
GND_21
GND_22
GND_23
GND_24
VDDP_6
GND_32
AVDD_33_5
GND_70
GND_73
GND_72
GND_71
AVDD_USB
AVDD_DM
AVDD_33_4
GND_69
GND_68
GND_67
AVDD_33_3
AVDD_33_2
AVDD_33_1
AVDD_MPLL
AVDD_LPLL
GND_66
GND_65
GND_64
GND_63
GND_62
GND_61
GND_60
GND_59
GND_58
GND_57
GND_56
GND_55
GND_54
GND_53
GND_52
GND_51
AVDD_MEMPLL_3
AVDD_DDR_10
AVDD_DDR_11
GND_46
GND_47
GND_50
AVDD_DDR_9
AVDD_MEMPLL_2
AVDD_DDR_8
AVDD_MEMPLL_1
AVDD_DDR_7
GND_43
GND_45
GND_49
AVDD_DDR_6
GND_42
GND_44
GND_48
AVDD_DDR_4
AVDD_DDR_5
GND_40
AVDD_DDR_3
AVDD_DDR_2
AVDD_DDR_1
AVDD_AU
GND_41
GND_39
GND_38
GND_37
GND_36
GND_35
GND_34
VDDP_8
VDDP_7
VDDP_5
GND_31
GND_33
VDDP_3
VDDP_4
VDDP_2
GND_29
GND_28
GND_30
VDDP_1
GND_27
GND_26
GND_25
VDDC_22
GND_20
VDDC_27
VDDC_21
VDDC_20
VDDC_19
VDDC_18
VDDC_17
VDDC_16
VDDC_15
VDDC_14
VDDC_13
VDDC_12
VDDC_11
VDDC_10
VDDC_9
VDDC_8
VDDC_7
VDDC_6
VDDC_5
VDDC_4
VDDC_3
VDDC_2
VDDC_1
GND_19
GND_18
GND_17
GND_16
GND_15
GND_13
GND_14
GND_12
GND_11
GND_10
GND_9
GND_8
GND_7
GND_6
GND_5
GND_4
GND_3
GND_2
H8
W8
N7
M7
L7
K7
J7
H7
R20
V20
T20
H17
W18
W17
W16
W15
W14
H16
H15
H14
H13
G13
G12
W7
W10
W9
P20
N20
H12
H11
H10
H9
Y22
W22
W20
W19
W12
W11
V22
V7
U22
U20
U7
T22
T7
R7
P7
M20
L20
K20
J20
H20
H19
H18
D20
D19
D18
D17
D16
C269
0.1uF
C273
C263
0.1uF
C272
MSD3369GV Platform
0.1uF
C256
C271
C2026
0.1uF
L210
BLM18PG121SN1D
C276
0.1uF
C274
: 22.96mA
0.1uF
C2004
0.1uF
+3.3V
L208
2
10
08/12/19 (MP)
0.1uF
C292
AVDD_DM : 0.03mA
+3.3V
AVDD_33 : 281mA
0.1uF
C286
+3.3V
: 4.69mA
BLM18PG121SN1D
C287
L206
BLM18PG121SN1D
0.1uF
C288
0.1uF
+3.3V AVDD_LPLL
0.1uF 0.1uF 0.1uF 0.1uF
C267
: 7.76mA
0.1uF
C279
C265
0.1uF
AVDD_MEMPLL : 23.77mA
C285
+3.3V
L207
BLM18PG121SN1D
+3.3V
L202
AVDD_OTG
BLM18PG121SN1D
0.1uF
C260
C258
0.1uF
AVDD_AU : 36.11mA
L205
BLM18PG121SN1D
C2025
10uF
10V AVDD_MPLL
+3.3V_AVDD_MPLL
0.1uF 0.1uF
C262
0.1uF
C293
+3.3V
AV IN/OUT/LVDS/POWER
0.1uF
C255
0.1uF
C284
C253
0.1uF
VDDP : 102.3mA
L209
BLM18PG121SN1D
+3.3V_VDDP
C250
0.1uF
AVDD_DDR : 18.31mA
+1.8V_DDR
C247
0.1uF
VDDC : 970mA
C241
0.1uF
+3.3V_VDDP
C2003
0.1uF
+1.26V_VDDC
IC100
LGE3369A (Saturn6 Non RM)
C283
0.1uF
C2040
0.1uF
C289
0.1uF
R10
C277
0.1uF
C2039
0.1uF
C281
0.1uF
HP/BT_ROUT
C266
0.1uF
C2038
0.1uF
C275
0.1uF
HP/BT_LOUT
C259
0.1uF
C254
0.1uF
C251
0.1uF
C248
0.1uF
C245
0.1uF
004:J15
C242
0.1uF
004:C13
C2037
0.1uF
C2036
0.1uF
C2035
0.1uF
C2034
0.1uF
C2033
0.1uF
C264
0.1uF
C257
0.1uF
C252
0.1uF
C249
0.1uF
C246
0.1uF
+1.26V_VDDC
C240
330uF
4V
+1.8V_DDR
AV_R_OUT
002:Z19;009:T28
MEMC_RXOC-
C229
002:Z19;009:T28
MEMC_RXOC+
002:Z20;009:T28
MEMC_RXO3002:Z21;009:S28
002:Z20;009:T28
MEMC_RXO3+
002:Z21;009:T28
002:Z18;009:U28
MEMC_RXO2-
MEMC_RXO4-
002:Z18;009:U28
MEMC_RXO2+
MEMC_RXO4+
002:Z18;009:U28
MEMC_RXO1-
MEMC_RXO0+
002:Z17;009:V28
002:Z17;009:U28
MEMC_RXEC-
002:Z18;009:U28
002:Z24;009:R28
MEMC_RXEC+
MEMC_RXO0-
002:Z24;009:Q28
MEMC_RXE4-
MEMC_RXO1+
002:Z26;009:Q28
002:Z25;009:Q28
MEMC_RXE4+
002:Z25;009:Q28
002:Z23;009:R28
002:Z23;009:R28
MEMC_RXE3-
002:Z23;009:R28
002:Z22;009:R28
MEMC_RXE2002:Z25;009:Q28
MEMC_RXE1-
MEMC_RXE3+
MEMC_RXE2+
002:Z22;009:S28
MEMC_RXE0MEMC_RXE1+
002:Z22;009:S28
MEMC_RXE0+
AF3
AA3
AD18
AE18
AE17
AF17
AF18
AD17
AE19
AF19
AF20
AD19
AD20
AE20
AD14
AE14
AE13
AF13
AF14
AD13
AE15
AF15
AF16
AD15
AD16
AE16
R252
22K
R200
10K
C2017
0.01uF
A2
R253
22K
D200
ENKMC2838-T112
A1
R254
22K
C
EU_SCART
C2020
0.01uF
SCART2_MUTE
004:AL14
C2018
0.01uF
+1.26V_VDDC
R255
22K
+3.3V_ST
C2021
0.01uF
+3.3V
R256
22K
SCART
DSUB
CVBS
S-VID
TV/MNT
R257
22K
EU_SCART / EU_HP [OPT]
Audio Mute
C2022
0.01uF
Downloaded From TV-Manual.com Manuals
C2023
0.01uF
Copyright © 2009 LG Electronics. Inc. All right reserved.
Only for training and service purposes
LGE Internal Use Only
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
SDDR_D[2]
SDDR_D[3]
SDDR_D[4]
SDDR_D[5]
SDDR_D[6]
SDDR_D[7]
SDDR_D[8]
SDDR_D[9]
SDDR_D[10]
SDDR_D[11]
SDDR_D[12]
SDDR_D[13]
SDDR_D[14]
SDDR_D[15]
H8
H2
F8
F2
E7
D8
D2
A7
B8
B2
P9
N1
J3
E3
A3
G9
G7
G3
G1
E9
C9
C7
C3
C1
A9
R1
M9
J9
E1
A1
B9
B1
D9
D1
D3
D7
C2
C8
F9
F1
H9
H1
H3
H7
G2
G8
J2
J1
J7
R8
E2
A2
R7
R3
A8
E8
B3
F3
B7
F7
K3
L7
K7
L8
K9
K2
K8
J8
L1
L3
L2
R2
P7
M2
P3
P8
P2
N7
N3
N8
N2
M7
M3
M8
C304
C303
C305
VDDL
VSSDL
NC3
NC2
NC1
NC5
+1.8V_S_DDR
SDDR_DQS1_N
NC4
SDDR_DQS0_N
UDQS
SDDR_DQM1_P
UDM
LDQS
SDDR_DQM0_P
SDDR_DQS1_P
LDM
UDQS
SDDR_DQS0_P
/SDDR_WE
WE
LDQS
/SDDR_CAS
OPT
/SDDR_RAS
R347
0.1uF
0.1uF
ADDR2_A[5]
R320
R319 56
22
56
56
56
56
56
56
56
56
56
R305
ADDR2_D[0]
ADDR2_D[2]
ADDR2_D[5]
SDDR_D[2]
SDDR_D[5]
56
SDDR_D[0]
ADDR2_D[13]
ADDR2_D[7]
56
AR309
ADDR2_D[10]
ADDR2_D[8]
ADDR2_D[15]
SDDR_D[7]
SDDR_D[13]
SDDR_D[10]
SDDR_D[8]
SDDR_D[15]
ADDR2_D[6]
56
ADDR2_D[3]
ADDR2_D[4]
ADDR2_D[14]
SDDR_D[6]
56
AR307
ADDR2_D[9]
ADDR2_D[12]
ADDR2_D[11]
ADDR2_DQS1_N
ADDR2_DQS0_N
ADDR2_DQM1_P
ADDR2_DQM0_P
ADDR2_DQS1_P
ADDR2_DQS0_P
/ADDR2_WE
/ADDR2_CAS
/ADDR2_RAS
ADDR2_ODT
ADDR2_CKE
/ADDR2_MCLK
ADDR2_MCLK
ADDR2_BA[2]
ADDR2_BA[1]
ADDR2_BA[0]
ADDR2_D[1]
AR308
AR306
ADDR2_A[11]
ADDR2_A[8]
SDDR_D[1]
SDDR_D[3]
SDDR_D[4]
SDDR_D[14]
SDDR_D[9]
SDDR_D[12]
SDDR_D[11]
R318
R317
R316
R315
R314
R313
R312
R311
R310
R309
R308
R307
R306
+1.8V_S_DDR
56
22
56
R304
R303
SDDR_A[8]
56
ADDR2_A[6]
SDDR_A[6]
SDDR_A[11]
ADDR2_A[4]
SDDR_A[4]
56
ADDR2_A[2]
SDDR_A[2]
ADDR2_A[0]
ADDR2_A[7]
SDDR_A[7]
AR302
ADDR2_A[12]
SDDR_A[12]
SDDR_A[0]
ADDR2_A[9]
ADDR2_A[10]
SDDR_A[9]
SDDR_ODT 56
OPT
CAS
R346
SDDR_CKE
RAS
CS
ODT
CKE
/SDDR_CK
CK
SDDR_BA[2]
0.1uF
C314
ADDR2_A[3]
56
SDDR_CK
0.1uF
AR301
C313
56
0.1uF
ADDR2_A[1]
SDDR_BA[1]
CK
C312
AR300
C310
56
10uF
C315
SDDR_A[1]
SDDR_A[10]
C318
0.1uF
+1.8V_S_DDR
C316
SDDR_A[3]
BA1
BA2
0.1uF
SDDR_A[5]
56
OPT
0.1uF
SDDR_BA[0]
R350
SDDR_A[12]
SDDR_A[11]
SDDR_A[10]
SDDR_A[9]
SDDR_A[8]
SDDR_A[7]
SDDR_A[6]
SDDR_A[5]
SDDR_A[4]
SDDR_A[3]
SDDR_A[2]
SDDR_A[1]
SDDR_A[0]
C306
BA0
A12
A11
A10/AP
A9
A8
A7
A6
A5
A4
A3
A2
A1
A0
VREF
C307
+1.8V_S_DDR
C308
SDDR_D[0-15]
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
VSSQ1
VSSQ2
VSSQ3
VSSQ4
VSSQ5
VSSQ6
VSSQ7
VSSQ8
VSSQ9
VSSQ10
VSS1
VSS2
VSS3
VSS4
VSS5
VDDQ1
VDDQ2
VDDQ3
VDDQ4
VDDQ5
VDDQ6
VDDQ7
VDDQ8
VDDQ9
VDDQ10
VDD1
VDD2
VDD3
VDD4
VDD5
DQ1
SDDR_D[1]
+1.8V_S_DDR
DQ0
SDDR_D[0]
IC300
HYB18TC1G160C2F-2.5
C302
0.1uF
0.1uF
C323
0.1uF
10uF
C325
C324
IC100
0.1uF
C329
0.1uF
C328
0.1uF
C327
0.1uF
C326
B23
B12
C23
ADDR2_A[7]
ADDR2_A[8]
ADDR2_A[9]
A15
B21
C21
C14
ADDR2_D[2]
ADDR2_D[3]
ADDR2_D[4]
ADDR2_D[5]
C19
C16
C15
ADDR2_D[14] B19
ADDR2_D[15] A17
ADDR2_D[12] A20
ADDR2_D[13] A16
ADDR2_D[10] B16
ADDR2_D[11] B20
ADDR2_D[9]
ADDR2_D[8]
ADDR2_D[7]
C20
A21
ADDR2_D[1]
ADDR2_D[6]
B15
C319
ADDR2_D[0]
B17
A18
A19
C18
C17
B18
D22
D12
D13
D14
D23
A14
B14
D24
B24
C24
ADDR2_A[12] A24
ADDR2_A[10] B22
ADDR2_A[11] A12
C12
ADDR2_A[6]
ADDR2_A[4] A13
ADDR2_A[5] A23
ADDR2_A[3]
C22
ADDR2_A[1] A22
ADDR2_A[2] B13
C13
D15
B_DDR2_A6
B_DDR2_A7
B_DDR2_A8
B_DDR2_A9
B_DDR2_A10
B_DDR2_A11
B_DDR2_A12
A_DDR2_A6
A_DDR2_A7
A_DDR2_A8
A_DDR2_A9
A_DDR2_A10
A_DDR2_A11
A_DDR2_A12
B_DDR2_MCLK
B_DDR2_DQM1
A_DDR2_DQM1
B_DDR2_DQ2
B_DDR2_DQ3
B_DDR2_DQ4
B_DDR2_DQ5
A_DDR2_DQ2
A_DDR2_DQ3
A_DDR2_DQ4
A_DDR2_DQ5
B_DDR2_DQ12
B_DDR2_DQ13
B_DDR2_DQ14
B_DDR2_DQ15
A_DDR2_DQ13
A_DDR2_DQ14
A_DDR2_DQ15
B_DDR2_DQ11
B_DDR2_DQ10
B_DDR2_DQ9
B_DDR2_DQ8
B_DDR2_DQ7
A_DDR2_DQ12
A_DDR2_DQ11
A_DDR2_DQ10
A_DDR2_DQ9
A_DDR2_DQ8
A_DDR2_DQ7
B_DDR2_DQ6
B_DDR2_DQ1
A_DDR2_DQ1
A_DDR2_DQ6
B_DDR2_DQ0
A_DDR2_DQ0
A_DDR2_DQSB1 B_DDR2_DQSB1
A_DDR2_DQSB0 B_DDR2_DQSB0
B_DDR2_DQM0
A_DDR2_DQM0
B_DDR2_DQS1
A_DDR2_DQS1
/B_DDR2_WE
/A_DDR2_WE
B_DDR2_DQS0
/B_DDR2_CAS
/A_DDR2_CAS
A_DDR2_DQS0
/B_DDR2_RAS
B_DDR2_ODT
B_DDR2_CKE
/A_DDR2_RAS
A_DDR2_ODT
A_DDR2_CKE
/A_DDR2_MCLK /B_DDR2_MCLK
A_DDR2_MCLK
B_DDR2_BA2
B_DDR2_A5
A_DDR2_A5
B_DDR2_BA1
B_DDR2_A4
A_DDR2_A4
A_DDR2_BA2
B_DDR2_A3
A_DDR2_A3
A_DDR2_BA1
B_DDR2_A2
A_DDR2_A2
B_DDR2_BA0
B_DDR2_A1
A_DDR2_A1
A_DDR2_BA0
B_DDR2_A0
A_DDR2_A0
A_MVREF
BDDR2_A[4]
BDDR2_A[5]
T24
AE23
BDDR2_A[9]
BDDR2_A[8]
BDDR2_A[11]
BDDR2_D[10]
BDDR2_D[9]
BDDR2_D[8]
BDDR2_D[7]
BDDR2_D[6]
BDDR2_D[13]
AD24 BDDR2_D[14]
AA24 BDDR2_D[15]
Y24
AE24 BDDR2_D[11]
AD26 BDDR2_D[12]
Y25
AD25
Y26
W26
AE25
BDDR2_D[5]
BDDR2_D[4]
AF25
V26
BDDR2_D[3]
AF24
BDDR2_D[2]
BDDR2_D[1]
AE26
W24
BDDR2_D[0]
W25
AA25
AB25
AC26
AC25
AA26
AB26
AB24
U24
U25
U26
AB23
V24
V25
AB22
AC24
AC23
AE22 BDDR2_A[12]
R24
AD23 BDDR2_A[10]
AC22
R25
BDDR2_A[7]
BDDR2_A[3]
AF23
AD22
BDDR2_A[2]
T25
BDDR2_A[6]
BDDR2_A[1]
R26
BDDR2_A[0]
AF26
10uF
C330
T26
LGE3369A (Saturn6 Non RM)
ADDR2_A[0]
0.1uF
+1.8V_S_DDR
C320
DDR2 1.8V By CAP - Place these Caps near Memory
OPT
1000pF
+1.8V_DDR
L300
BLM18PG121SN1D
10uF
C300 1000pF
0.1uF
R301
150
R300
0.1uF
C311
0.1uF
0.1uF
C301
SDDR_A[0-12]
1K 1%
R302 1K 1%
0.1uF
C339
0.1uF
C337
0.1uF
C334
56
56
56
R328
R329
R330
R331
R332
BDDR2_BA[1]
BDDR2_BA[2]
BDDR2_MCLK
/BDDR2_MCLK
BDDR2_CKE
R341
R342
BDDR2_DQS0_N
BDDR2_DQS1_N
BDDR2_D[5]
BDDR2_D[2]
BDDR2_D[0]
BDDR2_D[7]
BDDR2_D[13]
BDDR2_D[10]
BDDR2_D[8]
BDDR2_D[15]
BDDR2_D[6]
BDDR2_D[1]
BDDR2_D[3]
BDDR2_D[4]
AR313
56
56
56
AR312
TDDR_D[5]
TDDR_D[2]
TDDR_D[0]
TDDR_D[7]
TDDR_D[13]
TDDR_D[10]
TDDR_D[8]
TDDR_D[15]
TDDR_D[6]
TDDR_D[1]
TDDR_D[3]
TDDR_D[4]
TDDR_D[14]
R340
BDDR2_DQM1_P
BDDR2_D[14]
R339
BDDR2_DQM0_P
TDDR_D[9]
R338
BDDR2_DQS1_P
BDDR2_D[9]
R337
BDDR2_DQS0_P
TDDR_D[12]
R336
/BDDR2_WE
BDDR2_D[12]
R335
/BDDR2_CAS
TDDR_D[11]
R334
/BDDR2_RAS
BDDR2_D[11]
R333
BDDR2_ODT
AR311
22
56
22
A6
A7
A8
A9
TDDR_A[5]
TDDR_A[6]
TDDR_A[7]
TDDR_A[8]
TDDR_A[9]
NC4
TDDR_BA[2]
R349
+1.8V_S_DDR
TDDR_DQS1_N
TDDR_DQS0_N
TDDR_DQM1_P
TDDR_DQM0_P
TDDR_DQS1_P
TDDR_DQS0_P
/TDDR_WE
OPT
OPT
TDDR_CKE
/TDDR_MCLK
DDR2
VDDL
VSSDL
NC3
NC2
NC1
NC6
NC5
UDQS
LDQS
UDM
LDM
UDQS
LDQS
WE
CAS
RAS
CS
ODT
CKE
CK
CK
BA1
TDDR_BA[1]
R351
TDDR_MCLK
BA0
TDDR_BA[0]
0
A11
A5
TDDR_A[4]
A12
A4
TDDR_A[3]
A10/AP
A3
TDDR_A[2]
TDDR_A[12]
A2
TDDR_A[1]
TDDR_A[11]
A1
TDDR_A[10]
A0
VREF
J1
J7
R8
E2
A2
R7
R3
A8
E8
B3
F3
B7
F7
K3
L7
K7
L8
K9
K2
K8
J8
L1
L3
L2
R2
P7
M2
P3
P8
P2
N7
N3
N8
N2
M7
M3
M8
J2
H8
H2
F8
F2
E7
D8
D2
A7
B8
B2
P9
N1
J3
E3
A3
G9
G7
G3
G1
E9
C9
C7
C3
C1
A9
R1
M9
J9
E1
A1
B9
B1
D9
D1
D3
D7
C2
C8
F9
F1
H9
H1
H3
H7
G2
G8
TDDR_D[1]
TDDR_D[2]
DQ2
+1.8V_S_DDR
TDDR_D[15]
TDDR_D[14]
TDDR_D[13]
TDDR_D[12]
TDDR_D[11]
TDDR_D[10]
TDDR_D[9]
TDDR_D[8]
TDDR_D[7]
TDDR_D[6]
TDDR_D[5]
TDDR_D[4]
3 / 10
08/12/19 (MP)
VSSQ1
VSSQ2
VSSQ3
VSSQ4
VSSQ5
VSSQ6
VSSQ7
VSSQ8
VSSQ9
VSSQ10
VSS1
VSS2
VSS3
VSS4
VSS5
VDDQ1
VDDQ2
VDDQ3
VDDQ4
VDDQ5
VDDQ6
VDDQ7
VDDQ8
VDDQ9
VDDQ10
VDD1
VDD2
VDD3
VDD4
VDD5
DQ15
DQ14
DQ13
DQ12
DQ11
DQ10
DQ9
DQ8
DQ7
DQ6
DQ5
DQ4
TDDR_D[3]
TDDR_D[0]
DQ1
DQ3
DQ0
IC301
HYB18TC512160B2F-2.5
TDDR_A[0]
C333 C335
0 . 1 u F 1000pF
0.1uF
MSD3369GV Platform
56
56
56
56
56
56
56
C345
PI Result
+1.8V_S_DDR
R348
TDDR_A[0-12]
56 /TDDR_CAS
56
56
1%
/TDDR_RAS
56
OPT
56
+1.8V_S_DDR
R327
TDDR_A[8]
TDDR_A[11]
TDDR_A[6]
BDDR2_BA[0]
AR310
56
BDDR2_A[8]
R326
BDDR2_A[11] R325
BDDR2_A[6]
TDDR_A[4]
BDDR2_A[4]
TDDR_A[0]
TDDR_A[2]
56
AR305
BDDR2_A[2]
BDDR2_A[0]
TDDR_A[7]
TDDR_A[12]
BDDR2_A[12]
BDDR2_A[7]
TDDR_A[5]
TDDR_A[10]
BDDR2_A[5]
BDDR2_A[10]
TDDR_A[1]
0.1uF
C336
BDDR2_A[1]
AR304
0.1uF
C338
TDDR_A[3]
C342
TDDR_A[9]
56
0.1uF
C340
AR303
0.1uF
C341
BDDR2_A[3]
0.1uF
BDDR2_A[9]
0.1uF
R343
1K
C317
1K
R321
R322
1K 1%
ADDR2_A[0-12]
1%
0.1uF
C309
1%
0.1uF
ADDR2_D[0-15]
0.1uF
C331
BDDR2_A[0-12]
BDDR2_D[0-15]
R345
1K
OPT
Downloaded From TV-Manual.com Manuals
R344
150
Copyright © 2009 LG Electronics. Inc. All right reserved.
Only for training and service purposes
LGE Internal Use Only
TDDR_D[0-15]
0.1uF
C332
L413
BLM18PG121SN1D
C425
0.1uF
FE_TUNER_SCL
FE_TUNER_SDA
FE_AM_AUDIO
FE_ANT5V_MONITOR
47
47
R442
33
R440
AR400
33
33
R468
AR401
47
R441
96
95
94
93
92
91
90
89
88
87
86
85
84
83
82
81
80
79
78
77
76
75
74
73
72
71
70
69
68
67
66
65
64
63
62
61
60
59
58
57
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
96
95
94
93
92
91
90
89
88
87
86
85
84
83
82
81
80
79
78
77
76
75
74
73
72
71
70
69
68
67
66
65
64
63
62
61
60
59
58
57
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
97
VSS
E2
E1
E0
4
3
2
1
M24C02-RMN6T
IC400
[ PC ]
5
6
7
8
SDA
SCL
WC
VCC
C401
18pF
50V
C402
18pF
50V
R404
4.7K
C400
0.1uF
16V
SC_RE2
SC_RE1
R408
R406
4.7K
C
A2
D400
ENKMC2838-T112
A1
R411
1K
R410
1K
4.7K
SUB_WARM_ST
+5V_ST
KEY2
KEY1
LED_ON
R480
120K
OPT
R482
16V
C403
0.1uF
L401
BLM18PG121SN1D
R403
100 1%
R402
100 1%
R405
4.7K
R473
L403
BLM15BD121SN1
IR
4.7K
C410
100pF
50V
C411
0.1uF
16V
C412
0.1uF
16V
OPT
E
C
E
SDA_SUB/AMP
SUB_SPK_MONO
AMOTECH
5.6V
ZD402
B
E
C
R423
0
ISP_TXD
ISP_RXD
R424
0
C406
0.1uF
16V
BREATHING_SPK
0
AMOTECH
5.6V
D405
OPT
R439
REC_8
D403
CDS3C05HDMI1
5.6V
AMOTECH
5.6V
D406
OPT
C409
1000pF
50V
D404
CDS3C05HDMI1
5.6V
VGA_EEPROM_WP
Q402
2SC3052
L400
BLM18PG121SN1D
+3.3V_ST
AMOTECH
ZD401
5.6V
+5V_ST
Q401
2SC3052
12K
C
ZD400
5.6V
AMOTECH
R419
0
R418
SCL_SUB/AMP
Q400
2SC3052
B
R417
0
R412 R416
10K 100
L405
BLM15BD121SN1
R428
OPT
+3.3V_ST
R483
OPT
B
R415
10K
+12V
+5V_VGA
L404
BLM15BD121SN1
+3.3V_ST
C405
1000pF
50V
4.7K
R407
4.7K
+3.3V_ST
[CONTROL IR & LED]
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
C424
0.1uF
+3.3V_ST
FE_VMAIN
FE_SIF
FE_DEMOD_SDA
FE_DEMOD_SCL
SPDIF_OUT
+5V_VGA
FE_TS_VAL_ERR
FE_TS_CLK
FE_TS_DATA[7]
FE_TS_DATA[6]
FE_TS_DATA[5]
FE_TS_DATA[4]
FE_TS_DATA[3]
FE_TS_DATA[2]
FE_TS_DATA[1]
FE_TS_DATA[0]
FE_TS_SERIAL_D
FE_TS_SYN
DTV/MNT_V_OUT
HP_L_OUT
HP_R_OUT
FE_BOOSTER_CTRL
FE_AGC_SPEED_CTL
/FE_RESET
DDC_SDA/UART_TX
HP_DET
DDC_SCL/UART_RX
TV_R_OUT
TV_L_OUT
DTV/MNT_R_OUT
DTV/MNT_L_OUT
AV_R_OUT
AV_L_OUT
SC1_ID
SC1_FB
SC2_ID
REC_8
DBG_TX
DBG_RX
SC1_G
SC1_R
SC1_CVBS_IN
SC2_CVBS_IN
SC1_B
AV_CVBS_IN
COMP_Y
COMP_Pb
COMP_Pr
DSUB_R
DSUB_G
DSUB_B
S_Y_IN
S_C_IN
DSUB_VSYNC
DSUB_HSYNC
C421
22uF
16V
R409
0
P400
GF05C-96S
DDC_SDA/UART_TX
L402
MLB-201209-0120P-N2
[SCART2 PIN 8]
EU_SCART [OPT]
R413
0
C407
0.1uF
P402
14
13
12
11
10
9
8
7
SPK P
SPK N
POWER ON
WARM_ST
3.3V_ST
GND
IR
GND
5V_ST
KEY2
5
6
KEY1
4
GND
3.3V_SDA
2
3
3.3V_SCL
1
15
12507WR-14L
C433
10uF
16V
DTV/MNT_R_OUT
7
6
5
4
3
2
1
IC403
LM324D
2SC3052
Q429
Q428
2SC3052
2SC3052
Q427
Q426
2SC3052
7
6
5
4
3
2
1
R451
2K
1/16W
R449
8
9
10
11
12
13
14
2K
1/16W
R452
2K
1/16W
R450
2K
1/16W
8
9
10
11
12
13
14
3
33pF
3
1
2
Q431
1
RT1P141C-T112
2
Q430
RT1P141C-T112
C430
R458
5.6K
5.6K
R457
33pF
R456
33K
C429
R455
33K
JK400
USB
4
3
2
1
C416
22uF
16V
DTV/MNT_V_OUT
C
Q418
R462
750
IC401
E
2SC3052 C
R466
750
B
500mVpp => 2.14Vpp
Q417
4
5
6
1
3
$0.18 2
D402
CDS3C05HDMI1
5.6V
FAULT/
ILIMIT
ENABLE
GND
VIN
C438
47uF
6.3V
USB_CTL
R478
4.7K
+3.3V
R463
15K
R467
47K
C440
22uF
16V
AV INPUT/SCART/IR/USB
USB_DP
USB_DM
R475
10K
+5V_GENERAL
MSD3369GV Platform
D401
CDS3C05HDMI1
5.6V
C415
10uF
6.3V
120-ohm
VOUT
B
R465
470
R464
120
MIC2009YM6-TR
L411
MLB-201209-0120P-N2
ISA1530AC1
E
[SCART2 DTV/MNT_VOUT]
EU_SCART [OPT]
KJA-UB-0-0037
TV_R_OUT
33pF
R446
33K
C427
33pF
R445
33K
C428
C794
6800pF
50V
TV_L_OUT
R490
1K
R444
5.6K
R443
5.6K
C793
6800pF
50V
R491
1K
DTV/MNT_L_OUT
C434
10uF
16V
SCART1_Rout
SCART1_Lout
TV_R_OUT
C426
0.1uF
16V
+12V
TV_L_OUT
EU_SCART [OPT]
R447
10K
R448
10K
+12V
97
DDC_SCL/UART_RX
C408
0.1uF
Audio Out Amp
5
R453
10K
R454
10K
TUNER JACK PIN
R438
Downloaded From TV-Manual.com Manuals
180
Copyright © 2009 LG Electronics. Inc. All right reserved.
Only for training and service purposes
LGE Internal Use Only
R496
1K
C439
0.1uF
16V
DTV/MNT_L_OUT
DTV/MNT_R_OUT
SCART2_MUTE
SCART1_MUTE
R470
47
C422
10uF
10V
4
10
08/12/19 (MP)
001:AI16
USB_OCD
C423
0.1uF
L412
MLB-201209-0120P-N2
+5V_EXT
DTV/MNT_VOUT
C437
0.1uF
16V
+12V
C436
10uF
16V
L418
CIC21J501NE
0.1uF
C432
C431
0.1uF
C791
6800pF
50V
R497
1K
SCART2_Lout
SCART2_Rout
C792
C435
6800pF 10uF
50V
16V
2
3
IN_A
GND
R533
OPT
OPT
R531 B
0
R529
R530
OPT
E
C
4
5
Q502
2SC3052
OPT
R532
10K
1
IN_B
IC500
KIC7SZ32FU
R502
10K
OUT_Y
VCC
33
33
47
B
E
C
S
Q500
2SC3052
R504
22K
GND
R511
G
D
Q501
RSR025P03
47
R519
100
10K
0.1uF
10K
C502
0.1uF
16V
+3.3V_CI
10K
R510
R509
C503
R508
GND
R506
+5V_GENERAL
AR504
AR503
47
R503
R505
OPT
0
L500
CIC21J501NE
47
R521
R513
GND
+3.3V_CI
100
C505
10uF
10V
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
PCM_5V_CTL
0.1uF
16V
+5V_CI
EU_CI[OPT]
R500
/CI_CD2
CI POWER ENABLE CONTROL
/CI_CD1
/CI_CD2
CI_MCLKI
CI_MISTRT
CI_MIVAL_ERR
CI_TS_DATA[2]
CI_TS_DATA[3]
CI_TS_DATA[1]
CI_TS_DATA[0]
CI_TS_SYN
CI_TS_CLK
CI_TS_VAL
REG
/PCM_WAIT
PCM_RST
CI_MDI[7]
CI_MDI[6]
CI_MDI[5]
CI_MDI[4]
CI_MDI[3]
CI_MDI[2]
CI_MDI[1]
CI_MDI[0]
CI_IOWR
CI_IORD
CI_TS_DATA[6]
CI_TS_DATA[7]
CI_TS_DATA[5]
33
R507
CI_TS_DATA[4]
AR500
10K
C501
0.1uF
16V
10K
C510
OPT
10K
/CI_CD1
R520
16V
2
G2
1
G1
R514
0
27
28
29
30
31
32
33
34
61
62
63
64
65
66
67
68
C507
0.1uF
16V
+5V_CI_ON
/PCM_CD
GND
26
60
GND
CI_ADDR[4]
25
59
FE_TS_SERIAL_D
FE_TS_SYN
FE_TS_VAL_ERR
FE_TS_CLK
A7
A6
A5
A4
A3
A2
A1
A0
OE1
GND
R523
10K
R522
10K
DVB-CI SERIAL BUFFER TS
CI_DATA[2]
CI_DATA[1]
CI_ADDR[5]
CI_DATA[0]
CI_ADDR[6]
10
9
8
7
6
5
4
3
2
1
11
12
13
14
15
16
17
18
19
20
74LVC541A(PW)
IC502
CI_ADDR[0]
CI_ADDR[1]
CI_ADDR[2]
CI_ADDR[3]
CI_ADDR[7]
24
CI_ADDR[12]
23
21
CI_ADDR[14]
22
20
55
56
GND
100
CI_DATA[0-7]
57
54
OPT
C508
0.1uF
R516
CI_ADDR[13]
CI_ADDR[8]
CI_ADDR[9]
CI_ADDR[11]
CI_ADDR[10]
R517
10K
58
19
53
CI_DET
C506
10uF
10V
69
17
18
16
52
14
15
50
47
51
13
46
49
12
44
45
48
8
9
10
11
43
7
41
42
CI_DATA[7]
6
40
47
5
39
R515
CI_DATA[6]
4
38
CI_DATA[5]
3
CI_DATA[4]
CI_DATA[3]
37
36
35
10067972-000LF
EU_CI
EAG41860102
P500
Y7
Y6
Y5
Y4
Y3
Y2
Y1
Y0
OE2
VCC
GND
C509
0.1uF
16V
33
AR514
+3.3V_CI
CI_ADDR[0-14]
CI_WE
+5V_GENERAL
CI_OE
/PCM_CE
10K
+5V_GENERAL
0.1uF
16V
0
R512
C504
R518
CI_DATA[0-7]
BUFFER
EU_CI[OPT]
DVB-CI DETECT
C500
/PCM_IRQA
BUF_TS_DATA[0]
BUF_TS_SYN
BUF_TS_VAL_ERR
BUF_TS_CLK
0.1uF
+5V_CI_ON
C512
EU_CI[OPT]
DVB-CI SLOT
0.1uF
CI_DATA[0-7]
CI_DATA[0-7]
33
33
AR513
AR511
33
CI_OE
/PCM_OE
/PCM_WE
CI
MSD3369GV Platform
/PCM_IORD
/PCM_IOWR
CI_IORD
CI_IOWR
CI_WE
/PCM_REG
PCM_A[14]
AR512
PCM_A[13]
PCM_A[12]
CI_ADDR[14]
REG
CI_ADDR[13]
CI_ADDR[12]
PCM_A[11]
33
PCM_A[10]
PCM_A[9]
CI_ADDR[11]
PCM_D[0-7]
PCM_A[4]
CI_ADDR[3]
PCM_A[5]
CI_ADDR[2]
PCM_A[6]
CI_ADDR[1]
PCM_A[7]
CI_ADDR[0]
5
10
08/12/19 (MP)
C511
0.1uF
16V
FE_TS_DATA[0-7]
+3.3V
CI_ADDR[10]
CI_ADDR[9]
FE_TS_DATA[0-7]
PCM_A[8]
PCM_D[7]
AR510
PCM_D[6]
PCM_D[5]
PCM_D[4]
CI_DATA[6]
CI_DATA[7]
CI_DATA[5]
CI_DATA[4]
PCM_D[3]
33
PCM_D[1]
PCM_D[0]
2A1
1Y4
2A2
1Y3
2A3
1Y2
2A4
1Y1
2OE
VCC
PCM_D[2]
AR509
33
11
12
13
14
15
16
17
18
19
20
CI_DATA[3]
33
TOSHIBA
0ITO742440D
AR508
10
9
8
7
6
5
4
3
2
1
IC501
FE_TS_CLK
FE_TS_SYN
FE_TS_VAL_ERR
FE_TS_DATA[0]
FE_TS_DATA[1]
FE_TS_DATA[2]
FE_TS_DATA[3]
FE_TS_DATA[4]
FE_TS_DATA[5]
FE_TS_DATA[6]
FE_TS_DATA[7]
CI_DATA[2]
CI_DATA[1]
2Y1
1A4
2Y2
1A3
2Y3
1A2
2Y4
1A1
1OE
33
GND
AR507
AR506
CI_DATA[0]
CI_ADDR[8]
CI_ADDR[4]
PCM_A[3]
CI_ADDR[5]
PCM_A[2]
CI_ADDR[6]
PCM_A[1]
CI_ADDR[7]
PCM_A[0]
CI_DET
EU_CI[OPT]
DVB-CI HOST I/F
CI_MCLKI
CI_MIVAL_ERR
CI_MISTRT
CI_MDI[0]
CI_MDI[1]
CI_MDI[2]
CI_MDI[3]
CI_MDI[4]
CI_MDI[5]
CI_MDI[6]
CI_MDI[7]
EU_CI[OPT]
DVB-CI TS INPUT
PCM_D[0-7]
Downloaded From TV-Manual.com Manuals
TC74LCX244FT
Copyright © 2009 LG Electronics. Inc. All right reserved.
Only for training and service purposes
LGE Internal Use Only
EAG59023302
20
20
1
2
3
4
5
6
7
8
9
11
10
12
13
14
15
16
17
18
19
1
2
3
4
5
6
7
8
9
11
10
12
13
14
15
16
17
18
19
D2+
D2_GND
D2-
D1+
D1_GND
D1-
D0+
D0_GND
D0-
CK+
D2+
D2_GND
D2-
D1+
D1_GND
D1-
D0+
D0_GND
D0-
CK+
D2+
D2_GND
D2-
D1+
D1_GND
D1-
D0+
D0_GND
D0-
CK+
R600
OPT
5V_HDMI_2
5V_HDMI_3
C602
OPT
C601
OPT
0
D2+_HDMI1
D2-_HDMI1
D1+_HDMI1
D1-_HDMI1
D0+_HDMI1
D0-_HDMI1
CK+_HDMI1
CK-_HDMI1
CEC_REMOTE
DDC_SCL_1
DDC_SDA_1
D2+_HDMI2
D2-_HDMI2
D1+_HDMI2
D1-_HDMI2
D0+_HDMI2
D0-_HDMI2
CK+_HDMI2
CK-_HDMI2
CEC_REMOTE
DDC_SCL_2
DDC_SDA_2
HPD2
0
0
0
D2+_HDMI3
D2-_HDMI3
D1+_HDMI3
D1-_HDMI3
D0+_HDMI3
D0-_HDMI3
CK+_HDMI3
CK-_HDMI3
CEC_REMOTE
DDC_SCL_3
DDC_SDA_3
006:AG11
HPD3
UI_HW_PORT3
R609
R606
R608
R614
0
UI_HW_PORT2
0
0
R604
R605
0
R603
R613
0
UI_HW_PORT1
R607
0
R611
R615
OPT
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
JK602
20
JK601
20
1
2
3
4
5
6
7
8
9
11
10
12
13
14
15
16
R626
47K
5V_HDMI_1
R629
DDC_SCL_1
DDC_SDA_1
JK603
20
20
HDMI_CEC
R640
4.7K
R646
47K
1
2
3
4
5
6
7
8
9
11
10
12
13
14
15
16
17
18
19
VSS
A2
A1
A0
R644
0
D2+
D2_GND
D2-
D1+
D1_GND
D1-
D0+
D0_GND
D0-
CK+
4
3
2
1
5
6
7
8
IC601
CAT24WC08W-T
HDCP EEPROM
47K
+3.3V
3
2
OPT
R627
5V_HDMI_4
DRAIN2
GATE1
1
R642
R641
22
22
DDC_SCL_2
DDC_SDA_2
R635 0
R634
R633
C605
OPT
0
4
5
6
DRAIN1
0
0
R636
0
GND
C606
0.1uF
16V
9.1K
R637
D2+_HDMI4
D2-_HDMI4
D1+_HDMI4
D1-_HDMI4
D0+_HDMI4
D0-_HDMI4
CK+_HDMI4
CK-_HDMI4
CEC_REMOTE
DDC_SCL_4
DDC_SDA_4
HPD4
006:AK24
CEC_REMOTE
DDC_SCL_3
DDC_SDA_3
UI_HW_PORT4
SOURCE2
+3.3V_ST
EEPROM_SDA
R639
68K
GATE2
47K
R630
EEPROM_SCL
R628
47K
5V_HDMI_3
MMBD301LT1G
Q600
SSM6N15FU
D605
30V
0.1uF
C603
R643
4.7K
47K
R649
SOURCE1
SDA
SCL
WP
VCC
5V_HDMI_2
R648
47K
5V_HDMI_4
47K
DDC_SCL_1
DDC_SDA_1
R650
HPD1
C626
0.1uF
16V
HDMI_SCL
C621
0.1uF
16V
C634
0.1uF
HDMI_CLK+
C615
0.1uF
HDMI_CLK-
C635
C627 10uF
0 . 1 u F 6.3V
+1.8V_HDMI
L601
BLM18PG121SN1D
+1.8V_AMP
HDMI_SDA
R663
0
+3.3V_HDMI
C622
0.1uF
16V
L602
BLM18PG121SN1D
+3.3V
+1.8V_HDMI
+5V_ST
D2-_HDMI1
D2+_HDMI1
D1+_HDMI1
D1-_HDMI1
D0+_HDMI1
D0-_HDMI1
CK+_HDMI1
C628
0.1uF
16V
5V_HDMI_1
R676
2K
R675
2K
+3.3V_HDMI
CK-_HDMI1
DDC_SCL_4
DDC_SDA_4
+3.3V_HDMI
0.1uF
HDMI_RX0+
HDMI_RX0-
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
HDMI_RX2C629
0.1uF
16V
5V_HDMI_2
NC
VDDH[1V8]_1
RXA_D2+
RXA_D2-
VDDH[3V3]_2
RXA_D1+
RXA_D1-
VSS_3
RXA_D0+
RXA_D0-
VDDH[3V3]_1
RXA_C+
RXA_C-
RXA_DDC_CLK
RXA_DDC_DAT
RXA_5V
RXA_HPD
VDDC[1V8]_1
VSS_2
OUT_DDC_DAT
OUT_DDC_CLK
VDDO[3V3]
OUT_C-
OUT_C+
VSS_1
HDMI_RX1-
0
C609
0.1uF
HDMI_RX1+
R610
C610
0.1uF
OUT_D0100
26
HDMI_RX2+
OUT_D0+
99
27
TEST
17
IC600
TDA9996HL
32
RXB_C-
HPD1
29
33
RXB_C+
18
34
R612
0
35
RXB_D0-
VDDH[3V3]_3
EAG59023302
OUT_D2+
93
VSS_5
C600
OPT
OUT_D1+
96
30
VSS_4
C613
0.1uF
VSS_11
92
37
JK600
EAG59023302
OPT
OPT
RXB_DDC_CLK
RXB_DDC_DAT
VSS_12
C614
VDDC[1V8]_3
91
DDC_SCL_2
CK-_HDMI2
OUT_D1-
D2-_HDMI4
RXD_D2+
90
36
RXB_D0+
HDMI
MSD3369GV Platform
D0-_HDMI2
98
D2+_HDMI4
RXD_D289
CK+_HDMI2
R601
R602
VDDH[3V3]_8
40
R616
OPT
R617
OPT
RXD_D1+
87
88
38
RXB_D1-
19
EAG59023301
RXD_D186
41
RXB_D2-
5V_HDMI_1
R638
OPT
VSS_10
85
39
RXB_D1+
D0+_HDMI2
97
D1+_HDMI4
D1-_HDMI4
RXD_D0+
VDDH[3V3]_4
C611
0.1uF
VDDO[1V8]
95
RXB_5V
D0+_HDMI4
D0-_HDMI4
VDDH[3V3]_7
20
OPT
44
RXD_D0-
20
R631
RXD_DC+
81
45
CDEC_DDC
84
D1-_HDMI2
28
RXB_HPD
HPD2
RXD_DC80
46
VDDC[3V3]
VDDC[1V8]_2
83
C612
0.1uF
OUT_D294
31
DDC_SDA_2
RXD_DDC_CLK
79
82
D1+_HDMI2
CK+_HDMI4
DDC_SCL_4
RXD_DDC_DAT
78
47
MODE
43
VSS_6
CK-_HDMI4
DDC_SDA_4
RXD_5V
77
48
PD
R670
0
0
42
RXB_D2+
D2-_HDMI2
D2+_HDMI2
HPD4
RXD_HPD
76
49
SDA/SEL1
22
TDA9996_SDA
R669
50
SCL/SEL0
22
R679
R680
TDA9996_SCL
Downloaded From TV-Manual.com Manuals
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
12K 1%
C632
0.1uF
16V
OPT
R666
R661
OPT
XTAL_IN
XTAL_OUT
INT/HP_CTRL
CDEC_STBY
VDDS[3V3]
VSS_7
CEC
RXC_HPD
RXC_5V
RXC_DDCC_DAT
RXC_DDC_CLK
RXC_C-
RXC_C+
VDDH[3V3]_5
RXC_D0-
RXC_D0+
VSS_8
RXC_D1-
RXC_D1+
VDDH[3V3]_6
RXC_D2-
RXC_D2+
VSS_9
VDDH[1V8]_2
R671
R12K
C630
0.1uF
16V
5V_HDMI_4
C623
0.1uF
16V
C633
0.1uF
16V
OPT
OPT
R662
R665
5V_HDMI_3
C620
0.1uF
Copyright © 2009 LG Electronics. Inc. All right reserved.
Only for training and service purposes
LGE Internal Use Only
6 / 10
CEC_REMOTE
HPD3
DDC_SDA_3
DDC_SCL_3
CK-_HDMI3
CK+_HDMI3
D0+_HDMI3
D0-_HDMI3
D1+_HDMI3
D1-_HDMI3
D2-_HDMI3
D2+_HDMI3
C625
0.1uF
16V
08/12/19 (MP)
C631
0.1uF
16V
C624
0.1uF
16V
+1.8V_HDMI
0.1uF
0.1uF
C619
0.1uF
C618
0.1uF
C617
C616
Copyright © 2009 LG Electronics. Inc. All right reserved.
Only for training and service purposes
C702
0.1uF
16V
L701
+1.8V_AMP
C737
10uF
10V
OPT
C704
10uF
10V
MS_LRCK
MS_SCK
002:V8
002:V8
HP_MUTE
R705
OPT
+3.3V_ST
0 0 1 : L 3 ; 0 0 4 : Y 1 1SCL_SUB/AMP
0 0 1 : L 3 ; 0 0 4 : Y 1 SDA_SUB/AMP
1
MS_LRCH
002:V8
10K
R707
MCLK SDATA WCK BCK TP is necessory
C700
10uF
10V
AMP_RST
B
R713
10K
E
R700 B
10K
100
100
100
R721
R709
R710
C712
33pF
50V
C760
10uF
10V
C714
33pF
50V
C715
0.1uF
16V
+1.8V_AMP
TEST0
DVDD_PLL
AVDD_PLL
LFM
AGND_PLL
DGND_PLL
VDD_IO
CLK_I
VSS_IO
DVSS_1
AD
BST1A
C713
VDR1A
0 . 1 u F 50V RESET
14
13
12
11
10
9
8
7
6
5
4
3
2
1
E
Q700
2SC3052
C
R701
10K
002:Y10
HP_ROUT
002:Y10
HP_LOUT
C701
1uF
10V
R702
20K
IN24
3
2
1
R706
20K
360mVrms(8mW) => 450mVrms(13mW)
C703
0.22uF
16V
SHUTDOWN
GND
BYPASS
C728
0.1uF
50V
BST2A
PGND2A_2
PGND2A_1
OUT2A_2
OUT2A_1
PVDD2A_2
PVDD2A_1
PVDD2B_2
40
39
38
37
36
35
34
33
29
30
31
5
6
7
8
VO2
VDD
VO1
IN1-
C710
0.1uF
16V
R711
20K
R718
OPT
R719
100
0
PGND2B_2
OUT2B_1
OUT2B_2
PVDD2B_1
VDR2A
41
32
OPT
C729
0.1uF
50V
C711
10uF
10V
R712
20K
0.1uF
50V
C790
10uF
10V
16V
C717
0.22uF
C
R724
10K
+5V_EARPHONE
C719
100uF
16V
B
C
1K
R715
1K
R714
+5V_GENERAL
10K
R729
C762
68uF/35V
105
A2
D708
ENKMC2838-T112
A1
100uF
16V
C718
E
R728
12
C744
390pF
50V
C743
390pF
50V
R727
12
R726
12
C742
390pF
50V
15uH
1F
C722
1000pF
OPT
C723
1000pF
OPT
002:C25
AMP_MUTE
1S
L705
AD-8770
EAP60684501
2F
2S
15uH
1S
C741
390pF
50V
1F
L704
AD-8770
EAP60684501
2S
2F
R725
12
+24V_AMP
R793
12
R791
12
R790
12
R792
12
+3.3V_ST
Q701
2SC3052
C735
D707
1N4148W
100V
OPT
D706
1N4148W
100V
OPT
C734
POWER_DET
50V
D705
1N4148W
100V
OPT
D704
1N4148W
100V
OPT
0.1uF
50V
OPT
C733
0.1uF
50V
C732
22000pF
22000pF
50V
C731
C730
50V0 . 1 u F
NC
42
C727
0.1uF
50V
R717
33K OPT
C721
0.1uF
16V
IC700
C724
0.1uF
50V
TPA6110A2DGNRG4
NTP-3100L
EAN60664001
IC701
EARPHONE AMP
EU_HP[OPT]
100
100
R722
R720
+3.3V
+5V_EARPHONE
3.3K
Q707
2SC3052
C
C709
0.1uF
R740
0
C708
1000pF
50V
R708
+5V_EARPHONE
C706
0.1uF
16V
100pF
50V
C705
C707
1000pF
50V
100
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
C736
10uF
10V
OPT
L700
001:AA9
002:V8
AUDIO_MASTER_CLK
BLM18PG121SN1D
C726
22000pF
50V
SDATA
R704
15
C720
0.1uF
50V
17
PGND1A_2
56
DVDD
DVSS_2
C716
22000pF
50V
53
C725
68uF/35V
105
18
WCK
PGND1A_1
55
16
+1.8V_AMP
BLM18PG121SN1D
54
+24V_AMP
52
OUT1A_2
19
BCK
OUT1A_1
20
SDA
PVDD1A_2
51
50
21
SCL
PVDD1A_1
49
22
MONITOR_0
PVDD1B_2
48
23
MONITOR_1
PVDD1B_1
MONITOR_2
OUT1B_1
47
24
OUT1B_2
46
25
PGND1B_2
45
26
FAULT
PGND1B_1
44
27
BST2B
VDR2B
VDR1B
43
28
PGND2B_1
BST1B
+24V_AMP
HP_R_OUT
HP_L_OUT
R730
4.7K
R733
4.7K
R732
4.7K
R731
4.7K
C758
0.01uF
50V
3.3
R737
3.3
0.01uF
50V
R736
C757
C756
0.01uF
50V
3.3
R735
3.3
R734
C755
0.01uF
50V
SPEAKER_L
007:AA18
Q780
C780
22uF
16V
R780
47K
OPT
2SA1504S
C
E
Q781
R782
3K
BT_LOUT
HP_LOUT
HP/BT_LOUT
R784
470
B
R783
1K
BT_AU_SW
E
2SC3052 C
R781
3K
B
C782
0.1uF
16V
OPT
C783
0.1uF
16V
OPT
C784
0.1uF
16V
+12V
BT_LOUT
L780
CIC21J501NE
C785
0.1uF
16V
L781 +5V_GENERAL
CIC21J501NE
SPK_L-
SPK_L+
007:AG24
007:AG26
47K
R746
R741
10K
+5V_GENERAL
C770
2.2uF
16V
0
R742
R743
680K
GND
CONTROL_C
CONTROL_B
XB
YB
YA
XA
7
6
5
4
3
2
1
8
9
10
11
12
13
14
IC702
MC74HC4066ADR2G
AUDIO/BT/FAN
MSD3369GV Platform
R744
680K
+5V_GENERAL
XC
YC
YD
XD
0
CONTROL_D
0
BT_DP
R752
680K
R751
680K
0
R757
0
R756
R750
C772
2.2uF
16V
5
8
7
6
5
4
3
2
1
9
P701
12507WR-08L
7
10
08/12/26 (MP)
HP/BT_ROUT
P700
R749
0
4
3
2
1
SMAW250-04Q
HP_AU_SW
HP_ROUT
R753
10K
D
BT_ON/OFF
R748
4.7K
+5V_GENERAL
+5V_GENERAL
R754
0
C773
0.1uF
16V
B
R747
BT_LOUT_AMP
+5V_GENERAL
CONTROL_A
VCC
E
C
BT_DM
Q705
2SC3052
1uF
C771
+5V_GENERAL
BLUETOOTH
SPK_R-
SPK_R+
007:AG19
007:AG22
BT & HP AUDIO SWITCH
R786
15K
R785
47K
C781
10uF
6.3V
SPK_R- 007:AA17
SPEAKER_R
SPK_R+ 007:AA17
SPK_L- 007:AA18
SPK_L+
BLUETOOTH Audio TR Amp
0.1uF
50V
C752
0.1uF
50V
C751
C750
0.1uF
50V
BT_LOUT_AMP
C746
0.47uF
50V
C745
0.47uF
50V
C749
0.1uF
50V
For protect Peak noise
R745
0
L703
CIC21J501NE
S
+24V
OPT
G
RTR030P02
Q706
Downloaded From TV-Manual.com Manuals
LGE Internal Use Only
Copyright © 2009 LG Electronics. Inc. All right reserved.
Only for training and service purposes
10
12
14
16
18
20
22
24
9
11
13
15
17
19
21
23
OPT
OPC_OUT2
8
7
R857
22
6
5
L806
R808
OPT
0
100
R814
C803
0.1uF
16V
OUT
3
2
C814
0.1uF
16V
IN
ADJ/GND
+3.3V
1
AP1117E33G-13
C816
10uF
10V
IN
IC801
C808
0.1uF
16V
OUT
3
2
1
ADJ/GND
AP1117E18G-13
IC803
C806
10uF
6.3V
+3.3V_ST
R806
L805
BG2012B080TF
C807 4.7K
0.1uF
16V
OPT
C805
16V
0.1uF
OPT
C822
10uF
6.3V
C827
0.1uF
16V
+1.8V_AMP
L803
BLM18PG121SN1D
+3.3V_ST
E
C804
1uF
25V
OPT
OPC_ENABLE
R860
22
C815
0.1uF
16V
A_DIM
OPC_OUT1
PWM_DIM
001:W12
R823
10K
OPT
R822
10K
C813
0.1uF
50V
OPT
C826
0.1uF
50V
+12V
INV_CTL
C890
22uF
16V
POWER_ON/RL_ON
+3.3V_ST
C832
0.1uF
50V
C820
47uF
25V
ERROR_OUT
R803
0
OPC_DISABLE
R859
22
B
R818
10K
+3.3V_AVDD_MPLL
C823
1uF
25V
OPT
R855
OPT
L800
BG2012B080TF
Q802
2SC3052
C
R821
10K
C821
68uF/35V
105
+24V
+5V_GENERAL
C819
68uF/35V
105
L804
MLB-201209-0120P-N2
C818
0.1uF
50V
OPT
OPT
C812
22uF
16V
+5V_ST
C824
100uF
16V
B
R802
10K
L807
MLB-201209-0120P-N2
E
C
R804
10K
+3.3V_ST
Q800
2SC3052
C885
100uF
16V
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
C802
10uF
10V
+5V_ST
1
MLB-201209-0120P-N2
Stand-by +3.3V
C892
OPT
4
3
25
2
1
3
R807
33K
2
OPT
Q801
R805
10K
+5V_ST
RT1P141C-T112
001:AK20
16V
OPT
C855
R2
R1
FB
BS
IN
GND
100V
1N4148W_DIODES
D800 OPT
R841
18K
1/10W
1%
Close to IC
OPT
10K
1/10W
R809
4
3
2
1
5
6
7
8
10
1/10W
1%
R858
$0.24
B
C841
VCC
SW_1
SW_2
47
C828
1uF
10V
EN/SYNC
R840
56K
1/10W
1%
0.1uF
50V
C842
B
Q805
2SC3052
C825
0.1uF
16V
E
C
R843
560
C847
10uF
16V
10uF
OPT
C846
+5V_ST
C830
10nF
50V
NR8040T3R6N
L808
3.6uH
3
C IN
OPT
C837
Placed on SMD-TOP
C838
22uF
BS
IN
GND
100V
1N4148W_DIODES
D803 OPT
R827
75K
1/8W
1%
FB
1/10W 22K
1%
R824
4
3
2
1
5
6
7
8
10
1/10W
1%
R826
$0.24
IC805
MP2212DN
10K
1/10W
OPT
R830
465 mA @85% efficiency
CIC21J501NE
L812
+5V_GENERAL
OPT
47
R862
VCC
SW_1
SW_2
C840
1uF
10V
EN/SYNC
24K 1%
1/8W
Close to IC
R825
1000pF
C880
+3.3V
4
2
G2
S2
1
G1
S1
C810
10uF
6.3V
+3.3V
0
NR8040T3R6N
L813
3.6uH
$0.07
4.9A 0.0150OHM 34MHZ
C836
10nF
50V
D2_1
D2_2
D1_1
D1_2
C844
0.1uF
R871
0
R870
1uF
25V
C853
5
6
7
8
C843
22uF
16V
C OUT
MAX 3A
C891
0.1uF
16V
R831
1/10W
10K
C854
0.1uF
Q806
SI4925BDY
POWER_ON_DELAY
POWER_ON_PM4
C1130
C845
10uF
16V
$0.07
4.9A 0.0150OHM 34MHZ
R842
10K
R839
22K
R810
OPT
1000pF
E
C
R837
22K
0.01uF
25V
C833
Q804
2SC3052
10K
R833
10K
R832
E
C
560
+5V_ST
IC804
MP2212DN
Vout=0.8*(1+R1/R2)
C887
10uF
6.3V
OPT
B
Q803
2SC3052
R835
10K
R834
L810
MLB-201209-0120P-N2
S6 core 1.26 volt
Placed on SMD-TOP
C829
22uF
R829
10K
PANEL_CTL
CIC21J501NE
L811
+5V_GENERAL
POWER_ON/RL_ON
+12V
+3.3V_ST
10K
P800
FM20020-24
L801
BLM15BD121SN1
+5V_+12V
R856
C831
22uF
+3.3V_CI
C856
0.1uF
Placed on SMD-TOP
C849
22uF
16V
L816
BLM18SG121TN1D
3A, DCR=0.025 ohm
1600 mA
+1.26V_VDDC
C852
0.1uF
16V
Placed on SMD-TOP
L814
BLM18PG121SN1D
C851
0.1uF
16V
+3.3V_MEMC
L815
BLM18PG121SN1D
C862
10uF
C867
10uF
10V
L818
CIC21J501NE
POWER_ON/RL_ON
C859
0.1uF
16V
PANEL_POWER
C850
22uF
16V
+5V_GENERAL
L817
MLB-201209-0120P-N2
C865
0.1uF
C857
22uF
C835
10uF
16V
0.47uF
25V
C839
+12V
1N4148W_DIODES
100V
GND
C848
0.01uF
50V SW
IN
BS
+5V_GENERAL
4
3
2
L819
22uH
IC808
MP2305DS
1
C861
22uF
C881
1uF
10V
1.5mA
C883
10uF
10V
6.3V
C896
10uF
C884
OPT
C895
0.1uF
16V
R813
10K
$0.24
5
6
7
8
R838
20K
1/10W
VCC
C834
1uF
10V
47
10
1/10W
1%
R863
R811
L809
2.2uH
C866
1000pF
OPT
VIN
VCNTL
POK
EN
5
6
7
8
R844
1K
IC806
APE8953MP
4
3
2
1
5
6
7
8
NC_3
VO
ADJ
GND
R819
12K
1%
1%
1/10W
30K
R846
R1/R2 : 27K / 20K => Vout=1.88
R1/R2 : 15K / 12K => Vout=1.80
R1/R2 : 12K / 9.1K => Vout=1.85
4
3
2
1
IC802
SC4215ISTRT
Power
MSD3369GV Platform
NC_2
VIN
EN
NC_1
VOUT_2
VOUT_1
FB
GND
R816
15K
1%
R2
C897
22uF
16V
C877
0.1uF
16V
C879
10uF
6.3V
+1.26V_MEMC
About 1.84V
8
10
08/12/19 (MP)
C898
10uF
6.3V
25V
0.01uF
C882
1/10W
1%
R845
33K R1
600 mA
+1.8V_DDR
1%
1/10W
27K
R853
C873
22uF
16V
+1.8V_MEMC
Placed on SMD-TOP
C875
22uF
16V
C OUT
+5V_EXT
Vout=0.923*(1+R1/R2)
400 mA + 600 mA
C863
0.1uF
16V
Vout=0.8*(1+R1/R2)
SP-7850_2.2
C874
10nF
50V
OPT
R854
10K
1/10W
R836
2.7K
1/10W
+5V_GENERAL
SW_1
SW_2
EN/SYNC
C864
22uF
16V
3225
R851 R2
12K
1%
R852
9.1K
C872
1000pF
OPT
C868
0.1uF
50V
Placed on SMD-TOP
C858
22uF
16V
3225
R1
R847
56K
1%
C860
5600pF
50V
+5V_GENERAL
FB
COMP
EN
SS
Close to IC
+1.8V_DDR
C871
0.1uF
16V
OPT
C870
4.7uF
10V
BLM18PG121SN1D
L820
+3.3V
4
3
2
1
IC807
MP2212DN
1000pF
OPT
5
6
7
8
R848
100K
+1.26V Core for MEMC
+5V_GENERAL
C876
10uF
6.3V
BS
IN
GND
FB
12K
1/8W
1%
R849
100V
1N4148W_DIODES
BLM18PG121SN1D
L821
+1.8V_MEMC
R2
R1
D802 OPT
R850
9.1K
1/8W
1%
Close to IC
Vout=0.8*(1+R1/R2)
R e p l a c e d P a r t C878
+1.8V_MEMC for DDR
+12V
Placed on SMD-TOP
C IN
CIC21J501NE
L822
C869
0.1uF
16V
+5V_CI
CIC21J501NE
L823
D801
OPT
FROM LIPS & POWER B/D
R815 6.8K
OPT
Downloaded From TV-Manual.com Manuals
LGE Internal Use Only
15pF
C900
1K
1K
1M
15pF
C902
L901
L902
1K
1K
BLM18PG121SN1D
L900
BLM18PG121SN1D
X900
12MHz
R934
R950
OPT
R949
+3.3V_MEMC
+1.8V_MEMC
56
56
MEMC_SCL
MEMC_SDA
ISP_TXD_TR
ISP_RXD_TR
L903
M_SPI_DI
M_SPI_CK
Placed on SMD-TOP
BLM18PG121SN1D
+3.3V_MEMC
BLM18PG121SN1D
+3.3V_MEMC
R961
R948
PI Result
M_XTALI
URSA_ODT
URSA_MCLKZ
URSA_MCLK
URSA_DQSB3
URSA_DQS3
URSA_DQSB2
URSA_DQS2
URSA_DQM2
URSA_DQM3
Placed on SMD-TOP
100
100
R992
URSA_DQ[21]
URSA_DQ[18]
URSA_DQ[16]
URSA_DQ[23]
URSA_DQ[29]
URSA_DQ[26]
URSA_DQ[24]
URSA_DQ[31]
URSA_DQ[30]
URSA_DQ[25]
URSA_DQ[28]
URSA_DQ[27]
URSA_DQ[22]
URSA_DQ[17]
URSA_DQ[19]
C927
C923
0.1uF
C922
C925
C921
C920
C919
PI Result
0.1uF
0.1uF
16V
C961
AFLC_EN
LVDS_SEL
URSA_DQ[20]
C960
0.1uF
16V
PI Result
0.1uF
C963
BIT_SEL
0
R991
R993
0
R990
C962
0.1uF
L904
BLM18PG121SN1D
+3.3V_MEMC
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
M_XTALO
XTAL
R957
R956
OPT
10uF
R958
OPT
C913
C903
+1.26V_MEMC
R947
HOLD
DIO
16V
CLK
0.1uF
+3.3V_MEMC
5
C915
16V
C956 0 . 1 u F
6
0.1uF
0.1uF
C954
C957
10V
0.1uF
22uF
C912
10uF
C914
URSA_DQ[0-31]
0.1uF
C916 10uF
22uF
C909
C955
C917 10uF
10uF
C911
C929
0.1uF
0.1uF
0.1uF
0.1uF
C926
0.1uF
PI Result
E1
E5
K8
G1
D1
F1
J6
H9
VDDC_2
GND_1
MCLKZ[0]
MCLK[0]
MDATA[21]
MDATA[18]
MDATA[16]
MDATA[23]
AVDD_DDR_6
MDATA[29]
MDATA[26]
GND_11
MDATA[24]
MDATA[31]
AVDD_DDR_5
DQSB[3]
DQS[3]
GND_8
VDDP_3
AVDD_DDR_4
DQSB[2]
DQS[2]
GND_10
DQM[2]
DQM[3]
AVDD_DDR_2
MDATA[30]
MDATA[25]
MDATA[28]
MDATA[27]
MDATA[22]
MDATA[17]
MDATA[19]
ODT
MVREF
0.1uF 0.1uF 0.1uF 0.1uF
N4
N5
L9
G7
P2
R2
T2
T1
R1
P1
L10
N3
N2
J9
N1
M3
L7
M2
M1
H10
L8
L6
L3
L2
J8
L1
K3
K6
K2
K1
J3
J2
J1
H3
H2
H1
F6
GND_15K9
GND_7
VDDP_2
GPIO[20] K4
GPIO[21] L4
GPIO[18] H4
GPIO[19] J 4
GPIO[16] F4
GPIO[17] G4
GPIO[14] G3
GPIO[15] E4
GPIO[22] M4
GPIO[23] M5
GPIO[12] F3
GPIO[13] G2
GPIO[10] E2
GPIO[11] F2
VDDC_1
GND_14
GPIO[9]
GPIO[8]
SCLS
SDAS
MDATA[20]
0.1uF
AVDD_MEMPLL
0.1uF
10uF
C930
0.1uF 0.1uF
C928
10uF 10V
C910
7
10K
R951
10K
R952
4
0.1uF
0.1uF
C931
C932
2
C918
C940
C933
C908
C924
1uF
0.1uF
C934
3
RASZ
C935
[L9]
[N4]
[N5]
[D1]
[E1]
100
100
R942
100
R938
100
R945
100
R935
100
R930
0.1uF
MADR[6]
URSA_A[6]
DO
T3
URSA_RASZ
P4
WP
RE4P
B1
R3
CASZ
MEMC_RXE4-
RE4N
A1
P3
MADR[0]
URSA_A[0]
MEMC_RXE3-
RE3P
C1
T4
MADR[2]
URSA_A[2]
URSA_CASZ
T5
MADR[8]
URSA_A[8]
MEMC_RXE4+
RE3N
C2
R4
MEMC_RXE1-
R5
MADR[11]
C936
P5
URSA_A[11]
MEMC_RXE3+
RECKP
A2
J10
GND_12
MADR[4]
URSA_A[4]
MEMC_RXE2-
RE2P
B3
MEMC_RXEC+
RECKN
B2
MEMC_RXECRE2N
A3
MEMC_RXE0-
RE0P
MEMC_RXE0+
RE0N
B4
MEMC_RXE2+
RE1P
C3
T6
MEMC_RXO4-
GND_6
H8
L11
C937
RO4P
B5
R7
MEMC_RXE1+
RE1N
C4
R6
WEZ
MEMC_RXO3-
RO4N
A5
P7
MADR[5]
MEMC_RXO4+
RO3P
C5
T8
MADR[9]
GND
100
R943
100
R939
100
R946
100
R936
100
R931
100
R929
L905
BLM18PG121SN1D
+3.3V_MEMC
IC900
LGE7329A
K10
GND_16
56
VDDC_3
10K
F7
R926
T9
MDATA[4]
R927
K7
GND_13
M_SPI_DO
P9
MDATA[1]
URSA_DQ[1]
R928
T10
MDATA[6]
URSA_DQ[6]
VCC
R10
A4
P6
BADR[1]
URSA_BA1
MDATA[14]
0.1uF
RO3N
C6
R8
MADR[12]
C939
M_XTALI
P10
MDATA[11]
URSA_DQ[11]
AVDD_LVDS_1
BADR[0]
URSA_A[1]
URSA_BA0
SDAM
D5
P11
F11
MADR[1]
URSA_WEZ
RO2P
B7
MEMC_RXO2RO1P
C7
MEMC_RXO2+
RO2N
A7
MEMC_RXO1-
RO1N
MEMC_RXO1+
RO0P
C8
0.1uF
T7
SCLM
D6
DQM[1]
MEMC_RXO3+
MADR[7]
URSA_A[7]
URSA_A[5]
AVDD_DDR_7
GPIO[25]
N7
MEMC_RXO0AVDD_LVDS_2
G11
MEMC_RXO0+
RO0N
B8
A8
URSA_DQ[4]
URSA_A[0-12]
MADR[10]
URSA_A[10]
GPIO_13
K15
M_XTALO
XOUT
D4
XIN
D3
GND_5
H7
K11
AVDD_DDR_3
J11
AVDD_DDR_1
J7
GND_9
MEMC_RXOC-
ROCKP
A6
P8
URSA_A[9]
URSA_A[12]
GPIO_2
B14
R11
URSA_DQ[14]
R12
DQS[0]
MEMC_RXOC+
ROCKN
B6
N8
MCLKE
MADR[3]
URSA_A[3]
C938
GPIO_1
A14
0.1uF
GPIO_14
K16
T11
MDATA[9]
MDATA[12]
URSA_DQ[12]
URSA_DQ[9]
P12
DQSB[0]
URSA_DQS0
T12
URSA_DQM0
DQM[0]
URSA_DQM1
R9
MDATA[3]
URSA_DQ[3]
URSA_MCLKE
GPIO_9
GPIO_12
E11
C904
GPIO_8
D11
D13
0.1uF
C906
GND_2
H11
8
URSA_DQ[7]
1uF
G8
URSA_DQSB0
T13
DQS[1]
URSA_DQS1
VDDP_1
C941
R13
SPI_FRC
MDATA[0]
URSA_DQ[0]
IC902
A12
P15
1
B12
T16
MDATA[2]
URSA_DQ[2]
W25X20AVSNIG
URSA_DQ[15]
URSA_A4M
MCLK[1]
MDATA[5]
URSA_DQ[5]
CS
URSA_B0P
[N12]
[N13]
N12
N13
N14
L13
M13
M12
K13
L12
K12
J13
H13
G13
F13
E13
F12
D14
E12
N6
H6
N15
N16
M14
M15
F8
M16
L16
L15
L14
G9
K14
J14
J16
J15
H15
H16
H14
G14
G16
G15
F15
F16
F14
E14
E16
E15
G10
F9
D16
D15
C16
B16
A16
A15
B15
C15
D2
E3
E10
D10
D8
URSA_BCKP
URSA_BCKM
LVBCKP
LVBCKM
URSA_B4M
LVB4M
C950
URSA_D0P
URSA_D0M
URSA_D1P
URSA_D1M
LVD0P
LVD0M
LVD1P
LVD1M
URSA_DQ[0-31]
GPIO[28]
GPIO[29]
GPIO[30]
SCK
SDI
SDO
CSZ
PWM1
PWM0
GPIO[0]
GPIO[1]
GPIO[2]
GPIO[3]
GPIO[4]
GPIO[5]
GPIO[6]
GPIO[7]
GPIO[24]
VDDC_5
HIGH
HIGH
EEPROM
SPI
HIGH
GPIO8
R994
10K
+3.3V_MEMC
I2C
0.1uF
URSA_D4P
HIGH
HIGH
LOW
PWM1
M_SPI_CK
M_SPI_DI
M_SPI_DO
M_SPI_CZ
URSA_D4M
LVD4P
C947
URSA_D3M
LVD3M
LVD4M
URSA_D3P
LVD3P
AVDD_33_1
LVDCKM
URSA_D2M
URSA_DCKP
URSA_DCKM
LVDCKP
LVD2M
LVD2P
URSA_D2P
URSA_C4M
LVC4M
0.1uF
URSA_C4P
LVC4P
GND_3
URSA_C3M
LVC3M
URSA_CCKM
LVCCKM
URSA_C3P
URSA_CCKP
LVCCKP
LVC3P
URSA_C2P
URSA_C2M
LVC2M
URSA_C1M
LVC1M
LVC2P
URSA_C1P
URSA_C0M
LVC1P
LVC0M
LVC0P
GND_4
0.1uF
URSA_B4P
LVB4P
URSA_C0P
URSA_B3M
LVB3M
AVDD_33_2
URSA_B3P
LVB3P
C949
URSA_B2M
LVB2M
0.1uF
URSA_B2P
C948
0.1uF
0.1uF
C942
C943
10uF
10uF
C905
C907
10uF
L906
BLM18PG121SN1D
LVB2P
GPIO_3
GPIO_10
GPIO_11
GPIO_7
GPIO_5
820
R954
C901
+3.3V_MEMC
R969
OPT
22
22
R968 OPT
R967
R966
+3.3V_MEMC
H : ENABLE
L or NC : DISABLE
V4 LGD OPC
H : JEIDA
L or NC : VESA
V4 LGD LVDS SEL
AFLC_EN
LVDS_SEL
PWM_DIM
OPC_OUT1
R965
22
OPT
R974 22
OPT
R955
OPC_EN
OPC_ENABLE OPTION
OPC_OUT2
BIT_SEL
L : 8 bit
H or NC : 10 bit
V4 LGD BIT SEL
MST7329N(FRC) MAIN
MSD3369GV Platform
HIGH
LOW
HIGH
PWM0
MEMC_RESET
+3.3V_MEMC
OPT
56
URSA_DQ[8]
DQSB[1]
0.1uF
URSA_DQSB1
AVDD_PLL
F10
URSA_A0P
LVA0P
B9
URSA_A1P
LVA0M
A9
URSA_A2P
LVA1P
C9
P13
URSA_A0M
LVA1M
C10
T14
MDATA[8]
MDATA[15]
URSA_A1M
LVA2P
A10
URSA_A3P
LVA2M
B10
URSA_A2M
LVACKP
B11
R14
URSA_A3M
LVACKM
A11
P14
URSA_ACKP
LVA3P
C11
T15
MDATA[10]
0.1uF
URSA_A4P
LVA4P
GPIO_6
D9
R16
URSA_B1P
LVB0P
URSA_ACKM
LVA3M
C12
R15
MDATA[7]
MDATA[13]
URSA_DQ[13]
URSA_DQ[10]
C945
REXT
D12
URSA_B0M
LVB0M
RESET
G6
VDDC_4
470
R972
LVA4M
GPIO_4
D7
P16
MCLKZ[1]
URSA_MCLK1
LVB1P
B13
R953
OPT
R970
R971
OPC_ENABLE
OPT
3.3K
R978
0
R925
C944
R959
OPT
R960
OPT
R973
OPT
OPT
URSA_B1M
LVB1M
C13
A13
URSA_MCLKZ1
C14
M11
GPIO[26] N9
GPIO[27] N10
GND_17
N11
0
1K
1K
OPT
R980
R981
M_SPI_CZ
10uF16V
C952
C951
URSA_C2M
URSA_C2P
URSA_C1M
URSA_C1P
URSA_C0M
URSA_C0P
52
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
42
P901
TF05-41S
51
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
9
10
08/12/19 (MP)
URSA_CCKM
URSA_CCKP
URSA_C4M
URSA_C4P
URSA_C3M
URSA_C3P
URSA_D2M
URSA_D2P
URSA_D1M
URSA_D1P
URSA_D0M
URSA_D0P
URSA_DCKM
URSA_DCKP
URSA_D4M
URSA_D4P
URSA_D3M
URSA_D3P
URSA_A2M
URSA_A2P
URSA_A1M
URSA_A1P
URSA_A0M
URSA_A0P
URSA_ACKM
URSA_ACKP
URSA_A4M
URSA_A4P
URSA_A3M
URSA_A3P
URSA_B2M
URSA_B2P
URSA_B1M
URSA_B1P
URSA_B0M
URSA_B0P
URSA_BCKM
URSA_BCKP
URSA_B4M
URSA_B4P
URSA_B3M
URSA_B3P
4
3
2
1
P900
TF05-51S
L907
MLB-201209-0120P-N2
PANEL_POWER
0.1uF
+3.3V_MEMC
1000pF
C953
SPI FLASH
0.1uF
1K
R963
1K
R964
0
R975
R982 OPT
OPT
R983
Downloaded From TV-Manual.com Manuals
R979
Copyright © 2009 LG Electronics. Inc. All right reserved.
Only for training and service purposes
LGE Internal Use Only
DDR_DQ[21]
DDR_DQ[18]
56
URSA_DQ[18]
URSA_DQ[21]
DDR_DQ[16]
DDR_DQ[23]
DDR_DQ[29]
URSA_DQ[16]
URSA_DQ[23]
AR1003
DDR_DQ[26]
56
URSA_DQ[26]
URSA_DQ[29]
DDR_DQ[24]
DDR_DQ[31]
URSA_DQ[24]
URSA_DQ[31]
AR1002
DDR_DQ[19]
DDR_DQ[20]
DDR_DQ[17]
URSA_DQ[20]
URSA_DQ[19]
DDR_DQ[22]
URSA_DQ[17]
56
DDR_DQ[25]
DDR_DQ[30]
DDR_DQ[28]
URSA_DQ[22]
AR1001
URSA_DQ[25]
56
URSA_DQ[28]
URSA_DQ[30]
DDR_DQ[27]
AR1000
URSA_DQ[27]
DDR_DQ[16-31]
0.1uF
C1043
C1042
+1.8V_FRC_DDR
0.1uF
DQ9
DDR_DQ[25]
DDR_DQ[31] DQ15
DDR_DQ[30] DQ14
DDR_DQ[29] DQ13
DDR_DQ[28] DQ12
DDR_DQ[27] DQ11
DDR_DQ[26] DQ10
DQ8
DQ5
DDR_DQ[21]
DDR_DQ[24]
DQ4
DDR_DQ[20]
DQ7
DQ3
DDR_DQ[19]
DDR_DQ[23]
DQ2
DDR_DQ[18]
DQ6
DQ1
DDR_DQ[22]
DQ0
DDR_DQ[17]
0.1uF
DDR_DQ[16]
VSSQ_1
VSSQ_2
VSSQ_3
VSSQ_4
VSSQ_5
VSSQ_6
VSSQ_7
VSSQ_8
VSSQ_9
VSSQ_10
VSS_1
VSS_2
VSS_3
VSS_4
VSS_5
VDDQ_1
VDDQ_2
VDDQ_3
VDDQ_4
VDDQ_5
VDDQ_6
VDDQ_7
VDDQ_8
VDDQ_9
VDDQ_10
VDD_1
VDD_2
VDD_3
VDD_4
VDD_5
C1005
C1004
C1003
0.1uF
0.1uF
10uF
C1001
C1002
0.1uF
H8
H2
F8
F2
E7
D8
D2
A7
B8
B2
P9
N1
J3
E3
A3
G9
G7
G3
G1
E9
C9
C7
C3
C1
A9
R1
M9
J9
E1
A1
B9
B1
D9
D1
D3
D7
C2
C8
F9
F1
H9
H1
H3
H7
G2
G8
J1
J7
R8
E2
A2
R7
R3
L1
A8
E8
B3
F3
B7
F7
K3
L7
K7
L8
K9
K2
K8
J8
L3
L2
R2
P7
M2
P3
P8
P2
N7
N3
N8
N2
M7
M3
M8
J2
0.1uF
0.1uF
0.1uF
C1006
0.1uF
0.1uF
10uF
C1014
0.1uF
0.1uF
0.1uF
R1017
UDQS
NC_2
NC_1
VDDL
VSSDL
NC_3
010:Q13
URSA_BA1
0 1 0 : V 1 0 ; 0 0 9 : T 4URSA_MCLKE
URSA_WEZ
010:V10;009:R4
010:V10;009:R4
URSA_BA0
B_URSA_WEZ
010:V10;009:S4
B_URSA_MCLKE
010:Q14
22
URSA_MCLK1
22
AR1019
22
AR1012
22
10uF
C1024
009:Y4
009:X4
009:W4
009:X4
009:Y4
009:X4
010:V8
010:X16
010:X16
A_URSA_WEZ
A_URSA_MCLKE
A_URSA_BA1
A_URSA_BA0
URSA_WEZ
URSA_MCLKE
0.1uF
C1026
0.1uF
C1027
+1.8V_FRC_DDR
010:Y13
010:Z14
010:AA15
010:AA15
010:T8;009:R4
010:T9;009:T4
010:T9;009:R4
R1025
R1024
R1036
R1035
R1034
R1033
R1032
R1031
R1027
A_URSA_MCLKE
DDRA_A[11]
A_URSA_CASZ
DDRA_A[8]
A_URSA_RASZ
DDRA_A[4]
DDRA_A[6]
DDRA_A[0]
DDRA_A[2]
DDRA_A[5]
DDRA_A[7]
DDRA_A[12]
DDRA_A[9]
DDRA_A[10]
DDRA_A[1]
DDRA_A[3]
0.1uF
C1025
010:T9;009:S4
URSA_DQSB1
URSA_DQSB0
URSA_DQM1
URSA_DQM0
URSA_DQS1
URSA_DQS0
A_URSA_WEZ
A_URSA_CASZ
A_URSA_RASZ
0 1 0 : Q 1 4 ; 0 0 9 : J 1 0URSA_ODT
009:AB4 URSA_MCLKZ1
010:V9
009:AB4
URSA_A[11]
URSA_CASZ
URSA_A[8]
URSA_BA1
22
URSA_A[4]
URSA_A[6]
URSA_A[0]
URSA_A[2]
URSA_A[5]
URSA_A[7]
B_URSA_BA1
AR1018
AR1016
22
AR1010
C1023
URSA_A[12] AR1011
URSA_A[9]
URSA_A[10]
URSA_A[1]
URSA_RASZ
C1021
NC_6
009:J13
0.1uF
URSA_BA0
URSA_DQSB3
009:J14
009:J15
009:J15
009:J13
009:J14
010:T10
010:R16
010:R16
010:Y14;009:J10
010:T10
009:J10
009:J11
URSA_A[0-12]
B_URSA_BA0
56
URSA_DQSB2
URSA_DQM3
URSA_DQM2
URSA_DQS3
URSA_DQS2
B_URSA_WEZ
B_URSA_CASZ
B_URSA_RASZ
URSA_ODT
B_URSA_MCLKE
URSA_MCLKZ
URSA_MCLK
22
0.1uF
URSA_A[3]
C1022
NC_5
+1.8V_FRC_DDR
R1016
LDQS
56
56
R1015
UDM
56
56
22
22
22
DDRB_A[8]
URSA_CASZ
URSA_A[11]
URSA_A[8]
B_URSA_CASZ
DDRB_A[11]
AR1017
URSA_A[6]
URSA_A[4]
URSA_A[2]
22
URSA_A[0]
AR1015
DDRB_A[6]
DDRB_A[4]
URSA_A[5]
URSA_A[7]
URSA_A[12]
URSA_A[3]
URSA_A[9]
URSA_A[1]
DDRB_A[2]
0.1uF
DDRB_A[0]
22
AR1014
C1018
DDRB_A[5]
DDRB_A[7]
DDRB_A[12]
DDRB_A[3]
DDRB_A[9]
0.1uF
URSA_A[10]
C1019
URSA_RASZ
56
NC_4
0.1uF
22
C1015
AR1013
C1016
DDRB_A[1]
C1017
DDRB_A[10]
C1020
B_URSA_RASZ
R1014
R1013
R1012
R1008
R1006
B_URSA_BA1
R1005
B_URSA_BA0
DDRB_A[12]
DDRB_A[11]
DDRB_A[10]
DDRB_A[9]
DDRB_A[8]
DDRB_A[7]
DDRB_A[6]
DDRB_A[5]
DDRB_A[4]
DDRB_A[3]
DDRB_A[2]
DDRB_A[1]
DDRB_A[0]
0.1uF
C1013
+1.8V_FRC_DDR
C1012
LDM
UDQS
LDQS
WE
CAS
RAS
CS
ODT
CKE
CK
CK
BA1
BA0
A12
A11
A10/AP
A9
A8
A7
A6
A5
A4
A3
A2
A1
A0
VREF
IC1000
HYB18TC256160BF-2.5
C1000
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
URSA_DQ[0-31]
C1044
PI Result
10V
10uF
10V
10uF
+1.8V_FRC_DDR
R1037
A6
DDRA_A[6]
A11
A12
DDRA_A[11]
DDRA_A[12]
+1.8V_FRC_DDR
56
56
56
56
56
56
22
22
VDDL
VSSDL
NC_3
NC_2
NC_1
NC_6
NC_5
NC_4
UDQS
LDQS
UDM
LDM
UDQS
LDQS
WE
CAS
RAS
CS
ODT
CKE
CK
CK
BA1
BA0
A10/AP
DDRA_A[10]
A7
A5
DDRA_A[5]
A9
A4
DDRA_A[4]
A8
A3
DDRA_A[3]
DDRA_A[9]
A2
DDRA_A[8]
A1
DDRA_A[7]
A0
VREF
DDRA_A[2]
0.1uF
C1034
DDRA_A[1]
A_URSA_BA1
22
+1.8V_FRC_DDR
0.1uF
0.1uF
C1040
0.1uF
C1039
0.1uF
C1037
0.1uF
C1038
0.1uF
C1036
J1
J7
R8
E2
A2
R7
R3
L1
A8
E8
B3
F3
B7
F7
K3
L7
K7
L8
K9
K2
K8
J8
L3
L2
R2
P7
M2
P3
P8
P2
N7
N3
N8
N2
M7
M3
M8
J2
H8
H2
F8
F2
E7
D8
D2
A7
B8
B2
P9
N1
J3
E3
A3
G9
G7
G3
G1
E9
C9
C7
C3
C1
A9
R1
M9
J9
E1
A1
B9
B1
D9
D1
D3
D7
C2
C8
F9
F1
H9
H1
H3
H7
G2
G8
DDR_DQ[2]
DQ2
DDR_DQ[15]
DDR_DQ[14]
DDR_DQ[13]
DDR_DQ[12]
DDR_DQ[11]
DDR_DQ[10]
DDR_DQ[9]
DDR_DQ[8]
DDR_DQ[7]
DDR_DQ[6]
DDR_DQ[5]
DDR_DQ[4]
+1.8V_FRC_DDR
DDR_DQ[0-15]
MST7323S DDR2
MSD3369GV Platform
VSSQ_1
VSSQ_2
VSSQ_3
VSSQ_4
VSSQ_5
VSSQ_6
VSSQ_7
VSSQ_8
VSSQ_9
VSSQ_10
VSS_1
VSS_2
VSS_3
VSS_4
VSS_5
VDDQ_1
VDDQ_2
VDDQ_3
VDDQ_4
VDDQ_5
VDDQ_6
VDDQ_7
VDDQ_8
VDDQ_9
VDDQ_10
VDD_1
VDD_2
VDD_3
VDD_4
VDD_5
DQ15
DQ14
DQ13
DQ12
DQ11
DQ10
DQ9
DQ8
DQ7
DQ6
DQ5
DQ4
DDR_DQ[3]
DDR_DQ[1]
DQ3
DDR_DQ[0]
DQ1
C1041
DQ0
IC1001
HYB18TC256160BF-2.5
0.1uF
C1035
DDRA_A[0]
A_URSA_BA0
R1038
+1.8V_FRC_DDR
0.1uF
C1028
DDRA_A[0-12]
C1011
R1001
R1002
10uF
C1029
1K1%
1K1%
C1030
BLM18PG121SN1D
L1000
0.1uF
C1033
1000pF
DDR2 1.8V By CAP - Place these Caps near Memory
C1009
1000pF
C1010
150
0.1uF
+1.8V_MEMC
C1007
C1008
OPT
R1000
0.1uF
DDRB_A[0-12]
1K1%
1K 1%
0.1uF
C1031
0.1uF
C1032
150
Downloaded From TV-Manual.com Manuals
R1039
OPT
Copyright © 2009 LG Electronics. Inc. All right reserved.
Only for training and service purposes
LGE Internal Use Only
DDR_DQ[4]
DDR_DQ[3]
DDR_DQ[1]
DDR_DQ[6]
DDR_DQ[14]
DDR_DQ[9]
DDR_DQ[12]
DDR_DQ[11]
DDR_DQ[5]
DDR_DQ[2]
DDR_DQ[0]
AR1007
AR1006
56
56
56
URSA_DQ[0-31]
10
10
08/12/19 (MP)
URSA_DQ[4]
URSA_DQ[3]
URSA_DQ[1]
URSA_DQ[6]
URSA_DQ[14]
URSA_DQ[9]
URSA_DQ[12]
URSA_DQ[11]
URSA_DQ[5]
URSA_DQ[2]
URSA_DQ[0]
URSA_DQ[7]
URSA_DQ[13]
URSA_DQ[8]
56
AR1005
URSA_DQ[10]
DDR_DQ[7]
DDR_DQ[13]
DDR_DQ[8]
DDR_DQ[10]
URSA_DQ[15]
AR1004
DDR_DQ[15]
OPT
R183
0
1
R158
0
C103
0.1uF
16V
R110
180
B
R109
470
E
C
16V 1
0.1uF
C105
2
3
B
L106
0.1uF
0.1uF
VDDC_2
GND_4
VDDC_1
VDDA_3
VDDA_2
GND_3
EXTCHOKE
GND_2
IN2
GND_1
IN1
VDDA_1
+3.3V_TUNER
0.1uF
0.1uF
C120
C119
C121
820nH
2%
1008CS-821XGLC
0.1uF
1000pF
+1.8V_TUNER
C114
C116
C117
+3.3V_TUNER
+1.8V_TUNER
C
E
Q103
ISA1530AC1
R114
2K
Q104
2SC3052
FE_VOUT
12
11
10
9
8
7
6
5
4
3
2
1
: ACTIVE LOW (SOFT RESET)
Rev(8)
R110
220=>560=>180
R113,179
1.5K=>1.3K=>200=>390
R179
390
R113
390
Q102
2SC3052
Q101
RT1P141C-T112
R108
15K
R107
47K
C107
47uF
16V
C106
10uF
16V
TU_RESET
[SCART1 TV VOUT]
6.8nH
L115
0603CS-6N8XGLW2%
L115
6.8nH=>12 nH =>6.8nH
For Attenuation
Rev(5)
C111
150pF->120pF
C111
120pF
5%
5%
C112
39pF
C110
0.1uF
16V
TUNER RESET
10
R104
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
SC1_VIDEO_MUTE
(SC1_TV_VOUT_MUTE GPIO OPTION)
C102
0.1uF
16V
L101
MBW3216-501TF
5%
C109
56pF
BECAUSE THIS POINT MAKE ATTENUATOR
P_+12V
D102
RCLAMP0502B
CVBS_SCART_OUT
2
KCN-ET-0-0094
JK102
D101
50V
BAP70-02
OPT
BAP70-02
PIN Diode
FE_AGC_SPEED_CTL
(TUNER RESET GPIO OPTION)
NEED TO VERY CLOSE TO RF LINE
Active High
for Attenuation at least 3mA
OPT
C186
2200pF
270nH
2%
OPT
C185
0.1uF
L103
0603CS-R27XGLW
OPT OPT
C144
OPT
OPT
C184
0.1uF
6.8pF
RF_ATTENUATION
390nH
2%
16V
0.1uF
C131
16V
0.1uF
C130
C134
0.1uF
IC102
XC5000
0.1uF
R153
680
L112
MLF1608A2R7J
2.7uH 5%
R154
680
L111
MLF1608A2R7J
2.7uH 5%
DDI1
VDDC_5
DDI2
ADDRSEL
X2
GND_7
X1
X101
31.875MHz
DEVELOPE OPT
X103
32.0MHz
GND_2
1
4
X-TAL_2
2
3
Q105
ISA1530AC1
C104
0.1uF
16V
C177
6.8pF
50V
B
C
E
C174
0.1uF
16V
Q106
ISA1530AC1
R122
390
1:C9
TUNER_SIF_IF_N
B
C
E
TUNER_CVBS_IF_P
Q109
ISA1530AC1
C179
0.1uF
16V
+5V_TUNER
R178
390
100
100
Rev(6)
C140,141
33pF=>13pF=>15pF=>18pF
IF_AGC
C141
18pF
Place the Buffer close to Tuner
+5V_TUNER
C
E
R121
390
+5V_TUNER
C139
0.1uF
16V
R155
1K
B
C176
10pF
50V
C175
0.1uF
50V
C136
0.1uF
GND_1
X-TAL_1
+1.8V_TUNER
0.1uF
C138
0.1uF
C142 C143
18pF 18pF
50V 50V
R130
EXTREF
VDDD_2
R129
C140
18pF
+5V_TUNER
SCL
C137
+3.3V_TUNER
FE_TS_ERR
FE_TS_VAL
DVB-CI DETECT
SDA
GND_8
+5V_TUNER
+1.8V_TUNER
L107
LQH32MN2R2K23L 2.2uH
25
26
27
28
29
30
31
32
33
34
35
36
TU_RESET
OPT
R106
10
OPT
+3.3V_TUNER
0
R184
FE_RESET
0.1uF
0
R185
0.1uF
0.1uF
L105
0603CS-R39XGLW
0.1uF
C124
1000pF
C122
VDDA_8
48
13
VDDC_9
47
14
4.99K
C123
VDDC_3
1%
C125
VDDA_4
0.1uF
C126
VDDA_7
45
R118
REXT
44
17
GND_9
46
VDDC_8
43
SIF
16
VIF
C128
VDDC_7
42
0.1uF
VDDA_5
15
VAGC
VREF_N
40
VI2C
21
VREF_P
41
C133
VDDC_6
39
RESET
37
38
C127
OPT
R159
4.7K
R182R181
22 820
5
4
4.7K
R160
OPT
CVBS_SCART_OUT
FE_TS_DATA[0-7]
FE_TS_DATA_CLK
FE_TS_VAL
FE_TS_SYNC
FE_TS_ERR
FE_TS_SERIAL
FE_TUNER_SDA
FE_TUNER_SCL
3
2
1
IC105
NL17SZ08DFT2G
C_+3.3V
R149
47
47
FE_TS_DATA[4] R137
47
47
C146
100uF
16V
C147
0.1uF
50V
+5V_TUNER
FE_TS_DATA[7] R131
FE_TS_DATA[6] R139
47
47
FE_TS_DATA[3] R136
FE_TS_DATA[5] R138
47
47
MD0
MD1
47
FE_TS_DATA[2] R135
MVAL
47
R143
FE_TS_DATA[0] R133
FE_TS_DATA[1] R134
47
R132
OUT
ADJ/GND
IN
AZ1117H-1.2TRE1
IC103
C_+3.3V
1
50V
10pF
C153
C182
0.1uF
16V
+3.3V_TUNER
50V
10pF
C150
R148
100
VSSAL_AFE2
SIF
CVBS
VDDAH_CVBS
VSSAH_CVBS
INP
INN
VSSAH_AFE1
VDDAH_AFE1
VDDAL_AFE1
VSSAL_AFE1
IF_AGC
RF_AGC
46
45
44
43
42
41
40
39
38
37
36
35
34
33
16V
0.1uF
C161
16V
0.1uF
C162
16V
0.1uF
C165
C181
0.1uF
16V
C183
0.1uF
16V
2008.10.6
1
LH7000 Venus Jack B/D
Tuner
C154
0.1uF
16V
16V
0.1uF
C173
A_3.3V
C172
0.1uF
16V
C157
0.1uF
16V
D_3.3V
4
16V
0.1uF
C171
L108
CIC21J501NE
16V
0.1uF
C169
C170
0.1uF
16V
L110
CIC21J501NE
C168
0.1uF
16V
L109
CIC21J501NE
A_1.2V
IF_AGC
TUNER_SIF_IF_N
TUNER_CVBS_IF_P
FE_RESET
C_+3.3V
+3.3V_TUNER
C180
0.1uF
16V
L116
CIC21J501NE
C160
10uF
16V
C164
0.1uF
16V
+3.3V_TUNER
Rev(5)
C160 MLCC
+1.2V
100
R151
C156
0.1uF
16V
R150
4.7K
C163
0.027uF
R152
6.8K
C_+3.3V
EAX58326901(4) PCB revision
Xceive strong channel attenuation solution_ IC102 pin2 p-i-n diode ap
C149
0.1uF
50V
R147
100
0.1uF
VDDAL_AFE2
47
C_+3.3V
0.1uF
C159
PDP
48
A_1.2V A_3.3V
Rev(9)
C152,155
18pF=>13pF=>15pF
C158
C155
15pF
50V
PDN
20.25MHz
C152
15pF
50V
X102
D_3.3V
IC104
DRX3913K-XK
+1.2V
R146
4.7K
OPT
OPT
R145
4.7K
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
C148
100uF
16V
VDDL_2
VSSL_2
MD3
MD2
MCLK
VDDH_1
VSSH_1
MERR
47
MSTRT
47
47
R140
GPIO1
VSSL_1
VDDL_1
I2S_WS
R142
+1.2V
FE_TS_VAL_ERR
R141
GND
C151
0.1uF
16V
+3.3V_TUNER
R144
4.7K
845 OHM 1%
17
OPT
VDDH_2
R180 4.7K
18
18
I2S_CL
I2S_DA
64
19
MD4
19
I2C_SCL2
62
63
20
MD5
20
I2C_SDA2
61
21
MD6
GND_5
TDI
60
22
MD7
VDDC_4
TCK
59
I2C_SCL1
VDDA_6
TMS
58
23
XI
+3.3V_TUNER
0
R115
24
I2C_SDA1
22
0.1uF
TDO
25
VSSH_3
23
0.1uF
VDDL_4
26
VDDH_3
24
C129
VSSL_4
57
27
GND_6
C132
VSSH_4
56
28
0 . 1 u F VDDD_1
TESTMODE
C135
VDDH_4
55
FE_DEMOD_SCL
30
Attenuation Rev(4)
L113
CIC21J501NE
VDDAH_OSC
52
29
RSTN
54
FE_DEMOD_SDA
VSSH_2
VSSAH_OSC
51
50
31
GPIO2
53
VDDL_3
XO
49
32
VSYNC
VSSL_3
C166
1000pF
50V
C167
1000pF
50V
Downloaded From TV-Manual.com Manuals
SAW_SW
Copyright © 2009 LG Electronics. Inc. All right reserved.
Only for training and service purposes
LGE Internal Use Only
Copyright © 2009 LG Electronics. Inc. All right reserved.
Only for training and service purposes
Downloaded From TV-Manual.com Manuals
LGE Internal Use Only
9
.
3
2
1
R_IN
R_OUT
22
11
12
13
14
15
16
17
18
19
20
21
D200
5.6V
OPT
D205
5.6V
OPT
D220
30V
OPT
D204
30V
OPT
D203
30V
OPT
D202
5.6V
OPT
D209
30V
OPT
D208
5.6V
OPT
R241
470K
D207
5.6V
OPT
R242
470K
D206
30V
OPT
R200
470K
C200
OPT
TV_R_OUT
R235
10K
C203
330pF
50V
002:P7
R233
10K
R206
75
C202
330pF
50V
002:P7
L200
120-ohm
L201
120-ohm
C201
OPT
R205
0
TV_L_OUT
R203
470K
R202
75
75
R201
R204
75
R e v ( 4 ) R207
R207 75
68=>75
GND
R234
12K
R236
12K
R209
75
R214
22
SC1_R_IN
SC1_L_IN
SC1_B
SC1_G
SC1_R
R215
0
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
JK200
4
GND
L_OUT
5
6
LIN
GND
7
B
SC_ID 8
10
11
12
13
14
15
16
17
18
19
20
21
22
23
.
23
D201
30V
OPT
D219
5.6V
OPT
002:P11
C205
100uF
16V
R216
62K
C206
220pF
50V
OPT
C207
0.1uF
16V
+5V_GENERAL
R217
11K
R219
1K
R218
10K
SC1_ID 0 0 2 : P 1 3
SC1_FB
FE_VOUT
SC1_CVBS_IN
SCART1_DET
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
4
JK201
R_OUT
1
R_IN 2
3
5
L_OUT
GND
6
7
GND
L_IN
.
SC2_ID 8
.
.
23
11
12
13
14
15
16
17
18
19
20
21
22
D221
5.6V
OPT
D213
5.6V
OPT
R221
75
D215
30V
OPT
D212
30V
OPT
R244
470K
D214
5.6V
OPT
D217
5.6V
OPT
D216
5.6V
OPT
R243
470K
D218
30V
OPT
R222
75
Rev(4)
R222
68=>75
C212
330pF
50V
C211
330pF
50V
MStar
DTV/MNT_R_OUT
DTV/MNT_L_OUT
C209
OPT
L203
120-ohm
C208
OPT
Full/Half SCART
R225
470K
R224
470K
L202
120-ohm
C210
100uF
16V
R226
75
R239
10K
R237
10K
R240
12K
R238
12K
DTV/MNT_V_OUT
R227
0
SC2_R_IN
SC2_L_IN
R228
0
Rev(3)
R229
56K=>62K
R229
62K
C
2
A2
Rev(3)
R231
18K=>11K
R231
11K
R232
1K
R230
10K
A1
D222
KDS184
C214
220pF
50V
OPT
C215
0.1uF
16V
+5V_GENERAL
4
SC2_ID
REC_8
SC2_CVBS_IN
SCART2_DET
JK300
[YL]0_SPRING
[YL]CONTACT
[WH]1P_CAN
[WH]C_LUG_L
[RD]1P_CAN
[RD]0_SPRING
[RD]CONTACT
4A
2B
5B
2C
3C
4C
001:AC17
001:AC17
001:AC17
3
D301
AMOTECH
5.6V
R300
1K
R301
10K
+3.3V_TUNER
SHIELD_PLATE
T_TERMINAL2
B_TERMINAL2
T_SPRING
R_SPRING
B_TERMINAL1
T_TERMINAL1
E_SPRING
D300
AMOTECH
5.6V
8
6B
7B
5
4
7A
6A
C322
0.1uF
16V
D303
AMOTECH
5.6V
OPT
D302
AMOTECH
5.6V
OPT
D306
5.6V
AMOTECH
D305
5.6V
AMOTECH
D304
5.6V
AMOTECH
30V
AMOTECH
D307
30V
AMOTECH
D309
R310
0
C301
100pF
50V
C300
100pF
50V
INTERFACE
4
E_SPRING
3
T_TERMINAL1 6A
B_TERMINAL1 7A
R_SPRING
5
B_TERMINAL2 7B
T_TERMINAL2 6B
8
R313
12K
R325
12K
R324
12K
JK302
PC_L_IN
PC_R_IN
C306
47pF
50V
C307
47pF
50V
PEJ024-01
R319
0
R311
12K
T_SPRING
R323
10K
R318
0
C303
100pF
50V
R322
C304 10K
100pF
50V
R317
75
R321
75
SHIELD_PLATE
R308
R303 10K
470K
R307
10K
R312
470K
R316
470K
R315
1K
R302
470K
C302
0.1uF
16V
R305
10K
+5V_GENERAL
R304
0
D310
5.6V
AMOTECH
R314
1K
+5V_GENERAL
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
HP_R_OUT
HP_DET
HP_L_OUT
HEAD PHONE
JK301
PEJ024-01
PC AUDIO
[YL]1P_CAN
3A
[S-VHS]0_SPRING
8
2A
[S-VHS]C_LUG_L3
[S-VHS]C_LUG_L4
7C
[S-VHS]C_LUG_L2
7B
7D
[S-VHS]C_LUG_L1
[S-VHS]GROUND_TER
7A
6
PMJ029-01
002:P9
002:P9
AV_R_IN
AV_L_IN
002:P13
OPT
C324
8pF
50V
OPT
ZD300
R356
0
R326
1K
C308
0.1uF
50V
+5V_GENERAL+5V_GENERAL
3E
4E
2E
5D
2D
5C
2C
5B
2B
3A
4A
2A
R327
10K
VINPUT
VCC
GND
R328
0
FIX_POLE
D315
5.6V
AMOTECH
D314
5.6V
AMOTECH
D313
30V
AMOTECH
30V
AMOTECH
D312
30V
AMOTECH
D311
D316
5.6V
AMOTECH
JST1223-001
JK303
[RD]O_SPRING
[RD]CONTACT
[RD]1P_CAN2
[WH]C_LUG_L
[WH]1P_CAN
[RD]C_LUG_L
[RD]1P_CAN1
[BL]C_LUG_L
[BL]1P_CAN
[GN]O_SPRING
[GN]CONTACT
[GN]1P_CAN
RCA-517HA-00A-01
JK304
SPDIF OPTIC JACK
SPDIF_OUT
AV_CVBS_DET
AV_CVBS_IN
S_DET
S_Y_IN
COMPONENT
+5V_GENERAL
DSUB_VSYNC
C310
1000pF
50V
R335
10K
C309
1000pF
50V
R336
10K
COMP_DET
002:E8
002:E7
002:E7
DSUB_R
DSUB_G
DSUB_B
002:E9 DSUB_HSYNC
002:E9
PC
R334
470K
R333
470K
R332
75
R331
75
R330
75
R329
1K
R340
0
R339
0
002:E4
COMP_Pr
R341
R342
L302
BLM18PG600SN1D
L301
BLM18PG600SN1D
L300
BLM18PG600SN1D
0
0
COMP_R_IN
002:P10
002:P10
002:E4
COMP_Pb
COMP_L_IN
002:E5
COMP_Y
001:AC19
R344
75
R343
75
R345
75
OPT
D317
EPCOS
5.6V
C313
OPT
C312
OPT
C311
OPT
D321
AMOTECH
30V
D320
AMOTECH
30V
D319
AMOTECH
30V
OPT
D318
EPCOS
5.6V
DBG_RX
DBG_TX
RS232C
220pF
C321
0.1uF
16V
MStar
IN/OUT
JK305
KCN-DS-1-0089
C317
0.1uF
50V
IC300
MAX3232CDR
50V
D322
ADUC30S03010L_AMODIODE
30V
OPT
R346
22
V50V
+5V_VGA
JK306
KCN-DS-1-0088
220pF
C316
R350
4.7K
C315
R347
4.7K
+3.3V_ST
C314
0.1uF
50V
DOUT2
30V
AMOTECH
10K
R309
S_C_IN
1
2
3
C305
47pF
50V
4
R338
12K
R320
75
6
R306
0
11
1
R337
12K
RIN2
8
9
7
5
12
R353
100
C1R355
0
D324
AMOTECH
5.6V
OPT
R351
10K
+5V_GENERAL
C320
0.1uF
50V
+3.3V_ST
3
R352 1K
C323
0.1uF
50V
4
DSUB_DET
DDC_SDA/UART_TX
DDC_SCL/UART_RX
D326 OPT
ADUC30S03010L_AMODIODE
30V
D325
ADUC30S03010L_AMODIODE
30V
OPT
C319
0.1uF
50V
D323
ADUC30S03010L_AMODIODE
30V
OPT
R349
0
OPT
R348
22
C318
0.1uF
50V
V+
2
D308
8
2
7
DIN2
9
C26
ROUT2
12
2
1
C2+
4
13
RIN1
6
DIN1
15
10
13
3
VCC
3
14
R354
100
7
DOUT1
3
C1+
1
16
9
AV
14
4
8
ROUT1
16
10
15
GND
4
11
10
5
Downloaded From TV-Manual.com Manuals
5
Copyright © 2009 LG Electronics. Inc. All right reserved.
Only for training and service purposes
Fiber Optic
LGE Internal Use Only
Copyright © 2009 LG Electronics. Inc. All right reserved.
Only for training and service purposes
Downloaded From TV-Manual.com Manuals
LGE Internal Use Only
C401
22uF
16V
C402
0.1uF
16V
C403
0.1uF
16V
C404
0.47uF
25V
IN
I
IN
BS
G
4
3
2
1
L401
22uH
5
6
7
8
OUT
3
2
C407
0.1uF
16V
1
FB
C410
5600pF
50V
R406
100K
IN
OUT
3
2
1
GND
R448
0
BLM18PG121SN1D
L405
BLM18PG121SN1D
L404
C422
100uF
16V
+3.3V_TUNER
C420
0.1uF
16V
ADJ/GND
AP1117E18G-13
1/10W
5%
R451
0
C412
100uF
16V
R409
12.4K
1%
R408
9.1K
C413
0.1uF
50V
IC404
ADJ/GND
C409
22uF
16V
R405
56K
1%
C414
100uF
COMP
EN
SS
C424
0.1uF
16V
C408
0.1uF
IC401
MP2305DS
O
IC402
GND
C405
0.01uF
50V SW
2
3
+9V_GENERAL
AP1117E33G-13
1
KA7809ERTM
IC400
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
OPT
C452
22uF
50V
C400
100uF
16V
P_+12V
POWER
CB3216PA501E
L406
CB3216PA501E
L407
OPT
C435
4.7uF
10V
OPT
C431
4.7uF
10V
C423
0.1uF
16V
C425
100uF
16V
+1.8V_TUNER
C428
0.1uF
16V
C427
0.1uF
16V
C437
100uF
16V
+5V_TUNER
C436
100uF
16V
+5V_GENERAL
C442
4.7uF
16V
C441
4.7uF
16V
C440
4.7uF
16V
C439
4.7uF
16V
C438
4.7uF
16V
R420
100
R419
100
R418
100
R417
100
R416
100
R415
100
R414
100
C444
22uF
16V
+9V_GENERAL
COMP_DET
DSUB_DET
S_DET
AV_CVBS_DET
R424
100
R423
100
R422
100
R421
100
GND
R447
0
14
13
12
11
10
9
8
7
6
5
4
3
2
1
ADDR 9A
TEA6420D
IC405
8 Vss
7D3
6D2
5D1
4 D0
3A2
2 A1
1 A0
D4 9
D510
D611
D712
VDAC 13
SCL 14
SDA 15
VDD16
ADDR 71
IC406
JLC1562BFEL
ROUT2
LOUT2
ROUT1
LOUT1
L5
L4
NC2
NC1
L3
L2
L1
VS
CAPACITANCE
I/O EXPANSION
AV_R_OUT
AV_L_OUT
AV_L_IN
PC_L_IN
COMP_L_IN
SC2_L_IN
SC1_L_IN
C443
0.01uF
50V
AUDIO SWITCH
R427
100
R426
100
R425 OPT
100
R446
22
R429
22
C446
47uF
16V
R437
100
R436
100
R435
100
R434
100
R433
100
R432
100
R431
100
C451
4.7uF
16V
C450
4.7uF
16V
C449
4.7uF
16V
C448
4.7uF
16V
C447
4.7uF
16V
FE_DEMOD_SDA
R430
10K
SCART2_DET
SCART1_DET
SC1_VIDEO_MUTE
FE_DEMOD_SCL
+5V_GENERAL
R449
10K
C445
0.1uF
50V
+5V_GENERAL
LOUT3
ROUT3
LOUT4
ROUT4
R5
R4
NC3
NC4
R3
R2
R1
ADDR
SCL
R428
22
15
16
17
18
19
20
21
22
23
24
25
26
27
28
SDA
+5V_GENERAL
AV_R_IN
PC_R_IN
COMP_R_IN
SC2_R_IN
SC1_R_IN
FE_DEMOD_SCL
FE_DEMOD_SDA
IN/OUT
MStar
FE_TS_DATA[0-7]
TUNER_SIF_IF_N
+3.3V_ST
FE_TUNER_SDA
FE_TUNER_SCL
TUNER_CVBS_IF_P
(TUNER CVBS)
(TUNER SIF)
TUNER_SIF_IF_N
FE_DEMOD_SDA
FE_DEMOD_SCL
SPDIF_OUT
+5V_VGA
FE_TS_VAL_ERR
FE_TS_DATA_CLK
FE_TS_SERIAL
FE_TS_SYNC
DTV/MNT_V_OUT
HP_L_OUT
HP_R_OUT
(TUNER RESET)FE_AGC_SPEED_CTL
RF_ATTENUATION
FE_RESET
DDC_SDA/UART_TX
HP_DET
DDC_SCL/UART_RX
TV_R_OUT
TV_L_OUT
DTV/MNT_R_OUT
DTV/MNT_L_OUT
AV_R_OUT
AV_L_OUT
SC1_ID
SC1_FB
SC2_ID
REC_8
DBG_TX
DBG_RX
SC1_G
SC1_R
SC1_CVBS_IN
SC2_CVBS_IN
SC1_B
AV_CVBS_IN
COMP_Y
COMP_Pb
COMP_Pr
DSUB_R
DSUB_G
DSUB_B
S_Y_IN
S_C_IN
DSUB_VSYNC
DSUB_HSYNC
P_+12V
4
21
FE_TS_DATA[7]
47
47
OPT
R441
R452
47
R440
R439
47
47
22
FE_TS_DATA[6]
R438
23
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
4
GF05C-96S
P400
1 1
3 3
2 2
5 5
4 4
7 7
6 6
10
9 9
8 8
10
11
12
13
14
15
16
17
18
19
20
24
FE_TS_DATA[5]
25
FE_TS_DATA[4]
FE_TS_DATA[3]
27
FE_TS_DATA[1]
FE_TS_DATA[2]
26
28
FE_TS_DATA[0]
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
TUNER JACK PIN
97
P/NO : MFL58858405
Downloaded From TV-Manual.com Manuals
Feb., 2009
Printed in Korea