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AZPR EvBoard ྲྀᢅㄝ᫂᭩
┠ḟ
1.
ᴫせ ...................................................................................................................................................3
1.1.
᭦᪂ᒚṔ.....................................................................................................................................3
1.2.
ෆᐜ≀ ........................................................................................................................................3
1.3.
ὀព஦㡯.....................................................................................................................................3
1.4.
᭩⡠ࠕCPU ⮬సධ㛛ࠖ࡟࡚〇సࡍࡿᇶᯈ࡜ࡢ┦㐪Ⅼ ...............................................................3
1.5.
ࢧ࣏࣮ࢺ࣮࣌ࢪ࡟ࡘ࠸࡚............................................................................................................3
2.
AZPR EvBoard ࡢᐇ⿦㒊ရ ..............................................................................................................4
3.
ᅇ㊰ᅗ ...............................................................................................................................................5
4.
ไ⣙ࣇ࢓࢖ࣝ...................................................................................................................................11
5.
6.
7.
FPGA ࡢࢥࣥࣇ࢕ࢠ࣮ࣗࣞࢩࣙࣥ᪉ἲ ...........................................................................................12
5.1.
UrJTAG ࢆ฼⏝ࡋࡓࢥࣥࣇ࢕ࢠ࣮ࣗࣞࢩࣙࣥ .........................................................................12
5.2.
cblsrv-0.1_ft2232 ࢆ฼⏝ࡋࡓࢥࣥࣇ࢕ࢠ࣮ࣗࣞࢩࣙࣥ...........................................................20
5.3.
እ㒊ࢲ࣮࢘ࣥࣟࢻࢣ࣮ࣈࣝ࠿ࡽࡢࢥࣥࣇ࢕ࢠ࣮ࣗࣞࢩࣙࣥ ....................................................24
ࢲ࢖࢔ࢢࣉࣟࢢ࣒ࣛ ........................................................................................................................25
6.1.
஦๓‽ഛ...................................................................................................................................25
6.2.
ࢲ࢖࢔ࢢࣉࣟࢢ࣒ࣛࡢᐇ⾜ ......................................................................................................25
Appendix-A 㟁Ꮚࢧ࢖ࢥࣟࡢᐇ⿦...................................................................................................27
2
AZPR EvBoard ྲྀᢅㄝ᫂᭩
1. ᴫせ
1.1.
᭦᪂ᒚṔ
2012/08/11 ึ∧సᡂ
2012/10/20 2 ∧࣭ᮏᩥ୰ࡢㄗࡾࢆゞṇ
1.2.
ෆᐜ≀
ᮏ〇ရࡢࣃࢵࢣ࣮ࢪ࡟ࡣୗグࡢෆᐜ≀ࡀྵࡲࢀࡲࡍࠋ
࣭ AZPR EvBoard ᮏయ
࣭ ࣡ࣥࢱࢵࢳᇶᯈࢫࢱࣥࢻ MPS-08
࣭ ྲྀᢅㄝ᫂᭩(ᮏ᭩)
࡞࠾ࠊୗグࡢ〇ရࡣᮏ〇ရࡢࣃࢵࢣ࣮ࢪ࡟ࡣྵࡲࢀ࡚࠾ࡽࡎࠊ࠾ᐈᵝ⮬㌟࡛⏝ពࡋ࡚࠸ࡓࡔࡃᚲせ
ࡀ࠶ࡾࡲࡍࠋ
࣭ PC(OS ࡣ windows7 ࢆ᥎ዡ)
࣭ AC ࢔ࢲࣉࢱ(ฟຊ㟁ᅽ: 5[V], ฟຊ㟁ὶ:2[A]⛬ᗘ, ෆᚄ 2.1[mm])
࣭ USB ࢣ࣮ࣈࣝ(A-miniB)
ࡲࡓࠊࢲ࢖࢔ࢢࣉࣟࢢ࣒ࣛࢆືసࡉࡏࡿሙྜ࡟ࡣୗグࡢ〇ရࡀᚲせ࡟࡞ࡾࡲࡍࠋ
࣭ 10 ࣆࣥࣇࣛࢵࢺࢣ࣮ࣈࣝ(5 ࣆࣥ™2 ิ)
1.3.
ὀព஦㡯
࣭ ᮏ〇ရࢆ࠾౑࠸࡟࡞ࡿ࡟ࡣ㟁Ꮚᕤసࡸ㟁Ꮚᅇ㊰࡟ࡘ࠸࡚ࡢ୍⯡ⓗ࡞▱㆑ࠊࢨ࢖ࣜࣥࢡࢫ♫〇
FPGA ࡟ࡘ࠸࡚ࡢ▱㆑ࡸ㛤Ⓨ⎔ቃ࡞࡝ࡀᚲせ࡛ࡍࠋ
࣭ ᮏ〇ရࢆ࠾౑࠸࡟࡞ࡿ๓࡟ࡣࠊᚲࡎ IC ࡢࢻ࣓࢟ࣗࣥࢺ㢮ࢆཧ↷ࡋ࡚ࡃࡔࡉ࠸ࠋࢨ࢖ࣜࣥࢡࢫ♫ࡢ
࣮࣒࣮࣍࣌ࢪ࠿ࡽࠊFPGA ࡢࢻ࣓࢟ࣗࣥࢺࡸ㛤Ⓨࢶ࣮ࣝ࡞࡝ࢆࢲ࣮࢘ࣥࣟࢻ࡛ࡁࡲࡍࠋ
࣭ ᮏ〇ရࡣᏛ⩦⏝ࡢᇶᯈ࡛ࡍࠋᕤᴗ〇ရ࡬ࡢ⤌ࡳ㎸ࡳ࡞࡝ࠊ⏝㏵እࡢ౑⏝ࡣࡈ㐲៖ࡃࡔࡉ࠸ࠋࡲࡓࠊ
ᮏ〇ရ࡟ࡼࡗ࡚⏕ࡌࡓᦆᐖ࡞࡝࡟ࡘ࠸࡚ࡣ㈐௵ࢆ㈇࠸࠿ࡡࡲࡍࠋ
࣭ ᮏ〇ရࡢ௙ᵝࡣண࿌࡞ࡃኚ᭦࡟࡞ࡿሙྜࡀ࠶ࡾࡲࡍࠋࡈὀពࡃࡔࡉ࠸ࠋ
࣭ ᮏ࣐ࢽࣗ࢔ࣝࡣࠊෆᐜ࡟ࡘ࠸࡚⤯ᑐࡢಖドࢆࡍࡿࡶࡢ࡛ࡣ࠶ࡾࡲࡏࢇࠋ
1.4.
᭩⡠ࠕCPU ⮬సධ㛛ࠖ࡟࡚〇సࡍࡿᇶᯈ࡜ࡢ┦㐪Ⅼ
࣭ ᇶᯈࡢࣂ࣮ࢪࣙࣥࢆ v.1.0 ࠿ࡽ v.2.0 ࡟ኚ᭦ࡋ࡚࠸ࡲࡍࠋ
࣭ FPGA ࡢᆺ␒ࢆ XC3S250E ࠿ࡽ XC3S500E ࡟ኚ᭦ࡋ࡚࠸ࡲࡍࠋ
࣭ ࢥࣥࣇ࢕ࢢ ROM ࡢᆺ␒ࢆ XCF02S ࠿ࡽ XCF04S ࡟ኚ᭦ࡋ࡚࠸ࡲࡍࠋ
࣭ 㟁※ᅇ㊰ࢆෆⶶࡋ࡚࠸ࡲࡍࠋ
࣭ USB-ࢩࣜ࢔ࣝኚ᥮ IC ⏝ࡢ EEPROM ࢆᐇ⿦ࡋࠊෆ㒊࡟タᐃࢆ᭩ࡁ㎸ࢇ࡛࠸ࡲࡍࠋ
ࡇࡢࡓࡵࠊࢹࣂ࢖ࢫ࣐ࢿ࣮ࢪࣕ࠿ࡽࢩࣜ࢔࣏࣮ࣝࢺࡣ 1ch ࡢࡳㄆ㆑ࡉࢀࡲࡍࠋ
1.5.
ࢧ࣏࣮ࢺ࣮࣌ࢪ࡟ࡘ࠸࡚
ୗグࡢ࣮࣌ࢪ࡟࡚ࠊᅇ㊰ᅗࠊไ⣙ࣇ࢓࢖ࣝࠊࢲ࢖࢔ࢢࣉࣟࢢ࣒ࣛ࡞࡝ࡢ㓄ᕸ࡞࡝ࢆ⾜ࡗ࡚࠸ࡲࡍࠋ
KWWSUHVSRQRUJ
3
AZPR EvBoard ྲྀᢅㄝ᫂᭩
2. AZPR EvBoard ࡢᐇ⿦㒊ရ
ᅗ 1: AZPR EvBoard ࡢᴫほ
࣭ FPGA ࡜ࢥࣥࣇ࢕ࢢ ROM
FPGA: Spartan3E(Device: XC3S500E, Package: VQG100, SpeedGrade: -4, )
ࢥࣥࣇ࢕ࢢ ROM: XCF04S
AZPR EvBoard ࡛ࡣ USB ࡟ࡼࡿࢥࣥࣇ࢕ࢠ࣮ࣗࣞࢩࣙࣥ࡜እ㒊ࢲ࣮࢘ࣥࣟࢻࢣ࣮ࣈࣝ࡟ࡼࡿ
ࢥࣥࣇ࢕ࢠ࣮ࣗࣞࢩࣙࣥࢆࢧ࣏࣮ࢺࡋ࡚࠸ࡲࡍࠋ
ヲ⣽ࡣࠕ5 FPGA ࡢࢥࣥࣇ࢕ࢠ࣮ࣗࣞࢩࣙࣥ᪉ἲࠖࢆཧ↷ࡋ࡚ࡃࡔࡉ࠸ࠋ
࣭ ࢫ࢖ࢵࢳ
4 ಶᐇ⿦ࡉࢀ࡚࠸ࡲࡍࠋṇㄽ⌮ධຊࠊࢳࣕࢱࣜࣥࢢ㝖ཤ῭ࡳ࡛ࡍࠋ
࣭ LED
2 ಶᐇ⿦ࡉࢀ࡚࠸ࡲࡍࠋ㈇ㄽ⌮ฟຊ࡛ࡍࠋ
4
AZPR EvBoard ྲྀᢅㄝ᫂᭩
࣭ 7 ࢭࢢ࣓ࣥࢺ LED
2 ಶᐇ⿦ࡉࢀ࡚࠸ࡲࡍࠋࢹࢥ࣮ࢲᅇ㊰ࡣ࡞ࡃࠊFPGA ࠿ࡽ┤⤖ࡉࢀ࡚࠸ࡲࡍࠋ㈇ㄽ⌮ฟຊ࡛ࡍࠋ
D.P, g, f, e, d, c, b, a ࡜୪࡭ࡓሙྜࡢࢹࢥ࣮ࢻ⾲ࢆ⾲ 1 ࡟ࠊ➃Ꮚ㓄⨨࡜ෆ㒊ᅇ㊰ᵓᡂᅗࢆᅗ 2 ࡟
♧ࡋࡲࡍࠋ
⾲ 1: 7 ࢭࢢ࣓ࣥࢺ LED ࡢࢹࢥ࣮ࢻ⾲
⾲♧㻌
㻞 㐍ᩘ㻌
㻝㻢 㐍ᩘ㻌
㻜㻌
㻝㻝㻜㻜㻜㻜㻜㻜㻌
㻜㼤㻯㻜㻌
㻝㻌
㻝㻝㻝㻝㻝㻜㻜㻝㻌
㻜㼤㻲㻥㻌
㻞㻌
㻝㻜㻝㻜㻜㻝㻜㻜㻌
㻜㼤㻭㻠㻌
㻟㻌
㻝㻜㻝㻝㻜㻜㻜㻜㻌
㻜㼤㻮㻜㻌
㻠㻌
㻝㻜㻜㻝㻝㻜㻜㻝㻌
㻜㼤㻥㻥㻌
㻡㻌
㻝㻜㻜㻝㻜㻜㻝㻜㻌
㻜㼤㻥㻞㻌
㻢㻌
㻝㻜㻜㻜㻜㻜㻝㻜㻌
㻜㼤㻤㻞㻌
㻣㻌
㻝㻝㻝㻝㻝㻜㻜㻜㻌
㻜㼤㻲㻤㻌
㻤㻌
㻝㻜㻜㻜㻜㻜㻜㻜㻌
㻜㼤㻤㻜㻌
㻥㻌
㻝㻜㻜㻝㻜㻜㻜㻜㻌
㻜㼤㻥㻜㻌
ᅗ 2: 7 ࢭࢢ࣓ࣥࢺ LED ࡢ➃Ꮚ㓄⨨࡜ෆ㒊ᅇ㊰ᵓᡂᅗ
࣭ ࢡࣟࢵࢡ
10MHz ࡢ࿘Ἴᩘࡀධຊࡉࢀ࡚࠸ࡲࡍࠋFPGA ෆ㒊ࡢ DCM ࡛࿘Ἴᩘࢆኚ᭦ࡍࡿࡇ࡜ࡀ࡛ࡁࡲࡍࠋ
࣭ ࣜࢭࢵࢺ
㈇ㄽ⌮ධຊ࡛ࡍࠋࣜࢭࢵࢺ➃Ꮚࡣࠊ㟁ᅽ㝆ୗ࡟ᛂࡌ࡚⮬ືⓗ࡟ࣜࢭࢵࢺࡀ࠿࠿ࡾࡲࡍࠋ
࣭ UART
USB-ࢩࣜ࢔ࣝኚ᥮ IC ࡟ࡼࡿ௬᝿ COM ࣏࣮ࢺ࡛ࡍࠋ
࣭ እ㒊 I/O
VPort ஫᥮ࡢ࣎ࢵࢡࢫ࣊ࢵࢲࡀ 2 ಶᐇ⿦ࡉࢀ࡚࠸ࡲࡍࠋࣆࣥ๭௜ࢆ⾲ 2 ࡟ࠊࣆࣥ࢔ࢧ࢖ࣥࢆ⾲ 3
࡟♧ࡋࡲࡍࠋ
⾲ 2: VPort ࡢࣆࣥ๭௜
䝢䞁␒ྕ㻌
㻝䡚㻤㻌
⏝㏵㻌
ỗ⏝ 㻵㻛㻻㻌
㻥㻌
㻳㻺㻰㻌
㻝㻜㻌
㼂㼏㼏㻌
ᅗ 3: VPort ஫᥮࣎ࢵࢡࢫ࣊ࢵࢲࡢࣆࣥ࢔ࢧ࢖ࣥ
3. ᅇ㊰ᅗ
ḟ࣮࣌ࢪ௨㝆࡟♧ࡋࡲࡍࠋ
5
AZPR EvBoard ྲྀᢅㄝ᫂᭩
6
AZPR EvBoard ྲྀᢅㄝ᫂᭩
7
AZPR EvBoard ྲྀᢅㄝ᫂᭩
8
AZPR EvBoard ྲྀᢅㄝ᫂᭩
9
AZPR EvBoard ྲྀᢅㄝ᫂᭩
10
AZPR EvBoard ྲྀᢅㄝ᫂᭩
4. ไ⣙ࣇ࢓࢖ࣝ
ไ⣙ࣇ࢓࢖ࣝࡢసᡂ᫬࡟ᚲせ࡞ FPGA ࡢ᥋⥆᝟ሗࢆ⾲ 3 ࡟♧ࡋࡲࡍࠋไ⣙࡟㛵ࡍࡿヲ⣽ࡣࠊࢨ࢖ࣜ
ࣥࢡࢫ♫ࡢࠕไ⣙࢞࢖ࢻࠖKWWSMDSDQ[LOLQ[FRPVXSSRUWGRFXPHQWDWLRQGWBLVHKWPࢆཧ↷ࡋ࡚
ࡃࡔࡉ࠸ࠋ
⾲ 3: FPGA ࡢ᥋⥆᝟ሗ
㒊ရྡ㻌
㼏㼘㼛㼏㼗㻌
㼞㼑㼟㼑㼠㻌
㼘㼑㼐㼋㻝㻌
㼘㼑㼐㼋㻞㻌
㼜㼡㼟㼔㼋㼟㼣㼋㻝㻌
㼜㼡㼟㼔㼋㼟㼣㼋㻞㻌
㼜㼡㼟㼔㼋㼟㼣㼋㻟㻌
㼜㼡㼟㼔㼋㼟㼣㼋㻠㻌
㼟㼑㼓㼋㻝㼋㼍㻌
㼟㼑㼓㼋㻝㼋㼎㻌
㼟㼑㼓㼋㻝㼋㼏㻌
㼟㼑㼓㼋㻝㼋㼐㻌
㼟㼑㼓㼋㻝㼋㼑㻌
㼟㼑㼓㼋㻝㼋㼒㻌
㼟㼑㼓㼋㻝㼋㼓㻌
㼟㼑㼓㼋㻝㼋㼐㼜㻌
㼟㼑㼓㼋㻞㼋㼍㻌
㼟㼑㼓㼋㻞㼋㼎㻌
㼟㼑㼓㼋㻞㼋㼏㻌
㼟㼑㼓㼋㻞㼋㼐㻌
㼟㼑㼓㼋㻞㼋㼑㻌
㼟㼑㼓㼋㻞㼋㼒㻌
㼟㼑㼓㼋㻞㼋㼓㻌
㼟㼑㼓㼋㻞㼋㼐㼜㻌
㼢㼜㼛㼞㼠㼋㻝㼋㻝㻌
㼢㼜㼛㼞㼠㼋㻝㼋㻞㻌
㼢㼜㼛㼞㼠㼋㻝㼋㻟㻌
㼢㼜㼛㼞㼠㼋㻝㼋㻠㻌
㼢㼜㼛㼞㼠㼋㻝㼋㻡㻌
㼢㼜㼛㼞㼠㼋㻝㼋㻢㻌
㼢㼜㼛㼞㼠㼋㻝㼋㻣㻌
㼢㼜㼛㼞㼠㼋㻝㼋㻤㻌
㼢㼜㼛㼞㼠㼋㻞㼋㻝㻌
㼢㼜㼛㼞㼠㼋㻞㼋㻞㻌
㼢㼜㼛㼞㼠㼋㻞㼋㻟㻌
㼢㼜㼛㼞㼠㼋㻞㼋㻠㻌
㼢㼜㼛㼞㼠㼋㻞㼋㻡㻌
㼢㼜㼛㼞㼠㼋㻞㼋㻢㻌
㼢㼜㼛㼞㼠㼋㻞㼋㻣㻌
㼢㼜㼛㼞㼠㼋㻞㼋㻤㻌
䝢䞁㻌
㻼㻤㻟㻌
㻼㻤㻡㻌
㻼㻡㻠㻌
㻼㻡㻟㻌
㻼㻞㻞㻌
㻼㻞㻟㻌
㻼㻞㻠㻌
㻼㻞㻢㻌
㻼㻥㻝㻌
㻼㻥㻞㻌
㻼㻝㻞㻌
㻼㻝㻡㻌
㻼㻝㻢㻌
㻼㻥㻜㻌
㻼㻤㻢㻌
㻼㻝㻝㻌
㻼㻟㻌
㻼㻞㻌
㻼㻡㻌
㻼㻥㻌
㻼㻝㻜㻌
㻼㻥㻡㻌
㻼㻥㻠㻌
㻼㻠㻌
㻼㻢㻜㻌
㻼㻢㻝㻌
㻼㻢㻞㻌
㻼㻢㻟㻌
㻼㻢㻡㻌
㻼㻢㻢㻌
㻼㻢㻣㻌
㻼㻢㻤㻌
㻼㻟㻟㻌
㻼㻟㻠㻌
㻼㻟㻡㻌
㻼㻟㻢㻌
㻼㻠㻜㻌
㻼㻠㻝㻌
㻼㻡㻣㻌
㻼㻡㻤㻌
㼄㻯㻟㻿㻡㻜㻜㻱㼋㻼㻵㻺㻌
㻵㻻㼋㻸㻜㻞㻼㼋㻜㻛㻳㻯㻸㻷㻠㻌
㻵㻻㼋㻸㻜㻟㻼㼋㻜㻛㻳㻯㻸㻷㻢㻌
㻵㻻㼋㻸㻜㻝㻺㼋㻝㻌
㻵㻻㼋㻸㻜㻝㻼㼋㻝㻌
㻵㻻㼋㻸㻜㻣㻼㼋㻟㻌
㻵㻻㼋㻸㻜㻣㻺㼋㻟㻌
㻵㻻㼋㻸㻜㻝㻼㼋㻞㻛㻯㻿㻻㼋㻮㻌
㻵㻻㼋㻸㻜㻞㻼㼋㻞㻛㻰㻻㼁㼀㻛㻮㼁㻿㼅㻌
㻵㻻㼋㻸㻜㻡㻺㼋㻜㻛㻳㻯㻸㻷㻝㻝㻌
㻵㻻㻌
㻵㻻㼋㻸㻜㻠㻺㼋㻟㻛㻸㻴㻯㻸㻷㻟㻛㻵㻾㻰㼅㻞㻌
㻵㻻㼋㻸㻜㻡㻼㼋㻟㻛㻸㻴㻯㻸㻷㻠㻛㼀㻾㻰㼅㻞㻌
㻵㻻㼋㻸㻜㻡㻺㼋㻟㻛㻸㻴㻯㻸㻷㻡㻌
㻵㻻㼋㻸㻜㻡㻼㼋㻜㻛㻳㻯㻸㻷㻝㻜㻌
㻵㻻㼋㻸㻜㻟㻺㼋㻜㻛㻳㻯㻸㻷㻣㻌
㻵㻻㼋㻸㻜㻠㻼㼋㻟㻛㻸㻴㻯㻸㻷㻞㻌
㻵㻻㼋㻸㻜㻝㻺㼋㻟㻌
㻵㻻㼋㻸㻜㻝㻼㼋㻟㻌
㻵㻻㼋㻸㻜㻞㻺㼋㻟㻛㼂㻾㻱㻲㼋㻟㻌
㻵㻻㼋㻸㻜㻟㻼㼋㻟㻛㻸㻴㻯㻸㻷㻜㻌
㻵㻻㼋㻸㻜㻟㻺㼋㻟㻛㻸㻴㻯㻸㻷㻝㻌
㻵㻻㼋㻸㻜㻢㻺㼋㻜㻛㼂㻾㻱㻲㼋㻜㻌
㻵㻻㼋㻸㻜㻢㻼㼋㻜㻌
㻵㻻㼋㻸㻜㻞㻺㼋㻟㻛㼂㻾㻱㻲㼋㻟㻌
㻵㻻㼋㻸㻜㻟㻼㼋㻝㻛㻾㻴㻯㻸㻷㻜㻌
㻵㻻㼋㻸㻜㻟㻺㼋㻝㻛㻾㻴㻯㻸㻷㻝㻌
㻵㻻㼋㻸㻜㻠㻼㼋㻝㻛㻾㻴㻯㻸㻷㻞㻌
㻵㻻㼋㻸㻜㻠㻺㼋㻝㻛㻾㻴㻯㻸㻷㻟㻛㼀㻾㻰㼅㻝㻌
㻵㻻㼋㻸㻜㻡㻼㼋㻝㻛㻾㻴㻯㻸㻷㻠㻛㻵㻾㻰㼅㻝㻌
㻵㻻㼋㻸㻜㻡㻺㼋㻝㻛㻾㻴㻯㻸㻷㻡㻌
㻵㻻㼋㻸㻜㻢㻼㼋㻝㻛㻾㻴㻯㻸㻷㻢㻌
㻵㻻㼋㻸㻜㻢㻺㼋㻝㻛㻾㻴㻯㻸㻷㻣㻌
㻵㻻㼋㻸㻜㻟㻺㼋㻞㻛㻰㻢㻛㻳㻯㻸㻷㻝㻟㻌
㻵㻻㻛㻰㻡㻌
㻵㻻㼋㻸㻜㻠㻼㼋㻞㻛㻰㻠㻛㻳㻯㻸㻷㻝㻠㻌
㻵㻻㼋㻸㻜㻠㻺㼋㻞㻛㻰㻟㻛㻳㻯㻸㻷㻝㻡㻌
㻵㻻㼋㻸㻜㻢㻼㼋㻞㻛㻰㻞㻛㻳㻯㻸㻷㻞㻌
㻵㻻㼋㻸㻜㻢㻺㼋㻞㻛㻰㻝㻛㻳㻯㻸㻷㻟㻌
㻵㻻㼋㻸㻜㻞㻼㼋㻝㻌
㻵㻻㼋㻸㻜㻞㻺㼋㻝㻌
㼀㼅㻼㻱㻌
㻳㻯㻸㻷㻌
㻳㻯㻸㻷㻌
㻵㻛㻻㻌
㻵㻛㻻㻌
㻵㻛㻻㻌
㻵㻛㻻㻌
㻰㼁㻭㻸㻌
㻰㼁㻭㻸㻌
㻳㻯㻸㻷㻌
㻵㻛㻻㻌
㻳㻯㻸㻷㻌
㻳㻯㻸㻷㻌
㻳㻯㻸㻷㻌
㻳㻯㻸㻷㻌
㻳㻯㻸㻷㻌
㻳㻯㻸㻷㻌
㻵㻛㻻㻌
㻵㻛㻻㻌
㼂㻾㻱㻲㻌
㻳㻯㻸㻷㻌
㻳㻯㻸㻷㻌
㼂㻾㻱㻲㻌
㻵㻛㻻㻌
㼂㻾㻱㻲㻌
㻰㼁㻭㻸㻌
㻰㼁㻭㻸㻌
㻰㼁㻭㻸㻌
㻰㼁㻭㻸㻌
㻰㼁㻭㻸㻌
㻰㼁㻭㻸㻌
㻰㼁㻭㻸㻌
㻰㼁㻭㻸㻌
㻰㼁㻭㻸㻛㻳㻯㻸㻷㻌
㻰㼁㻭㻸㻌
㻰㼁㻭㻸㻛㻳㻯㻸㻷㻌
㻰㼁㻭㻸㻛㻳㻯㻸㻷㻌
㻰㼁㻭㻸㻛㻳㻯㻸㻷㻌
㻰㼁㻭㻸㻛㻳㻯㻸㻷㻌
㻵㻛㻻㻌
㻵㻛㻻㻌
11
XFI ࣇ࢓࢖ࣝ౛
1(7FORFN/2& 3
1(7UHVHW/2& 3
1(7OHGB/2& 3
1(7OHGB/2& 3
1(7SXVKBVZB/2& 3
1(7SXVKBVZB/2& 3
1(7SXVKBVZB/2& 3
1(7SXVKBVZB/2& 3
1(7VHJBBD/2& 3
1(7VHJBBE/2& 3
1(7VHJBBF/2& 3
1(7VHJBBG/2& 3
1(7VHJBBH/2& 3
1(7VHJBBI/2& 3
1(7VHJBBJ/2& 3
1(7VHJBBGS/2& 3
1(7VHJBBD/2& 3
1(7VHJBBE/2& 3
1(7VHJBBF/2& 3
1(7VHJBBG/2& 3
1(7VHJBBH/2& 3
1(7VHJBBI/2& 3
1(7VHJBBJ/2& 3
1(7VHJBBGS/2& 3
1(7YSRUWBB/2& 3
1(7YSRUWBB/2& 3
1(7YSRUWBB/2& 3
1(7YSRUWBB/2& 3
1(7YSRUWBB/2& 3
1(7YSRUWBB/2& 3
1(7YSRUWBB/2& 3
1(7YSRUWBB/2& 3
1(7YSRUWBB/2& 3
1(7YSRUWBB/2& 3
1(7YSRUWBB/2& 3
1(7YSRUWBB/2& 3
1(7YSRUWBB/2& 3
1(7YSRUWBB/2& 3
1(7YSRUWBB/2& 3
1(7YSRUWBB/2& 3
AZPR EvBoard ྲྀᢅㄝ᫂᭩
5. FPGA ࡢࢥࣥࣇ࢕ࢠ࣮ࣗࣞࢩࣙࣥ᪉ἲ
AZPR EvBoard ࡛ࡣࠊ3 ✀㢮ࡢࢥࣥࣇ࢕ࢠ࣮ࣗࣞࢩࣙࣥ᪉ἲࢆࢧ࣏࣮ࢺࡋ࡚࠸ࡲࡍࠋ࡞࠾ࠊᮏྲྀᢅㄝ
᫂᭩ࡣࢥࣥࣇ࢕ࢠ࣮ࣗࣞࢩࣙࣥ᝟ሗࢆ᱁⣡ࡋࡓࣇ࢓࢖ࣝ(BIT ࣇ࢓࢖ࣝࡸ MCS ࣇ࢓࢖ࣝ)ࡀ‽ഛࡋ࡚࠶
ࡿ࡜࠸࠺๓ᥦ࡛᭩࠿ࢀ࡚࠸ࡲࡍࠋࢨ࢖ࣜࣥࢡࢫ♫ࡢࢶ࣮ࣝࡢᇶᮏⓗ࡞౑࠸᪉ࡣࠊࢨ࢖ࣜࣥࢡࢫ♫ࡢ࣮࣍
࣒࣮࣌ࢪ࡞࡝ࢆཧ↷ࡋ࡚ࡃࡔࡉ࠸ࠋ
5.1.
UrJTAG ࢆ฼⏝ࡋࡓࢥࣥࣇ࢕ࢠ࣮ࣗࣞࢩࣙࣥ
UrJTAG ࢆ฼⏝ࡋࡓࢥࣥࣇ࢕ࢠ࣮ࣗࣞࢩࣙࣥࡢὶࢀࢆᅗ 4 ࡟♧ࡋࡲࡍࠋ
ᅗ 4: UrJTAG ࢆ฼⏝ࡋࡓࢥࣥࣇ࢕ࢠ࣮ࣗࣞࢩࣙࣥࡢὶࢀ
5.1.1. SVF ࣇ࢓࢖ࣝࡢ⏕ᡂ
SVF ࡣ Serial Vector Format ࡢ␎࡛ࠊJTAG ᧯సࢆグ㏙ࡋࡓࣇ࢓࢖࡛ࣝࡍࠋࢥࣥࣇ࢕ࢠ࣮ࣗࣞࢩࣙࣥ
ࢹ࣮ࢱࢆ SVF ᙧᘧ࡛ࣇ࢓࢖ࣝ࡟ฟຊࡋࠊUrJtag ࡜࠸࠺ࢶ࣮࡛ࣝ౑⏝ࡋࡲࡍࠋUrJtag ࡛ SVF ࣇ࢓࢖ࣝ
ࢆ෌⏕ࡍࡿࡇ࡜࡛ࠊࢹࣂ࢖ࢫ࡟ᑐࡋ࡚ JTAG ᧯సࢆ⾜࠸ࡲࡍࠋࢥࣥࣇ࢕ࢠ࣮ࣗࣞࢩࣙࣥ᝟ሗࢆ᱁⣡ࡋࡓ
ࣇ࢓࢖ࣝ(BIT ࣇ࢓࢖ࣝࡸ MCS ࣇ࢓࢖ࣝ)ࡀ‽ഛࡋ࡚࠶ࡿ࡜࠸࠺๓ᥦ࡛ࠊࡇࡇ࡛ࡣ SVF ࣇ࢓࢖ࣝసᡂࡢ
ᡭ㡰ࢆㄝ᫂ࡋࡲࡍࠋ
12
AZPR EvBoard ྲྀᢅㄝ᫂᭩
ࡲࡎࠊiMPACT ࢆ㉳ືࡋࡲࡍࠋᅗ 5 ࡟ࠕISE iMPACT Projectࠖ࢘࢕ࣥࢻ࢘ࢆ♧ࡋࡲࡍࠋ
ᅗ 5: iMPACT ㉳ື᫬ࡢ⏬㠃
ࠕISE iMPACTࠖ࢘࢕ࣥࢻ࢘ࡢᕥୖࡢ㡿ᇦ࠿ࡽࠕBoundary Scanࠖࢆࢲࣈࣝࢡࣜࢵࢡࡋࡲࡍࠋ
ᅗ 6: Boundary Scan ࡀ⾲♧ࡉࢀ࡚࠸ࡿ㡿ᇦ
13
AZPR EvBoard ྲྀᢅㄝ᫂᭩
Boundary Scan ᐇ⾜ᚋࡢ⏬㠃ࢆᅗ 7 ࡟♧ࡋࡲࡍࠋ
ᅗ 7: Boundary Scan ᚋࡢ⏬㠃
ࠕRight click to Add Device or Initialize JTAG chainࠖ࡜⾲♧ࡉࢀࡓ㡿ᇦࢆྑࢡࣜࢵࢡࡋࠊᅗ 8 ࡟♧
ࡍࡼ࠺࡟ [Output File Type]Ѝ[SVF File]Ѝ[Create SVF File]ࢆ㑅ᢥࡋࠊSVF ࣇ࢓࢖ࣝసᡂࢆ㛤ጞࡋࡲ
ࡍࠋ
ᅗ 8: Create SVF File ࡢ㑅ᢥ
ࠕAdd Deviceࠖࢲ࢖࢔ࣟࢢ࡛᭩ࡁࡇࡴࣇ࢓࢖ࣝࢆ㑅ᢥࡋࡲࡍࠋࡇࡇ࡛ BIT ࣇ࢓࢖ࣝࢆ㑅ᢥࡍࡿሙྜ
࡜ MCS ࣇ࢓࢖ࣝࢆ㑅ᢥࡍࡿሙྜ࡛ᡭ㡰ࡀูࢀࡲࡍࠋBIT ࣇ࢓࢖ࣝࢆ㑅ᢥࡍࡿ࡜ࠊᅗ 9 ࡢࡼ࠺࡟
ࠕxc3s500eࠖࡀ㏣ຍࡉࢀࡲࡍࠋ
14
AZPR EvBoard ྲྀᢅㄝ᫂᭩
ᅗ 9: BIT ࣇ࢓࢖ࣝ㏣ຍᚋࡢ⏬㠃
ᅗ 10 ࡢࡼ࠺࡟ࠕSelect Device Part Nameࠖࢲ࢖࢔ࣟࢢࡀ⾲♧ࡉࢀࡲ
MCS ࣇ࢓࢖ࣝࢆ㑅ᢥࡍࡿ࡜ࠊᅗ
ࡍࠋࡇࡇ࡛ࠊPROM ࢹࣂ࢖ࢫ࡜ࡋ࡚ࠊࠕxcf04sࠖࢆ㑅ᢥࡋࡲࡍࠋ[OK]࣎ࢱࣥࢆࢡࣜࢵࢡࡍࡿ࡜ࠊᅗ 11
ࡢࡼ࠺࡟ࠕxcf04sࠖࡀ㏣ຍࡉࢀࡲࡍࠋ
ᅗ 10: Select Device Part Name
ᅗ 11: MCS ࣇ࢓࢖ࣝ㏣ຍᚋࡢ⏬㠃
15
AZPR EvBoard ྲྀᢅㄝ᫂᭩
᭩ࡁ㎸ࡴࣇ࢓࢖ࣝࢆ㑅ᢥࡋࡓᚋࠊ㏣ຍࡉࢀࡓࢹࣂ࢖ࢫୖ࡛ྑࢡࣜࢵࢡࡋࠊ
ࠕProgramࠖࢆ㑅ᢥࡋࡲࡍࠋ
ᅗ 12 ࡛♧ࡍࠕDevice Programming Propertiesࠖࢲ࢖࢔ࣟࢢࡀ㛤ࡃࡢ࡛ࠊࡑࡢࡲࡲ[OK]࣎ࢱࣥࢆᢲࡋ
ࡲࡍࠋ
ᅗ 12: Device Programming Properties
᭱ᚋ࡟ࠊᅗ 13 ࡢࡼ࠺࡟ࠕProgram Succeededࠖ࡜⾲♧ࡉࢀࡓࡢࢆ☜ㄆᚋࠊ࣓ࢽ࣮ࣗࣂ࣮࠿ࡽ[Output]
Ѝ[SVF File]Ѝ[Stop Writing to File]ࢆ㑅ᢥࡋࠊSVF ࣇ࢓࢖ࣝࡢసᡂࢆ⤊஢ࡋࡲࡍࠋ
ᅗ 13: SVF ࣇ࢓࢖ࣝసᡂ᏶஢
௨ୖࡢᡭ㡰࡛ SVF ࣇ࢓࢖ࣝࡀ⏕ᡂࡉࢀࡲࡍࠋ
16
AZPR EvBoard ྲྀᢅㄝ᫂᭩
5.1.2. UrJTAG ࡢᐇ⾜
࣭ ‽ഛ
UrJTAG ࡜ FT2232 ࢻࣛ࢖ࣂ࡜ libusb-win32 ࡀᚲせ࡟࡞ࡾࡲࡍࠋࡇࡇ࡛ࡣࠊࡑࢀࡒࢀࡢ࢖ࣥࢫࢺ࣮
ࣝ࡟ࡘ࠸࡚ㄝ᫂ࡋࡲࡍࠋ
¾
UrJTAG
UrJTAG ࡣ௨ୗࡢ࣮࣌ࢪ࠿ࡽ࢖ࣥࢫࢺ࣮ࣛࢆࢲ࣮ࣥࣟࢻࡋ࡚ࡃࡔࡉ࠸ࠋ࢖ࣥࢫࢺ࣮ࣛࢆᐇ⾜ࡍࡿ
㝿ࡣࠊ࢖ࣥࢫࢺ࣮ࣛࢆྑࢡࣜࢵࢡࡋࠕ⟶⌮⪅࡜ࡋ࡚ᐇ⾜ࠖࢆ㑅ᢥࡋ࡚ࠊ࢖ࣥࢫࢺ࣮ࣝࡋ࡚ࡃࡔࡉ࠸ࠋ
KWWSXUMWDJRUJ
¾
FT2232 ࢻࣛ࢖ࣂ
Windows 7 ࡛ࡣࠊFT2232 ࢆ᥋⥆ࡍࡿ࡜ FT2232 ࢻࣛ࢖ࣂࡣ⮬ື࡛࢖ࣥࢫࢺ࣮ࣝࡉࢀࡲࡍࠋUSB
ࢣ࣮ࣈ࡛ࣝ PC ࡜ AZPR EvBoard ࢆ᥋⥆ࡋࠊ㟁※ࢆ ON ࡟ࡍࡿ࡜ FT2232 ࢻࣛ࢖ࣂࡢ࢖ࣥࢫࢺ࣮ࣝࡀ
ጞࡲࡾࡲࡍࠋ
¾
libusb-win32
libusb-win32 ࡣ௨ୗࡢ࣮࣌ࢪ࠿ࡽࢲ࣮࢘ࣥࣟࢻࡋ࡚ࡃࡔࡉ࠸ࠋ
KWWSVRXUFHIRUJHQHWDSSVWUDFOLEXVEZLQZLNL
PC ࡜ AZPR EvBoard ࢆ᥋⥆ࡋࡓࡲࡲࠊࢲ࣮࢘ࣥࣟࢻࡋࡓࣇ࢓࢖ࣝࢆゎ෾ࡋࠊ
ࠕbinࠖࣇ࢛ࣝࢲෆ
ࡢࠕinf-wizard.exeࠖࢆᐇ⾜ࡋࡲࡍࠋᅗ 14 ࡛♧ࡍࠕlibusb-win32 Inf-Wizardࠖࢲ࢖࢔ࣟࢢࡀ⾲♧ࡉࢀ
ࡲࡍࠋ
ᅗ 14: libusb-win32 Inf-Wizard (1/3)
17
AZPR EvBoard ྲྀᢅㄝ᫂᭩
[Next]࣎ࢱࣥࢆࢡࣜࢵࢡࡍࡿ࡜ࠊᅗ 15 ࡛♧ࡍ⏬㠃ࡀ⾲♧ࡉࢀࡲࡍࠋ
ᅗ 15: libusb-win32 Inf-Wizard (2/3)
ࡇࡇ࡛ࠊ࡝ࢀ࠿୍ࡘࢹࣂ࢖ࢫࢆ㑅ᢥࡋࠊ[Next]࣎ࢱࣥࢆᢲࡋࡲࡍࠋᅗ 15 ࡛ࡣࠊࠕDescriptionࠖ
ࡀࠕDual RS232 (Interface 1)ࠖࡢࢹࣂ࢖ࢫࢆ㑅ᢥࡋ࡚࠸ࡲࡍࠋࢲ࢖࢔ࣟࢢࢆ㐍ࡵࡿ࡜ࠊᅗ 16 ࡛♧ࡍ⏬
㠃ࡀ⾲♧ࡉࢀࡲࡍࠋ
ᅗ 16: libusb-win32 Inf-Wizard (3/3)
ࡇࡇ࡛[Install Now]࣎ࢱࣥࢆᢲࡋࠊࢻࣛ࢖ࣂࢆ࢖ࣥࢫࢺ࣮ࣝࡋࡲࡍࠋ
࣭ タᐃ
UrJTAG ࡢ࢖ࣥࢫࢺ࣮ࣝࢹ࢕ࣞࢡࢺࣜ(C:¥Program Files (x86)¥UrJTAG¥data¥xilinx)࡟௨ୗࡢࣇ
࢓࢖ࣝࢆୖ᭩ࡁࡋ࡚㓄⨨ࡋࡲࡍࠋࣇ࢓࢖ࣝࡣࢧ࣏࣮ࢺ࣮࣌ࢪ࠿ࡽࢲ࣮࢘ࣥࣟࢻࡋ࡚ࡃࡔࡉ࠸ࠋ
&?3URJUDP)LOHV[?8U-7$*?GDWD?[LOLQ[
3$576
[FVH
[FIV
18
AZPR EvBoard ྲྀᢅㄝ᫂᭩
࣭ FPGA ࡢㄆ㆑
JTAG Shell ࢆ㉳ືࡋࠊ௨ୗࡢࢥ࣐ࣥࢻࢆධຊࡋࡲࡍࠋ
MWDJ!FDEOHMWDJNH\
MWDJ!GHWHFW
JTAG Shell ࡟௨ୗࡢࡼ࠺࡟⾲♧ࡉࢀࢀࡤࠊFPGA ࡀㄆ㆑ࡉࢀ࡚࠸ࡲࡍࠋ
MWDJ!GHWHFW
,5OHQJWK
&KDLQOHQJWK
'HYLFH,G[&
0DQXIDFWXUHU;LOLQ[
3DUW[FVH
6WHSSLQJ
)LOHQDPHF?SURJUDPILOHV[?XUMWDJ?GDWD[LOLQ[[FVH[FVH
'HYLFH,G['
0DQXIDFWXUHU;LOLQ[
3DUW[FIV
6WHSSLQJ
)LOHQDPHF?SURJUDPILOHV[?XUMWDJ?GDWD[LOLQ[[FIV[FIV
࣭ ࢥࣥࣇ࢕ࢠ࣮ࣗࣞࢩࣙࣥ
FPGA ࡢㄆ㆑࡛⾲♧ࡉࢀࡓࡼ࠺࡟ࠊxc3s500e ࡀ part 0ࠊxcf04s ࡀ part 1 ࡟࡞ࡾࡲࡍࠋ
BIT ࣇ࢓࢖ࣝࢆ㑅ᢥࡋ࡚ SVF ࣇ࢓࢖ࣝࢆసᡂࡋࡓ࡜ࡁࡣࠊ௨ୗࡢࢥ࣐ࣥࢻࢆᐇ⾜ࡋ࡚ࠊxc3s500e ࢆ
㑅ᢥࡋࡲࡍࠋ
MWDJ!SDUW
MCS ࣇ࢓࢖ࣝࢆ㑅ᢥࡋ࡚ SVF ࣇ࢓࢖ࣝࢆసᡂࡋࡓ࡜ࡁࡣࠊ௨ୗࡢࢥ࣐ࣥࢻࢆᐇ⾜ࡋ࡚ࠊxcf04s ࢆ㑅
ᢥࡋࡲࡍࠋ
MWDJ!SDUW
௨ ୗ ࡟ ࠊ xcf04s ࡢ ࢥ ࣥ ࣇ ࢕ ࢠ ࣗ ࣞ ࣮ ࢩ ࣙ ࣥ ࢆ ⾜ ࠺ ࡜ ࡁ ࡢ ࢥ ࣐ ࣥ ࢻ ࡢ ධ ຊ ౛ ࢆ ♧ ࡋ ࡲ ࡍ ࠋ
ࠕD:¥sample.svfࠖࡣࠕ5.1.1 SVF ࣇ࢓࢖ࣝࡢ⏕ᡂ࡛ࠖ⏕ᡂࡋࡓ SVF ࣇ࢓࢖ࣝࡢࣇ࢓࢖ࣝࣃࢫ࡟࡞ࡾࡲ
ࡍࠋ
MWDJ!SDUW
MWDJ!VYI'?VDPSOHVYISURJUHVV
3DUVLQJ
6FDQQHGGHYLFHRXWSXWPDWFKHGH[SHFWHG7'2YDOXHV
MWDJ!
19
AZPR EvBoard ྲྀᢅㄝ᫂᭩
5.2.
cblsrv-0.1_ft2232 ࢆ฼⏝ࡋࡓࢥࣥࣇ࢕ࢠ࣮ࣗࣞࢩࣙࣥ
cblsrv-0.1_ft2232 ࡣ fenrir Ặ࡟ࡼࡗ࡚సᡂࡉࢀࡓࢶ࣮࡛ࣝࡍࠋXilinx ♫ࡢࢲ࣮࢘ࣥࣟࢻࢶ࣮࡛ࣝ࠶ࡿ
iMPACT ࡜⤌ࡳྜࢃࡏ࡚ࠊAZPR EvBoard ࡟ᦚ㍕ࡉࢀ࡚࠸ࡿ FT2232 ࢆ⤒⏤࡛ࢥࣥࣇ࢕ࢠ࣮ࣗࣞࢩࣙ
ࣥࢆ⾜࠺ࡇ࡜ࡀ࡛ࡁࡲࡍࠋࡇࡢ᪉ἲ࡛ࡣࠊBIT ࣇ࢓࢖ࣝࡸ MCS ࣇ࢓࢖ࣝࢆ౑࠺ࡓࡵࠊSVF ࣇ࢓࢖ࣝࢆ
సࡿᚲせࡣ࠶ࡾࡲࡏࢇࠋ
ὀព㸸cblsrv-0.1_ft2232 ࡢ౑⏝࡟ࡼࡗ࡚࠸࠿࡞ࡿᦆᐖࡀ⏕ࡌ࡚ࡶ fenrir Ặཬࡧࢀࡍࡱࢇࡣ୍ษࡢ㈐௵
ࡣ㈇࠸ࡲࡏࢇࡢ࡛ࡈ஢ᢎࡃࡔࡉ࠸ࠋࡲࡓࠊcblsrv-0.1_ft2232 ࡣ ISE11 ࡲ࡛ࡋ࠿ືస☜ㄆ࡛ࡁ࡚࠸ࡲࡏ
ࢇࠋ᭱᪂∧ࡢ ISE ࡛ࡣືసࡋ࡞࠸ྍ⬟ᛶࡀ࠶ࡾࡲࡍࠋWindows 7 ࡣ ISE 12 ࠿ࡽࡢᑐᛂࡢࡓࡵࠊࡇࡇ࡛
ࡣ Windows XP(32bit ∧)࡛ࡢᡭ㡰ࢆ♧ࡋࡲࡍࠋ
࣭ ‽ഛ
cblsrv-0.1_ft2232 ࡜ Microsoft Visual C++ 2008 ෌㡺ᕸྍ⬟ࣃࢵࢣ࣮ࢪ(x86)࡜ FT2232 ࡢࢻࣛ࢖ࣂࡀ
ᚲせ࡟࡞ࡾࡲࡍࠋ
¾
cblsrv-0.1_ft2232
cblsrv-0.1_ft2232 ࡣ fenrir Ặࡢ࣮࣒࣮࣍࣌ࢪ࠿ࡽࢲ࣮ࣥࣟࢻ࡛ࡁࡲࡍࠋ
KWWSIHQULUQDUXRNDRUJDUFKLYHVKWPO
ࣂࢢࡢಟṇࡀ⾜ࢃࢀ࡚࠸ࡿࡢ࡛ࠊ࡞ࡿ࡭ࡃ᭱᪂ࡢࣂ࣮ࢪࣙࣥࢆ౑ࡗ࡚ࡃࡔࡉ࠸ࠋ(ᇳ➹᫬Ⅼ࡛ࡣ
cblsrv-0.1_ft2232_r4804.zip ࡀ᭱᪂ࡢࣂ࣮ࢪ࡛ࣙࣥࡍࠋ)ࢲ࣮࢘ࣥࣟࢻࡋࡓࣇ࢓࢖ࣝࢆゎ෾ࡋࡲࡍࠋ௨㝆
ࡣࠊゎ෾ඛࡢࣇ࢛ࣝࢲࢆࠕC:¥AZPR¥cblsrv-0.1_ft2232_r4804ࠖ࡜ࡋ࡚ㄝ᫂ࡋࡲࡍࠋ
¾
Microsoft Visual C++ 2008 ෌㡺ᕸྍ⬟ࣃࢵࢣ࣮ࢪ(x86)
௨ୗࡢ࣮࣌ࢪ࠿ࡽ Microsoft Visual C++ 2008 ෌㡺ᕸྍ⬟ࣃࢵࢣ࣮ࢪ(x86)ࢆࢲ࣮࢘ࣥࣟࢻࡋ࡚࢖
ࣥࢫࢺ࣮ࣝࡋ࡚ࡃࡔࡉ࠸ࠋ
KWWSZZZPLFURVRIWFRPGRZQORDGVGHWDLOVDVS["IDPLO\LG %'$($'%)%
&%)GLVSOD\ODQJ MD
¾
FT2232 ࢻࣛ࢖ࣂ
Windows 7 ࡟᥋⥆ࡋࡓሙྜࠊ⮬ືⓗ࡟ࢻࣛ࢖ࣂࡀ࢖ࣥࢫࢺ࣮ࣝࡉࢀࡲࡍࡀࠊWindows XP ࡛ࡣ௨
ୗࡢ࣮࣌ࢪ࠿ࡽ FT2232 ࢻࣛ࢖ࣂࢆࢲ࣮࢘ࣥࣟࢻࡋ࡚ࡃࡔࡉ࠸ࠋVirtual COM Port Driver ࡜࠸࠺ྡ๓
࡛බ㛤ࡉࢀ࡚࠸ࡲࡍࠋ
KWWSZZZIWGLFKLSFRP
ࢲ࣮࢘ࣥࣟࢻࡋࡓࣇ࢓࢖ࣝࢆゎ෾ࡋࠊUSB ࢣ࣮ࣈ࡛ࣝ PC ࡜ AZPR EvBoard ࢆ᥋⥆ࡋ࡚ࡃࡔࡉ
࠸ࠋ㟁※ࢆ ON ࡟ࡍࡿ࡜᪂ࡋ࠸ࣁ࣮ࢻ࢙࢘࢔ࡢ᳨ฟ࢘࢕ࢨ࣮ࢻࡀ⾲♧ࡉࢀࡿࡢ࡛ࠊඛ࡯࡝ゎ෾ࡋࡓࣇ࢛
ࣝࢲ࠿ࡽࠕi386ࠖࣇ࢛ࣝࢲࢆᣦᐃࡋ࡚ࠊࢻࣛ࢖ࣂࢆ࢖ࣥࢫࢺ࣮ࣝࡋ࡚ࡃࡔࡉ࠸ࠋ
20
AZPR EvBoard ྲྀᢅㄝ᫂᭩
࣭ ࢥࣥࣇ࢕ࢠ࣮ࣗࣞࢩࣙࣥ᪉ἲ
ࡇࡇ࡛ࡣࠊMCS ࣇ࢓࢖ࣝࢆ౑ࡗ࡚ xcf04s ࢆࢥࣥࣇ࢕ࢠ࣮ࣗࣞࢩࣙࣥࡍࡿ᪉ἲࢆ⤂௓ࡋࡲࡍࠋBIT ࣇ
࢓࢖ࣝࢆ౑ࡗ࡚ xc3s500e ࢆࢥࣥࣇ࢕ࢠ࣮ࣗࣞࢩࣙࣥࡶྠࡌ᪉ἲ࡛⾜࠼ࡿࡢ࡛ࠊ㐺ᐅㄞࡳ᭰࠼࡚ࡃࡔࡉ
࠸ࠋ
ࡲࡎࠊAZPR EvBoard ࡜ࣃࢯࢥࣥࢆ USB ࢣ࣮ࣈ࡛ࣝ᥋⥆ࡋࠊ㟁※ࢫ࢖ࢵࢳࢆ ON ࡟ࡋࡲࡍࠋḟ࡟ࠊ
ࢥ ࣐ ࣥ ࢻ ࣉ ࣟ ࣥ ࣉ ࢺ ࢆ ㉳ ື ࡋ ࠊ cblsrv-0.1_ft2232 ࡢ ᐇ ⾜ ࣇ ࢓ ࢖ ࣝ ࠕ cblsrv.exe ࠖ ࡀ
ࠕC:¥AZPR¥cblsrv-0.1_ft2232_r4804¥build¥win32¥Releaseࠖ࡬⛣ືࡋࠊ௨ୗࡢࡼ࠺࡟ࢥ࣐ࣥࢻࢆධ
ຊࡋࡲࡍࠋ(ͤࠕWindows ࢭ࢟ࣗࣜࢸ࢕ࡢ㔜せ࡞㆙࿌ࠖࡀ⾲♧ࡉࢀࡓሙྜࡣࠊ
ࠕࣈࣟࢵࢡࢆゎ㝖ࡍࡿࠖ࣎
ࢱࣥࢆᢲࡋ࡚ࡃࡔࡉ࠸ࠋ)
&?$=35?FEOVUYBIWBU?EXLOG?ZLQ?5HOHDVH!FEOVUYH[H̽FDPRQWHF̽S
iMPACT ࢆ㉳ືࡋࡲࡍࠋ(ᅗ 17)
ᅗ 17: iMPACT ࡢ⏬㠃
࢘࢕ࣥࢻ࢘ᕥୖࡢ㡿ᇦ࠿ࡽࠕBoundary Scanࠖࢆࢲࣈࣝࢡࣜࢵࢡࡋࠊྑࡢࣇ࣮࣒ࣞෆ࡟ࠕRight click
to Add Device or Initialize JTAG chainࠖ࡜࠸࠺ᩥᏐࢆ⾲♧ࡉࡏࡲࡍࠋ
21
AZPR EvBoard ྲྀᢅㄝ᫂᭩
ࡑࡢᚋࠊ࣓ࢽ࣮ࣗ࠿ࡽ[Output]Ѝ[Cable Setup]ࢆ㑅ᢥࡋࠊCable Communication Setup ࢘࢕ࣥࢻ࢘
ࢆ⾲♧ࡉࡏࡲࡍࠋᅗ 18 ࡢࡼ࠺࡟ࠕCommunication Modeࠖࡢ㡯┠ࡢ Parallel Ϫࢆ㑅ᢥࠊࠕCable
Locationࠖࡢ㡯┠ࡢࠕRemoteࠖࢆ㑅ᢥࠊ
ࠕHost Nameࠖ࡟[localhost:1234]࡜ධຊࡋࠊOK ࣎ࢱࣥࢆᢲࡋ
ࡲࡍࠋࡇࡇ࡛ᣦᐃࡍࡿᩘᏐࡣࠊࠕcblsrv.exeࠖࡢ-p ࢜ࣉࢩ࡛ࣙࣥᣦᐃࡋࡓ࣏࣮ࢺ␒ྕ࡜୍⮴ࡉࡏࡲࡍࠋ
ᅗ 18: Cable Communication Setup ࢘࢕ࣥࢻ࢘
ࠕRight click to Add Device or Initialize JTAG chainࠖ࡜⾲♧ࡉࢀ࡚࠸ࡿࣇ࣮࣒ࣞෆࢆྑࢡࣜࢵࢡࡋࠊ
ࠕInitialize Chainࠖࢆ㑅ᢥࡋࡲࡍࠋᅗ 19 ࡢࡼ࠺࡟ xcf04s ࡜ xc3s500e ࢆㄆ㆑ࡋࡲࡍࠋ
ᅗ 19: xcf04s ࡜ xc3s500e ࢆㄆ㆑ࡋࡓ⏬㠃
22
AZPR EvBoard ྲྀᢅㄝ᫂᭩
xcf04s ࢆྑࢡࣜࢵࢡࡋࠊ
ࠕAssign New Configuration Fileࠖࢆ㑅ᢥࡍࡿ࡜ࢲ࢖࢔ࣟࢢࡀ⾲♧ࡉࢀࡲࡍࠋ
ࡇࡇ࡛ MCS ࣇ࢓࢖ࣝࢆ㑅ᢥࡋࡲࡍࠋ෌ࡧ xcf04s ࢆྑࢡࣜࢵࢡࡋࠊProgram ࢆ㑅ᢥࡋࠊOK ࣎ࢱࣥࢆᢲ
ࡋ࡚ࢥࣥࣇ࢕ࢠ࣮ࣗࣞࢩࣙࣥࡀᡂຌࡍࡿ࡜ࠊᅗ 20 ࡢࡼ࠺࡟ࠕProgram Succeededࠖ࡜⾲♧ࡉࢀࡲࡍࠋ
ᅗ 20: ࠕProgram Succeededࠖ࡜⾲♧ࡉࢀࡓ⏬㠃
ࡇࢀ࡛ࠊࢥࣥࣇ࢕ࢠ࣮ࣗࣞࢩࣙࣥࡣ᏶஢࡛ࡍࠋ
iMPACT ᐇ⾜୰࡟ၥ㢟ࡀⓎ⏕ࡋࡓ࡜ࡁࡣࠊࢥ࣐ࣥࢻࣉࣟࣥࣉࢺ࡛ CTRL+C ࢆᢲࡋ࡚ࠕcblsrv.exeࠖࢆ
⤊஢ࡋࠊiMAPCT ࢆ㛢ࡌ࡚ࡃࡔࡉ࠸ࠋࡑࡢᚋࠊࢥࣥࣇ࢕ࢠ࣮ࣗࣞࢩࣙࣥ᪉ἲࡢ᭱ึ࠿ࡽࡸࡾ┤ࡋ࡚ࡃࡔ
ࡉ࠸ࠋ
23
AZPR EvBoard ྲྀᢅㄝ᫂᭩
5.3.
እ㒊ࢲ࣮࢘ࣥࣟࢻࢣ࣮ࣈࣝ࠿ࡽࡢࢥࣥࣇ࢕ࢠ࣮ࣗࣞࢩࣙࣥ
AZPR EvBoard ࡣࠊእ㒊ࢲ࣮࢘ࣥࣟࢻࢣ࣮ࣈࣝ࡟ࡼࡿࢥࣥࣇ࢕ࢠ࣮ࣗࣞࢩࣙࣥࡀྍ⬟࡛ࡍࠋእ㒊ࢲ࢘
࣮ࣥࣟࢻࢣ࣮ࣈࣝࢆ฼⏝ࡍࡿࡇ࡜࡛ࠊIMPACT ࠿ࡽ┤᥋ FPGA ࢆࢥࣥࣇ࢕ࢠ࣮ࣗࣞࢩࣙࣥࡍࡿࡇ࡜ࡀ
࡛ࡁࡲࡍࠋ
እ㒊ࢲ࣮࢘ࣥࣟࢻࢣ࣮ࣈࣝࢆ౑⏝ࡍࡿ㝿ࡣࠊJP1 ࡟ࢪࣕࣥࣃ࣮ࢆ᥋⥆ࡋࠊᇶᯈୖࡢࢩࣝࢡ࡟ࡋࡓࡀࡗ
࡚ JTAG ࣆࣥࢆ᥋⥆ࡋࡲࡍࠋࡇࡢ࡜ࡁࠊࢧࣥࣁࣖࢺ♫〇ࡢࠕࢸࢫࢺ࣡࢖ࣖ TTW-200ࠖࢆ฼⏝ࡍࡿ࡜ࢫ
࣮࣮ࣝ࣍ࣝ࡬ࡢ࢔ࢡࢭࢫࡀྍ⬟࡟࡞ࡾࡲࡍࠋ
ᅗ 21: እ㒊ࢲ࣮࢘ࣥࣟࢻࢣ࣮ࣈࣝࡢ᥋⥆
24
AZPR EvBoard ྲྀᢅㄝ᫂᭩
6. ࢲ࢖࢔ࢢࣉࣟࢢ࣒ࣛ
AZPR EvBoard ࡢฟⲴ᫬ࡢࢥࣥࣇ࢕ࢢ ROM ࡟ࡣࠊFPGA-㒊ရ㛫ࡢ᥋⥆ࢳ࢙ࢵࢡࢆ⾜࠺ࡓࡵࡢࢲ࢖
࢔ࢢࣉࣟࢢ࣒ࣛࡀ᱁⣡ࡉࢀ࡚࠸ࡲࡍࠋAZPR EvBoard ࡢ㟁※ࢆධࢀࡿࡇ࡜࡛ࠊࢲ࢖࢔ࢢࣉࣟࢢ࣒ࣛࢆᐇ
⾜ࡋࡲࡍࠋࡲࡓࠊࢲ࢖࢔ࢢࣉࣟࢢ࣒ࣛࡣࢧ࣏࣮ࢺ࣮࣌ࢪ࠿ࡽࢲ࣮࢘ࣥࣟࢻࡍࡿࡇ࡜ࡀྍ⬟࡛ࡍࠋ
6.1.
஦๓‽ഛ
ࢲ࢖࢔ࢢࣉࣟࢢ࣒ࣛࡢᐇ⾜᫬࡟ࡣࠊୗグࡢࡼ࠺࡟ࢣ࣮ࣈࣝ㢮ࢆ᥋⥆ࡋࡲࡍࠋ
ᅗ 22: ࢲ࢖࢔ࢢࣉࣟࢢ࣒ࣛᐇ⾜⏝ࡢ᥋⥆
PC ୖ࡛➃ᮎ࢚࣑࣮ࣗࣞࢱ࡛࠶ࡿ TeraTerm ࢆ㉳ືࡋࠊAZPR EvBoard ࡢ COM ࣏࣮ࢺ࡜᥋⥆ࡋࡲࡍࠋ
PC ࡟ TeraTerm ࡀ࢖ࣥࢫࢺ࣮ࣝࡉࢀ࡚࠸࡞࠸ሙྜࡣࠊ௨ୗࡢ࣮࣌ࢪ࠿ࡽࢲ࣮࢘ࣥࣟࢻࡋ࡚ࠊ࢖ࣥࢫࢺ
࣮ࣝࡋ࡚ࡃࡔࡉ࠸ࠋ
KWWSVRXUFHIRUJHMSSURMHFWVWWVVKUHOHDVHV
USB Serial Port ࡟᥋⥆ࡋࠊTeraTerm ࢆୗグࡢࡼ࠺࡟タᐃࡋࡲࡍࠋ
࣭ ཷಙᨵ⾜ࢥ࣮ࢻࡢタᐃ: LF
࣭ ࢩࣜ࢔࣏࣮ࣝࢺࡢ࣮࣮࣎ࣞࢻࡢタᐃ: 38400
6.2.
ࢲ࢖࢔ࢢࣉࣟࢢ࣒ࣛࡢᐇ⾜
࣭ LED ࢸࢫࢺ
㉳ື┤ᚋࠊLED1 ࡜ LED2 ࡀ஺஫࡟ 3 ᅇࡎࡘⅬ⁛ࡋࡲࡍࠋLED ࡢⅬⅉ࡟ၥ㢟ࡀ࡞࠸ࡇ࡜ࢆ☜ㄆࡋ࡚
ࡃࡔࡉ࠸ࠋ
࣭ 7 ࢭࢢࢸࢫࢺ
7 ࢭࢢ࣓ࣥࢺ LED ࡀࠕ11ࠖЍࠕ22ࠖЍࠕ33ࠖЍ㺃㺃㺃Ѝࠕ77ࠖЍࠕ00ࠖ࡜⾲♧ࡋࡲࡍࠋࡍ࡭࡚ࡢᩘᏐ
ࡀၥ㢟࡞ࡃฟຊࡉࢀ࡚࠸ࡿࡇ࡜ࢆ☜ㄆࡋ࡚ࡃࡔࡉ࠸ࠋ
25
AZPR EvBoard ྲྀᢅㄝ᫂᭩
࣭ UART ࢸࢫࢺ
TeraTerm ୖ࡟௨ୗࡢᩥᏐิࡀ⾲♧ࡉࢀࡿࡢ࡛ࠊ࣮࣮࢟࣎ࢻࡢ”n”࣮࢟ࢆᢲࡋ࡚ࡃࡔࡉ࠸ࠋ
3UHVVQNH\
䛂UART test: Pass䛃䛾⾲♧䛜ฟຊ䛥䜜䛯䜙䚸UART 䝔䝇䝖䛿 Pass 䛸䛺䜚䜎䛩䚹㻌
3UHVVQNH\
Q
8$57WHVW3DVV
࣭ VPort ࢸࢫࢺ
UART ࢸࢫࢺ࡟⥆ࡅ࡚ࠊVPort ࢸࢫࢺࢆ⾜࠸ࡲࡍࠋ
ࠕVPort test: Passࠖࡢ⾲♧ࡀฟຊࡉࢀࡓࡽࠊVPort
ࡢࢸࢫࢺࡣ Pass ࡜࡞ࡾࡲࡍࠋ
93RUWFRQQHFW
93RUWWHVW3DVV
࣭ SW ࢸࢫࢺ
VPort ࢸࢫࢺ࡟⥆ࡅ࡚ࠊ
ࢫ࢖ࢵࢳࡢࢸࢫࢺࢆ⾜࠸ࡲࡍࠋSW1 ࠿ࡽ SW4 ࡲ࡛ࢆ㡰␒࡟ᢲࡋ࡚ࡃࡔࡉ࠸ࠋ
TerTerm ୖ࡟௨ୗࡢ⾲♧ࡀฟຊࡉࢀࡲࡍࠋ
ࠕSW test: Passࠖࡢ⾲♧ࡀฟຊࡉࢀࡓࡽࠊSW ࢸࢫࢺࡣ Pass
࡜࡞ࡾࡲࡍࠋ
6:WHVW
6:21
6:2))
6:21
6:2))
6:21
6:2))
6:21
6:2))
6:WHVW3DVV
࣭ ࢸࢫࢺ⤊஢
ୖグࡢࢸࢫࢺࡀࡍ࡭࡚⤊ࢃࡿ࡜ࠊ௨ୗࡢ⾲♧ࡀฟຊࡉࢀࡲࡍࠋ
$OOWHVW3DVVHG
8$57WHVW3DVV
93RUWWHVW3DVV
6:WHVW3DVV
௨ୖ࡛ࢲ࢖࢔ࢢࣉࣟࢢ࣒ࣛࡢࡍ࡭࡚ࡢࢸࢫࢺࡣ⤊஢࡛ࡍࠋ
26
AZPR EvBoard ྲྀᢅㄝ᫂᭩
7. Appendix-A 㟁Ꮚࢧ࢖ࢥࣟࡢᐇ⿦
ࢧࣥࣉࣝ࢔ࣉࣜࢣ࣮ࢩࣙࣥ࡜ࡋ࡚ࠊ㟁Ꮚࢧ࢖ࢥࣟࡢᐇ⿦ࢆ⾜࠸ࡲࡍࠋ㟁Ꮚࢧ࢖ࢥࣟࡣୗグࡢ௙ᵝ࡛タ
ィࡋࡲࡍࠋ
࣭ ࣜࢭࢵࢺᚋࠊ೵Ṇ≧ែ࡟㑄⛣ࡍࡿ
࣭ ࢫ࢖ࢵࢳ 1 ࢆᢲࡍ࡜ᅇ㌿≧ែ࡟㑄⛣ࡍࡿ
࣭ ෌ࡧࢫ࢖ࢵࢳ 1 ࢆᢲࡍ࡜೵Ṇ≧ែ࡟㑄⛣ࡍࡿ
࣭ ෆ㒊࡟࢝࢘ࣥࢱࢆᣢࡕࠊ࢝࢘ࣥࢱࡢ≧ែ࡟ᛂࡌ࡚ࢧ࢖ࢥࣟࡢ್ࢆ⾲♧ࡍࡿ
ᅗ 23: 㟁Ꮚࢧ࢖ࢥࣟࡢ≧ែ㑄⛣ᅗ
ࣜࢫࢺ 1 ࡟㟁Ꮚࢧ࢖ࢥࣟࡢࢯ࣮ࢫࢥ࣮ࢻࢆ♧ࡋࡲࡍࠋ
27
AZPR EvBoard ྲྀᢅㄝ᫂᭩
ࣜࢫࢺ 1
㟁Ꮚࢧ࢖ࢥࣟࡢࢯ࣮ࢫࢥ࣮ࢻ
28
AZPR EvBoard ྲྀᢅㄝ᫂᭩
29
AZPR EvBoard ྲྀᢅㄝ᫂᭩
[I]
ࣔࢪ࣮ࣗࣝᐉゝ
ࠕdiceࠖ࡜࠸࠺ࣔࢪ࣮ࣗࣝࢆᐉゝࡋ࡚࠸ࡲࡍࠋධຊࡣࢡࣟࢵࢡ(clk)࡜ࣜࢭࢵࢺ(reset_)࡜ࣉࢵࢩࣗࢫ
࢖ࢵࢳ(sw_)ࠋฟຊࡣ 7 ࢭࢢ࣓ࣥࢺ LED(led_)࡛ࡍࠋ
[II]
ෆ㒊ಙྕࡢᐃ⩏
(1)࡛ỗ⏝ࣃ࣓࣮ࣛࢱࡢ LOW ࡜ HIGH ࢆᐃ⩏ࡋ࡚࠸ࡲࡍࠋ
(2)࡛ LED Ⅼⅉ⏝ࡢࣃ࣓࣮ࣛࢱࢆᐃ⩏ࡋ࡚࠸ࡲࡍࠋ (3)࡛ࢧ࢖ࢥࣟࡢ≧ែ⏝ࣃ࣓࣮ࣛࢱ࡜ಙྕࢆᐃ
⩏ࡋ࡚࠸ࡲࡍࠋ㟁Ꮚࢧ࢖ࢥࣟࡣࠕ೵Ṇ≧ែࠖ࡜ࠕᅇ㌿≧ែࠖࡢ 2 ࡘࡢ≧ែࢆྲྀࡾࡲࡍࠋ
(4)࡛⾲♧⏝ࡢศ࿘࢝࢘ࣥࢱࡢࣃ࣓࣮ࣛࢱ࡜ಙྕࢆᐃ⩏ࡋ࡚࠸ࡲࡍࠋ㟁Ꮚࢧ࢖ࢥࣟࡀࠕᅇ㌿≧ែࠖࡢ
᫬ࡣࠊศ࿘࢝࢘ࣥࢱࡀ‶஢ࡍࡿᗘ࡟⾲♧ࡉࢀࡿ್ࡀኚࢃࡾࡲࡍࠋ௒ᅇࡣ⾲♧ኚ᭦ࡢ࿘ᮇࢆ 50Hz ࡜
ࡋࡲࡋࡓࠋࡑࡢࡓࡵࠊศ࿘ẚࡣ AZPR EvBoard ࡢ࢜ࢩ࣮ࣞࢱࡢ࿘Ἴᩘ 10MHz ࢆ 50Hz ࡛๭ࡗࡓ್
࡜࡞ࡾࡲࡍࠋᐇ㝿࡟ࡣศ࿘࢝࢘ࣥࢱࡣ 0 ࠿ࡽ࢝࢘ࣥࢺࡍࡿࡓࡵࠊ࣐࢖ࢼࢫ 1 ࡋࡓ್࡜࡞ࡾࡲࡍࠋ
199,999 ࢆ࢝࢘ࣥࢺࡍࡿࡢ࡟ᚲせ࡞ࣅࢵࢺᩘࡣ 18 ࣅࢵࢺ(2^18 = 262,144 < 199,999)࡜࡞ࡿࡢ࡛ࠊ
ศ࿘࢝࢘ࣥࢱ(div_cnt)ࡣ 18 ࣅࢵࢺ࡟࡞ࡾࡲࡍࠋ
(5)࡛ࢧ࢖ࢥࣟ⏝ࡢ࢝࢘ࣥࢱࢆᐃ⩏ࡋ࡚࠸ࡲࡍࠋࢧ࢖ࢥࣟࡣ 1㹼6 ࡢ್ࢆ࢝࢘ࣥࢺࡍࡿࡓࡵࠊ3 ࣅࢵ
ࢺ(2^3 = 8 < 6)࡜࡞ࡾࡲࡍࠋ
(6)࡛ࢫ࢖ࢵࢳ⏝ࡢࣛࢵࢳ(ࣞࢪࢫࢱ)ࢆᐃ⩏ࡋ࡚࠸ࡲࡍࠋࢫ࢖ࢵࢳධຊࡢ࢚ࢵࢪ᳨ฟࢆ⾜࠺ࡓࡵࠊࣛ
ࢵࢳࢆ 2 ಶ౑⏝ࡋࡲࡍࠋ
[III]
LED ࡢⅬⅉไᚚ
ࢧ࢖ࢥࣟ⏝࢝࢘ࣥࢱ(dice_cnt)࡟ᛂࡌ࡚ LED(led_)࡟Ⅼⅉࣃࢱ࣮ࣥࢆฟຊࡋ࡚࠸ࡲࡍࠋ
[IV]
ࢫ࢖ࢵࢳ⏝ࣛࢵࢳไᚚ
ࣉࢵࢩࣗࢫ࢖ࢵࢳࡢධຊ(sw_)ࢆࠕsw_l࡛ࠖࣛࢵࢳࡋࠊࡉࡽ࡟ࡑࢀࢆࠕsw_dl࡛ࠖࢲࣈࣝࣛࢵࢳࡋ࡚
࠸ࡲࡍࠋ≧ែไᚚࡢ㒊ศ࡛ࠕsw_lࠖ࡜ࠕsw_dlࠖࢆẚ㍑ࡋࠊ࡛࢚ࢵࢪࡢ᳨ฟࢆ⾜࠸ࡲࡍࠋ
[V]
≧ែไᚚ
(7)࡛ࣜࢭࢵࢺࢫ࢖ࢵࢳࡀᢲࡉࢀ࡚ LOW ࡟࡞ࡗࡓࡽᅇ㊰ࢆ㠀ྠᮇࣜࢭࢵࢺࡋࡲࡍࠋ
(8)࡛೵Ṇ≧ែࡢไᚚࢆ⾜ࡗ࡚࠸ࡲࡍࠋ೵Ṇ≧ែ࡛ࡣ⌧ᅾࡢ್ࢆಖᣢࡋ⥆ࡅࡲࡍࠋࣉࢵࢩࣗࢫ࢖ࢵࢳ
ࡢࢲ࢚࢘ࣥࢵࢪࢆ᳨ฟ(ࠕsw_lࠖࡀ HIGHࠊࠕsw_dlࠖࡀ LOW)ࡋࡓሙྜࠊᅇ㌿≧ែ࡟㑄⛣ࡋࡲࡍࠋ
(9)࡛ᅇ㌿≧ែࡢไᚚࢆ⾜ࡗ࡚࠸ࡲࡍࠋ
(10)࡛ࣉࢵࢩࣗࢫ࢖ࢵࢳࡢࢲ࢚࢘ࣥࢵࢪࢆ᳨ฟࡋࡓሙྜࠊ೵Ṇ≧ែ࡟㑄⛣ࡋࡲࡍࠋ
(11)࡛⾲♧⏝ศ࿘࢝࢘ࣥࢱࡢไᚚࢆ⾜ࡗ࡚࠸ࡲࡍࠋ⾲♧⏝ᩥ㞟࢝࢘ࣥࢱ(div_cnt)ࡀ‶஢ࡋࡓሙྜࠊ
(12)࡟࡚ࢧ࢖ࢥࣟ⏝ࡢ࢝࢘ࣥࢱࢆ᭦᪂ࡋ࡚࠸ࡲࡍࠋ
30