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(p1) mov r2=r3
(p3) mov r2=r3
; => WAW on r2 is reported
;;
(p1) mov r3=r4
(p4) br.cond.sptk.few b0
mov r3=r4
; => WAW on r3 is reported
// WAW would not have been reported if p1 -> p4
;;
(p5) mov r4=r5
(p1) br.cond.sptk.few b0
mov r4=r5
; WAW is not reported.
; p5 -> p1 is still valid
Mutex Relation Not Created with a Simple Compare
In the following code, P1, P2, and P3, are mutex since R10 can have only one value at a
time. IAS fails to interpret the inherently mutex relation and reports three WAW
dependency violations.
cmp.eq p1=1,r10
cmp.eq p2=2,r10
cmp.eq p3=3,r10;;
(p1) mov r4=r1
(p2) mov r4=r2
(p3) mov r4=r3
To resolve this, use the .pred.rel annotation of the “mutex” form:
cmp.eq p1=1,r10
cmp.eq p2=2,r10
cmp.eq p3=3,r10;;
.pred.rel “mutex”,p1,p2,p3
(p1) mov r4=r1
(p2) mov r4=r2
(p3) mov r4=r3
Instructions Separated by a Predicated Branch
In the following example, there are no dependency violations due to the unconditional
compare. The instructions are numbered #1 through #6 for clarity.
The apparent WAW on R1 can never happen since instruction #2 and instruction #5
never execute in parallel. That is, instruction #2 executes (P2 true) implying that
instruction #4 executes (P2 implies P1), and the code execution branches to L without
reaching instruction #5.
The apparent WAW on R2 can only happen if instruction #4 does not execute and
instruction #6 does. Since execution of instruction #6 (P3 true) implies execution of
instruction #4 (P3 implies P1), the WAW never happens.
#1 (p1) cmp.eq.unc p2,p3=r1,r2;;
#2 (p2) mov r1=r10
#3 mov r2=r11
#4 (p1) br.cond.dpnt.few L
#5 mov r1=r12
#6 (p3) mov r2=r13
To avoid false reporting of WAW errors on R1 and R2, insert the “imply” form of the
.pred.rel annotation:
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