Download Altera SoC Embedded Design Suite User Guide
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ug-1137 2015.08.06 ETR Settings 6-35 Figure 6-33: DTSL Configuration Editor - STM Only one option is available: • Enable STM Trace – check to enable STM tracing. ETR Settings The ETR settings allow the configuration of the Embedded Trace Router (ETR) settings. The Embedded Trace Router is used to direct the tracing information to a memory buffer accessible by HPS. Figure 6-34: DTSL Configuration Editor - ETR The following options are available: • Configure the system memory trace buffer – check this if the ETR is selected for trace destination on the Trace Capture tab • Start Address, Size – define the trace buffer location in system memory and its size • Enable scatter-gather mode – use when the OS cannot guarantee a contiguous piece of physical memory. The scatter-gather table is setup by the operating system using a device driver and is read automatically by the ETR. ETF Settings The ETF tab allows the configuration of the Embedded Trace FIFO (ETF) settings. The Embedded Trace FIFO is a 32KB buffer residing on HPS that can be used to store tracing data to be retrieved by the debugger, but also as an elastic buffer for the scenarios where the tracing data is stored in memory through ETR or on the external DSTREAM device using TPIU. ARM DS-5 AE Send Feedback Altera Corporation