Download C.P.U. EXORCISOR PRELIMINARY USER MANUAL

C.P.U. EXORCISOR
PRELIMINARY USER MANUAL
David Fish
October 14th, 1997
Version 1.0
1
Table of Contents
Overview
3
Cinematronics Exorcisor Description
3
Signature Analysis
3
Equipment Necessary
3
Setting up the Equipment
4
HP5004A Self-test
4
Connecting the HP5004A Signature Analyzer to the Exorcisor
5
Verifying the Exorcisor output signatures
5
Preliminary CPU Operational Testing
6
Connecting the Exorcisor to the CPU under test
7
Reading Signatures and Verification
Detecting faulty devices
7
Testing the board for non-JMI mode
8
Testing the board’s RAM addressing signatures
8
Tips & Techniques
8
Appendix
A
Listing of Signatures for IC pins
9
B
Board Layout with marked connection locations
23
C
Reference
24
2
OVERVIEW
The Cinematronics C.P.U. Exorcisor
The Cinematronics Exorcisor was designed to help Test Technicians diagnose circuit
faults in the main logic board, a.k.a. CPU, used in all the early Cinematronics Vector
based arcade games. The Exorcisor connects to the board under test and injects digital
signals into a number of circuit nodes forcing the board to operate in a stable and
repeatable manner. With the board in this state the technician can diagnose many
component failures by simply reading the digital signatures present on the board and
comparing them to the correct signatures which are shown on the schematics. Debugging
becomes a simple matter of finding the device which is causing the incorrect signature
and replacing it.
Signature Analysis
From the HP Test & Measurement catalog, here’s a description of Signature Analysis:
Signature analysis is a fast and accurate method of troubleshooting digital circuits.
Finding faults is reduced to tracing signal flow and comparing measured signatures to
printouts or computer-stored signatures. A signature is a 16 bit-cyclic redundancy code
(CRC) generated for blocks of data. Instead of entire bit streams, only signatures are
compared to detect errors.
HP’s patented signature analysis technique enables the HP5005B or HP5006A to
generate a compressed, four-digit ‘fingerprint’ or signature of a digital data stream at a
logic node. Any fault associated with a device connected to the node will force a change
in the data stream and produce an erroneous signature.
In other words, a signature is a four digit Hexadecimal representation a binary pattern
measured within a ‘window’ defined by a START and a STOP signal. The signatures that
are used as a reference were measured on a ‘known-good’ PC board similar to the board
under test (DUT). The reference board and the DUT must be driven by identical signal
patterns, or exercised, to obtain the proper results. This is just what the Exorcisor does.
Equipment Necessary
• Signature Analyzer (HP5004A, HP5006A, Atari Cat Box, etc.)
• +5 Volt DC @ 5A Power Supply or Cinematronics Power Supply
• 100 MHz or higher Oscilloscope w/probes
• 2 ½ - Digit or better Digital Multi-meter (DMM) w/leads
• 16 pin DIP Clip
• Ball Clip or E-Z Hook clip leads, various lengths
• Cinematronic CPU Schematics w/signatures
3
SETTING UP THE EQUIPMENT
HP5004A Self-Test
This section covers the Self-Test feature of the HP5004A. If you are using a different
type of Signature Analyzer you must refer to it’s user manual for the Self-test operation.
1. Remove the grabber connectors from the pod test leads, and connect the pod
(START, STOP and CLOCK) leads to the matching START, STOP and CLOCK
receptacles on the 5004A front panel.
2. Connect the 5004A data probe to the PROBE TEST receptacle on the 5004A front
panel. Push the probe tip point gently and firmly into the PROBE TEST
receptacle until the point is help securely.
3. Connect the 5004A power cable to the correct power source and set the 5004A front
panel as follows:
Test A
Switch Settings:
START:
IN
STOP:
IN
CLOCK:
IN or OUT
Displays:
Four seven-segment:
UP73 then ACA2
Gate:
flickers
Unstable Signature:
flickers except when good signature is on
Probe tip light:
Flickers when “ACA2“ is on
Test B
Switch Settings:
START:
OUT
STOP:
OUT
CLOCK:
IN or OUT
Displays:
Four seven-segment:
3951 then 2P61
Gate:
flickers
Unstable Signature:
flickers except when good signature is on
Probe tip light:
Flickers when “2P61“ is on
Note
In SELF-TEST mode, the seven-segment displays first have all seven segments lit dimly
for about 1 second (tests all segments) and then have one of the signature sets listed
above for about 1 second. If the probe RESET switch is pressed during the SELF-TEST
mode, the four 7-segment-digit displays will show all zeros except when all segments are
dimly lit.
4
Connecting the HP5004A Signature Analyzer to the Exorcisor
1. Connect the 5004A’s grabber connectors as follows:
CLK (yellow) clip to Exorcisor CLK terminal,
START (green) clip to Exorcisor START/STOP terminal,
STOP (red) clip to Exorcisor START/STOP terminal,
GND (black) clip to Exorcisor GND terminal.
2. Connect The Exorcisor’s +5V banana jack to the 5 volt source, either from the
Cinematronics power supply or a lab supply. In the same manner connect the GND
banana jack to the supply’s GROUND connection. Verify that the board under test is
connected to the +5 volt supply also.
3. Using a short jumper lead connect the Exorcisor’s CLK terminal to the CLK test point
on the logic board. This point is located between IC’s Jx and Kx and is marked CLK
on the component side of the board.
At this point the Exorcisor has all the necessary inputs connected to perform an
operational verification test. If this test is not necessary skip the next section.
Verifying the Exorcisor output signatures
With the equipment connected as described in the previous section apply power to the
+5V power supply. Verify that the supply is still putting out +5.0 volts DC ± 0.25VDC.
Set the switches on the signature analyzer as follows:
HP5004A Switch Settings:
START:
STOP:
CLOCK:
IN (negative edge)
OUT (positive edge)
OUT (positive edge)
With the analyzer’s data probe verify the following signatures at the specified locations:
DIP plug D8
pin
#4
#5
#9
#10
#11
#14
#15
#16
signature
7825
655C
802H
6PF3
8UC2
2518
0000
U6HH
5
Verifying the Exorcisor output signatures (cnt’d)
DIP plug U14
pin
#9
#10
#11
#12
#13
#14
#15
#16
signature
5555
CCCC
7F7F
5H21
0AFA
UPFH
52F8
HC89
DIP clip N2
pin
#4
#7
#9
#12
signature
F469
PH6F
211U
H28U
DIP clip R2
pin
#4
#7
#9
#12
signature
A69C
47F6
8CC5
510F
Dip clip T2
pin
#4
#7
#9
#12
signature
615F
A928
A29F
96FC
Preliminary CPU Operational Testing
There is a certain minimum operation level which the CPU board must meet before the
Exorcisor can be used for fault diagnostics. The 20MHz oscillator circuit (IC-I2, XTAL,
R2, R3 and C59) must be operating. The IC’s H2 (74S113) and J4 (74265) must also be
operational and generating the four clock signals CLK1, /CLK1, CLK2 and /CLK2. Refer
to Sheet 1 of the schematics and, with the oscilloscope, verify that these clock signals are
present. Note that the CLK1 signal’s amplitude will be attenuated when the Exorcisor is
connected, this is normal. The signal ‘POWER_UP’ at IC B6 pin 2 (74LS04) must be at
a TTL High (Vo ≥ 2V). If these requirements are not met the Exorcisor will not operate.
These circuits must be repaired before the Exorcisor can be used.
6
Connecting the Exorcisor to the Board Under Test
IMPORTANT!
Before you connect the Exorcisor verify that
the 5 volt power supply is turned OFF!
Connecting the Exorcisor to the CPU is a simple task. First disconnect the ribbon cable
which connects to the display. Then remove the two 16-pin DIP shunts located at D8 and
U14. Connect the DIP plug at the end of the cable which plugs into J3 of the Exorcisor
into the IC socket at D8. Connect the other DIP plug at the end of the cable which plugs
into J1 into the socket at U14. Attach the DIP clip designated N2 to the IC-N2 (74LS257)
paying close attention to the location of pin 1. Attach the R2 DIP clip to IC-R2 and the
T2 DIP clip to IC-T2. There is a flying ball-clip connected to the cable from J1, this clip
is attached to the test point TP8. No IC’s need to be removed from the board in order to
use the Exorcisor.
READING SIGNATURES AND VERIFICATION
With the equipment hooked up as described in the previous sections turn on the power to
the analyzer and the DC power supply. Set the Signature Analyzer to the configuration
shown below. Debugging is now a simple matter of touching the probe tip to a specific
IC pin and comparing it’s signature to that shown on the schematic. The expected
signatures are listed in Appendix A for reference. The key below defines the terms used
in the tables.
HP5004A Switch Settings:
START:
STOP:
CLOCK:
IN (negative edge)
OUT (positive edge)
OUT (positive edge)
NOTE: Some circuit nodes have two signatures shown, the upper (first) value is read
when the CLOCK is positive edge triggered and the lower (second) value when the
CLOCK is negative edge triggered.
Detecting faulty devices
In most cases detecting a defective device is as simple as finding a bad signature and
finding the IC which is driving the node. Once you find a bad signature follow the signal
‘up-stream’ to the first IC at which a bad signature shows up at. If all the input signatures
to this IC are correct and the output is not there a good chance you’ve found a bad
device. This reasoning may not lead to a correct determination if, for instance, there is a
short affecting the bad node or if an IC connected to the node has a shorted input. It’s
7
always a good idea to check the node in question with a meter and an oscilloscope to
help further diagnose a problem.
Testing the board for Non-JMI mode
Some of the signatures listed in Appendix A are shown within two forward slashes
(/nnnn/). These are signatures read when the board has been put in the non-JMI mode.
The JMI jumper must be removed, if present, to obtain these signatures. Be sure to
replace this jumper when testing has been completed.
Testing the board’s RAM Addressing Signatures
There are eight unique signatures in Appendix A shown with an asterisk (∗) prefix. These
are the signatures for the eight RAM address lines, A0 thru A7. To obtain these
signatures pin 10 of IC I12 and pin 10 of IC J12 must be tied to ground. These pins are
connected together by a trace so it’s only necessary to ground one. This can be done
simply by using a 16-pin DIP clip with pins 10 and 8 tied together and placing the clip on
either IC I12 or J12.
Tips & Techniques
The IC’s on the Cinematronics CPU board have reference designations that correspond to
their X and Y position on the board. The grid lines are designated U thru A across the
wide dimension (horizontal if the board is positioned with the connectors along the top)
and 2 thru 14 across the shorter (vertical) width. Unfortunately, there are no reference
designations shown on the board for each IC. To speed up the debug process I highly
recommend placing a small label on various IC’s and marking them with it’s reference
designation and the number of pins the IC has. The small (5/8” x 3/16”) IC labels that are
available in 8 ½” X 11” sheets with 480 labels each are ideal.
Always check the test point marked C3-2P first. This is the RESET node and it’s
signature should be ‘C32P’. If the signature is incorrect repair the reset circuit before
continuing.
Always trace bad signatures in the opposite direction of the signal flow. A good starting
point is at the X and Y data output latches and the line intensity control circuit.
A bad signature at an input of an IC will not always cause a bad signature at it’s output.
An inverted signal will always have the same signature as it’s non-inverted source signal.
8
Appendix A
Schematic: SHT1
Schematic: SHT2
IC #
PIN #
IC TYPE
SIGNATURE
IC #
PIN #
IC TYPE
SIGNATURE
B4
B4
B4
B4
E4
E4
E4
E4
E4
F4
F4
F4
F4
D4
B6
B6
C4
F6
F6
F6
F6
A6
A6
A6
B6
B6
F2
F2
F2
F2
F2
F2
F2
F2
F2
F2
F2
F2
F2
13
11
1
6
7
11
10
9
5
9
10
11
8
5
11
10
5
9
10
11
8
8
9
10
13
12
1
2
3
13
14
4
5
6
7
9
10
11
12
74LS00
A328
A328
Lo
Hi
49P2
PH07
29A9
80HP
49P2
49P2
392C
392C
A522
A522
392C
392C
392C
49P2
A522
392C
Lo
Lo
9069
9069
H28U
H28U
PH07
29A9
80HP
H28U
0000
FH1H
54P5
8CAU
2043
A941
A328
C9UC
82CU
T2
T2
T2
T2
T2
T2
T2
T2
T2
T2
T2
T2
T2
T2
R2
R2
R2
R2
R2
R2
R2
R2
R2
R2
R2
R2
R2
R2
N2
N2
N2
N2
N2
N2
N2
N2
N2
N2
N2
1
2
5
11
14
3
6
10
13
15
4
7
9
12
1
2
5
11
14
3
6
10
13
15
4
7
9
12
1
2
5
11
14
3
6
10
13
15
4
74LS257
49P2
HAFA
UAC5
651H
F567
F6A4
HA32
F97P
0C22
Hi
615F
A928
A29F
96FC
49P2
9172
711H
FPF2
HAC9
P38A
30CC
FUC5
725C
Hi
A69C
47F6
8CC5
510F
49P2
26PP
67HU
166U
C432
OU1F
0841
242C
AC5H
Hi
F469
74LS151
74LS10
74LS151
74LS04
74LS151
74LS27
74LS02
74LS04
74LS259
9
74LS257
74LS257
Appendix A (cnt’d)
Schematic: SHT2
IC #
PIN #
IC TYPE
SIGNATURE
IC #
PIN #
IC TYPE
SIGNATURE
N2
N2
N2
7
9
12
74LS257
PH6F
211U
H28U
12
13
11
9
10
11
3
4
5
6
10
9
7
2
12
13
14
15
3
4
5
6
10
9
7
2
12
13
14
15
3
4
5
6
10
74LS32
7P23
49P2
7P23
clk1
F1CH
7P23
1C14
8236
304P
FC6A
2H8F
C5F6
HAFA
9172
HAFA
UAC5
651H
F567
F43F
5000
34CP
66UU
2H8F
C5F6
F567
26PP
9172
711H
FPF2
HAC9
9115
61CA
91CC
6121
2H8F
9
7
2
12
13
14
15
1
2
3
4
5
6
9
10
8
3
4
5
3
4
5
6
10
9
7
2
12
13
14
15
3
4
5
6
10
9
7
74LS194
K2
K2
K2
L2
L2
L2
T4
T4
T4
T4
T4
T4
T4
T4
T4
T4
T4
T4
R4
R4
R4
R4
R4
R4
R4
R4
R4
R4
R4
R4
N4
N4
N4
N4
N4
N4
N4
N4
N4
N4
N4
N4
J6
J6
J6
J6
J6
J6
J6
J6
J6
L2
L2
L2
S4
S4
S4
S4
S4
S4
S4
S4
S4
S4
S4
S4
P4
P4
P4
P4
P4
P4
P4
C5F6
HAC9
Lo
26PP
67HU
166U
C432
7P23
C432
0A76
F6A4
41UC
FC5H
FC5H
0A76
F12C
49P2
F1CH
clk2
1C14
8236
304P
FC6A
2H8F
C5F6
F12C
P38A
F6A4
HA32
F97P
0C22
F43F
5000
34CP
66UU
2H8F
C5F6
0C22
74LS10
74LS194
74LS194
74LS194
10
74LS00
74LS10
74LS194
74LS194
Appendix A (cnt’d)
Schematic: SHT2 & SHT3
SHT3
IC #
PIN #
IC TYPE
SIGNATURE
IC #
PIN #
IC TYPE
SIGNATURE
P4
P4
P4
P4
P4
M4
M4
M4
M4
M4
M4
M4
M4
M4
M4
M4
2
12
13
14
15
3
4
5
6
10
9
7
12
13
14
15
74LS194
0U1F
P38A
30CC
FUC5
725C
9115
61CA
91CC
6121
2H8F
C5F6
725C
0U1F
0841
242C
AC5H
3
4
5
6
9&10
12
13
14
15
3
4
5
7
10
11
12
13
14
15
3
4
5
74LS194
7
10
11
12
13
14
15
1
2&3
4
20
9
11
13
15
1
2
3
4
5
6
7
21
20
9
11
13
15
1
2
3
4
5
6
7
21
20
9
11
74LS298
H12
H12
H12
H12
H12
H12
H12
H12
H12
J12
J12
J12
J12
J12
J12
J12
J12
J12
J12
I12
I12
I12
I12
I12
I12
I12
I12
I12
I12
E12
E12
E12
N14
N14
N14
N14
N14
N14
N14
N14
N14
N14
N14
N14
N14
M14
M14
M14
M14
M14
M14
M14
M14
M14
M14
M14
M14
M14
L14
L14
L14
PH07
AAP8
0000
∗F6C6
∗402U
∗01F4
∗PPC3
4A50
4A50
4A50
4A50
96FC
A29F
A928
615F
∗0038
∗6034
∗UCCC
∗PF3C
∗PPC3
∗01F4
∗402U
∗F6C6
4A50
510F
8CC5
47F6
A69C
∗0038
∗6034
∗UCCC
∗PF3C
∗PPC3
∗01F4
∗402U
∗F6C6
4A50
H28U
211U
74LS194
74LS298
74LS298
392C
80HP
29A9
PH07
CH9A
0PH1
54CC
H255
7H33
7H33
H255
54CC
0PH1
AAP8
0000
∗PF3C
∗UCCC
∗6034
∗0038
392C
80HP
29A9
11
74LS04
9101C
9101C
9101C
Appendix A (cnt’d)
Schematic: SHT3
IC #
PIN #
IC TYPE
SIGNATURE
IC #
PIN #
IC TYPE
SIGNATURE
L14
L14
L14
L14
L14
L14
L14
L14
L14
L14
N11
N11
N11
N11
N11
N11
N11
N11
N11
M11
M11
M11
M11
M11
M11
M11
M11
M11
L11
L11
L11
L11
L11
L11
L11
L11
L11
H10
H10
13
15
1
2
3
4
5
6
7
21
3
6
10
13
15
4
7
9
12
3
6
10
13
15
4
7
9
12
3
6
10
13
15
4
7
9
12
4
5
9101C
PH6F
F469
∗0038
∗6034
∗UCCC
∗PF3C
∗PPC3
∗01F4
∗402U
∗F6C6
392C
80HP
29A9
PH07
4UHF
8C81
C428
9AC5
67C8
37C1
HP4P
P75P
A6HF
3P10
C781
6C47
A8H3
0PF5
392C
80HP
29A9
PH07
7323
P9UF
A996
6HF3
76F5
9069
76F5
H10
N9
N9
N9
N9
N9
N9
N9
N9
N9
N9
N9
N9
N9
M9
M9
M9
M9
M9
M9
M9
M9
M9
M9
M9
M9
L9
L9
L9
L9
L9
L9
L9
L9
L9
L9
N6
N6
N6
6
1
2
3
4
9
10
11
12
13
14
15
5
6
1
2
3
4
9
10
11
12
13
14
15
5
1
9
10
11
12
13
14
15
5
6
1
2
3
74LS32
74LS85
P6AF
8C81
9398
9686
051P
1776
H9P9
9AC5
A29F
A928
C428
615F
A197
237P
67C8
0PF5
Lo
510F
A8H3
8CC5
6C47
47F6
A69C
C781
96FC
H9P9
P9UF
96AF
H28U
6HF3
211U
PH6F
A996
F469
051P
9686
67C8
96FC
60P1
74LS157
74LS157
74LS157
74LS32
12
74LS85
74LS85
25LS181
Appendix A (cnt’d)
Schematic: SHT3
IC #
PIN #
IC TYPE
SIGNATURE
IC #
PIN #
IC TYPE
SIGNATURE
N6
N6
N6
N6
N6
N6
N6
N6
N6
N6
N6
N6
N6
N6
N6
N6
N6
M6
M6
M6
M6
M6
M6
M6
M6
M6
M6
M6
M6
M6
M6
M6
M6
M6
M6
M6
M6
L6
L6
4
5
6
7
8
18
19
20
21
22
23
9
10
11
13
15
17
1
2
3
4
5
6
7
8
18
19
20
21
22
23
9
10
11
13
15
17
1
2
25LS181
60P1
211A
HC91
H3UF
41UC
8C81
615F
C428
A928
9AC5
A29F
1C14
8236
304P
FC6A
7A6F
3H1C
0PF5
510F
60P1
60P1
211A
HC91
2632
41UC
C781
A69C
6C47
47F6
A8H3
8CC5
F43F
5000
34CP
66UU
6023
70AF
P6AF
H28U
L6
L6
L6
L6
L6
L6
L6
L6
L6
L6
L6
L6
L6
L6
L6
L6
L6
L6
U2
U2
K2
K2
K2
K2
K2
K2
K4
K4
K4
J8
J8
J8
3
4
5
6
7
8
18
19
20
21
22
23
9
10
11
13
15
17
9
8
4
5
6
9
10
8
2
3
1
1
2
3
25LS181
60P1
60P1
211A
HC91
9A6A
41UC
P9UF
F469
A996
PH6F
6HF3
211U
9115
61CA
91CC
6121
235P
21H0
9A6A
9A6A
41UC
9A6A
60P1
9A6A
41UC
211A
41UC
9A6A
60P1
41UC
9A6A
HC91
U9
U9
T9
T9
4 & 13
4 & 13
4 & 13
4 & 13
74LS75
25LS181
25LS181
13
74S04
74LS32
74LS02
74LS86
74LS75
0000/H33C
[5A4H]
0000/H33C
[5A4H]
Appendix A (cnt’d)
SHT4
IC #
PIN #
IC TYPE
SIGNATURE
IC #
PIN #
IC TYPE
SIGNATURE
U11
U11
T11
T11
T13
T13
T13
T13
T13
T13
T13
T13
T13
T13
T13
T13
T13
T13
T13
T13
T13
S13
S13
S13
S13
S13
S13
S13
S13
S13
1
15
1
15
1
3
4
7
8
13
14
17
18
2
5
6
9
12
15
16
19
1
2
5
6
9
12
15
16
19
74LS157
90AP
C32P
90AP
C32P
802H
HC89
UPFH
5H21
CCCC
5555
7F7F
0AFA
52F8
6H37
1F1A
4C4H
4819
5547
1106
8884
C004
6PF3
PH07
29A9
80HP
392C
A6HF
P75P
HP4P
37C1
J14
J14
J14
H14
H14
H14
I14
I14
I14
I14
I14
I14
I14
I8
I8
I10
I10
I10
H14
H14
H14
H14
H14
H14
H14
H14
I8
I8
3
4
5
2
3
1
1
3
6
9
7 & 10
11
12
9
8
13
12
11
11
12
13
9
8
10
5
4
3
4
74S288
P503
C15P
90AP
P503
U646
FU1U
C32P
H666
FU3U
FU1U
891F
6069
891F
891F
891F
19AP
6069
6909
5278
6909
H33C
H33C
891F
07U2
H33C
0000 / H33C
2518
2518
J14
J14
J14
J14
J14
J14
J14
10
11
12
13
14
1
2
74S288
J4
J4
J10
J10
J10
J10
J10
J10
1
2
1
4
12
13
3
2
74LS157
74LS377
74LS377
655C
7825
6PF3
390P
19AP
H666
FU3U
74S02
74LS163
74LS04
74S00
74S02
74LS04
74265
74LS107
578F
578F
54CC
0PH1
FFC9
C32P
473U
473U
Appendix A (cnt’d)
Schematic: SHT4
IC #
PIN #
IC TYPE
SIGNATURE
IC #
PIN #
P13
P13
3
4
74LS194
P6AF
6HF3
R11
R11
5
6
14
IC TYPE
SIGNATURE
UHUH
U095
P13
P13
P13
P13
P13
P13
P13
R13
R13
R13
R13
R13
R13
R13
R13
R13
R13
R13
R13
R13
R13
R13
R13
S11
S11
S11
S11
S11
S11
S11
S11
S11
S11
S11
S11
R11
R11
5
6
9 & 10
12
13
14
15
3
4
7
8
13
14
17
18
2
5
6
9
12
15
16
19
3
4
5
6
1
2
9
7
11
12
13
14
3
4
74LS377
74LS163
74LS163
A996
P9UF
FP22
480P
70F4
98A7
H9FP
0PF5
A8H3
6C47
C781
67C8
9AC5
C428
8C81
9UCC
P6A0
UHUH
U095
2788
1533
42P0
9U76
H9FP
98A7
70F4
480P
C32P
clk1
390P
C15P
99F8
2CAP
38P3
5278
9UCC
P6A0
R11
R11
R11
R11
P11
P11
P11
P11
P11
P11
P11
P11
S9
S9
S9
S9
S9
S9
S9
S9
S9
R9
R9
R9
R9
R9
R9
R9
R9
P9
P9
P9
P9
P9
P9
P9
P9
15
11
12
13
14
3
4
5
6
11
12
13
14
1
2
5
11
14
4
7
9
12
2
5
11
14
4
7
9
12
2
5
11
14
4
7
9
12
74LS163
74LS157
74LS157
74LS157
9HPH
50HC
F0A5
45H9
2788
1533
42P0
9U76
63P6
CC8C
C8PU
6865
19AP
H28U
211U
PH6F
F469
155C
7211
8066
HA00
510F
8CC5
47F6
A69C
UPAP
A7U5
5PF5
FC92
96FC
A2F9
A928
615F
C443
U62F
0499
578F
Appendix A (cnt’d)
Schematic: SHT5
IC #
PIN #
IC TYPE
SIGNATURE
IC #
PIN #
IC TYPE
SIGNATURE
G12
G12
G12
G12
G14
G14
G14
G14
G14
G14
G14
G14
G14
G14
G14
G14
F14
F14
F14
F14
F14
F14
F14
F14
F14
F14
F14
F14
E14
E14
E14
E14
E14
E14
E14
E14
E14
E14
E14
3
4
5
6
2
5
11
14
3
6
10
13
4
7
9
12
1
2
3
4
5
6
7
15
9
10
11
12
10
11
12
13
14
1
2
3
4
5
6
74S10
C004
8884
1106
U24U
6H37
1F1A
4C4H
4819
5547
1106
8884
C004
2293
62C7
P68U
283P
9673
51C4
U24U
283P
2293
62C7
P68U
2518
1846
FP05
8399
61C3
2293
62C7
P68U
283P
U24U
0C45
320U
C530
1P02
394A
8PP6
E14
E14
D14
D14
D14
D14
D14
D14
D14
D14
C14
C14
C14
C14
C14
C14
C14
C14
E10
E10
E10
E10
D10
7
9
1
2
3
4
5
6
7
9
1
2
3
4
5
6
7
9
9
7
13
14
1
74S288
409C
07PU
2H8F
A76P
41UC
7P23
9A6A
5H61
8ACC
5AA5
9069
7323
CH9A
96UA
67AH
2PFF
32U4
U100
802H
8UC2
9673
51C4
7341
B6
B6
A8
A8
A8
G10
G10
G10
G10
G10
G10
G10
G10
G10
9
8
8
11
5
3
4
5
6
9 & 10
12
13
14
15
74S158
74S287
74S288
16
74S288
74S288
74LS163
74LS04
74LS107
74LS194
615F
615F [0000]
615F [0000]
615F [0000]
30AP [Hi]
A197
2379
AH4H
AC5H
F1CH
0F96
4U54
8233
8H73
Appendix A (cnt’d)
Schematic: SHT5
IC #
PIN #
IC TYPE
SIGNATURE
IC #
PIN #
IC TYPE
SIGNATURE
U7,R7
T7,P7
“
“
“
“
“
“
“
“
“
“
“
“
1
2
3
4
5
6
7
8
18
19
20
21
22
23
ROM
C443
FC92
5PF5
A7U5
UPAP
HA00
8066
7211
473U
578F
Lo
Lo
0499
U62F
8
11
5
6
3
9
15
11
12
13
14
9
15
11
12
13
14
9
11
12
13
14
4
7
74LS107
9
12
4
7
9
12
4
7
9
12
4,13
13
1
2
3
1
5
4
11
12
13
10
7,10
11
12
1
2
3
4
5
6
7
8
19
22
23
74LS157
A8
A8
A8
F10
A12
S11
S11
S11
S11
S11
S11
R11
R11
R11
R11
R11
R11
P11
P11
P11
P11
P11
S9
S9
S9
S9
R9
R9
R9
R9
P9
P9
P9
P9
U9,T9
J14
J14
J14
J14
H14
H14
H14
H14
H14
H14
H14
I14
I14
I14
U7,R7
T7,P7
“
“
“
“
“
“
“
“
“
/ 1285 /
/ UUF5 /
/ 0A1F /
/ H162 /
/ FF86 /
/ FA45 /
/ 4473 /
/ 3124 /
/ A8PF /
/ 4U1H /
/ 5AH4 /
/ 2AF1 /
/ 86F5 /
/ UUPU /
/ A9P3 /
/ 83UU /
/ 5AH4 /
/ 5AH4 /
/ A98H /
/ 8P9C /
/ 5AH4 /
/ HOU8 /
/ 6HH2 /
/ 87UC /
/ 6HH2 /
/ 4473 /
/ FA45 /
/ FF86 /
/ H162 /
/ 0A1F /
/ UUF5 /
/ 1285 /
/ U801 /
/ 4U1H /
/ A8PF /
/ 3124 /
74LS151
74LS32
74LS163
74LS157
/ 0000 /
/ 0000 /
/ Hi /
/ 61H3 /
/ 2AF1 /
/ 2AF1 /
/ 2F0H /
/ 73HU /
/ F745 /
/ 2AF1 /
/ HA98 /
/ P781 /
/ 8HA7 /
/ AC18 /
/ F55H /
/ 2AF1 /
/ 7C77 /
/ 17UP /
/ C962 /
/ 9855 /
/ 9515 /
/ U801 /
17
74LS157
74LS157
74LS75
74S288
74S02
74LS163
PROMS
Appendix A (cnt’d)
Schematic: SHT5
IC #
PIN #
IC TYPE
SIGNATURE
IC #
PIN #
IC TYPE
SIGNATURE
F10
F10
F10
F10
F10
F10
F10
F10
F10
F10
A12
A12
3
2
1
9
10
11
13
14
15
6
2
3
74LS151
30AP [ Hi ]
018F
8H73
4C4H
1F1A
6H37
0F96
4U54
8233
F384 [61H3]
67AH
390P [2AF1]
9
10
8
10
11
5
6
1
4
2
74LS08
11
12
13
1
4
2
3
12
13
3
11
8
10
6
5
74LS08
74LS02
C10
C10
C10
B8
B8
B8
B8
B8
B8
B8
C10
D10
D10
A8
A8
A8
A8
C8
C8
C8
C8
C8
C8
C8
C8
Lo
C32P
C32P
32U4
802H
49P2
49P2
U6HH
C32P
9081
665F
C32P
Hi
C32P
C32P
E12
E12
A10
A10
A10
D12
D12
D12
D12
D12
D12
D12
D12
B10
B10
5
6
9
10
8
3
4
5
6
9
10
11
8
13
11
F12
F12
F12
F12
F12
I10
D10
D10
F12
F12
F12
F12
D10
D10
D10
A14
A14
A14
B12
B12
B12
A12
1
2
4
5
6
3
5
4
10
12
13
8
8
9
10
1
2
3
9
11
8
6
74LS32
74LS107
74LS04
74LS00
74LS27
74LS32
2PFF
7341
U646
C32P
6PF3
19AP
19AP
409C
802H
4A50
5547
5547
2518
51C4
36C4
4819
67AH
36C4
Lo
5547
36C4
8PP6
Lo
32U4
32U4
18
74LS107
7425
74LS00
74LS02
7425
74S08
74LS10
74LS32
6H37
4819
1F1A
FC4H
8884
0000 / PC9U
67AH
FFC9
8884
C004
2518
774P
774P
6598
~12H6~
51C4
32U4
12A8
2518
0F96
C05P
A76P
Appendix A (cnt’d)
Schematic: SHT5
SHT6
IC #
PIN #
IC TYPE
SIGNATURE
IC #
PIN #
IC TYPE
SIGNATURE
K4
K4
K4
C12
C12
C12
C12
C12
C12
C12
C12
C12
B12
B12
B12
B12
A10
A10
A10
A10
A10
A10
A10
A6
A6
A6
A14
A14
A14
A12
A12
B14
B14
B14
B14
B14
B14
B14
8
9
10
1
2
12
3
4
5
6
10
8
3
4
5
6
12
11
4
5
6
1
3
5
6
4
4
5
6
10
8
9
8
1
2
3
5
6
74LS02
CUH7
0UHA
AA31
1P02
2518
C4AF
2518
U6HH
96UA
H47A
774P
1798
C32P
FP05
1798
077H
802H
802H
1798
1846
7890
6PF3
6PF3
1846
U100
AAP8
320U
7341
F567
0C45
FP22
F567
4UHF
774P
7323
UC77
F567
3P10
H8
H8
H8
I8
G8
G8
F8
F8
F8
F8
B6
H8
H8
H8
H8
H8
H8
G8
G8
G8
A12
A12
A12
I8
H8
J8
J8
J8
J8
J8
J8
F6
F6
I8
H6
J6
J2
J2
J2
5
6
4
12
4
2
9
7
1
15
4
11
12
13
8
9
10
11
5
6
12
13
11
2
1
9
10
8
12
13
11
3
6
10
13
11
3
12
11
74LS02
C530
5547
403F
403F
6598
239A
C530
F9U6
C32P
F9U6
F9U6
F9U6
239A
U97A
5547
C530
U50F
0109
018F
018F
018F
F9U6
204A
204A
3980
F97P
F6A4
0UHA
651H
HAFA
CUH7
1P02
6598
6598
9820
9820
9820
C9UC
2873
74LS27
74LS10
74LS00
74LS02
74S08
74LS32
74S32
19
74LS04
74LS107
74LS163
74LS04
74LS02
74LS107
74LS32
74LS04
74LS02
74LS86
74LS27
74LS04
74LS164
74LS10
74LS32
74LS32
Appendix A (cnt’d)
Schematic: SHT6
IC #
PIN #
IC TYPE
SIGNATURE
IC #
PIN #
IC TYPE
SIGNATURE
E8
E8
E8
E8
E8
E8
E8
E8
E8
E8
E8
E8
E6
E6
E6
E6
E6
E6
E6
E6
D6
D6
D6
D6
D6
D6
C6
C6
C6
C6
C6
C6
C6
10
11
12
13
14
1
2
3
4
5
6
7
1
7
9
11
12
13
14
15
6
11
12
13
14
15
3
4
11
12
13
14
15
74S288
A8F6
90P2
7U69
A19U
0495
5C13
26U2
1825
9890
AUH7
673F
FH67
403F
3980
6598
90P2
9620
9170
A8F6
049C
A3U1
PF0A
A19U
7U69
FA81
CH8U
1P24
0495
H3PU
0495
1P24
A3U1
0109
S2
S2
S2
S2
S2
S2
S2
S2
S2
S2
S2
S2
S2
S2
S2
S2
P2
P2
P2
P2
P2
P2
P2
P2
P2
P2
P2
P2
P2
P2
P2
P2
P2
M2
M2
M2
M2
M2
M2
4
14
13
17
3
7
8
18
5
15
12
16
2
6
9
19
1
4
14
13
17
3
7
8
18
5
15
12
16
2
6
9
19
1
4
14
13
17
3
74LS377
F6A4
HA32
F97P
0C22
HAFA
UAC5
651H
F567
6P3U
6P3U
8A2A
6P3U
3796
3796
U366
1H2A
C530
P38A
30CC
FUC5
725C
9172
711H
FPF2
HAC9
6P3U
0000
P415
6P3U
2ACF
1H2A
C7P5
AA58
C530
OU1F
0841
242C
AC5H
26PP
U2
U2
U2
U2
S2
11
10
13
12
1
74LS163
74LS163
74LS163
74S04
74LS377
F6A4
F6A4
HAFA
HAFA
C530
20
74LS377
74LS377
Appendix A (cnt’d)
Schematic: SHT6
IC #
M2
M2
M2
M2
M2
M2
M2
M2
M2
M2
M2
-------
PIN #
IC TYPE
SIGNATURE
7
74LS377
67HU
8
166U
18
C432
5
8A2A
15
6P3U
12
8A2A
16
0000
2
0000
6
C7P5
9
PP4F
19
0000
----------- ----------------- ---------------------
21
IC #
PIN #
IC TYPE
SIGNATURE
Key for Appendix A
clk1
clk2
Hi
Lo
nnnn / mmmm
∗nnnn
/nnnn/
CLOCK signal, will show 0000 signature
CLOCK signal,
“
TTL level HIGH,
“
TTL level LOW,
“
nd
Lower (2 ) signature obtained with
edge CLK (button IN)
Signature obtained with J12 (& I12) pin 10 tied to GND
Signature available with NO JMI option (jumper removed)
22
Appendix B
23
Appendix C
EXAMPLES OF USEFUL MANUFACTURERS’ LITERATURE
Schematic Package #72-10626-02 Rev J, C.P.U. Schematic Diagram with Signatures, Cinematronics Inc.
Application Note AN-222-4, Guidelines for Signature Analysis: Understanding the Signature
Measurement, Hewlett-Packard Inc., Publication Number 5952-7684.
Application Note AN-222-6, Troubleshooting with Composite Signatures, Hewlett-Packard Inc.,
Publication Number 5952-7684.
24