Download KITPF0200EPEVBE, Evaluation Board - User Guide

Freescale Semiconductor
User’s Guide
Document Number: KTPF0200HWUG
Rev. 1.0, 2/2014
KITPF0200EPEVBE Evaluation Board
Featuring the MMPF0200 12-Channel Configurable PMIC
Figure 1. KITPF0200EPEVBE Evaluation Board
Contents
1 Kit Contents / Packing List . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
2 Jump Start . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
3 Important Notice . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
4 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
5 Evaluation Board Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
6 MMPF0200NPAEP Device Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
7 MC9508JM60 Device Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
8 Required Equipment . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
9 Evaluation Board Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
10 Evaluation Board Schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
11 KITPF0200EPEVBE Board Layout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
12 Bill of Materials . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
13 References . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37
14 Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38
© Freescale Semiconductor, Inc., 2014. All rights reserved.

Kit Contents / Packing List
1
Kit Contents / Packing List
•
•
•
2
KITPF0200EPEVBE evaluation board
KITPF0200QSG Quick Start Guide
Warranty card and Technical support brochure
Jump Start
•
•
•
•
Go to www.freescale.com/analogtools
Locate your kit
Review your Tool Summary Page
Look for
Jump Start Your Design
•
Download documents, software, and other information
KTPF0200HWUG, Rev. 1.0
2
Freescale Semiconductor
Important Notice
3
Important Notice
Freescale provides the enclosed product(s) under the following conditions:
This evaluation kit is intended for use of ENGINEERING DEVELOPMENT OR EVALUATION
PURPOSES ONLY. It is provided as a sample IC pre-soldered to a printed circuit board to make it easier
to access inputs, outputs, and supply terminals. This EVB may be used with any development system or
other source of I/O signals by simply connecting it to the host MCU or computer board via off-the-shelf
cables. This EVB is not a Reference Design and is not intended to represent a final design
recommendation for any particular application. Final device in an application will be heavily dependent
on proper printed circuit board layout and heat sinking design as well as attention to supply filtering,
transient suppression, and I/O signal quality.
The goods provided may not be complete in terms of required design, marketing, and or manufacturing
related protective considerations, including product safety measures typically found in the end product
incorporating the goods. Due to the open construction of the product, it is the user's responsibility to take
any and all appropriate precautions with regard to electrostatic discharge. In order to minimize risks
associated with the customers applications, adequate design and operating safeguards must be provided
by the customer to minimize inherent or procedural hazards. For any safety concerns, contact Freescale
sales and technical support services.
Should this evaluation kit not meet the specifications indicated in the kit, it may be returned within 30 days
from the date of delivery and will be replaced by a new kit.
Freescale reserves the right to make changes without further notice to any products herein. Freescale
makes no warranty, representation or guarantee regarding the suitability of its products for any particular
purpose, nor does Freescale assume any liability arising out of the application or use of any product or
circuit, and specifically disclaims any and all liability, including without limitation consequential or
incidental damages. “Typical” parameters can and do vary in different applications and actual
performance may vary over time. All operating parameters, including “Typical”, must be validated for each
customer application by customer’s technical experts.
Freescale does not convey any license under its patent rights nor the rights of others. Freescale products
are not designed, intended, or authorized for use as components in systems intended for surgical implant
into the body, or other applications intended to support or sustain life, or for any other application in which
the failure of the Freescale product could create a situation where personal injury or death may occur.
Should the Buyer purchase or use Freescale products for any such unintended or unauthorized
application, the Buyer shall indemnify and hold Freescale and its officers, employees, subsidiaries,
affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable
attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with
such unintended or unauthorized use, even if such claim alleges that Freescale was negligent regarding
the design or manufacture of the part.Freescale™ and the Freescale logo are trademarks of Freescale
Semiconductor, Inc. All other product or service names are the property of their respective owners.
© Freescale Semiconductor, Inc. 2014
KTPF0200HWUG, Rev. 1.0
Freescale Semiconductor
3
Introduction
4
Introduction
The KITPF0200EPEVBE evaluation board allows full evaluation capability of the MMPF0200 PMIC for the i.MX
family of application processors. It provides access to all output voltage rails as well as control and signal pins
through terminal block connectors for an easier out-of-the-box evaluation experience. A single terminal block
connector for the input power supply allows the user to supply the board with an external DC power supply to fully
evaluate the performance of the device.
The KITPF0200EPEVBE comes with a non-programmed version of the MMPF0200 PMIC, and it is configured to
power up from the default power-up sequence. However, an integrated control/fuse programming interface is
provided to allow the customer to program the OTP/TBB (One Time Programmable/Try-Before-Buy) memory and
select it as the default source for the power-up configuration. Likewise, the programming interface allows full
control of the MMPF0200 through the I2C communication lines.
This document is intended to provide the hardware description of the KITPF0200EPEVBE evaluation board.
KTPF0200HWUG, Rev. 1.0
4
Freescale Semiconductor
Evaluation Board Features
5
Evaluation Board Features
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•
5.1
Input voltage operation range from 3.1 to 4.5 V
Output voltage supplies accessible through detachable terminal blocks
• Three to four independent buck converters
• One 5.0 V boost regulator
• Six general purpose LDO regulators
• One DDR memory termination voltage reference
• One VSRTC supply
Coin cell support for “Try-Before-Buy” (TBB) mode
On/off push button support
Hardware configuration flexibility through various jumper headers and resistors
Integrated USB to I2C programming interface for full control/configuration
• Onboard OTP programming supply and control
• Onboard PMIC control through the I2C register map
• Fully featured programmer through J36 for external device control/programming
On board connectors for interfacing with future evaluation/debug tools
Compact form factor (4 x 4 in2)
Board Identification
The KITPF0200EPEVBE evaluation board is designed to be used along with the KITPFGUI 4.0 Graphical User
Interface. Table 1 provides a list of all available versions of this board and the respective software compatibility
and marking differences. The hardware configuration outlined in this document is valid for layout REV D and
schematic Rev D.
Table 1. Board Deviation Summary
Board Name
Layout
Hardware
Revision
deviations
(170-27458)
KITPF0200EPEVBE
Rev D
-
Software Version
Software User Guide
KITPFGUI 4.0 – release 4.0.0.x Refer to Document KTPFSWUG4.pdf
KTPF0200HWUG, Rev. 1.0
Freescale Semiconductor
5
Evaluation Board Features
170-27458 REV D
Layout Revision
printed in Copper
KTPF0200HWUG, Rev. 1.0
6
Freescale Semiconductor
MMPF0200NPAEP Device Features
6
MMPF0200NPAEP Device Features
The MMPF0200 is highly integrated power management IC ideally suited i.MX 6 series of applications processors.
It features the following:
•
•
•
•
•
•
•
•
Four buck regulators
Boost regulator to 5.0 V output
Six general purpose linear regulators
Programmable output voltage, sequence, and timing
OTP (One Time Programmable) memory for device configuration
Coin cell charger and RTC supply
DDR termination reference voltage
Power control logic with processor interface and event detection
Freescale analog ICs are manufactured using the SMARTMOS process, a combinational BiCMOS manufacturing
flow that integrates precision analog, power functions, and dense CMOS logic together on a single cost-effective
die.
7
MC9508JM60 Device Features
The KITPF0200EPEVBE implements a Freescale MC9S08JM60 low-cost, high-performance 8-bit HCS08
microcontroller to interface via USB to I2C to control the main PMIC.
8-bit HCS08 Central Processing Unit (CPU)
•
•
Up to 24 MHz internal bus (48 MHz HCS08 core) frequency offering 2.7 to 5.5 V across temperature range
of -40 to +85 °C
Support for up to 32 peripheral interrupt/reset sources
On-Chip Memory
•
•
•
Up to 60 K flash read/program/erase over full operating voltage and temperature
Up to 4 K RAM
256 Byte USB RAM
KTPF0200HWUG, Rev. 1.0
Freescale Semiconductor
7
Required Equipment
8
Required Equipment
8.1
•
•
•
•
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8.2
•
•
•
Hardware Requirements
Power supply:
• Output voltage range from 3.1 to 4.5 V
• Current capability from 3.0 to 5.0 A (current requirement is dependent on output loading)
Supply to board connection cables (capable of withstanding up to 5.0 A current)
USB (male) to mini USB (male) communication cable.
USB-enabled computer.
Multimeter
Software Requirements
Windows XP or Windows 7 operating system
KITPFGUI 4.0.zip: Graphical User Interface (GUI) for KITPF0200EPEVBE
Refer to document KTPFSWUG4.PDF located at Freescale.com for detailed instruction on software
installation and control.
KTPF0200HWUG, Rev. 1.0
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Freescale Semiconductor
Evaluation Board Configuration
9
Evaluation Board Configuration
Connect the power supply and the USB communication cables as shown in Figure 2. Voltmeters are optional but
they are recommended to accurately verify that each one of the output supplies provides the correct voltage level.
PF0200 Evaluation
Board
Figure 2. Evaluation Board Setup
Note: The KITPF0200EPEVBE allows the selection of an SW2 regulator output or an external 3.3 V LDO output
as the VDDIO/I2C pull-up supply. By default, the SW2 regulator is the source for the VDDIO supply (J30 = 3-2). If the
SW2 regulator is to be set below 3.0 V, then make sure the 3.3 V LDO output is connected to VDDIO and the I2C
pull-up resistors by removing R34 and R33 and the shorting pins 1, 2, and 3 of J30.
KTPF0200HWUG, Rev. 1.0
Freescale Semiconductor
9
Evaluation Board Configuration
9.1
Hardware Configuration
By default, the KITPF0200EPEVBE evaluation board is set to power-up from the default power-up sequence.
Verify that the jumpers are placed in the right position as shown in Figure 3. For a detailed description of the jumper
functionality, refer to Table 2.
SWVIN
PVIN
GND
SDA
J25
SCL
GND
J31
VDDIO
GND
J33
SWBST
RSTMCU
SDWNB
J8
INTB
GND
PWRON
STBY
J32
J29
BH2
BH4
VREFDDR1
REFDDR
GND
SNVS
GEN6
GEN5
GEN4
1
J16
VGEN4
GND
C24
R86
J18
J11
1
GNDY
J19
J18
VIN_SWB3
J16
LX_SW2
L9
J21
1
1
VINREFDDR1
VGEN3
GND2
J6
GND3
LX_SW4
VIN_SW4
1
R42
R45
S2
J4
VIN_SW2
SW2
SW4
VGEN2
VGEN1
F1
J19
SWA3
1
1
S4
LX_SWA3
VHALF1
S1
1
VGEN5
VIN_SWA3
J5
J34
5
1
SWB3
C27
C29
C28
J21
VGEN6
R17
C35
C38
1
VIN1
C
C48
C34
LX_SWC1
S3
C
R67
R68
L11
1
C9
R9
6
1
VIN_SWBST1
L3
R6C3
5
R11
2
R51
1
R50
J35
C84
C8
R24
R16
C7
C45
C40
R22
C41C49
L5
C1
R7
C23
8
J2
J20
R30
R35
R4
C22
2
C21
R79
LX_SWBST1
6
1
5
VDDOTP1
2
J9
1
C83
VSWBST1
1
J46 C16
GND6
R3
1
J45
ICTEST1
C15
D1
L1
1
LX_SWA1
J1
CA
1
C18
2
C17
VIN3
R28
R2C20
VIN_SWA1
R25
C53
C46
C87
R32 C55 C52
R23
C51
R29
C47
C43 L7
C54
C5656 U1 C19 C50
C31
1 R31
C42
SWAB1
C30
C2 1
C5 1
C4
L2
LX_SWB1
R70
1
C6
C32
R8 2
1
29
VIN_SWB1
14
2
R85
28 C44
15
GND4
R10
C10
J3
C33
L8
1
2
LX_SWB3
1
C11
C25
J39
R27
R26
L4 R21
C14
C12
C13
1
C26
1
R20
VIN2
SWC1
L6
2
VIN_SWC1
J7
C82
1
1
STANDBY1
1
7
SCL1
R1
J22 INTB1
1
GEN3
SDWNB1
J26
1
GND5
J41
C39 1
J17
A
D10
D11
A
SDA1
VDDIO1
J24
VSNVS1
VIN_SENSE1
1
-
1
1
PWRON1
C36
C37
RESETBMCU1
VCORE1
R37
J27
VCOREREF1
J40
1
VCOREDIG1
R36
J32
J47
1
GEN2
1
1
J29
1
GND
1 2
J33 1 D2 J8
4
D3
D4
CA
C A
3
1 R69
R38 R40
R39
Q3
6
Q2
1
Q1
1
1
4
3
J31
BAT1
+
1
GEN1
1
J25
C77
J36
1
2
SW1
GND1
J10
1
J13
1
J12
J15
1
1
J14
2013 FREESCALE
BH3
BH1
PLACE LABEL HERE
J11
Sw1C
GND
J10
SW1AB
GND
J13
SW4
GND
SW2
GND
J14
J15
J12
SW3B
GND
SW3A
GND
Figure 3. Default Jumper Configuration Diagram
KTPF0200HWUG, Rev. 1.0
10
Freescale Semiconductor
Evaluation Board Configuration
9.2
Hardware Description
The KITPF0200EPEVBE operates with a single power supply from 3.1 to 4.5 V and is controlled via USB with the
help of an integrated USB-I2C communication bridge. By applying the input voltage supply, the
KITPF0200EPEVBE will power-up according to the default power-up sequence described in the MMPF0200
datasheet. For controlling the MMPF0200 device or programming the OTP registers, refer to the
KTPFSWUG4.PDF user guide.
Important notice: If power-up sequences and configuration are to be modified, the user must ensure that the
register settings are consistent with the hardware configuration. This is most important for the buck regulators,
where the quantity, size, and value of the inductors depend on the configuration (single/dual phase or independent
mode) and the switching frequency. Additionally, if an LDO is powered by a buck regulator, it will be gated by the
buck regulator in the start-up sequence. Refer to the MMPF0200 Data Sheet for details on buck regulator setup.
9.3
Jumper Description
Table 2. KITPF0200EPEVBE Jumper Description
Jumper
Default
Description
J1 - J7
Closed
Buck regulators input power path isolation. 
Short these jumpers to allow SWxIN to be powered from the SWVIN supply.
J9
Closed
SWBST regulator input power path isolation. 
Short this jumper to allow SWBSTIN to be powered from the SWVIN supply.
J17
5-6
VDDOTP Supply selector
• 1-2: Connect VDDOTP to the OTP Boost output (VDDOTPIN) for OTP programming.
• 3-4: Connect VDDOTP to GND to power-up from OTP/TBB sequence.
• 5-6: Connect VDDOTP to VCOREDIG to power up from Default Power-up sequence.
J20
1-2
Coin cell selector.
• 1-2: Enables BAT1 as the main coin cell supply.
• 2-3: Enables BAT2 as the main coin cell supply.
J40
Closed
Shorts PVIN and SWVIN. Allows supply isolation to provide more accurate efficiency readings
on the switching supplies.
J41
Open
Shorts SWVIN to VIN. Allows one to isolate or connect the MMPF0200 logic input supply to
SWVIN net. (debugging option)
J27
Closed
Shorts PVIN to VIN. Allows one to isolate or connect the MMPF0200 logic input supply to PVIN
net. (debugging option)
J22
2-3
MMPF0200 input logic supply selector.
• 1-2: Connects MMPF0200 VIN pin to the 3.3 V external LDO regulator for debugging
purposes.
• 2-3: Connects MMPF0200 VIN pin to the main input supply. Refer to Figure 13.
J26
Open
Short to hold PWRON pin low.
J24
Open
Short to pull STANDBY to VSNVS voltage supply.
J47
Close
Connects PWRON pin on the MMPF0200 to an I/O on the MCU.
J45
1-2
3-4
Allows I2C signal isolation on the local MMPF0200 when the KITPF0200EPEVBE is used as
an external programmer.
KTPF0200HWUG, Rev. 1.0
Freescale Semiconductor
11
Evaluation Board Configuration
Table 2. KITPF0200EPEVBE Jumper Description (continued)
Jumper
9.4
Default
Description
J46
3-4
VDDIO supply / I2C pull-up supply selector
• 1-2: Pull the SCL/SDA signals to the external 3.3 V LDO regulator output.
• 3-4: Pull the SCL/SDA signals to SW2 output.
NOTE: Do not connect both positions at the same time.
J39
1-2
Control Interface input supply selector
• 1-2: Enables PVIN node as the input supply source for the control interface.
• 2-3: Enables USB power as the input supply source for the control interface.
Connectors and Terminal Blocks Description
Table 3. Terminal Blocks descriptions
Connector
Function
J8
SWBST
J10
SW1AB
J11
J12
Not Available
J13
J14
Not Available
J15
SW3B
J16
VGEN1/VGEN2
J18
VGEN3/VGEN4
J19
VGEN5/VGEN6
J21
VSNVS/VREFDDR
J25
Main Input Supply
J29
Interfacing 1
J32
Interfacing 2
SW2
SW3A
Pin definition
Pin 1 - SWBST Output
Pin 2 - GND
Pin 1 - SW1AB Output
Pin 2 - GND
Reserved for board compatibility
Pin 1 - SW2 Output
Pin 2 - GND
Reserved for board compatibility
Pin 1 - SW3A Output
Pin 2 - GND
Pin 1 - SW3B Output
Pin 2 - GND
Pin 1 - VGEN1 Output
Pin 2 - GND
Pin 3 - VGEN2 Output
Pin 1 - VGEN3 Output
Pin 2 - GND
Pin 3 - VGEN4 Output
Pin 1 - VGEN5 Output
Pin 2 - GND
Pin 3 - VGEN6 Output
Pin 1 - VSNVS Output
Pin 2 - GND
Pin 3 - VREFDDR Output
Pin 1 - GND
Pin 2 - PVIN
Pin 3 - SWVIN
Pin 1 - INTB
Pin 2 - SDWNB
Pin 3 - RESETBMCU
Pin 1 - STANDBY
Pin 2 - PWRON
Pin 3 - GND
KTPF0200HWUG, Rev. 1.0
12
Freescale Semiconductor
Evaluation Board Configuration
Table 3. Terminal Blocks descriptions (continued)
Connector
Function
2
J31
I C Signals
J33
VDDIO
Pin definition
Pin 1 - SCL
Pin 2 - SDA
Pin 1 - VDDIO
Pin 2 - GND
RESETBMCU
SDWNB
INTB
PWRON
STANDBY
SWBST Output
VDDIO
I2C Interface
Vin Supply Input
+- +-
+-
INTB State
Indicator
+- ++ -+ +- ++ -+
PWRON State
Indicator
Device Attached
Indicator
OTP Programming
Indicator
Mini USB
VREFDDR Output
VSNVS Output
VGEN6 Output
VGEN5 Output
VGEN4 Output
VGEN3 Output
VGEN2 Output
VGEN1 Output
+- +- +- +- +- +SW3A Output
SW3B Output
SW2 Output
SW1AB Output
Figure 4. Input/Output Terminal Blocks
KTPF0200HWUG, Rev. 1.0
Freescale Semiconductor
13
Evaluation Board Configuration
Table 4. Connector Description
Connector
Function
J34
Mini USB connector
J35
BDM connector
J36
Programmer connector
J42
Debug Port 1
Pin definition
Pin 1 - VBUS
Pin 2 - DPin 3 - D+
Pin 4 - NC
Pin 5 - GND
Chassis - GND
Pin 1 - BKGD_JM60
Pin 2 - GND
Pin 3 - NC
Pin 4 - RST_JM60
Pin 5 - NC
Pin 6 - USB_PWR
Pin 1 - VDDOTPIN (8.5 V boost output)
Pin 2 - 3V3 (3.3 V LDO output)
Pin 3 - GND
Pin 4 - MCU_SCL (I2C clock signal)
Pin 5 - MCU_SDA (I2C data signal)
Pin 6 - PWRON (Controls the PWRON on the target device)
Pin 7 - GPIO 1 (General Purpose GPIO)
Pin 8 - GPIO 2 (General Purpose GPIO)
Debugging connector for future development tools.
J42
2
4
6
8
10
12
14
16
18
20
SW1C
SW1AB
SW4
SW2
SW3B
SW3A
1
3
5
7
9
11
13
15
17
19
SW1C
SW1AB
SW4
SW2
SW3B
SW3A
HDR_2X10
DNP
J43
Debug Port 2
Debugging connector for future development tools
J43
2
4
6
8
10
12
14
16
18
20
1
3
5
7
9
11
13
15
17
19
VGEN1
VGEN2
VGEN3
VGEN4
ST
VGEN5
VGEN6
VSNVS
VREFDDR
HDR_2X10
DNP
J44
Debug Port 3
Debugging connector for future development tools
J44
STANDBY
2
4
6
8
10
12
14
16
18
20
1
3
5
7
9
11
13
15
17
19
PWRON
INTB
SDWNB
RESETBMCU
SWBST
VDDIO
MCU_SCL
MCU_SDA
PVIN
SWVIN
HDR_2X10
DNP
KTPF0200HWUG, Rev. 1.0
14
Freescale Semiconductor
Evaluation Board Configuration
9.5
Debug and Configuration Components
The KITPF0200EPEVBE allows full flexibility to change the default configuration of SW1A/B and SW3A/B outputs
to a more suitable configuration for a specific application. It also provides several source options for the LDO
supplies to test various loading and supplying scenarios.
Test point are provided on key nodes of the KITPF0200EPEVBE to allow full debugging capability during
application development.
9.5.1
SW1A/B Configuration Components
SWAB1
DNP
SW1AB
L2
R4
1
SW1ALX
1
2
0.001
1uH
LX_SWA1
DNP
R6
0.001
R8
L3
1
SW1BLX
J10
2
R7
0.001
DNP
C21
C22
C23
C24
22UF
22UF
22UF
22UF
SW1ABFB
SUB_TB_2x1
2
1uH
0.001
LX_SWB1
DNP
SWC1
R9
0.001
DNP
R10
0.001
DNP
L4
1
SW1CLX
DNP for KITPF0200EPEVBE
SW1C
1uH
DNP
LX_SWC1
DNP
DNP
J11
R11
2
1
2
0.001
DNP
C25
22UF
DNP
C26
22UF
DNP
SW1CFB
SUB_TB_2x1
DNP
Figure 5. SW1A/B/C Output Configuration
The SW1A/B regulator can be configured in various operating modes as described in Table 5.
Table 5. SW1AB Configuration Chart
Component SW1A/B Single phase
R6
R4
R7
R8
L2
L3
Closed
Closed
DNP
DNP
1.0 H
ISAT = 4.5 A
N/A
L4
R9
R11
R10
RESERVED
RESERVED
RESERVED
RESERVED
SW1A/B Dual phase
DNP
Closed
Closed
Closed
1.0 H
ISAT = 2.4 A
1.0 H
ISAT = 2.4 A
RESERVED
RESERVED
RESERVED
RESERVED
KTPF0200HWUG, Rev. 1.0
Freescale Semiconductor
15
Evaluation Board Configuration
9.5.2
SW3A/B Configuration Components
SW3A
LX_SWA3
DNP
SWA3
1
SW3ALX
J14
DNP
L7
2
1
2
1uH
C30
22UF
C31
22UF
SW3AFB
SUB_TB_2x1
R17
R16
0.001
DNP
0.001
SW3B
LX_SWB3
DNP
L8
1
SW3BLX
SWB3
DNP
R70
J15
2
1
2
1uH
0.001
DNP
C32
22UF
C33
22UF
SW3BFB
SUB_TB_2x1
Figure 6. SW3A/B Output Configuration
The SW3A/B regulator can be configured in various operating modes as described in Table 6.
Table 6. SW3ABC Configuration Chart
Component
SW3A/B
Single phase
SW3A/B
Dual phase
SW3A Independent
SW3B Independent
Closed
Closed
DNP
1.0 H
ISAT = 3.9 A
N/A
DNP
Closed
Closed
1.0 H
ISAT = 3.0 A
1.0 H
ISAT = 3.0 A
DNP
DNP
Closed
1.0 H
ISAT = 3.0 A
1.0 H
ISAT = 3.0 A
R16
R17
R70
L7
L8
9.5.3
LDO Input Supply Source Selection
LDO SUPPLIES
VGEN SENSE
SW2
0
R21
3V3
0
R24 DNP
SW2
0
R22
VIN2
27
VIN
0
R23 DNP
VIN3
40
SW2
0
R25
U1B
VGEN1
VIN1
17
VIN1
VGEN1
VIN2
VGEN2
VIN3
VGEN4
C40
1.0UF
VGEN5
31
SW3A
0
R26
SW3B
0
R27 DNP
30
C84
1.0UF
VGEN3
VINREFDDR1
C44
DNP
0.1UF
VHALF1
DNP
C45
0.1UF
VREFDDR
VGEN6
VINREFDDR
LICELL
29
16
18
VGEN2
26
VGEN3
2.2UF
28
VGEN4
4.7uF
C35
VGEN3
C38
DNP
VGEN1
VGEN1
VGEN1
VGEN2
VGEN2
DNP
VGEN2
VGEN3
VGEN3
DNP
VGEN3
VGEN4
VGEN4
DNP
VGEN4
VGEN5
VGEN5
DNP
VGEN5
VGEN6
VGEN6
DNP
VGEN6
VSNVS1
VSNVS
DNP
VSNVS
2.2UF
VGEN4
4.7uF
C41
VGEN5
39
VGEN5
41
VGEN6
C42
2.2UF
VGEN6
C43
2.2UF
42
VSNVS
VSNVS
C34
VGEN2
VHALF
43
VSNVS
R86
0
DNP
J20
C46
0.22uF
1
2
3
C47
0.47uF
1-2
CLOSED
BAT1
HDR 1X3
-
3
LICELL
6.8mm Leaded
Place Top
+
2
1
MMPF0200NPAEP
VGEN1
1
VREFDDR
R20 DNP
2
VREFDDR1
DNP
3V3
0
BAT2
BK-879
6.8mm
Place Bottom
DNP
Figure 7. LDO Schematic Configuration
KTPF0200HWUG, Rev. 1.0
16
Freescale Semiconductor
Evaluation Board Configuration
CONTROL LOGIC
3V3
VIN
PWRON1
DNP
VSNVS
2-3 CLOSED
J47
50
51
VCOREREF
VCOREREF1
52
DNP
DNP
C51
1.0UF
C52
1.0UF
C53
0.22uF
J46
VCORE
VCORE1
48
C54
1.0UF
VDDOTP
VDDOTP1
DNP
2
4
49
47
55
C55
1.0UF
DNP
HDR 2X2
0.1UF
SCL1
DNP
J45
C56
MCU_SCL
MCU_SDA
1
3
2
4
54
53
HDR 2X2
SDA1
DNP
1
R37
4.7K
PVIN
HDR 1X2 TH
VIN
VCOREDIG
PWRON
VCOREREF
RESET_MCU
VCORE
STANDBY
GNDREF
SDWN
INT
56
1
PVIN
R31
10.0K
PVIN
R30
10.0K
R32
10.0K
2 FSMSM
SW1
3
RESETBMCU1
DNP
STANDBY1
DNP
SDWNB1
DNP
INTB1
DNP
RESETBMCU
4
STANDBY
2
SDWNB
1
INTB
VDDOTP
VSNVS
VDDIO
ICTEST
5
ICTEST
SCL
0
ICTEST1
SDA
DNP
CONSUMER
R36
4.7K
PWRON
R35
J24
1
DNP
VDDIO1
DNP
3V3
SW2
1M
HDR 1X2 TH
J26
2
1
2
VCOREDIG
VCOREDIG1
DNP
1
3
2
U1A
VIN_SENSE1
3-4 CLOSED
R28
HDR 1X3
HDR 1X2 TH
1
2
3
J22
MMPF0200NPAEP
STANDBY
VDDIO
C87
1.0UF
R29
100K
Figure 8. Logic and Core Supplies Schematic
Table 7. LDO Input Supply Configuration Chart
Input Pin
Input options
VIN1
1.
Input supply for VGEN1 and VGEN2
R20 = External 3.3 V Supply
R21 = SW2
Input supply for VGEN3 and VGEN4
VIN2
R24 = External 3.3 V Supply
R22 = SW2
Input supply for VGEN5 and VGEN6
VIN3
R23 = VIN
R25 = SW2
VREFDDR input supply
VINREFDDR
R26 = SW3A
R27 = SW3B
Make sure to populate only one option per input pin to avoid shorts between various sources.
KTPF0200HWUG, Rev. 1.0
Freescale Semiconductor
17
Evaluation Board Configuration
9.5.4
Test Point
All test points are clearly marked on the KITPF0200EPEVBE evaluation board. Figure 9 shows the location of
various test points of interest during evaluation.
VDDIO
VCOREREF=1.2V
INTB
VCOREDIG=1.5V
SDWNB
VCORE=2.8V
RESETBMCU
PWRON
VSNVS
STANDBY
SWBST
VGEN6
VGEN5
VDDOTP
SW3A
SW3B
SW1AB
VREFDDR
VGEN4
VGEN3
VGEN1
VGEN2
SW2
Figure 9. Key Test Point Locations and Default Voltages
KTPF0200HWUG, Rev. 1.0
18
Freescale Semiconductor
Evaluation Board Configuration
9.6
9.6.1
Miscellaneous Components
Power on Push Button
A footprint for a normally open, momentary push-button (SW1) is provided at the PWRON pin to allow a
momentary low state by pressing the push button. J47 allows isolation of the PWRON pin from the MCU GPIO
controlling this pin, while J26 forces the PWRON pin to ground when closed.
PWRON1
DNP
VSNVS
J47
R28
2
1M
HDR 1X2 TH
J26
2
1
1
PWRON
PVIN
HDR 1X2 TH
OREDIG
PWRON
OREREF
RESET_MCU
ORE
PVIN
R30
10.0K
R32
10.0K
2 FSMSM
SW1
3
STANDBY
2
SDWN
SDWNB
1
INT
RESETBMCU1
DNP
STANDBY1
DNP
SDWNB1
DNP
INTB1
DNP
RESETBMCU
4
STANDBY
DREF
1
56
PVIN
R31
10.0K
INTB
DOTP
VSNVS
DIO
0
R35
ICTEST1
A
DNP
CONSUMER
2
ICTEST
HDR 1X2 TH
5
ICTEST
L
J24
Figure 10. Power on Circuit
9.6.2
PMIC LED Indicators
LED indicators are provided to notify the PMIC status to the user. Figure 11 shows the PMIC status LEDs D2, D3,
and D4, to monitor INTB, PWRON, and RESETBMCU signals respectively.
SHUTDOWN
INDICATOR
2
FDV302P
Q2
1
PVIN
FDV302P
Q3
1
1
PVIN
R40
200 OHM
1
Red
4
2
Grn
LED_RED-GRN
FDC6327C
5
A
6
D3
LED Red
RESETBMCU
D
D2
LED Red
1
G
A
1 2
D4
R39
200 OHM
2
R38
200 OHM
3
1
2 2
3
3
R69
200 OHM
S
2
INTB
PVIN
RESET
INDICATOR
1
PWRON
INTERRUPT
INDICATOR
4
C
G
C
D
3
2
S
PVIN
Q1
Figure 11. PMIC Status Indicator
KTPF0200HWUG, Rev. 1.0
Freescale Semiconductor
19
Evaluation Board Configuration
Table 8 describes the meaning of the LED states.
Table 8. LED State Description
LED
9.6.3
Description
D2
Interrupt Notification
ON = PMIC has detected an unmasked interrupt
OFF = No interrupt detected
D4
RESETBMCU Notification
Green = PMIC is in regulation and operating properly
Red = PMIC is out of regulation
D3
PWRON State
ON = PWRON pin is low
OFF = PWRON pin is high
Control/Programming Interface
This onboard USB-to-I2C interface comprises three basic blocks.
1. Controlling MCU (MC9S08JM60CGTE) for USB-I2C translation.
2. 3.3 V LDO supply for external device controlling.
3. 8.25 V boost converter for OTP programming.
The control/programming interface allows one to program the onboard MMPF0200 PMIC. Alternatively, the
interface can serve as a programmer for external devices though the connector J36.
KTPF0200HWUG, Rev. 1.0
20
Freescale Semiconductor
Evaluation Board Configuration
USB Connector Type A
VIN_USB
CLOSED 2-3
USB_PWR
J39
MAIN IC
MC9S08JM60
PVIN
2
USB_PWR
D- VBUS
Place on Bottom
34
17
1
1
V
DD+
G
2
USBDN
PWRON
USBDP
VDDOTPIN_SNS
ID1
ID0
33
R45
1
2
PTA0
PTA5
26
27
28
29
30
31
R42
2
1
2
3
4
5
24
25
L11
HI1812V101R-10
S1
PTB0/MISO2/ADP0
PTB1/MOSI2/ADP1
PTB2/SPSCK2/ADP2
PTB3/SS2/ADP3
PTB4/KBIP4/ADP4
PTB5/KBIP5/ADP5
1
33
MCU_SCL
MCU_SDA
C62
C63
0.1uF
0.1uF
44
45
46
47
1
48
2
L9
HI1812V101R-10
PTC0/SCL
PTC1/SDA
PTC2
PTC3/TxD2
PTC4
PTC5/RxD2
32
33
36
37
0
0
R74
USB_PWR
IRQ/TPMCLK
RESET
BKGD/MS
0.1uF
R50
4.7K
R51
4.7K
J35
BKGD_JM60
PTG0/KBIP0
PTG1/KBIP1
PTG2/KBIP6
PTG3/KBIP7
PTG4/XTAL
PTG5/EXTAL
PTD0/ADP8/ACMP+
PTD1/ADP9/ACMPPTD2/KBIP2/ACMPO
PTD7
2
3
40
RST_JM60
BKGD_JM60
C65
1
3
5
2
4
6
PTE0/TxD1
PTE1/RxD1
PTE2/TPM1CH0
PTE3/TPM1CH1
PTE4/MISO1
PTE5/MOSI1
PTE6/SPSCK1
PTE7/SS1
PTF0/TPM1CH2
PTF1/TPM1CH3
PTF4/TPM2CH0
PTF5/TPM2CH1
PTF6
R73
GPIO1
GPIO2
BDM Programmer
VDDAD/VREFH
VDD
D+
S3
VSSAD/VREFL
VSS
VSSOSC
GND
ID
0.1uF
U2
MC9S08JM60CGTE
VUSB33
USBDN
USBDP
9
10
11
12
13
14
15
16
VUSBEN
BSTEN
VPGMEN
3V3EN
LGON
LRON
BSTUP
BSTDN
4
5
6
7
8
22
23
38
39
41
42
XTAL_JM60
EXTAL_JM60
21
19
20
VUSB33
USBDN
USBDP
C64
0.47UF
R48
1.5K
DNP
R49
1.5K
DNP
35
18
43
49
G
C59
10UF
0.1uF
VIN_USB
S2
+
C57
HDR 1X3
1
J34
USB-MiniB
S4
C58
3
2
1
F1
0.5A
+
C66
4.7UF
VUSB33
RST_JM60
USB_PWR
HDR 2X3
Crystal
Place on Bottom
8V - Boost Converter
Place on Bottom
2
R41
L10
R63
R64
R65
10K
10K
10K
FB
NC
LCDON
POK
SHDN
UP
DN
POL
PGND
2
7
2
3
4
REF
+ C73
8 R59
C74
R77
100K
22PF
374K
4.7uF
C61
22PF
12 MHz
EXTAL_JM60
3
1
R60
470K
0.1uF
C60
22PF
10
VDDOTPIN_SNS
15
14
11
R61
120K
R78
100K
0
9
ESD PROTECTION
Q8
VPGMEN
1
BSS138
C76
0.1uF
R66
47K
0
A
*The boards are reworked
to connect pin 2 of Q9
to ground
0
Place on Bottom
Place on Bottom
LDO REGULATOR 3.3V
GND2 I/O3
1
C72
2
DACOUT
4
ESD9L5.0ST5G
C MCU_SCL
D7
ISET
GND
0
BSTEN
BSTUP
BSTDN
BSS138
R75
47K
R56
604K
1
3
Q9
1
VUSBEN
MBR130LSFT1G
C75
1UF
2
VDDOTPIN
A
6
C71 100
15UF
LX
VCC
3
ESD9L5.0ST5G
C MCU_SDA
D6
+
VDD
2
A
1
1
12
C
2
R55
R76
470K
A
16
ESD9L5.0ST5G
C ID0
D8
5
A
2
I/O1 GND4
XTAL_JM60
ESD9L5.0ST5G
C ID1
D5
3 3
1
Q6
FDN360P
D9
3
2
Y1
22UH
U4
MAX686
13
VIN_USB
Q5
FDN360P
2
Q10
FDN360P
1
1M
2
1
1
LED
INDICATORS
Programming Interface
VIN_USB
3V3
PROGRAMMING CONNECTOR
2
ADJ
C79
2.2uF
DNP
MIC5205
+
R1
C81
2.2UF
3V3
A
VDDOTPIN
D11
LED Red
MCU_SDA
GPIO1
1
3
5
7
2
4
6
8
MCU_SCL
PWRON
GPIO2
C77
0.1UF
HDR 2X4
R67
470
2
0
R68
470
2
R2
USB_PWR
D10
1
0
R71
20K
USB_PWR
EN
GND
3V3
J36
5
C
4
R72
12.0K
OUT
A
0
C78
470PF
IN
LED Green
3
C
1
3V3EN
1
U5
C80
1.0UF
0
VOUT = 1.242 X ( (R2/R1) + 1) = 3.3V
LGON
LRON
R2 = ((VOUT/1.242) -1) X R1
Figure 12. Control/Programming Interface Schematic
KTPF0200HWUG, Rev. 1.0
Freescale Semiconductor
21
Evaluation Board Configuration
9.7
Programming an External MMPF0200 Through J36
If the KITPF0200EPEVBE is used as an external programmer for either a customer board or a dedicated
MMPF0200 programming socket, J36 provides the required signals for such a task. However, it will be necessary
to isolate the communication signals from the on-board PMIC by doing the following:
1. Remove all jumpers from J22
2. Remove all jumpers from J17
3. Remove all jumpers from J45
4. Remove jumper J47
Note: If it is desired to perform One-Time Programming of the MMPF0200 device soldered on the
KITPF0200EPEVBE evaluation board, ensure that the board hardware is correctly configured according to the
chosen OTP settings.
The KITPF0200EPEVBE allows the configuration of the SW2 regulator or an external 3.3 V LDO output as the
VDDIO/I2C pull-up supply. By default, the SW2 regulator is the source for the VDDIO supply (J46 = 3-4). If the SW2
regulator is to be set below 3.0 V, then make sure the 3.3 V LDO output is connected to VDDIO and the I2C pull-up
resistors by changing J46 position to 1-2.
KTPF0200HWUG, Rev. 1.0
22
Freescale Semiconductor
Evaluation Board Schematic
10 Evaluation Board Schematic
LDO SUPPLIES
VGEN SENSE
0
3V3
SW2
0
R21
3V3
0
R24 DNP
VIN1
17
SW2
0
R22
VIN2
27
VIN
0
R23 DNP
VIN3
40
SW2
0
VGEN1
VIN1
VGEN1
VIN2
VGEN2
VIN3
VGEN3
R25
VGEN4
C40
1.0UF
VGEN5
31
SW3A
0
R26
SW3B
0
R27 DNP
VREFDDR
30
VINREFDDR1
DNP
C44
0.1UF
VHALF1
DNP
C45
0.1UF
C84
1.0UF
VGEN6
VINREFDDR
LICELL
29
16
VGEN1
18
VGEN2
26
VGEN3
C34
4.7uF
C35
VGEN3
C38
28
VGEN4
4.7uF
C41
VGEN5
39
VGEN5
41
VGEN6
C42
2.2UF
VGEN6
VGEN2
VGEN2
DNP
VGEN2
VGEN3
VGEN3
DNP
VGEN3
VGEN4
VGEN4
DNP
VGEN4
C43
2.2UF
VGEN5
VGEN5
DNP
VGEN5
VGEN6
VGEN6
DNP
VGEN6
VSNVS1
VSNVS
DNP
VSNVS
42
VSNVS
J20
R86
0
DNP
43
1
2
3
C46
0.22uF
VSNVS
C47
0.47uF
1-2
CLOSED
BAT1
HDR 1X3
LICELL
6.8mm Leaded
Place Top
BAT2
BK-879
6.8mm
Place Bottom
DNP
-
3
+
2
1
MMPF0200NPAEP
INPUT SUPPLIES
DNP
VGEN1
VGEN1
VGEN1
2.2UF
VGEN4
VHALF
VSNVS
2.2UF
VGEN2
1
VREFDDR
U1B
2
VREFDDR1
DNP
R20 DNP
LDO INPUT SENSE
VDD OTP
VDDOTP
SWVIN
VDDOTPIN
VIN
J41
3
2
1
J27
CLOSED
1
PVIN
CLOSED
HDR 1X2 TH
1
SWVIN
1
HDR 1X2 TH
J40
2
2
2
J25
VIN1
DNP
VIN1
C48
1.0UF
VIN2
DNP
VIN2
C49
1.0UF
VIN3
DNP
VIN3
C50
1.0UF
2
4
6
PVIN
C36
10.0uF
C37
10.0uF
J17
HDR 2X3
C39
10.0uF
1
3
5
SWVIN
R79
VCOREDIG
VDDOTPIN
HDR 1X2 TH
100K
GND
SUBASSY_TB_3x1
CONTROL LOGIC
3V3
VIN
PWRON1
DNP
VSNVS
2-3 CLOSED
J47
50
51
VCOREREF
VCOREREF1
52
DNP
DNP
C51
1.0UF
C52
1.0UF
VCORE
VCORE1
C53
0.22uF
J46
49
48
C54
1.0UF
VDDOTP
VDDOTP1
DNP
2
4
HDR 2X2
47
55
C55
1.0UF
DNP
2
J45
C56
0.1UF
SCL1
DNP
MCU_SCL
MCU_SDA
1
3
2
4
54
53
HDR 2X2
SDA1
DNP
1
PWRON
HDR 1X2 TH
J26
1
PVIN
HDR 1X2 TH
VIN
VCOREDIG
PWRON
VCOREREF
RESET_MCU
VCORE
STANDBY
GNDREF
SDWN
INT
56
1
R37
4.7K
PVIN
R30
10.0K
R32
10.0K
2 FSMSM
SW1
3
RESETBMCU1
DNP
STANDBY1
DNP
SDWNB1
DNP
INTB1
DNP
RESETBMCU
4
STANDBY
2
SDWNB
1
INTB
VDDOTP
VSNVS
VDDIO
ICTEST
5
SCL
ICTEST
0
R35
ICTEST1
SDA
DNP
CONSUMER
R36
4.7K
PVIN
R31
10.0K
J24
1
DNP
VDDIO1
DNP
1
3
1M
2
VCOREDIG
VCOREDIG1
DNP
3V3
SW2
2
U1A
VIN_SENSE1
3-4 CLOSED
R28
HDR 1X3
HDR 1X2 TH
1
2
3
J22
MMPF0200NPAEP
STANDBY
VDDIO
C87
1.0UF
R29
100K
Figure 13. KITPF0200EPEVBE LDO/Control Schematic Part 1
KTPF0200HWUG, Rev. 1.0
Freescale Semiconductor
23
Evaluation Board Schematic
SHUTDOWN
INDICATOR
2
FDV302P
Q2
1
PVIN
FDV302P
Q3
1
1
PVIN
R40
200 OHM
1
Red
4
2
FDC6327C
5
1
A
G
A
1 2
LED_RED-GRN
Grn
D4
R39
200 OHM
2
R38
200 OHM
3
1
2 2
3
3
R69
200 OHM
S
2
INTB
PVIN
RESET
INDICATOR
1
PWRON
INTERRUPT
INDICATOR
6
D3
LED Red
RESETBMCU
D
D2
LED Red
4
C
G
C
D
3
2
S
Q1
PVIN
J42
J43
2
4
6
8
10
12
14
16
18
20
J44
1
3
5
7
9
11
13
15
17
19
VGEN1
VGEN2
VGEN3
VGEN4
STANDBY
VGEN5
VGEN6
VSNVS
VREFDDR
2
4
6
8
10
12
14
16
18
20
2
4
6
8
10
12
14
16
18
20
SW1C
1
3
5
7
9
11
13
15
17
19
PWRON
INTB
SDWNB
RESETBMCU
SWBST
VDDIO
MCU_SCL
MCU_SDA
PVIN
SWVIN
SW1AB
SW4
SW2
SW3B
SW3A
1
3
5
7
9
11
13
15
17
19
SW1C
SW1AB
SW4
SW2
SW3B
SW3A
CON_2X10
CON_2X10
CON_2X10
LDO Terminal Blocks
Interface Terminal Blocks
I2C Terminal Blocks
J29
J16
VGEN1
GND
VGEN2
J31
1
2
MCU_SCL
MCU_SDA
SUBASSY_TB_3x1
J32
SUBASSY_TB_3x1
J18
VGEN3
GND
VGEN4
SUB_TB_2x1
1
INTB
2
SDWNB
RESETBMCU 3
1
2
3
STANDBY
PWRON
GND
1
2
3
J33
1
2
3
1
2
VDDIO
GND
SUB_TB_2x1
SUBASSY_TB_3x1
SUBASSY_TB_3x1
J19
VGEN5
GND
VGEN6
1
2
3
HOT PLUG WORKAROUND (LEGACY)
SUBASSY_TB_3x1
PVIN
J21
VSNVS
GND
VREFDDR
U7
1
2
3
R83
0
DNP
1
3
4
SUBASSY_TB_3x1
C86
2
470PF
DNP
BH2
MTG
MTG
OUT
5
R82
R81
470K
DNP
ADJ
BH4
MTG
MTG
VCOREDIG
C85
2.2UF
DNP
GND
R80
27K
DNP
GND's
BH3
0
DNP
EN
MIC5205
DNP
Mounting Holes
BH1
IN
DNP
GND1 GND2 GND3 GND4 GND5 GND6
DNP
DNP
DNP
DNP
DNP
GND
Figure 14. KITPF0200EPEVBE LDO/Control Schematic Part 2
KTPF0200HWUG, Rev. 1.0
24
Freescale Semiconductor
Evaluation Board Schematic
CLOSED
J1
SWVIN
2
VIN_SWA1
C1
C2
R85
HDR 1X2 TH
4.7uF
6
SW1ALX
VIN_SWB1
8
1
HDR 1X2 TH
CLOSED
2
SW3AFB
SW1AIN
SW3AIN
SW1ALX
SW3ALX
SW1BLX
SW3BLX
SW1BIN
SW3BIN
C6
4.7uF
0.1UF
SW1BLX
9
SW1BIN
10
SW1CLX
11
SW1CIN
12
HDR 1X2 TH
C9
C10
SW3BFB
4.7uF
DNP
0.1UF
DNP
SW1CFB
RSVD2
13
SW3VSSSNS
RSVD4
RSVD5
SW1VSSSNS
RSVD6
35
SW3BLX
34
SW3BIN
HDR 1X2 TH
SWBSTLX
C14
4.7uF
0.1UF
SW2IN_1
SW2IN_2
25
SW2FB
57
SW2FB
SWBSTIN
GNDREF1
C13
VIN_SWB3
SWVIN
J4
DNP
2
1
C7
33
SW3BFB
C8
4.7uF
0.1UF
HDR 1X2 TH
32
CLOSED
DNP for KITPF0200EPEVBE
19
SW4FB
J6
DNP
SWVIN
2
20
SW4IN
C11
21
SW4LX
0.1UF
DNP
46
SWBSTLX
45
SWBSTIN
C12
4.7uF
DNP
1
HDR 1X2 TH
LX_SWBST1
SW2LX
23
24
1
HDR 1X2 TH
C5
4.7uF
0.1UF
SW3ALX
SWBSTFB
44
SWBST
VSWBST1
DNP
D1
DNP
A
R1
C
SWBSTFB
MBR120LSFT1G
R2
1.0
15
2
22
SW2LX
VIN_SW2
EPGND
CLOSED
J7
37
36
1
C4
VIN_SW4
RSVD3
SW1VSSSNS14
SWVIN
SW3AFB
RSVD1
VIN_SWC1
1
DNP
38
CLOSED
C3
DNP for KITPF0200EPEVBE
J5
SWVIN
SW1FB
7
J3
2
SWVIN
J2
DNP
2
SW1ABFB
0.1UF
VIN_SWA3
0
CLOSED
SWVIN
CLOSED
U1C
MMPF0200NPAEP
1
DNP
C15
0.01UF
C17
1000pF
R3
1
L1
C16
22UF
0.001
C83
22UF
J8
1
2
DNP
VIN_SWBST1
DNP
2
2.2UH
SWBSTFB
SUB_TB_2x1
C18
10UF
0.001
CLOSED
J9
2
C19
C20
0.1UF
2.2UF
SWVIN
1
HDR 1X2 TH
SWAB1
DNP
SW1AB
L2
R4
1
SW1ALX
J10
2
1
2
0.001
1uH
R6
0.001
LX_SWA1
DNP
C22
C23
C24
22UF
22UF
22UF
22UF
SW1ABFB
R7
0.001
DNP
R8
L3
1
SW1BLX
C21
SUB_TB_2x1
2
1uH
0.001
LX_SWB1
DNP
SWC1
R9
0.001
DNP
R10
0.001
DNP
L4
1
SW1CLX
DNP for KITPF0200EPEVBE
SW1C
DNP
J11
R11
2
1
2
1uH
DNP
C25
22UF
DNP
0.001
DNP
LX_SWC1
DNP
C26
22UF
DNP
SW1CFB
SW2
LX_SW2
DNP
SUB_TB_2x1
DNP
SW2
DNP
J12
L5
1
SW2LX
2
1
2
1uH
C27
22UF
C28
22UF
DNP for KITPF0200EPEVBE
LX_SW4
DNP
SW2FB
SW4
SUB_TB_2x1
SW4
DNP
J13
L6
1
SW4LX
2
1UH
DNP
1
2
C29
22UF
DNP
C82
22UF
DNP
SW4FB
SUB_TB_2x1
DNP
SW3A
LX_SWA3
DNP
SWA3
L7
J14
DNP
1
SW3ALX
2
1
2
1uH
C30
22UF
C31
22UF
SW3AFB
SUB_TB_2x1
R17
R16
0.001
DNP
0.001
SW3B
LX_SWB3
DNP
SW3BLX
1
SWB3
DNP
R70
L8
J15
2
1
2
1uH
0.001
DNP
C32
22UF
C33
22UF
SW3BFB
SUB_TB_2x1
Figure 15. KITPF0200EPEVBE Switching Regulators Schematic
KTPF0200HWUG, Rev. 1.0
Freescale Semiconductor
25
Evaluation Board Schematic
USB Connector Type A
VIN_USB
CLOSED 2-3
USB_PWR
J39
MAIN IC
MC9S08JM60
PVIN
2
USB_PWR
D- VBUS
1
V
DD+
G
2
USBDN
PWRON
USBDP
VDDOTPIN_SNS
ID1
ID0
33
R45
1
2
PTA0
PTA5
26
27
28
29
30
31
R42
2
1
2
3
4
24
25
L11
HI1812V101R-10
S1
5
34
17
1
S3
PTB0/MISO2/ADP0
PTB1/MOSI2/ADP1
PTB2/SPSCK2/ADP2
PTB3/SS2/ADP3
PTB4/KBIP4/ADP4
PTB5/KBIP5/ADP5
1
33
MCU_SCL
MCU_SDA
C62
C63
0.1uF
0.1uF
44
45
46
47
1
48
2
L9
HI1812V101R-10
PTC0/SCL
PTC1/SDA
PTC2
PTC3/TxD2
PTC4
PTC5/RxD2
32
33
36
37
0
0
R74
USB_PWR
IRQ/TPMCLK
RESET
BKGD/MS
0.1uF
R50
4.7K
R51
4.7K
J35
BKGD_JM60
PTG0/KBIP0
PTG1/KBIP1
PTG2/KBIP6
PTG3/KBIP7
PTG4/XTAL
PTG5/EXTAL
PTD0/ADP8/ACMP+
PTD1/ADP9/ACMPPTD2/KBIP2/ACMPO
PTD7
2
3
40
RST_JM60
BKGD_JM60
C65
1
3
5
2
4
6
PTE0/TxD1
PTE1/RxD1
PTE2/TPM1CH0
PTE3/TPM1CH1
PTE4/MISO1
PTE5/MOSI1
PTE6/SPSCK1
PTE7/SS1
PTF0/TPM1CH2
PTF1/TPM1CH3
PTF4/TPM2CH0
PTF5/TPM2CH1
PTF6
R73
GPIO1
GPIO2
BDM Programmer
VDDAD/VREFH
VDD
D+
Place on Bottom
VSSAD/VREFL
VSS
VSSOSC
GND
ID
0.1uF
U2
MC9S08JM60CGTE
VUSB33
USBDN
USBDP
9
10
11
12
13
14
15
16
VUSBEN
BSTEN
VPGMEN
3V3EN
LGON
LRON
BSTUP
BSTDN
4
5
6
7
8
22
23
38
39
41
42
XTAL_JM60
EXTAL_JM60
21
19
20
VUSB33
USBDN
USBDP
C64
0.47UF
R48
1.5K
DNP
R49
1.5K
DNP
35
18
43
49
G
C59
10UF
0.1uF
VIN_USB
S2
+
C57
HDR 1X3
1
J34
USB-MiniB
S4
C58
3
2
1
F1
0.5A
+
C66
4.7UF
VUSB33
RST_JM60
USB_PWR
HDR 2X3
Crystal
Place on Bottom
8V - Boost Converter
Place on Bottom
2
R41
L10
R64
R65
10K
10K
10K
NC
LCDON
POK
SHDN
UP
DN
POL
REF
4.7uF
R77
100K
1
0.1uF
C60
22PF
VDDOTPIN_SNS
15
14
11
R61
120K
R78
100K
0
9
ESD PROTECTION
Q8
VPGMEN
1
BSS138
C76
0.1uF
Place on Bottom
EXTAL_JM60
3
2
C74
22PF
374K
12 MHz
10
R66
47K
0
PROGRAMMING0 CONNECTOR
LDO REGULATOR 3.3V
GND2 I/O3
1
+ C73
8 R59
C61
22PF
ESD9L5.0ST5G
C MCU_SCL
D7
R63
FB
4
A
DACOUT
R60
470K
ESD9L5.0ST5G
C MCU_SDA
D6
7
2
3
4
C72
A
2
BSS138
R75
47K
0
BSTEN
BSTUP
BSTDN
R56
604K
ISET
GND
3
Q9
1
VUSBEN
MBR130LSFT1G
C75
1UF
2
VDDOTPIN
A
6
C71 100
15UF
LX
VCC
3
2
+
VDD
2
ESD9L5.0ST5G
C ID0
D8
1
1
12
C
A
R55
R76
470K
A
16
ESD9L5.0ST5G
C ID1
D5
5
3
2
I/O1 GND4
XTAL_JM60
2
3 3
1
Q6
FDN360P
D9
PGND
2
Y1
22UH
U4
MAX686
13
VIN_USB
Q5
FDN360P
1
Q10
FDN360P
1
1M
2
1
1
Place on Bottom
LED
INDICATORS
Programming Interface
VIN_USB
3V3
U5
2
R71
20K
ADJ
GND
MIC5205
C79
2.2uF
DNP
+
R1
C81
2.2UF
R2
3V3
USB_PWR
VDDOTPIN
A
EN
D10
D11
LED Red
MCU_SDA
GPIO1
1
3
5
7
2
4
6
8
MCU_SCL
PWRON
GPIO2
C77
0.1UF
HDR 2X4
1
0
USB_PWR
R67
470
2
0
R68
470
2
R72
12.0K
3V3
J36
5
C
4
OUT
1
0
C78
470PF
IN
A
3
LED Green
1
3V3EN
C
C80
1.0UF
0
VOUT = 1.242 X ( (R2/R1) + 1) = 3.3V
LGON
LRON
R2 = ((VOUT/1.242) -1) X R1
Figure 16. KITPF0200EPEVBE Control/Programming Interface Schematic
KTPF0200HWUG, Rev. 1.0
26
Freescale Semiconductor
KITPF0200EPEVBE Board Layout
11 KITPF0200EPEVBE Board Layout
11.1
Assembly Layer Top
Figure 17. Assembly Top Layer
KTPF0200HWUG, Rev. 1.0
Freescale Semiconductor
27
KITPF0200EPEVBE Board Layout
11.2
Assembly Layer Bottom
Figure 18. Assembly Layer Bottom
KTPF0200HWUG, Rev. 1.0
28
Freescale Semiconductor
KITPF0200EPEVBE Board Layout
11.3
Top Layer Routing
Figure 19. Top Layer Routing
KTPF0200HWUG, Rev. 1.0
Freescale Semiconductor
29
KITPF0200EPEVBE Board Layout
11.4
Inner Layer 1 Routing
Figure 20. Inner Layer 1 Routing
KTPF0200HWUG, Rev. 1.0
30
Freescale Semiconductor
KITPF0200EPEVBE Board Layout
11.5
Inner Layer 2 Routing
Figure 21. Inner Layer 2 Routing
KTPF0200HWUG, Rev. 1.0
Freescale Semiconductor
31
KITPF0200EPEVBE Board Layout
11.6
Bottom Layer Routing
Figure 22. Bottom Layer Routing
KTPF0200HWUG, Rev. 1.0
32
Freescale Semiconductor
Bill of Materials
12 Bill of Materials
Table 9. Bill of Materials (3)
Item Qty Notes
Schematic
Label
Value/Description
Part Number
1
1
(1)
BAT1
BATTERY LITHIUM -- 3.0V
5.5 MAH
2
1
(2)
BAT2
HOLDER COIN CELL 6.8 MM SMT BK-879
3
7
C1, C3, C5, C8, C9,
C12, C13
CAP CER 4.7 μF 10 V 10% X5R
0603
4
7
C2, C6, C10, C11,
C14, C44, C45
CAP CER 0.1 μF 10 V 10% X5R
0402
5
5
C4, C7, C19, C56,
C77
CAP CER 0.1 μF 10 V 10% X7R
0402
6
1
C15
CAP CER 0.01 μF 50 V 10% X7R
0402
7
14
C16, C21, C22,
C25, C26, C27,
C28, C29, C30,
C31, C32, C33,
C82, C83
CAP CER 22 μF 10 V 20% X5R
0805
8
1
C17
CAP CER 1000 PF 50 V X7R 5%
0402
9
1
C18
CAP CER 10 μF 10 V 10% X7R
0805
10
5
C20, C34, C38,
C42, C43
CAP CER 2.2 μF 6.3 V 20% X5R
0402
11
1
C23
CAP CER 22 μF 10 V 20% X5R
0805
12
1
C24
CAP CER 22 μF 10 V 10% X7R
1210
13
2
C35, C41
CAP CER 4.7 μF 6.3 V 20% X5R
0402
14
3
C36, C37, C39
CAP CER 10 μF 16 V 10% X7R
0805
15
9
C40, C48, C49,
C50, C51, C52,
C54, C84, C87
CAP CER 1.0 μF 10 V 10% X5R
0402
16
2
C46, C53
CAP CER 0.22 μF 16 V 10% X7R
0402
17
1
C47
CAP CER 0.47 μF 10 V 10% X7R
0402
18
1
C55
CAP CER 1.0 μF 10 V 10% X5R
0402
19
5
C57, C58, C62,
C63, C65
CAP CER 0.1 μF 16 V 10% X5R
0402
(2)
(2)
MS621F-FL11E
Manufacturer
SII MICRO PARTS LTD.
MEMORY PROTECTION
DEVICES INC
KTPF0200HWUG, Rev. 1.0
Freescale Semiconductor
33
Bill of Materials
Table 9. Bill of Materials (3) (continued)
Schematic
Label
Item Qty Notes
Value/Description
Part Number
Manufacturer
20
1
C59
CAP TANT 10 μF 16 V 10% -3216-18
21
3
C60, C61, C72
CAP CER 22 PF 25 V 5% C0G
0402
22
1
C64
CAP CER 0.47 μF 16 V 10% X7R
0603
23
1
C66
CAP TANT 4.7 μF 10 V 10% -3216-18
24
1
C71
CAP TANT ESR 0.600 OHMS
15 μF 25 V 10% -- 3528-21
25
1
C73
CAP TANT 4.7 μF 25 V 10% -3528-21
26
1
C74
CAP CER 0.1 μF 25 V 10% X5R
0402
27
1
C75
CAP CER 1.0 μF 25 V 10% X5R
0603
28
1
C76
CAP CER 0.1 μF 6.3 V 10% X7R
0402
29
2
C78, C86
CAP CER 470 PF 50 V 5% COG
0603
30
1
C79
CAP CER 2.2 μF 16 V 10% X5R
0603
31
1
C80
CAP CER 1.0 μF 16 V 10% X5R
0603
32
1
C81
CAP TANT ESR=1.800 OHMS
2.2 μF 10 V 10% 3216-18
33
1
C85
CAP CER 2.2 μF 6.3 V 20% X5R
0402
34
1
D1
DIODE SCH PWR RECT 1A 20 V
SMT
MBR120LSFT1G
ON SEMICONDUCTOR
35
3
D2, D3, D11
LED RED SGL 30 MA 0603
SML-LXFM0603SIC-TR
LUMEX
36
1
D4
LED DUAL GRN/RED 30 MA SMT LTST-C195KGJRKT
LITE ON
37
4
D5, D6, D7, D8
DIODE TVS ESD PROT ULT LOW ESD9L5.0ST5G
CAP 5-5.4 V SOD-923
ON SEMICONDUCTOR
38
1
D9
DIODE SCH PWR RECT 1A 30 V
SOD-123
MBR130LSFT1G
ON SEMICONDUCTOR
39
1
D10
LED GRN SGL 30 MA SMT 0603
SML-LXFM0603SUGCTR
LUMEX
40
1
F1
FUSE PLYSW 0.5 A 13.2 V SMT
MICROSMD050F-2
RAYCHEM
41
56
-
TEST POINT RED 40 MIL DRILL
180 MIL TH 109L
42
14
J1, J2, J3, J4, J5, J6, HDR 1X2 TH 100 MIL SP 339H AU
J7, J9, J24, J26,
118L
J27, J40, J41, J47
43
9
J8, J10, J11, J12,
J13, J14, J15, J31,
J33
(2)
(2)
(2)
SUBASSEMBLY CON 1X2 TB TH
3.81 MM SP 201H -- 138L + TERM
BLOCK PLUG 3.81MM 2POS
KTPF0200HWUG, Rev. 1.0
34
Freescale Semiconductor
Bill of Materials
Table 9. Bill of Materials (3) (continued)
Schematic
Label
Item Qty Notes
Value/Description
Part Number
44
7
J16, J18, J19, J21,
J25, J29, J32
SUBASSEMBLY CON 1X3 TB TH
3.81 MM SP 201H -- 138L + TERM
BLOCK PLUG 3.81MM 3POS
45
2
J17, J35
HDR 2X3 TH 100 MIL
46
3
J20, J22, J39
HDR 1X3 TH 100 MIL
47
2
J46, J45
HDR 2x2 TH 100 MIL
48
1
J34
CON 5 USB MINI-B RA SHLD SKT 675031340
SMT 31 MIL SP AU
49
1
J36
HDR 2X4 TH 100 MIL
(2)
Manufacturer
MOLEX
50
3
J42, J43, J44
HDR 2X10 SMT 100 MIL
51
1
L1
IND PWR 2.2 μH@100 KHZ 2.0 A
20% SMT
LPS3015-222ML_
COILCRAFT
52
1
L2
IND PWR 1.0 μH@100 kHz 6.0 A
20% SMT
XAL4020-102MEC
COILCRAFT
53
4
L3, L4, L5, L8
IND PWR 1.0 μH@100 KHZ 2.4 A
30% SMT
LPS4012-102NLC
COILCRAFT
54
1
L6
IND PWR 1UH@1MHZ 2.0 A 30%
SMT
VLS252010T-1R0N
TDK
55
1
L7
IND PWR 1.0 μH@100 KHZ 2.65 A LPS5015-102MLC
20% SMT
COILCRAFT
56
1
L9
IND FER 100 OHM@100 MHZ
8.0 A 25% SMD/1812
HI1812V101R-10
LAIRD TECHNOLOGIES
57
1
L10
IND PWR CHK 22 μ[email protected] KHZ
1.0 A 20% SMD
744773122
WURTH ELEKTRONIK
EISOS GMBH & CO. KG
58
1
L11
IND FER 100 OHM@100 MHZ
8.0 A 25% SMD/1812
HI1812V101R-10
LAIRD TECHNOLOGIES
59
1
Q1
TRAN MOSFET DUAL N & P
CHANNEL 2.5 V S-SOT6
FDC6327C
FAIRCHILD
60
2
Q2, Q3
TRAN PMOS SW 120 MA 25 V
SOT23
FDV302P
FAIRCHILD
61
3
Q5, Q6, Q10
TRAN PMOS SW 2.0 A 30 V
SSOT3
FDN360P
FAIRCHILD
62
2
Q8, Q9
TRAN NMOS 50 V 220 MA SOT-23 BSS138
FAIRCHILD
63
6
R1, R3, R4, R6, R8,
R16
RES -- 0.001 OHM 1/4 W 5% 0805 LMI-R001-5.0
ISABELLENHÜTTE
HEUSLER GMBH & CO. KG
64
1
(2)
R2
RES MF 1.0 OHM 1/16 W 1% 0402
65
5
(2)P
R7, R9, R10, R17,
R70
RES -- 0.001 OHM 1/4 W 5% 0805 LMI-R001-5.0
ISABELLENHÜTTE
HEUSLER GMBH & CO. KG
66
1
R11
RES MF 0.001 OHM 1.0 W 1%
1206
STACKPOLE
ELECTRONICS
67
5
R20, R23, R24,
R27, R86
RES MF ZERO OHM 1/10 W 1%
0603
68
5
R21, R22, R25,
R26, R85
RES MF ZERO OHM 1/10 W 1%
0603
69
2
R28, R41
RES MF 1.0 M 1/16 W 1% 0402
(2)
CSNL1206FT1L00
KTPF0200HWUG, Rev. 1.0
Freescale Semiconductor
35
Bill of Materials
Table 9. Bill of Materials (3) (continued)
Schematic
Label
Item Qty Notes
Value/Description
70
2
R29, R79
RES MF 100 K 1/16 W 5% 0402
71
3
R30, R31, R32
RES MF 10.0 K 1/16W 1% 0402
72
3
R35, R73, R74
RES MF ZERO OHM 1/10 W -0402
73
4
R36, R37, R50, R51 RES MF 4.70 K 1/16 W 1% 0402
74
4
R38, R39, R40, R69 RES MF 200 OHM 1/10 W 1%
0402
75
2
R42, R45
RES MF 33.0 OHM 1/16 W 1%
0402
76
2
R48, R49
RES MF 1.5 K 1/16 W 5% 0402
77
1
R55
RES MF 100 OHM 1/10 W 1%
0603
78
1
R56
RES MF 604 K 1/16 W 1% 0402
79
1
R59
RES MF 374 K 1/16 W 1% 0402
80
2
R60, R76
RES MF 470 K 1/16 W 1% 0402
81
1
R61
RES MF 120 K 1/16 W 1% 0402
82
3
R63, R64, R65
RES MF 10 K 1/16 W 5% 0402
83
2
R66, R75
RES MF 47 K 1/16 W 1% 0402
84
2
R67, R68
RES MF 470 OHM 1/16 W 1%
0402
85
1
R71
RES MF 20 K 1/10 W 5% 0603
86
1
R72
RES MF 12.0 K 1/10 W 1% 0603
87
2
R77, R78
RES MF 100 K 1/16 W 1% 0402
88
1
R80
RES MF 27 K 1/16 W 5% 0402
89
1
R81
RES MF 470 K 1/16 W 5% 0402
R82, R83, R84
RES MF ZERO OHM 1/10 W -0402
(2)
Part Number
Manufacturer
90
3
(2)
91
1
(2)
SW1
SW SPST PB 12 V 50 MA SMT
92
1
U1
IC POWER MANAGEMENT
MMPF0200NPEP
CONSUMER/INDUSTRIAL QFN56
FREESCALE
SEMICONDUCTOR
93
1
U2
IC MCU 8BIT 48 MHZ 60 KB
FLASH 2.7-5.5 V QFN48
MC9S08JM60CGT
FREESCALE
SEMICONDUCTOR
94
1
U4
IC DAC CTRL BOOST INV
+/-27.5 V -- 2.7-5.5 V QSOP16
MAX686EEE+
MAXIM
95
2
U5, U7
IC LIN VREG LDO 1.5-15V 150 MA MIC5205YM5
2.5-16 V SOT23-5
MICREL
96
1
Y1
XTAL 12 MHZ SER 9.0 PF SMT
ECS INC. INTERNATIONAL
ECS-120-9-42X-CKM-TR
Notes
1. For critical components, it is recommended to use the manufacturer listed.
2. Do not populate
3. Freescale does not assume liability, endorse, or warrant components from external manufacturers that are referenced in circuit drawings
or tables. While Freescale offers component recommendations in this configuration, it is the customer’s responsibility to validate their
application.
KTPF0200HWUG, Rev. 1.0
36
Freescale Semiconductor
References
13 References
Document
Number
MMPF0200
Description
Data Sheet
URL
http://cache.freescale.com/files/analog/doc/data_sheet/MMPF0200.pdf
MMPF0200ER Errata
http://cache.freescale.com/files/analog/doc/errata/MMPF0200ER.pdf
PFSERIESFS
Fact Sheet
http://cache.freescale.com/files/analog/doc/fact_sheet/PFSeriesFS.pdf
AN4622
Layout Application Note
http://cache.freescale.com/files/analog/doc/app_note/AN4622.pdf
KTPFSWUG4
Software User Guide
http://cache.freescale.com/files/analog/doc/user_guide/KTPFSWUG4.pdf
Product Summary Page
http://www.freescale.com/webapp/sps/site/prod_summary.jsp?code=MMPF0200
Tool Summary Page
http://www.freescale.com/webapp/sps/site/prod_summary.jsp?code=KITPF0200EPEVBE
Analog Home Page
www.freescale.com/analog
Power Management Home Page
www.freescale.com/PMIC
13.1
Support
Visit Freescale.com/support for a list of phone numbers within your region.
13.2
Warranty
Visit Freescale.com/warranty for a list of phone numbers within your region.
KTPF0200HWUG, Rev. 1.0
Freescale Semiconductor
37
Revision History
14 Revision History
Revision
1.0
Date
2/2014
Description of Changes
• Initial release
KTPF0200HWUG, Rev. 1.0
38
Freescale Semiconductor
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Document Number: KTPF0200HWUG
Rev. 1.0
2/2014