Download Intel Pentium D 940
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Electrical Specifications Table 4. Voltage and Current Specifications Symbol Parameter Processor number IENHANCED_ AUTO_HALT ITCC VTT Min Typ Max — — 68 2 ICC Enhanced Auto Halt for 775_VR_CONFIG_05B (Performance) Extreme Edition 965 3.73 GHz Extreme Edition 955 3.46 GHz 960 3.60 GHz 60 950 3.40 GHz 60 940 3.20 GHz 60 Processor number Unit Notes1, 68 ICC Enhanced Auto Halt for 775_VR_CONFIG_05A (Mainstream) 960 3.60 GHz 950/945 3.40 GHz 940/935 3.20 GHz 48 930/925 3.00 GHz 48 920/915 2.80 GHz 48 ICC TCC active FSB termination voltage (DC + AC specifications) — — A 10,11 48 48 — — ICC A 12 1.14 1.20 1.26 V 13, 14 VTT_OUT_ LEFT and VTT_OUT_ RIGHT ICC DC Current that may be drawn from VTT_OUT_LEFT and VTT_OUT_RIGHT per pin — — 580 mA ITT Steady-state FSB termination current — — 4.5 A 15, 16 ITT_POWER-UP Power-up FSB termination current — — 7.5 A 15, 17 ICC_VCCA ICC for PLL lands — — 70 mA ICC_VCCIOPLL ICC for I/O PLL land — — 52 mA ICC_GTLREF ICC for GTLREF — — 200 μA NOTES: 1. Unless otherwise noted, all specifications in this table are based on estimates and simulations or empirical data. These specifications will be updated with characterized data from silicon measurements at a later date. 2. Adherence to the voltage specifications for the processor are required to ensure reliable processor operation. 3. Each processor is programmed with a maximum valid voltage identification value (VID), which is set at manufacturing and can not be altered. Individual maximum VID values are calibrated during manufacturing such that two processors at the same frequency may have different settings within the VID range. Note that this differs from the VID employed by the processor during a power management event (Enhanced Intel SpeedStep technology or Enhanced HALT State). 4. These voltages are targets only. A variable voltage source should exist on systems in the event that a different voltage is required. See Section 2.3 and Table 2 for more information. 5. The voltage specification requirements are measured across VCC_SENSE and VSS_SENSE lands at the socket with a 100 MHz bandwidth oscilloscope, 1.5 pF maximum probe capacitance, and 1 MΩ minimum impedance. The maximum length of ground wire on the probe should be less than 5 mm. Ensure external noise from the system is not coupled into the oscilloscope probe. 6. Refer to Table 5 and Figure 1 for the minimum, typical, and maximum VCC allowed for a given current. The processor should not be subjected to any VCC and ICC combination wherein VCC exceeds VCC_MAX for a given current. 7. ICC_MAX specification is based on VCC Maximum loadline. Refer to Figure 1 for details. 8. ICC_RESET is specified while RESET# is active. 9. The current specified is also for AutoHALT State. 10.ISGNT and ICC_ENHANCED_AUTO_HALT are specified at VCC_TYP and TC = 50 °C. 11.These parameters are based on design characterization and are not tested. 12.The maximum instantaneous current the processor will draw while the thermal control circuit is active (as indicated by the assertion of PROCHOT#) is the same as the maximum ICC for the processor. 13.VTT must be provided via a separate voltage source and not be connected to VCC. This specification is measured at the land. 14.Baseboard bandwidth is limited to 20 MHz. 22 Datasheet