Download MC PCIe-DIO24 User`s guide

PCIe-DIO24 User's Guide
Introducing the PCIe-DIO24
Functional block diagram
PCIe-DIO24 functions are illustrated in the block diagram shown here.
+12V
+12V
(pin 16)
+V DIO
(pin 18)
+V DIO
Regulated
Fuse
Protection
Spare Fuse
VDIO and 12V
Fuse
Protection
1.5V
Regulator
+V DIO
(pin 20)
3.3V
3.3V Board Power
+5 (VDD)
3.3V
5V
Regulator
37-pin I/O Connector
IRQ Enable
8
PORT A
Buffering
8
PORT B
Buffering
PORT CL
Buffering
4
PORT CH
Buffering
4
3.3/5V
PORT A
Direction CTR
3.3/5V
PORT B
Direction CTR
3.3/5V
PORT CL
Direction CTR
PCIe-to-PCI
Bridge
8
8
Complex,
Programmable
Logic Device
(CPLD)
4
3.3/5V
PORT CH
Direction CTR
4
24
4
Buffer
VDIO
10 kΩ
Pull
Resistor
Network
4
EEPROM
switch
4
Direction
Control
Logic, Control,
Interface
Decode/Status
82C55 Emulation
+5V (VDD)
GND
Bus
Timing
PCI-to-Local
Bus
3.3V, 32-bit, 66 MHz
LAD(0:7)
8
Local
Address
&
Data Bus
User
3.3/5V
I/O Switch
5V 3.3 V
(VDD)
Figure 1. PCIe-DIO24 functional block diagram
6
PCI Bus
BADR2
+
BADR3
Boot
EEPROM
x1 Link
PCI Express Edge Connector
IRQ Input