Download ARM Cortex r1p3 Datasheet
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I2C bus interface RM0352 [23] SALM: slave arbitration lost mask. SALM enables the interrupt bit SAL. (SMBUS mode) 0: SAL interrupt is disabled. 1: SAL interrupt is enabled. [20] STDM: slave transaction done mask. STDM enables the interrupt bit STD. 0: STD interrupt is disabled. 1: STD interrupt is enabled. [19] MTDM: master transaction done mask. MTDM enables the interrupt bit MTD. 0: MTD interrupt is disabled. 1: MTD interrupt is enabled. [18] WTSRM: write-to-slave request mask. WTSRM enables the interrupt bit WTSR. 0: WTSR interrupt is disabled. 1: WTSR interrupt is enabled. [17] RFSEM: read-from-slave empty mask. RFSEM enables the interrupt bit RFSE. 0: RFSE interrupt is disabled. 1: RFSE interrupt is enabled. [16] RFSRM: read-from-slave request mask. RFSRM enables the interrupt bit RFSR. 0: RFSR interrupt is disabled. 1: RFSR interrupt is enabled. [15] LBRM: length number of bytes received mask. LBRM enables the interrupt bit LBR(SMBUS). 0: LBR interrupt is disabled. 1: LBR interrupt is enabled. [6] RXFFM: Rx FIFO full mask. RXFFM enables the interrupt bit RXFF. 0: RXFF interrupt is disabled. 1: RXFF interrupt is enabled. [5] RXFNFM: Rx FIFO nearly full mask. RXFN FM enables the interrupt bit RXFNF. 0: RXFNF interrupt is disabled. 1: RXFNF interrupt is enabled. [4] RXFEM: Rx FIFO empty mask. RXFEM enables the interrupt bit RXFE. 0: RXFE interrupt is disabled. 1: RXFE interrupt is enabled. DocID024647 Rev 1 87/138 137