Download MATLAB FIXED-POINT TOOLBOX - RELEASE NOTES User guide

Chapter 4: Getting Started
Lesson 2 Summary
•
Quantization and overflow options are available when the output of a block is user
defined
•
Quantization occurs when the number of fractional bits is insufficient to represent the
fractional portion of a value
•
Overflow occurs when a value lies outside the representable range
•
Bit picking blocks allow combining of multiple buses into a single bus, force a
conversion of data type without changing the number of bits, extract bits, and convert
the number into different format
•
The BitBasher block allows bit manipulation and augmentation through textual
specification based in Verilog
Lab Exercise: Signal Routing
In this lab you will design and verify padding and unpadding logic using the System
Generator signal routing blocks
The lab instructions are located in the System Generator software tree at the following
pathname:
<ISE_Design_Suite_tree>/sysgen/examples/getting_started_training/lab3/lab
3.pdf
62
www.xilinx.com
System Generator for DSP Getting Started Guide
UG639 (v 12.2) July 23, 2010