Download Block Parameters

Chapter 1: Xilinx Blockset
Divider Generator 5.1
This block is listed in the following Xilinx Blockset libraries: AXI4, DSP, Math, and Index.
The Xilinx Divider Generator block creates a circuit for integer
division based on Radix-2 non-restoring division, or High-Radix
division with prescaling.
Block Parameters
The block parameters dialog box can be invoked by
double-clicking the icon in your Simulink model.
Basic tab
Parameters specific to the Basic tab are:
Common Options
•
Algorithm Type:
°
°
Radix-2 non-restoring integer division using integer operands, allows a remainder
to be generated. This is recommended for operand widths less than around 16 bits.
This option supports both unsigned and signed (2’s complement) divisor and
dividend inputs.
High_Radix division with prescaling. This is recommended for operand widths
greater than 16 bits, though the implementation requires the use of DSP48 (or
variant) primitives. This option only supports signed (2’s complement) divisor and
dividend inputs.
Output channel
•
•
Remainder type:
°
Remainder: Only supported for Radix 2.
°
Fractional: Determines the number of bits in the fractional port output.
Fractional width: If Fractional Remainder type is selected, this entry determines the
number of bits in the fractional port output.
Radix2 Options
•
Radix2 throughput: Determines the interval in clocks between new data being input
(and output). Choices are 1, 2, 4, and 8.
Vivado: Designing with System Generator
UG958 (v2015.3) September 30, 2015
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