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vsim
-strictvital
Exactly match the VITAL package ordering for messages and delta cycles.
Optional. Useful for eliminating delta cycle differences caused by optimizations
not addressed in the VITAL LRM. Using this will reduce simulator performance.
-vcdread <filename>
Simulates theVHDL top-level design from the specified VCD file. Optional. The
VCD file must have been created in a previous simulation using the vcd file
command (CR-163) with the -nomap and -direction options.
-vital2.2b
Select SDF mapping for VITAL 2.2b (default is VITAL 95). Optional.
Arguments, Verilog
+alt_path_delays
Use the current output value instead of pending value when selecting inertial
specify path output delay. Optional.
-hazards
Enables hazard checking in Verilog modules. Optional.
-L <library_name> ...
Specifies the design library to search for the specified configuration, entity or
module. Optional, if omitted the work library is used. If multiple libraries are
specified, each must be preceded by the -L option.
-Lf <library_name> ...
Same as -L but libraries are searched before ‘uselib. Optional.
+mindelays
Selects minimum timing from Verilog min:typ:max expressions. Optional.
+maxdelays
Selects maximum timing from Verilog min:typ:max expressions. Optional.
+no_pulse_msg
Disables path pulse error warning messages. Optional.
+nosdfwarn
Disables warning from SDF annotator. Optional.
+nosdferror
Errors issued by the SDF annotator while loading the design prevent the
simulation from continuing, whereas warnings do not. Changes SDF errors to
warnings so that the simulation can continue. Optional.
CR-216 ModelSim Commands
ModelSim EE/SE Command Reference