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The scatter-gather RAM is an 32K n longword page in memory space. The top 27 bits are read/write; the remaining 5 bits are MBZ. Scatter-gather RAM is not initialized by hardware and starts up in a random state. Firmware must initialize this area to a default state before using the VME subsystem. The scatter-gather RAM is fully programmable over the PCI bus. The mapping of the scatter-gather RAM takes up 128 KB of PCI memory space and has its own base address. The 8K scatter-gather longword entries are in three regions: Entry Address Each Entry Maps: Index Formed By: 2048 A24 inbound VME_SG_BASE + 10000h 8K page of A24 VME address space into PCI address space VME A24 <23:13> 16384 A32 inbound VME_SG_BASE 8K page of A32 VME address space into PCI address space VME A32 <26:13> 2048 outbound VME_SG_BASE + 1E000h 256K page of PCI memory into VMEbus Depends on region used for master access: VME_WINDOW : PCI <28:18> VME_SUB_ WINDOW (64 MB) : PCI <25:18> 10.5.3 Configuring the VIC64 The address map for the VIC64 places the VIC registers in byte 3 of a particular longword address. As used by a Digital Alpha VME 4 system, the VIC registers are seen at byte zero in each longword, when accessed over the PCI bus. VIICR Bits 2-0 Local interrupt priority level (IPL) setting for VMEbus interrupter acknowledge received interrupt. Bits 6-3 Reserved, must read as 1s. Bit 7 Interrupt mask bit. VICR1-7 Bits 2-0 Local IPL setting for VMEbus interrupt. Bits 6-3 Reserved, must read as 1s. Bit 7 Interrupt mask bit. 10–32 VME Interface
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