Download ARM Cortex R4F Specifications

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VIM Interrupt Address Memory Map .................................................................................... 27
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FIQ/IRQ Control Register 0 (FIRQPR0) Address = 0xFFFFFE10 .................................................. 30
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FIQ/IRQ Control Register 1 (FIRQPR1) Address = 0xFFFFFE14 .................................................. 30
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Interrupt Enable Set Register 0 (REQENASET0) Address = 0xFFFFFE30 ....................................... 30
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Interrupt Enable Set Register 1 (REQENASET1) Address = 0xFFFFFE34 ....................................... 31
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Interrupt Enable Clear Register 0 (REQENACLR0) Address = 0xFFFFFE40 ..................................... 31
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Interrupt Enable Clear Register 1 (REQENACLR1), Address = 0xFFFFFE44 .................................... 31
List of Tables
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PLL Control Register (PLLCTL1) Field Descriptions ................................................................... 6
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PLL Control Register 2 (PLLCTL2) Field Descriptions ................................................................. 7
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Clock Sources on Hercules Microcontrollers ............................................................................ 8
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Flash Read Control Register (FRDCNTL) Field Descriptions ....................................................... 14
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Flash State Machine Write Enable Control Register (FSM_WR_ENA) Field Descriptions ...................... 15
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Flash EEPROM Configuration Register (EEPROM_CONFIG) Field Descriptions................................ 15
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Flash Bank Access Control Register (FBAC) Field Descriptions
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Flash Pump Access Control Register 1 (FPAC1) Field Descriptions ...............................................
Flash Pump Access Control Register 2 (FPAC2) Field Descriptions ...............................................
Clock Domains on Hercules Microcontrollers ..........................................................................
GCLK, HCLK , VCLKx Source Register (GHVSRC) Field Descriptions ...........................................
Asynchronous Clock Source Register (VCLKASRC) Field Descriptions ...........................................
Memory Hardware Initialization Global Control Register (MINITGCR) Field Descriptions .......................
Memory Self-Test / Initialization Control Register (MSIENA) Field Descriptions..................................
Initialization of Hercules™ ARM® Cortex™-R4F Microcontrollers
Copyright © 2011, Texas Instruments Incorporated
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SPNA106 – September 2011
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