Download Vax V-092 Specifications

Two checkerboard test patterns ($55 and tAA) are used,
first for b~te path immediate data and next for lonSword path immediate
data, usin~ reSister dO.
Once dO has been verified for immediate addressinS, it
is reloaded with the first checkerboard pattern, $55555555.
This
pattern is then cascaded throu~h all eiSht data re~isters (dO-d7) and
all seven address reSisters (aO-a6).
The routine is then repeated with
dO initialised to the second checker-board pattern, $AAAAAAAA.
This
routine validates reSister RAM space and reSister source and
destination effective addressinS modes.
The third step is to test three loSical instructions;
landi, leor l , and ·or ' • After that, the siSned multipl~ and divide
instructions are verified, and finall~ the left-shift and riSht-rotate
instructions are verified.
The final step is to test bit manipulation usinS the
This is a particularl~ important
step, as the diasnostics rest heavil~ on the functionalit~ of the
bit-oriented instructions to determine their path.
BCLR, BSET, and Sec instructions.
7.0.4
ROM CHECKSUM
The ROM verification routine compares the truncated
a-bit computed checksum aSainst the correct value (stored at the end
of ROM).
This checksum is computed bs a VAX-1I FORTRAN utilit~, and
is inserted into the final b~te of the source file before creatins
the master set of ROM's.