Download Dynamic Engineering PMC2PCI Specifications

9
ADDITIONAL LOCAL I/O FUNCTIONS
The PP 41x/03x supports a variety of I/O functions whose addresses are summarized in Table 9-1.
NOTE: An LPC Super I/O controller (designated TM Super I/O in Table 9-1) is located on
the AD PP5/001-4xU Transition Module. This device provides some of the legacy
peripheral functions.
I/O Address Range
0000-001Fh
0020-002Dh
002E-002Fh
0030-003Dh
0040-0043h
004E-004Fh
0040-0053h
0060h
0061h
0064h
0070h
0071h
0080h
0092h
00A0-00A1h
00C0-00DFh
00F0h
0210-021Fh
02F8-02FFh
03BC-03BFh
03E8-03Efh
03F0-03F7h
03F8-03FFh
04D0-04D1h
0CA9-0CABh
0CF8-0CFFh
0D00-FFFFh
Description
DMA Controller (6300ESB)
Interrupt Controller (6300ESB)
Configuration Index & Data Registers (TM Super I/O)
Interrupt Controller (6300ESB)
PIT Timers (6300ESB)
SIU Configuration Index & Data Registers (6300ESB)
PIT Timers (6300ESB)
Keyboard Controller emulation (CPLD)
NMI Status (6300ESB)
Keyboard Controller emulation (CPLD)
NMI Enable/RTC Address (6300ESB)
RTC Data (6300ESB)
Debug Port
Port 92 Reset Generator (6300ESB)
Slave Interrupt Controller (6300ESB)
Slave DMA Controller (6300ESB)
Math Coprocessor Error
Control & Status Registers (CPLDs)
COM2 Serial (6300ESB or TM Super I/O)
Parallel Port LPT1 (TM Super I/O)
COM3 Serial (TM Super I/O)
Floppy Controller (TM Super I/O)
COM1 Serial (6300ESB)
Interrupt Control (6300ESB)
IPMI SMIC Interface (CPLD)
PCI Configuration Registers (E7520)
PCI Free I/O Space
Table 9-1 I/O Address Map
NOTE: I/O addresses in the range 0000h-0CFFh which are not listed above should not
be accessed. The effects of such accesses are unpredictable.
PP 41x/03x
9-1