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DSP56F807EVMUM/D
Rev. 0, 02/2001
DSP56F807 Evaluation Module
Hardware User’s Manual
© Motorola, Inc., 2001. All rights reserved.
Table of Contents
Preface
Audience . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ix
Organization. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ix
Suggested Reading . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ix
Notation Conventions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . x
Definitions, Acronyms, and Abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . x
References . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . xi
Chapter 1
Introduction
1.1
1.2
1.3
DSP56F807EVM Architecture . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-1
DSP56F807EVM Configuration Jumpers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-2
DSP56F807EVM Connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-4
Chapter 2
Technical Summary
2.1
2.2
2.3
2.4
2.5
2.6
2.7
2.7.1
2.7.2
2.8
2.9
2.10
2.11
2.12
2.13
2.14
2.15
2.16
DSP56F807 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-3
Program and Data Memory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-5
RS-232 Serial Communications. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-6
Clock Source . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-7
Operating Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-7
Debug LEDs. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-8
Debug Support . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-8
JTAG Connector. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-9
Parallel JTAG Interface Connector . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-10
External Interrupts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-11
Reset. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-12
Power Supply . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-13
Primary UNI-3 Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-14
Secondary UNI-3 Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-15
General Purpose Switches and Run/Stop Switch. . . . . . . . . . . . . . . . . . . . . . . . 2-17
Serial 10-bit 4-channel D/A Converter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-18
Motor Control PWM Signals and LEDs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-18
Motor Protection Logic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-19
Table of Contents
iii
2.16.1
Primary UNI-3 Motor Protection Logic. . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.16.2
Secondary UNI-3 Motor Protection Logic. . . . . . . . . . . . . . . . . . . . . . . . . .
2.17 Back-EMF and Motor Phase Current Sensing. . . . . . . . . . . . . . . . . . . . . . . . . .
2.18 Quadrature Encoder/Hall-Effect Interface. . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.19 Zero-Crossing Detection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.20 CAN Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.21 Software Feature Jumpers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.22 Peripheral Connectors . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.22.1
Port B Expansion Connector . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.22.2
Port D Expansion Connector . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.22.3
Port E Expansion Connector . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.22.4
External Memory Control Signal Expansion Connector . . . . . . . . . . . . . . .
2.22.5
Primary Encoder/Timer Channel A Expansion Connector . . . . . . . . . . . . .
2.22.6
Secondary Encoder/Timer Channel B Expansion Connector . . . . . . . . . . .
2.22.7
Timer Channel C Expansion Connector . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.22.8
Timer Channel D Expansion Connector . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.22.9
Address Bus Expansion Connector . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.22.10 Data Bus Expansion Connector . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.22.11 A/D Port A Expansion Connector . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.22.12 A/D Port B Expansion Connector . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.22.13 Serial Communications Port 0 Expansion Connector . . . . . . . . . . . . . . . . .
2.22.14 Serial Communications Port 1 Expansion Connector . . . . . . . . . . . . . . . . .
2.22.15 Serial Peripheral Interface Expansion Connector . . . . . . . . . . . . . . . . . . . .
2.22.16 CAN Expansion Connector . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.22.17 PWM Port A Expansion Connector . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.22.18 PWM Port B Expansion Connector . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.23 Test Points . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2-20
2-21
2-22
2-23
2-23
2-24
2-25
2-26
2-27
2-27
2-28
2-28
2-29
2-29
2-30
2-30
2-31
2-32
2-32
2-33
2-33
2-34
2-34
2-34
2-35
2-35
2-36
Appendix A
DSP56F807EVM Schematics
Appendix B
DSP56F807EVM Bill of Material
iv
DSP56F807EVM Hardware User’s Manual
List of Figures
1-1
Block Diagram of the DSP56F807EVM . . . . . . . . . . . . . . . . . . . . . . . . . 1-2
1-2
DSP56F807EVM Jumper Reference . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-3
1-3
Connecting the DSP56F807EVM Cables . . . . . . . . . . . . . . . . . . . . . . . . . 1-4
2-1
Schematic Diagram of the External Memory Interface . . . . . . . . . . . . . . 2-5
2-2
Schematic Diagram of the RS-232 Interface . . . . . . . . . . . . . . . . . . . . . . 2-6
2-3
Schematic Diagram of the Clock Interface . . . . . . . . . . . . . . . . . . . . . . . . 2-7
2-4
Schematic Diagram of the Debug LED Interface . . . . . . . . . . . . . . . . . . . 2-8
2-5
Block Diagram of the Parallel JTAG Interface. . . . . . . . . . . . . . . . . . . . 2-10
2-6
Schematic Diagram of the User Interrupt Interface . . . . . . . . . . . . . . . . 2-11
2-7
Schematic Diagram of the RESET Interface . . . . . . . . . . . . . . . . . . . . . 2-12
2-8
Schematic Diagram of the Power Supply . . . . . . . . . . . . . . . . . . . . . . . . 2-13
2-9
Run/Stop and General Purpose Switches . . . . . . . . . . . . . . . . . . . . . . . . 2-17
2-10
Serial 10-bit, 4-Channel D/A Converter . . . . . . . . . . . . . . . . . . . . . . . . . 2-18
2-11
PWM Group A Interface and LEDs . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-19
2-12
FAULTA1 Selection Circuit. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-20
2-13
DC-Bus Over-Voltage and Phase Over-Current Detection Circuits. . . . 2-21
2-14
FAULTB1 Selection Circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-22
2-15
Primary Back-EMF or Motor Phase Current Sense Signals . . . . . . . . . . 2-23
2-16
Zero-Crossing Encoder Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-24
2-17
CAN Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-24
2-18
Software Feature Jumpers. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-25
A-1
DSP56F807 Processor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A-2
A-2
RESET, MODE, CLOCK & IRQS. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A-3
A-3
PROGRAM & DATA SRAM MEMORY . . . . . . . . . . . . . . . . . . . . . . . . A-4
A-4
RS-232 AND SCI CONNECTORS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A-5
A-5
DEBUG SERIAL 4-CHANNEL D/A CONVERTER . . . . . . . . . . . . . . . A-6
A-6
PWM A AND 3 USER LEDS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A-7
List of Figures
v
A-7
PRIMARY UNI-3 INTERFACE AND OVER-VOLTAGE FAULT
DETECTION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A-8
A-8
SECONDARY UNI-3 AND OVER-VOLTAGE DETECTION . . . . . . . A-9
A-9
USER GENERAL PURPOSE SWITCHES AND JUMPERS. . . . . . . . A-10
A-10
MOTOR PHASE-CURRENT/BACK-EMF VOLTAGE ANALOG
INPUT SELECTOR . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A-11
A-11
PRIMARY AND SECONDARY 3-PHASE OVER-CURRENT
SENSE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A-12
A-12
PRIMARY ZERO-CROSSING/QUADRATURE-ENCODER OR
HALL-EFFECT SELECTOR . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A-13
A-13
SECONDARY ZERO-CROSSING/QUADRATURE-ENCODER OR
HALL-EFFECT SELECTOR . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A-14
A-14
DSP PORT EXPANSION CONNECTORS . . . . . . . . . . . . . . . . . . . . . A-15
A-15
HIGH-SPEED CAN INTERFACE . . . . . . . . . . . . . . . . . . . . . . . . . . . . A-16
A-16
PARALLEL JTAG HOST TARGET INTERFACE AND JTAG
CONNECTOR . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A-17
A-17
POWER SUPPLIES . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A-18
A-18
BYPASS CAPACITORS AND SPARE GATES . . . . . . . . . . . . . . . . . A-19
vi
DSP56F807EVM Hardware User’s Manual
List of Tables
1-1
DSP56F807EVM Default Jumper Options. . . . . . . . . . . . . . . . . . . . . . . . 1-3
2-1
RS-232 Serial Connector Description. . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-6
2-2
Operating Mode Selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-7
2-3
JTAG Connector Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-9
2-4
Parallel JTAG Interface Disable Jumper Selection. . . . . . . . . . . . . . . . . . 2-9
2-5
Parallel JTAG Interface Connector Description . . . . . . . . . . . . . . . . . . . 2-10
2-6
Primary UNI-3 Connector Description . . . . . . . . . . . . . . . . . . . . . . . . . . 2-14
2-7
Secondary UNI-3 Connector Description . . . . . . . . . . . . . . . . . . . . . . . . 2-15
2-8
D/A Header Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-18
2-9
FAULTA1 Source Selection Jumper . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-20
2-10
FAULTB1 Source Selection Jumper . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-22
2-11
CAN Header Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-25
2-12
Port B Connector Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-27
2-13
Port D Connector Description. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-27
2-14
Port E Connector Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-28
2-15
External Memory Control Signal Connector Description . . . . . . . . . . . 2-28
2-16
Timer A Connector Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-29
2-17
Timer B Connector Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-29
2-18
Timer C Connector Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-30
2-19
Timer D Connector Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-30
2-20
External Memory Address Bus Connector Description . . . . . . . . . . . . . 2-31
2-21
External Memory Address Bus Connector Description . . . . . . . . . . . . . 2-32
2-22
A/D Port A Connector Description. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-32
2-23
A/D Port B Connector Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-33
2-24
SCI0 Connector Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-33
2-25
SCI1 Connector Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-34
2-26
SPI Connector Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-34
List of Tables
vii
2-27
CAN Connector Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-34
2-28
PWM Port A Connector Description . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-35
2-29
PWM Port B Connector Description . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-35
viii
DSP56F807EVM Hardware User’s Manual
Preface
This reference manual describes in detail the hardware on the DSP56F807 Evaluation
Module.
Audience
This document is intended for application developers who are creating software for
devices using the Motorola DSP56F807 part.
Organization
This manual is organized into two chapters and two appendixes.
•
Chapter 1, Introduction - provides an overview of the EVM and its features.
•
Chapter 2, Technical Summary - describes in detail the DSP56F807 hardware.
•
Appendix A, DSP56F807EVM Schematics - contains the schematics of the
DSP56F807EVM.
•
Appendix B, DSP56F807EVM Bill of Material - provides a list of the materials used on
the DSP56F807EVM board.
Suggested Reading
More documentation on the DSP56F807 and the DSP56F807EVM kit may be found at
URL:
http://www.mot.com/SPS/DSP/documentation/index.html
Preface
ix
Notation Conventions
This manual uses the following notational conventions:
Term or Value
Symbol
Examples
Active High Signals
(Logic One)
No special symbol
attached to the signal
name
A0
CLKO
Active Low Signals
(Logic Zero)
Noted with an
overbar in text and in
most figures
WE
OE
Hexadecimal Values
Begin with a “$” symbol
$0FF0
$80
Decimal Values
No special symbol
attached to the
number
10
34
Binary Values
Begin with the letter
“b” attached to the
number
b1010
b0011
Numbers
Considered positive
unless specifically
noted as a negative
value
5
-10
Bold
Reference sources,
paths, emphasis
Exceptions
In schematic drawings, Active
Low Signals may be noted by a
backslash: /WE
Voltage is often shown as positive: +3.3V
...see:
http://www.mot.c
om/SPS/DSP...
Definitions, Acronyms, and Abbreviations
Definitions, acronyms and abbreviations for terms used in this document are defined
below for reference.References
A/D
CAN
CiA
D/A
DSP
EVM
GPIO
IC
x
Analog to Digital
Controller Area Network. Serial communications peripheral and method.
CAN in Automation. An international CAN user’s group that coordinates
standards for CAN communications protocols.
Digital to Analog
Digital Signal Processor or Digital Signal Processing
Evaluation Module
General Purpose Input and Output Port on Motorola’s Family of DSPs
Integrated Circuit
DSP56F807EVM Hardware User’s Manual
JTAG
LQFP
MPIO
OnCETM
PCB
PLL
PWM
RAM
ROM
SCI
SPI
SRAM
UART
Joint Test Action Group. A bus protocol/interface used for test and
debug.
Low profile Quad Flat Pack
Multi Purpose Input and Output Port on Motorola’s Family of DSPs.
Shares package pins with other peripherals on the chip and can function
as a GPIO.
On-Chip Emulation, a debug bus and port created by Motorola to enable
designers to create a low-cost hardware interface for a professional
quality debug environment.
Printed Circuit Board
Phase Locked Loop
Pulse Width Modulation
Random Access Memory
Read Only Memory
Serial Communications Interface
Serial Peripheral Interface Port on Motorola’s Family of DSPs
Static Random Access Memory
Universal Asynchronous Receiver/Transmitter
References
The following sources were referenced to produce this manual:
[1] DSP56800 Family Manual, Motorola
[2] DSP56F807 Digital Signal Processor User’s Manual, Motorola
[3] DSP56F807 Digital Signal Processor Technical Data, Motorola
[4] CiA Draft Recommendation DR-303-1, Cabling and Connector Pin
Assignment, Version 1.0, CAN in Automation
[5] CAN Specification 2.0B, BOSCH or CAN in Automation
Preface
xi
xii
DSP56F807EVM Hardware User’s Manual
Chapter 1
Introduction
The DSP56F807EVM is used to demonstrate the abilities of the DSP56F807 and to
provide a hardware tool allowing the development of applications that use the
DSP56F807.
The DSP56F807EVM is an evaluation module board that includes a DSP56F807 part,
peripheral expansion connectors, external memory and a CAN interface. The expansion
connectors are for signal monitoring and user feature expandability.
The DSP56F807EVM is designed for the following purposes:
•
Allowing new users to become familiar with the features of the 56800 architecture.
The tools and examples provided with the DSP56F807EVM facilitate evaluation of
the feature set and the benefits of the family.
•
Serving as a platform for real-time software development. The tool suite enables
the user to develop and simulate routines, download the software to on-chip or
on-board RAM, run it, and debug it using a debugger via the JTAG/OnCETM port.
The breakpoint features of the OnCE port enable the user to easily specify complex
break conditions and to execute user-developed software at full-speed, until the
break conditions are satisfied. The ability to examine and modify all user
accessible registers, memory and peripherals through the OnCE port greatly
facilitates the task of the developer.
•
Serving as a platform for hardware development. The hardware platform enables
the user to connect external hardware peripherals. The on-board peripherals can be
disabled, providing the user with the ability to reassign any and all of the DSP's
peripherals. The OnCE port's unobtrusive design means that all of the memory on
the board and on the DSP chip are available to the user.
1.1 DSP56F807EVM Architecture
The DSP56F807EVM facilitates the evaluation of various features present in the
DSP56F807 part. The DSP56F807EVM can be used to develop real-time software and
hardware products based on the DSP56F807. The DSP56F807EVM provides the features
Introduction
1-1
necessary for a user to write and debug software, demonstrate the functionality of that
software and interface with the customer’s application-specific device(s). The
DSP56F807EVM is flexible enough to allow a user to fully exploit the DSP56F807’s
features to optimize the performance of their product, as shown in Figure 1-1.
DSP56F807
RESET
LOGIC
RESET
MODE/IRQ
LOGIC
Program Memory
64Kx16-bit
SRAM
MODE/IRQ
Address,
Data &
Control
SPI
SCI #0
RS-232
Interface
SCI #1
Peripheral
Expansion
Connector(s)
TIMER
DSub
25-Pin
PWM LEDs
Over V Sense
Over I Sense
Zero Crossing
Detect
JTAG/OnCE
PWM #1
Pri UNI-3
A/D #0
Parallel
JTAG
Interface
Low Freq
Crystal
Debug LEDs
GPIO
Memory
Expansion
Connector(s)
JTAG
Connector
DSub
9-Pin
CAN Interface
CAN
Data Memory
64Kx16-bit
SRAM
4-Channel
10-bit D/A
A/D #1
Sec UNI-3
PWM #2
XTAL/EXTAL
3.3 V & GND
Power Supply
3.3V, 5.0V &
Figure 1-1. Block Diagram of the DSP56F807EVM
1.2 DSP56F807EVM Configuration Jumpers
Seventeen jumper groups, (JG1-JG17), shown in Figure 1-2, are used to configure various
features on the DSP56F807EVM board. Table 1-1 describes the default jumper group
settings.
1-2
DSP56F807EVM Hardware User’s Manual
DSP56F807EVM Configuration Jumpers
JG3
3
2
1
JG12
JG17
1
JG16
1
3
3
3
2
1
JG13
3
2
1
JG10
JG7
USER
J4
PWM
JG5
1
3
2
1
JG12
3
JG10
3
2
1
JG17JG16 JG13
JG3 JG7
JG11
JG6
J1
Y1
JG2
JG5
JG15
8
DSP56F807EVM
2
JG1
S/N
J2
S4
S5
S6
GP1
S1
GP2
S2
RUN/STOP
S3
JTAG
JG9
JG4
LED3
P3 RESET
7
IRQA
7
J3
U9
8
P2
P1
1
JG11
U1
U2
JG14
1
4
7
JG15
2
1
JG8
1
3
JG2
J5
3
2
1
IRQB
JG14
1
4
7
3
6
9
JG8
JG9
3
JG1
JG6
1
JG4
Figure 1-2. DSP56F807EVM Jumper Reference
Table 1-1. DSP56F807EVM Default Jumper Options
Jumper
Group
Comment
Jumpers
Connections
JG1
Primary UNI-3 Phase A Over-Current Selected for FAULTA1
1–2
JG2
Secondary UNI-3 Phase A Over-Current Selected for FAULTB1
1–2
JG3
CAN termination unselected
NC
JG4
Enable on-board Parallel JTAG Host/Target Interface
NC
JG5
Use on-board EXTAL crystal input for DSP oscillator
2–3
JG6
Use on-board XTAL crystal input for DSP oscillator
1–2
JG7
Selects DSP’s Mode 0 operation upon exit from reset
1-2
JG8
Enable on-board SRAM
1–2
JG9
Disable RS-232 output
NC
JG10
Secondary UNI-3 3-Phase Current Sense Selected as inputs to A/D
JG11
Secondary UNI-3 serial selected
1–2, 3–4, 5–6 & 7–8
JG12
Primary Encoder Input Selected
2–3, 5–6 & 8–9
JG13
Secondary Encoder Input Selected
2–3, 5–6 & 8–9
JG14
Primary UNI-3 3-Phase Current Sense Selected as inputs to A/D
2–3, 5–6 & 8–9
JG15
Primary UNI-3 serial selected
JG16
PD0 input selected as a high input
1–2
JG17
PD1 input selected as a high input
1–2
2–3, 5–6 & 8–9
1–2, 3–4, 5–6 & 7–8
Introduction
1-3
1.3 DSP56F807EVM Connections
An interconnection diagram is shown in Figure 1-3 for connecting the PC and the external
12V DC power supply to the DSP56F807EVM board.
Parallel Extension
Cable
DSP56F807EVM
PC-compatible
Computer
P1
Connect cable
to Parallel/Printer port
P2
External with 2.1mm,
12V
receptacle
Power connector
Figure 1-3. Connecting the DSP56F807EVM Cables
Perform the following steps to connect the DSP56F807EVM cables:
1. Connect the parallel extension cable to the Parallel port of the host computer.
2. Connect the other end of the parallel extension cable to P1, shown in Figure 1-3,
on the DSP56F807EVM board. This provides the connection which allows the host
computer to control the board.
3. Make sure that the external 12V DC, 4.0A power supply is not plugged into a 120V
AC power source.
4. Connect the 2.1mm output power plug from the external power supply into P2,
shown in Figure 1-3, on the DSP56F807EVM board.
5. Apply power to the external power supply. The green Power-On LED, LED10, will
illuminate when power is correctly applied.
1-4
DSP56F807EVM Hardware User’s Manual
Chapter 2
Technical Summary
The DSP56F807EVM is designed as a versatile Digital Signal Processor, (DSP),
development card for developing real-time software and hardware products to support a
new generation of applications in digital and wireless messaging, servo and motor control,
digital answering machines, feature phones, modems, and digital cameras. The power of
the 16-bit DSP56F807 DSP, combined with the on-board 64K × 16-bit external program
static RAM (SRAM), 64K × 16-bit external data SRAM, CAN interface,
Hall-Effect/Quadrature Encoder interface, motor zero crossing logic, motor bus
over-current logic, motor bus over-voltage logic and parallel JTAG interface, makes the
DSP56F807EVM ideal for developing and implementing many motor controlling
algorithms, as well as for learning the architecture and instruction set of the DSP56F807
processor.
The main features of the DSP56F807EVM, with board and schematic reference
designators include:
•
DSP56F807 16-bit 3.3V Digital Signal Processor operating at 80MHz [U1]
•
External fast static RAM (FSRAM) memory [U2], configured as:
— 64K×16-bit of program memory with 0 wait states at 70MHz
— 64K×16-bit of data memory with 0 wait states at 70MHz
•
4-Channel 10-bit Serial D/A, SPI for real-time user data display [U14]
•
8.00MHz crystal oscillator for DSP frequency generation [Y1]
•
Optional external oscillator frequency input connector [JG5 and JG6]
•
Joint Test Action Group (JTAG) port interface connector for an external debug
Host Target Interface [J3]
•
On-board Parallel JTAG Host Target Interface, with a connector for a PC printer
port cable [P1]
•
RS-232 interface for easy connection to a host processor [U13 and P3]
•
CAN interface for high speed, 1.0Mbps, communications [U8 and J24]
•
CAN bypass and bus termination [J25 and JG3]
Technical Summary
2-1
2-2
•
Connector to allow the user to connect their own SCI0 / MPIO compatible
peripheral [J15]
•
Connector to allow the user to connect their own SCI1 / MPIO compatible
peripheral [J14]
•
Connector to allow the user to connect their own SPI / MPIO compatible peripheral
[J13]
•
Connector to allow the user to connect their own PWMA or MPIO compatible
peripheral [J10]
•
Connector to allow the user to connect their own PWMB / MPIO compatible
peripheral [J11]
•
Connector to allow the user to connect their own CAN physical layer peripheral
[J16]
•
Connector to allow the user to connect their own Timer A / MPIO compatible
peripheral [J18]
•
Connector to allow the user to connect their own Timer B / MPIO compatible
peripheral [J21]
•
Connector to allow the user to connect their own Timer C / MPIO compatible
peripheral [J19]
•
Connector to allow the user to connect their own Timer D / MPIO compatible
peripheral [J22]
•
Connector to allow the user to attach their own Port B GPIO compatible peripheral
[J20]
•
Connector to allow the user to attach their own Port D GPIO compatible peripheral
[J23]
•
Connector to allow the user to attach their own Port E GPIO compatible peripheral
[J17]
•
Connector to allow the user to attach their own A/D port A compatible peripheral
[J9]
•
Connector to allow the user to attach their own A/D port B compatible peripheral
[J12]
•
DSP56F807’s external memory expansion connectors [J6, J7 and J8]
•
On-board power regulation from an external 12V DC-supplied power input [P2]
•
Light Emitting Diode (LED) power indicator [LED10]
•
Three on-board real-time user debugging LEDs [LED1-3]
DSP56F807EVM Hardware User’s Manual
DSP56F807
•
Six on-board Primary PWM monitoring LEDs [LED4-9]
•
Primary UNI-3 Motor interface [J1]
— Encoder/Hall-Effect interface and selector [JG12]
— Over-Voltage sensing [U16]
— Over-Current sensing [U3]
— Phase Current sensing [U3 and U4]
— Back-EMF sensing and selector [JG14]
— Temperature sensing
— Zero Crossing detection and selector [JG14]
— Pulse Width Modulation
•
Secondary UNI-3 Motor interface [J2]
— Encoder/Hall-Effect interface and selector [JG13]
— Over-Voltage sensing [U16]
— Over-Current sensing [U6]
— Phase Current sensing [U5 and U6]
— Back-EMF sensing and selector [JG10]
— Temperature sensing
— Zero Crossing detection and selector [JG10]
— Pulse Width Modulation
•
Manual RESET push-button [S1]
•
Manual interrupt push-button for IRQA [S2]
•
Manual interrupt push-button for IRQB [S3]
•
General purpose push-button on GPIO PD3 [S4]
•
General purpose push-button on GPIO PD4 [S5]
•
General purpose toggle switch for RUN/STOP control(PD5) [S6]
•
General purpose jumper on GPIO PD0 [JG16]
•
General purpose jumper on GPIO PD1 [JG17]
2.1 DSP56F807
The DSP56F807EVM uses a Motorola DSP56F807FV80 part, designated as U1 on the
board and in the schematics. This part will operate at a maximum speed of 80MHz. A full
Technical Summary
2-3
description of the DSP56F807, including functionality and user information, is provided
in these documents:
•
DSP56F807 Technical Data, (DSP56F807/D): Provides features list and
specifications including signal descriptions, DC power requirements, AC timing
requirements and available packaging.
•
DSP56F807 User’s Manual, (DSP56F807UM/AD): Provides an overview
description of the DSP and detailed information about the on-chip components
including the memory and I/O maps, peripheral functionality, and control/status
register descriptions for each subsystem.
•
DSP56F80x Family Manual, (DSP56F80xFM/AD): Provides a detailed description
of the core processor, including internal status and control registers and a detailed
description of the family instruction set.
Refer to these documents for detailed information about chip functionality and operation.
They can be found on this URL:
http://www.mot.com/SPS/DSP/documentation/index.html
2-4
DSP56F807EVM Hardware User’s Manual
Program and Data Memory
2.2 Program and Data Memory
The DSP56F807EVM uses one bank of 128K×16-bit Fast Static RAM (GSI GS72116,
labelled U2) for external memory expansion; see the FSRAM schematic diagram in
Figure 2-1. This physical memory bank is split into two logical memory banks of
64Kx16-bits: one for program memory and the other for data memory. By using the DSP’s
program strobe, PS, signal line along with the memory chip’s A0 signal line, half of the
memory chip is selected when program memory accesses are requested and the other half
of the memory chip is selected when data memory access are requested. This memory
bank will operate with zero wait-state accesses while the DSP56F807 is running at
70MHz. However, when running at 80MHz, the memory bank operates with four
wait-state accesses. This memory bank can be disabled by removing the jumper at JG8.
GS72116
DSP56F807
A0-A15
A1-A16
PS
A0
D0-D15
DQ0-DQ15
RD
OE
WR
WE
+3.3V
JG8
1
2
Jumper Pin 1-2:
Enable SRAM
Jumper Removed:
Disable SRAM
CE
Figure 2-1. Schematic Diagram of the External Memory Interface
Technical Summary
2-5
2.3 RS-232 Serial Communications
The DSP56F807EVM provides an RS-232 interface by the use of an RS-232 level
converter, (Maxim MAX3245EEAI, designated as U13). Refer to the RS-232 schematic
diagram in Figure 2-2. The RS-232 level converter transitions the SCI UART’s 3.3V
signal levels to RS-232 compatible signal levels and connects to the host’s serial port via
connector P3. Flow control is not provided, but could be implemented using uncommitted
GPIO signals. The pinout of connector P3 is listed in Table 2-1. The RS-232 level
converter/transceiver can be disabled by placing a jumper at JG9.
RS-232
Level Converter
Interface
DSP56F807
1
6
TXDO
T1in
RXDO
R1out
T1out
2
R1in
3
7
8
+3.3V
x
FORCEOFF
Jumper Removed:
Enable RS-232
Jumper Pin 1-2:
Disable RS-232
4
9
5
JG9
1
2
Figure 2-2. Schematic Diagram of the RS-232 Interface
.
Table 2-1. RS-232 Serial Connector Description
P3
2-6
Pin #
Signal
Pin #
Signal
1
Jumper to 6 & 4
6
Jumper to 1 & 4
2
TXD
7
Jumper to 8
3
RXD
8
Jumper to 7
4
Jumper to 1 & 6
9
N/C
5
GND
DSP56F807EVM Hardware User’s Manual
Operating Mode
2.4 Clock Source
The DSP56F807EVM uses an 8.00MHz crystal, Y1, connected to its External Crystal
Inputs, EXTAL and XTAL. The DSP56F807 uses its internal PLL to multiply the input
frequency by 10, to achieve its 80MHz maximum operating frequency. An external
oscillator source can be connected to the DSP by using the oscillator bypass connector,
JG6 and JG18; see Figure 2-3.
EXTERNAL
OSCILLATOR
HEADERS
DSP56F807
JG5
3
EXTAL
2
1
8.00MHz
10M
JG6
1
2
XTAL
Figure 2-3. Schematic Diagram of the Clock Interface
2.5 Operating Mode
The DSP56F807EVM provides a boot-up MODE selection jumper, JG7. This jumper is
used to select the operating mode of the DSP as it exits RESET. Refer to the DSP56F807
User’s Manual for a complete description of the chip’s operating modes. Table 2-2 shows
the two operation modes available on the DSP56F807.
Table 2-2. Operating Mode Selection
Operating Mode
JG7
Comment
0
1–2
Bootstrap from internal memory (GND)
3
No Jumper
Bootstrap from external memory (3.3V)
Technical Summary
2-7
2.6 Debug LEDs
Three on-board Light-Emitting Diodes, (LEDs), are provided to allow real-time
debugging for user programs. These LEDs will allow the programmer to monitor program
execution without having to stop the program during debugging; refer to Figure 2-4. User
LED1 is controlled by Port B’s PB0 signal. User LED2 is controlled by PB1. User LED3
is controlled by PB2. Setting PB0, PB1 or PB2 to a Logic One value will turn on the
associated LED.
DSP56F807
INVERTING BUFFER
+3.3V
RED LED
PB0
YELLOW LED
PB1
GREEN LED
PB2
Figure 2-4. Schematic Diagram of the Debug LED Interface
2.7 Debug Support
The DSP56F807EVM provides an on-board Parallel JTAG Host Target Interface and a
JTAG interface connector for external Target Interface support. Two interface connectors
are provided to support each of these debugging approaches. These two connectors are
designated the JTAG connector and the Host Parallel Interface Connector.
2-8
DSP56F807EVM Hardware User’s Manual
Debug Support
2.7.1 JTAG Connector
The JTAG connector on the DSP56F807EVM allows the connection of an external Host
Target Interface for downloading programs and working with the DSP56F807’s registers.
This connector is used to communicate with an external Host Target Interface which
passes information and data back and forth with a host processor running a debugger
program. Table 2-3 shows the pin-out for this connector.
Table 2-3. JTAG Connector Description
J3
Pin #
Signal
Pin #
Signal
1
TDI
2
GND
3
TDO
4
GND
5
TCK
6
GND
7
NC
8
KEY
9
RESET
10
TMS
11
+3.3V
12
NC
13
NC
14
TRST
When this connector is used with an external Host Target Interface, the parallel JTAG
interface should be disabled by placing a jumper in jumper block JG4. Reference
Table 2-4 for this jumper’s selection options.
Table 2-4. Parallel JTAG Interface Disable Jumper Selection
JG4
Comment
No jumpers
On-board Parallel JTAG Interface Enabled
1–2
Disable on-board Parallel JTAG Interface
Technical Summary
2-9
2.7.2 Parallel JTAG Interface Connector
The Parallel JTAG Interface Connector, P1, allows the DSP56F807 to communicate with
a Parallel Printer Port on a Windows PC; reference Figure 2-5. By using this connector,
the user can download programs and work with the DSP56F807’s registers. Table 2-5
shows the pin-out for this connector. When using the parallel JTAG interface, the jumper
at JG4 should be removed, as shown in Table 2-4.
Parallel JTAG Interface
DB-25 Connector
DSP56F807
IN OUT
OUT IN
IN OUT
TDI
TDO
TRST
TMS
IN
OUT
TMS
TCK
IN
OUT
TCK
IN
OUT
RESET
TDI
TDO
P_TRST
P_RESET
+3.3V
EN
JG4
Jumper Removed:
Enable JTAG I/F
1
2
Jumper Pin 1-2:
Disable JTAG I/F
Figure 2-5. Block Diagram of the Parallel JTAG Interface
Table 2-5. Parallel JTAG Interface Connector Description
P1
2-10
Pin #
Signal
Pin #
Signal
1
NC
14
NC
2
PORT_RESET
15
PORT_IDENT
3
PORT_TMS
16
NC
4
PORT_TCK
17
NC
5
PORT_TDI
18
GND
6
PORT_TRST
19
GND
7
NC
20
GND
8
PORT_IDENT
21
GND
DSP56F807EVM Hardware User’s Manual
External Interrupts
Table 2-5. Parallel JTAG Interface Connector Description
P1
Pin #
Signal
Pin #
Signal
9
PORT_VCC
22
GND
10
NC
23
GND
11
PORT_TDO
24
GND
12
NC
25
GND
13
PORT_CONNECT
2.8 External Interrupts
Two on-board push-button switches are provided for external interrupt generation, as
shown in Figure 2-6. S2 allows the user to generate a hardware interrupt for signal line
IRQA. S3 allows the user to generate a hardware interrupt for signal line IRQB. These two
switches allow the user to generate interrupts for his user-specific programs.
+3.3V
DSP56F807
10K
SW2
IRQA
0.1µF
+3.3V
10K
SW3
IRQB
0.1µF
Figure 2-6. Schematic Diagram of the User Interrupt Interface
Technical Summary
2-11
2.9 Reset
Logic is provided on the DSP56F807 to generate a clean Power-On RESET signal.
Additional, reset logic is provided to support the RESET signals from the JTAG
connector, the Parallel JTAG Interface and the user RESET push-button; refer to
Figure 2-7.
+3.3V
RESET
PUSHBUTTON
MANUAL RESET
RESET
P_RESET
Figure 2-7. Schematic Diagram of the RESET Interface
2-12
DSP56F807EVM Hardware User’s Manual
Power Supply
2.10 Power Supply
The main power input, 12V DC at 4.0A, to the DSP56F807EVM is through a 2.1mm coax
power jack. A 4.0A power supply is provided with the DSP56F807EVM; however, less
than 500mA is required by the EVM. The remaining current is available for user motor
control applications when connected to an optional motor power stage board. The
DSP56F807EVM provides +3.3V DC voltage regulation for the DSP, memory, D/A,
CAN, parallel JTAG interface and supporting logic; refer to Figure 2-8. Power applied to
the DSP56F807EVM is indicated with a Power-On LED, referenced as LED10.
+3.3V
+5.0V
+12V DC
+3.3V
Regulator
+5.0V
Regulator
+3.3V Digital
+3.3V Analog
DSP56F807
POWER ON
DSP EVM
PARTS
GREEN LED
LED10
Figure 2-8. Schematic Diagram of the Power Supply
Technical Summary
2-13
2.11 Primary UNI-3 Interface
Motor control signals from a family of motor driver boards can be connected to the EVM
board via the Primary UNI-3 connector/interface. The Primary UNI-3 connector/interface
contains all of the signals needed to drive and control the motor drive boards. These
signals are connected to various groups of the DSP’s input and output ports; A/D, TIMER
and PWM Port A. The header, JG14, is used to select between the Back-EMF and Motor
Phase Current signals. Refer to Table 2-6 for the pin out of the Primary UNI-3 connector,
J1.
Table 2-6. Primary UNI-3 Connector Description
J1
2-14
Pin #
Signal
Pin #
Signal
1
PWM_AT
2
Shield
3
PWM_AB
4
Shield
5
PWM_BT
6
Shield
7
PWM_BB
8
Shield
9
PWM_CT
10
Shield
11
PWM_CB
12
GND
13
GND
14
+5.0V DC
15
+5.0V DC
16
Analog +3.3V DC
17
Analog GND
18
Analog GND
19
Analog +15V DC
20
Analog -15V DC
21
Motor DC Bus
Voltage Sense
22
Motor DC Bus
Current Sense
23
Motor Phase A
Current Sense
24
Motor Phase B
Current Sense
25
Motor Phase C
Current Sense
26
Motor Drive
Temperature
Sense
27
NC
28
Shield
29
Motor Drive Brake
Control
30
Serial COM
31
PFC PWM
32
PFC Inhibit
33
PFC Zero Cross
34
Zero Cross A
35
Zero Cross B
36
Zero Cross C
DSP56F807EVM Hardware User’s Manual
Secondary UNI-3 Interface
Table 2-6. Primary UNI-3 Connector Description (Continued)
J1
Pin #
Signal
Pin #
Signal
37
Shield
38
Back-EMF Phase
A Sense
39
Back-EMF Phase
B Sense
40
Back-EMF Phase
C Sense
2.12 Secondary UNI-3 Interface
A Secondary UNI-3 Motor Drive interface is available on the EVM board. Motor control
signals from a family of motor driver boards can be connected to the EVM board via the
Secondary UNI-3 connector/interface. The Secondary UNI-3 connector/interface contains
all of the signals needed to drive and control the motor drive boards. These signals are
connected to various groups of the DSP’s input and output ports: A/D, TIMER and PWM
Port B. The header, JG10, is used to select between the Back-EMF and Motor Phase
Current signals. Refer to Table 2-7 for the pin out of the Secondary UNI-3 connector, J2.
Table 2-7. Secondary UNI-3 Connector Description
J2
Pin #
Signal
Pin #
Signal
1
PWM_AT
2
Shield
3
PWM_AB
4
Shield
5
PWM_BT
6
Shield
7
PWM_BB
8
Shield
9
PWM_CT
10
Shield
11
PWM_CB
12
GND
13
GND
14
NC
15
NC
16
NC
17
Analog GND
18
Analog GND
19
NC
20
NC
21
Motor DC Bus
Voltage Sense
22
Motor DC Bus
Current Sense
23
Motor Phase A
Current Sense
24
Motor Phase B
Current Sense
Technical Summary
2-15
Table 2-7. Secondary UNI-3 Connector Description (Continued)
J2
2-16
Pin #
Signal
Pin #
Signal
25
Motor Phase C
Current Sense
26
Motor Drive
Temperature
Sense
27
NC
28
Shield
29
Motor Drive Brake
Control
30
Serial COM
31
PFC PWM
32
PFC Inhibit
33
PFC Zero Cross
34
Zero Cross A
35
Zero Cross B
36
Zero Cross C
37
Shield
38
Back-EMF Phase
A Sense
39
Back-EMF Phase
B Sense
40
Back-EMF Phase
C Sense
DSP56F807EVM Hardware User’s Manual
General Purpose Switches and Run/Stop Switch
2.13 General Purpose Switches and Run/Stop Switch
Two general-purpose user pushbutton switches are connected to Port D GPIO signals,
PD3 and PD4. A Run/Stop toggle switch is connected to GPIO signal PD5. Refer to
Figure 2-9.
+3.3V
DSP56F807
10K
GP #1 SWITCH
PD3
+3.3V
10K
GP #2 SWITCH
PD4
+3.3V
START/STOP SWITCH
10K
PD5
Figure 2-9. Run/Stop and General Purpose Switches
Technical Summary
2-17
2.14 Serial 10-bit 4-channel D/A Converter
The DSP56F807EVM board contains a serial 10-bit, 4-channel D/A converter connected
to the DSP56F807’s SPI port. The output pins are uncommitted and are connected to a
4X2 header, J26, to allow easy user connections. Refer to Figure 2-10 for the D/A
connections and Table 2-8 for the header’s pin out. The D/A’s output full-scale range
value can be set to a value from 0.0V to 2.4V by a trimpot, R97. This trimpot is preset to
+2.05V which provides approximately 2mV per step.
DSP56F807
MAX5251
MOSI
D/A CONNECTOR
J26
DIN
MISO
DOUT
SCLK
SCLK
OUT A
OUT B
OUT C
OUT D
PB4
CS
RSTO
CL
D/A 0
D/A 1
D/A 2
D/A 3
1
2
3
4
5
6
7
8
Vref
R97
+3.3VA
10K
Figure 2-10. Serial 10-bit, 4-Channel D/A Converter
Table 2-8. D/A Header Description
J20
Pin #
Signal
Pin #
Signal
1
D/A Channel 0
2
AGND
3
D/A Channel 1
4
AGND
5
D/A Channel 2
6
AGND
7
D/A Channel 3
8
AGND
2.15 Motor Control PWM Signals and LEDs
The DSP56F807 has two independent groups of dedicated PWM units. Each unit contains
six PWM, three Phase Current sense and four Fault input lines. PWM group A’s PWM
lines are connected to the UNI-3 interface connector and to a set of six PWM LEDs via
inverting buffers. The inverting buffers are used to isolate and drive the DSP’s PWM
2-18
DSP56F807EVM Hardware User’s Manual
Motor Protection Logic
group A’s outputs to the PWM LEDs. The secondary PWM signals are routed to the
Secondary UNI-3 connector. The PWM LEDs indicate the status of PWM group A
signals, as shown in Figure 2-11. PWM Group A and B signals are routed out to headers,
J10 and J11 respectively, and are available for use by the end user.
DSP56F807
UNI-3
PWMA0
PWMA1
PWMA2
PWMA3
PWMA4
PWMA5
PWMA0
PWMA1
PWMA2
PWMA3
PWMA4
PWMA5
+3.3V
LED4
YELLOW LED
PHASE A TOP
LED5
GREEN LED
LED
BUFFER
PHASE A BOTTOM
LED6
YELLOW LED
PHASE B TOP
LED7
GREEN LED
PHASE B BOTTOM
LED8
YELLOW LED
PHASE C TOP
LED9
GREEN LED
PHASE C BOTTOM
Figure 2-11. PWM Group A Interface and LEDs
2.16 Motor Protection Logic
The DSP56F807EVM contains two UNI-3 connectors that interface with various motor
drive boards, Primary UNI-3 and Secondary UNI-3. The DSP can sense error conditions
generated by the motor power stage boards via signals on the UNI-3 connector. The motor
driver board’s Motor Supply DC Bus Voltage, Current and Motor Phase Currents are
sensed on the power stage board. The conditioned signals are transferred to the DSP board
via the UNI-3 connector. These analog input signals are compared to a limit set by
trimpots. If the input analog signals are greater than the limit set by the trimpot, a DSP
digital voltage-compatible +3.3V DC fault signal is generated.
Technical Summary
2-19
2.16.1 Primary UNI-3 Motor Protection Logic
The Primary UNI-3 DC Bus Over-Voltage signal is connected to the DSP’s PWM group
A fault inputs. The three Primary UNI-3 Phase Over-Current signals are connected to the
DSP’s PWM group A’s fault inputs, i.e., FAULTA1, FAULTA2 and FAULTA3.
Figure 2-13 contains the diagram of the Over-Voltage and one phase of the Phase
Over-Current circuit for the UNI-3 interface. The FAULTA1 input can be sourced from
the Phase A Over-Current circuit or the DC Bus Over-Current circuit. Jumper JG1,
provides the selection; reference Figure 2-12 and Table 2-9.
DC BUS CURRENT SENSE
I_sense_DCB
+3.3V
+5.0V
+5.0V
+
–
LM393
+5.0V
JG1
3
2
1
FAULTA1
+3.3V
+5.0V
PHASE A CURRENT SENSE
+
PHA_IS
–
LM393
Figure 2-12. FAULTA1 Selection Circuit
Table 2-9. FAULTA1 Source Selection Jumper
JG1
2-20
Comment
1–2
Phase A Over-Current Sense input
2–3
DC Bus Over-Current Sense input
DSP56F807EVM Hardware User’s Manual
Motor Protection Logic
2.16.2 Secondary UNI-3 Motor Protection Logic
The Secondary UNI-3 interface is similar to the Primary UNI-3 interface. The Secondary
UNI-3 Over-Voltage signal is connected to the DSP’s PWM group B’s fault input,
FAULTB1. The three Secondary UNI-3 Phase Over-Current signals are connected to the
DSP’s PWM group B fault inputs, i.e., FAULTB1, FAULTB2 and FAULTB3. The
Secondary UNI-3 interface is similar to the circuits contained in Figure 2-13. The
FAULTB1 input can be sourced from the Phase A Over-Current circuit or the DC Bus
Over-Current circuit. Jumper JG16, provides the selection; reference Figure 2-14 and
Table 2-10.
DC BUS VOLTAGE SENSE
V_sense_DCB
+3.3V
+5.0V
+5.0V
+
FAULT0
–
LM393
EXAMPLE DC PHASE CURRENT SENSE
+5.0V
+3.3V
+5.0V
+
FAULT2
–
PHB_IS
LM393
Figure 2-13. DC-Bus Over-Voltage and Phase Over-Current Detection Circuits
Technical Summary
2-21
DC BUS CURRENT SENSE
I_sense_DCB
+3.3V
+5.0V
+5.0V
+
–
LM393
+5.0V
JG2
3
2
FAULTB1
1
+3.3V
+5.0V
PHASE A CURRENT SENSE
+
PHA_IS
–
LM393
Figure 2-14. FAULTB1 Selection Circuit
Table 2-10. FAULTB1 Source Selection Jumper
JG2
Comment
1–2
Phase A Over-Current Sense input
2–3
DC Bus Over-Current Sense input
2.17 Back-EMF and Motor Phase Current Sensing
The primary and secondary UNI-3 connectors supply Back-EMF and Motor Phase
Current signals from the three phases of a motor attached to a motor drive unit. The
Back-EMF signals on the UNI-3 connectors are derived from a resistor divider network
contained in the motor drive unit. These resistors divide down the attached motor’s
Back-EMF voltages to a 0 to +3.3V level. The Motor Phase Current signals are derived
from current sense resistors. Both of these signal groups are then routed to a group of
2-22
DSP56F807EVM Hardware User’s Manual
Zero-Crossing Detection
header pins, JG14, that allow the end user to select which signal group the DSP’s A/D will
monitor. Refer to Figure 2-15 for the design of a single channel. The Secondary UNI-3’s
Back-EMF signals are simularly derived and routed to a group of header pins, JG10, that
allow the end user to select which signal group the DSP’s A/D will monitor, reference
Table 2-8.
Typical Motor Phase-Current/Back-EMF Analog Input Selector
JG14
BACK_EMF_A
1
PHASE_A_I_SENSE
3
2
AN2
Figure 2-15. Primary Back-EMF or Motor Phase Current Sense Signals
2.18 Quadrature Encoder/Hall-Effect Interface
The DSP56F807EVM board contains a Primary and Secondary Quadrature
Encoder/Hall-Effect interface connected to the DSP’s first and second Quad Encoder
input ports. The circuit is designed to accept +3.0V to +5.0V encoder or Hall-Effect sensor
inputs. Input noise filtering is supplied on the input path for the Quadrature
Encoder/Hall-Effect interface, along with additional noise rejection circuitry inside the
DSP. Figure 2-16 contains the primary encoder interface. The secondary encoder
interface is a duplicate of the primary encoder interface.
2.19 Zero-Crossing Detection
An attached UNI-3 motor drive board contains logic that can send out pulses when the
phase voltage of an attached 3-phase motor drops to zero. The motor drive board circuits
generate a 0 to +5.0V DC pulse via voltage comparators. The resulting pulse signals are
sent to a set of jumper blocks shared with the Encoder/Hall-Effect interface. The jumper
blocks allow the selection of Zero-Crossing signals or Quadrature Encoder/Hall-Effect
signals. When in operation, the DSP will only monitor one set of signals,
Encoder/Hall-Effect or Zero-Crossing. Figure 2-16 contains the Zero-Crossing and
Encoder/Hall circuits.
Technical Summary
2-23
ZERO_X_A
DSP56F807
ZERO_X_B
JG12
1
ZERO_X_C
2
PHASEA1
5
PHASEB1
8
INDEX1
3
FILTER
+5.0V
4
6
1
2
3
4
5
6
PIN 1:
PIN 2:
PIN 3:
PIN 4:
PIN 5:
PIN 6:
FILTER
7
FILTER
9
+5.0V
GROUND
PHASE A
PHASE B
INDEX
HOME
HOME 1
FILTER
Figure 2-16. Zero-Crossing Encoder Interface
2.20 CAN Interface
The DSP56F807EVM board contains a CAN physical-layer interface chip that is attached
to the MSCAN_RX and MSCAN_TX pins on the DSP56F807. The EVM board uses a
Philips, PCA82C250, high speed, 1Mbps, physical layer interface chip. Due to the +5.0V
operating voltage of the CAN chip, a pull-up to +5.0V is required to level shift the
Transmit Data output line from the DSP56F807. A primary, J24, and daisy-chain, J25,
CAN connector are provided to allow easy daisy-chaining of CAN devices. CAN bus
termination of 120 ohms can be provided by adding a jumper to JG3. Refer to Table 2-11
for the CAN connector signals, and to Figure 2-17 for a connection diagram
+5.0V
DSP56F807
1K
CAN Transceiver
MSCAN_TX
MSCAN_RX
TXD
CANH
J24
RXD
x
+5.0V
Daisy-Chain CAN Connector
CAN Connector
VCC
CANL
VREF
SLOPE GND
PCA82C250T
x
x
1
3
5
7
9
J25
2
4
6
8
10
x
x
x
x
x
x
x
1
3
5
7
9
2
4
6
8
10
x
x
x
x
JG3
1
2
CAN Bus
Terminator
120
Figure 2-17. CAN Interface
2-24
DSP56F807EVM Hardware User’s Manual
Software Feature Jumpers
Table 2-11. CAN Header Description
J24 and J25
Pin #
Signal
Pin #
Signal
1
NC
2
NC
3
CANL
4
CANH
5
GND
6
NC
7
NC
8
NC
9
NC
10
NC
2.21 Software Feature Jumpers
The DSP56F807EVM board contains two software feature jumpers that allow the user to
select “User Defined” software features. Two GPIO port pins, PD0 and PD1, are pulled
high with 10K ohm resistors on JG16 and JG17. Attaching a jumper will ground the
respective port D signal line; see Figure 2-18.
DSP56F807
User Jumper # 0
PD0
JG16
1
2
3
+3.3V
10K
10K
User Jumper # 1
PD1
JG17
1
2
3
+3.3V
10K
10K
Figure 2-18. Software Feature Jumpers
Technical Summary
2-25
2.22 Peripheral Connectors
The EVM board contains a group of Peripheral Expansion Connectors used to gain access
to the resources of the DSP56F807. These signal groups have Expansion Connectors:
•
Port B
•
Port D
•
Port E
•
External Memory Control
•
Encoder A/Timer Channel A
•
Encoder B/Timer Channel B
•
Timer Channel C
•
Timer Channel D
•
Port A/Address Bus
•
Data Bus
•
A/D Input Port A
•
A/D Input Port B
•
Serial Communications Port 0
•
Serial Communications Port 1
•
Serial Peripheral Port
•
PWM Port A
•
PWM Port B
2-26
DSP56F807EVM Hardware User’s Manual
Peripheral Connectors
2.22.1 Port B Expansion Connector
Port B is a GPIO port which is connected to the Port B header. The pins of the port,
PB0-PB7, are dedicated to general purpose I/O and Interrupt operations. The GPIO port
pins may be programmed as inputs, outputs or level-sensitive interrupt inputs. Table 2-12
shows the port pin to headed connections.
Table 2-12. Port B Connector Description
J20
Pin #
Signal
Pin #
Signal
1
PB0
2
PB1
3
PB2
4
PB3
5
PB4
6
PB5
7
PB6
8
PB7
9
GND
10
+3.3V
2.22.2 Port D Expansion Connector
Port D is an MPIO port with signal lines attached to various headers. The six pins of the
port, PD0-PD5, are dedicated to general purpose operation. The remaining two pins, PD6
and PD7, are shared with the TXD1 and RXD1 signal lines. The GPIO port pins may be
programmed as inputs, outputs or level-sensitive interrupt inputs. Table 2-13 shows the
exclusive Port D signals. The shared Port D signals are contained in Table 2-20.
Table 2-13. Port D Connector Description
J23
Pin #
Signal
Pin #
Signal
1
PD0
2
PD1
3
PD2
4
PD3
5
PD4
6
PD5
7
GND
8
+3.3V
Technical Summary
2-27
2.22.3 Port E Expansion Connector
Port E is an MPIO port with signal lines attached to various headers. The pins of the port
are shared with one SCI port, SCI0, two Address bus lines, A6 and A7, and the SPI port.
Table 2-14 shows the shared pins and functions
Table 2-14. Port E Connector Description
J17
Pin #
Signal
Alternate Funct
Pin #
Signal
Alternate Funct
1
PE0
TXD0
2
PE1
RXD0
3
PE2
TXD1
4
PE3
RXD1
5
PE4
SCLK
6
PE5
MOSI
7
PE6
MISO
8
PE7
SS
9
GND
GND
10
+3.3V
+3.3V
2.22.4 External Memory Control Signal Expansion Connector
The External Memory Control Signal connector contains the DSP’s external memory
control signal lines. Refer to Table 2-15 for the names of these signals.
Table 2-15. External Memory Control Signal Connector Description
J8
2-28
Pin #
Signal
Pin #
Signal
1
RD
2
IRQA
3
WR
4
IRQB
5
PS
6
RESET
7
DS
8
RSTO
9
CLKO
10
DE
11
GND
12
+3.3V
DSP56F807EVM Hardware User’s Manual
Peripheral Connectors
2.22.5 Primary Encoder/Timer Channel A Expansion Connector
The Primary Encoder/Timer Channel A port is an MPIO port attached to the Timer A
expansion connector. The port can act as a Quadrature Decoder interface port or as a
general purpose Timer port. See Table 2-16 for the signals attached to the connector.
Table 2-16. Timer A Connector Description
J18
Pin #
Signal
Alternate
1
TA0
PhaseA0
2
TA1
PhaseB0
3
TA2
INDEX0
4
TA3
HOME0
5
+3.3V
+3.3V
6
GND
GND
2.22.6 Secondary Encoder/Timer Channel B Expansion Connector
The Secondary Encoder/Timer Channel B port is an MPIO port attached to the Timer B
expansion connector. The port can act as a Quadrature Decoder interface port or as a
general purpose Timer port. Refer to Table 2-17 for the signals attached to the connector.
Table 2-17. Timer B Connector Description
J21
Pin #
Signal
Alternate
1
TB0
PhaseA1
2
TB1
PhaseB1
3
TB2
INDEX1
4
TB3
HOME1
5
+3.3V
+3.3V
6
GND
GND
Technical Summary
2-29
2.22.7 Timer Channel C Expansion Connector
The Timer Channel C port is an MPIO port attached to the Timer C expansion connector.
Refer to Table 2-18 for the signals attached to the connector.
Table 2-18. Timer C Connector Description
J19
Pin #
Signal
1
TC0
2
TC1
3
+3.3V
4
GND
2.22.8 Timer Channel D Expansion Connector
The Timer Channel D port is an MPIO port attached to the Timer D expansion connector.
Refer to Table 2-19 for the signals attached to the connector.
Table 2-19. Timer D Connector Description
J22
2-30
Pin #
Signal
1
TD0
2
TD1
3
TD2
4
TD3
5
+3.3V
6
GND
DSP56F807EVM Hardware User’s Manual
Peripheral Connectors
2.22.9 Address Bus Expansion Connector
The 16-bit Address bus connector contains the DSP’s external memory address signal
lines. The upper 8 bits, A8 - A15, can also be used as Port A GPIO lines. See Table 2-20
for the Address bus connector information.
Table 2-20. External Memory Address Bus Connector Description
J6
Pin #
Signal
Pin #
Signal
1
A0
2
A1
3
A2
4
A3
5
A4
6
A5
7
A6
8
A7
9
A8
10
A9
11
A10
12
A11
13
A12
14
A13
15
A14
16
A15
17
GND
18
+3.3V
Technical Summary
2-31
2.22.10 Data Bus Expansion Connector
The 16-bit Data bus connector contains the DSP’s external memory data signal lines.
Refer to Table 2-21 for the Data bus connector information.
Table 2-21. External Memory Address Bus Connector Description
J7
Pin #
Signal
Pin #
Signal
1
D0
2
D1
3
D2
4
D3
5
D4
6
D5
7
D6
8
D7
9
D8
10
D9
11
D10
12
D11
13
D12
14
D13
15
D14
16
D15
17
GND
18
+3.3V
2.22.11 A/D Port A Expansion Connector
The 8-channel Analog to Digital conversion port A is attached to this connector. See
Table 2-22 for the connection information.
Table 2-22. A/D Port A Connector Description
J9
2-32
Pin #
Signal
Pin #
Signal
1
AN0
2
AN4
3
AN1
4
AN5
5
AN2
6
AN6
7
AN3
8
AN7
9
GNDA
10
+3.3VA
DSP56F807EVM Hardware User’s Manual
Peripheral Connectors
2.22.12 A/D Port B Expansion Connector
The 8-channel Analog to Digital conversion port B is attached to this connector. Refer to
Table 2-23 for the connection information.
Table 2-23. A/D Port B Connector Description
J12
Pin #
Signal
Pin #
Signal
1
AN8
2
AN12
3
AN9
4
AN13
5
AN10
6
AN14
7
AN11
8
AN15
9
GNDA
10
+3.3VA
2.22.13 Serial Communications Port 0 Expansion Connector
The Serial Communications Port 0, SCI0, is attached to this connector. See Table 2-24 for
the connection information.
Table 2-24. SCI0 Connector Description
J15
Pin #
Signal
1
TXD0
2
RXD0
3
GND
Technical Summary
2-33
2.22.14 Serial Communications Port 1 Expansion Connector
The Serial Communications Port 1, SCI1, is attached to this connector. Refer to
Table 2-25 for the connection information.
Table 2-25. SCI1 Connector Description
J14
2.22.15
Pin #
Signal
1
TXD1
2
RXD1
3
GND
Serial Peripheral Interface Expansion Connector
The Serial Peripheral Interface, SPI, is attached to this connector. Refer to Table 2-26 for
the connection information.
Table 2-26. SPI Connector Description
J13
Pin #
Signal
1
MOSI
2
MISO
3
SCLK
4
GND
2.22.16 CAN Expansion Connector
The CAN port is attached to this connector. See Table 2-27 for the connection
information.
Table 2-27. CAN Connector Description
J16
2-34
Pin #
Signal
1
MSCAN_TX
2
MSCAN_RX
3
GND
DSP56F807EVM Hardware User’s Manual
Peripheral Connectors
2.22.17 PWM Port A Expansion Connector
The PWM port A is attached to this connector. Refer to Table 2-28 for the connection
information.
Table 2-28. PWM Port A Connector Description
J10
Pin #
Signal
Pin #
Signal
1
PWMA0
2
PWMA1
3
PWMA2
4
PWMA3
5
PWMA4
6
PWMA5
7
FAULTA0
8
FAULTA1
9
FAULTA2
10
FAULTA3
11
ISA0
12
ISA1
13
ISA2
14
GND
2.22.18 PWM Port B Expansion Connector
The PWM port B is attached to this connector. Refer to Table 2-29 for the connection
information.
Table 2-29. PWM Port B Connector Description
J11
Pin #
Signal
Pin #
Signal
1
PWMB0
2
PWMB1
3
PWMB2
4
PWMB3
5
PWMB4
6
PWMB5
7
FAULTB0
8
FAULTB1
9
FAULTB2
10
FAULTB3
11
ISB0
12
ISB1
13
ISB2
14
GND
Technical Summary
2-35
2.23 Test Points
The DSP56F807EVM board has a total of eight test points. Four test points are located
near the breadboard area: +3.3VA, AGND, +3.3V and GND. Three test points are located
near the Primary UNI-3 connector, J1: -15VA, GND and +15VA. The final test point,
GND, is located in the upper left corner of the board.
2-36
DSP56F807EVM Hardware User’s Manual
Appendix A
DSP56F807EVM Schematics
DSP56F807EVM Schematics
A-1
A-2
DSP56F807EVM Hardware User’s Manual
1
2
3
4
/PS
/DS
TC0
TC1
TDI
TDO
TCK
/TRST
TMS
Secondary PFC_PWM
Primary PFC_PWM
Primary PFC_ZERO_CROSSING
Secondary ZERO_CROSSING
Primary PFC_ENABLE
Secondary PFC_ENABLE
JTAG
A
MISO
MOSI
S C LK
/SS
D E B U G _EVENT
TD0
TD1
TD2
TD3
Primary serial_com
TXD0
RXD0
/ R E S ET
/RSTO
XTAL
EXTAL
CLKO
EXTBOOT
/IRQA
/IRQB
/WR
/RD
TXD1
RXD1
D[0..15]
A[0..15]
A
TCS
D0
D1
D2
D3
D4
D5
D6
D7
D8
D9
D10
D11
D12
D13
D14
D15
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
145
146
144
143
136
137
134
132
135
133
121
130
131
126
127
128
129
55
56
159
160
98
97
92
93
158
86
69
70
21
22
19
20
23
24
25
26
27
28
29
30
31
32
33
35
36
37
38
39
1
2
3
4
5
6
7
8
10
11
12
13
14
15
16
17
U1A
MISO
MOSI
SCLK
SS
TDI
TDO
TCK
TRST
TMS
TCS
DE
TC0
TC1
TD0
TD1
TD2
TD3
TXD1
RXD1
TXD0
RXD0
RESET
RSTO
XTAL
EXTAL
CLKO
XBOOT
IRQA
IRQB
WR
RD
PS
DS
D0
D1
D2
D3
D4
D5
D6
D7
D8
D9
D10
D11
D12
D13
D14
D15
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
B
D S P 5 6F807FV80
MSCAN_TX
MSCAN_RX
ANA8
ANA9
ANA10
ANA11
ANA12
ANA13
ANA14
ANA15
VRH2
PHA1
PHB1
INDEX1
HOME1
PWMB0
PWMB1
PWMB2
PWMB3
PWMB4
PWMB5
ISB0
ISB1
ISB2
FAULTB0
FAULTB1
FAULTB2
FAULTB3
ANA0
ANA1
ANA2
ANA3
ANA4
ANA5
ANA6
ANA7
VRH
PHA0
PHB0
INDEX0
HOME0
PWMA0
PWMA1
PWMA2
PWMA3
PWMA4
PWMA5
ISA0
ISA1
ISA2
FAULTA0
FAULTA1
FAULTA2
FAULTA3
MPIOD0
MPIOD1
MPIOD2
MPIOD3
MPIOD4
MPIOD5
MPIOB0
MPIOB1
MPIOB2
MPIOB3
MPIOB4
MPIOB5
MPIOB6
MPIOB7
B
139
142
113
114
115
116
117
118
119
120
110
151
152
154
155
57
58
59
60
61
62
64
66
67
71
72
73
74
102
103
104
105
106
107
108
109
99
147
148
149
150
75
77
78
79
80
81
123
124
125
82
83
84
85
49
50
51
52
53
54
40
41
42
43
44
45
46
47
UNI-3
UNI-3
UNI-3
UNI-3
UNI-3
UNI-3
UNI-3
UNI-3
UNI-3
UNI-3
AN8
AN9
A N 10
A N 11
A N 12
A N 13
A N 14
A N 15
0
1
2
3
4
5
OVER VOLTAGE
PHASE A OVER CURRENT
PHASE B OVER CURRENT
PHASE C OVER CURRENT
PWM
PWM
PWM
PWM
PWM
PWM
U3_V_SENSE_DCB
U3_I_SENSE_DCB
U3_I/BK_EMF_SENSE_A
U3_I/BK_EMF_SENSE_B
U3_I/BK_EMF_SENSE_C
U3_TEMP_SENSE
C
U3_V_SENSE_DCB
U3_I_SENSE_DCB
U3_I/BK_EMF_SENSE_A
U3_I/BK_EMF_SENSE_B
U3_I/BK_EMF_SENSE_C
U3_TEMP_SENSE
CAN
Secondary
Secondary
Secondary
Secondary
Secondary
Secondary
SECONDARY ENCODER
HALL EFFECT /
ZERO CROSSING
Secondary
Secondary
Secondary
Secondary
Secondary
Secondary
Secondary
Secondary
Secondary
Secondary
Primary
Primary
Primary
Primary
Primary
Primary
M S C A N_TX
MSCAN_RX
P H ASEA1
P H ASEB1
I N D E X1
HOME1
P W MB0
P W MB1
P W MB2
P W MB3
P W MB4
P W MB5
ISB0
ISB1
ISB2
F A U LTB0
F A U LTB1
F A U LTB2
F A U LTB3
AN0
AN1
AN2
AN3
AN4
AN5
AN6
AN7
0
1
2
3
4
5
OVER VOLTAGE
PHASE A OVER CURRENT
PHASE B OVER CURRENT
PHASE C OVER CURRENT
PWM
PWM
PWM
PWM
PWM
PWM
PRIMARY ENCODER
HALL EFFECT /
ZERO CROSSING
UNI-3
UNI-3
UNI-3
UNI-3
UNI-3
UNI-3
UNI-3
UNI-3
UNI-3
UNI-3
B
Size
Title
D
D
1K
C7
0.1uF
+
+3.3VA
+3.3V
E
C2
2.2uF
E
1
of
18
1.0
Rev.
FAX: (480) 413-2510
Sheet
(480) 413-5090
2100 East Elliot Road
Tempe, Arizona 85284
DSP Standard Products Division
+
Designer: DSPD Design
TCS
C1
2.2uF
65
138
87
88
96
9
34
63
94
153
140
89
R 1 24
VCAPC1
VCAPC2
VSSA_AREG1
VDDA_AREG1
VDDA_CORE1
VDD_IO1
VDD_IO2
VDD_IO3
VDD_IO4
VDD_IO5
VDD_IO6
VDD_IO7
D S P 5 6F807FV80
VSSA_ADC1
VSSA_ADC2
VDDA_ADC1
VDDA_ADC2
VPP
VPP2
VSS_IO1
VSS_IO2
VSS_IO3
VSS_IO4
VSS_IO5
VSS_IO6
VSS_IO7
VSS_IO8
VSS_IO9
63A10516S
112
101
111
100
156
68
18
48
76
95
157
141
91
90
122
U1B
Date: Monday, October 16, 2000
Document
Number
DSP56F807 Processor
C8
0.1uF
+ 3 .3VA
Figure A-1. DSP56F807 Processor
+ 3 .3VA
+ 3 .3VA
P H ASEA0
P H ASEB0
I N D E X0
HOME0
Primary
Primary
Primary
Primary
Primary
Primary
Primary
Primary
Primary
Primary
GP PUSH BUTTON 1
GP PUSH BUTTON 2
START/STOP SW
USER JUMPER #1
USER JUMPER #2
SERIAL D/A /CS
PRIMARY UNI-3 BRAKE CONTROL
SECONDARY UNI-3 BRAKE CONTROL
SECONDARY serial_con
USER LED: RED
USER LED: YELLOW
USER LED: GREEN
P W MA0
P W MA1
P W MA2
P W MA3
P W MA4
P W MA5
ISA0
ISA1
ISA2
F A U LTA0
F A U LTA1
F A U LTA2
F A U LTA3
PD0
PD1
PD2
PD3
PD4
PD5
PB0
PB1
PB2
PB3
PB4
PB5
PB6
PB7
C
1
2
3
4
A
B
C
D
E
+3.3V
JG5
3
2
EXTAL
R82
10K
IRQA PUSHBUTTON
1
4
4
S2
OSC BYPASS
10M
R1
Y1
8.00MHz
/IRQA
C67
0.1uF
JG6
1
XTAL
2
+3.3V
+3.3V
R83
10K
IRQB PUSHBUTTON
DSP56F807EVM Schematics
R125
10K
3
S3
3
/IRQB
S1
C68
0.1uF
/POR
RESET PUSHBUTTON
+3.3V
OPTIONAL
+3.3V
U17
2
2
Vcc
RST
3
1
BOOT MODE JUMPER
EXT BOOT
NC
INT BOOT 1 - 2
/POR
GND
DS1818
DNP
R84
10K
2
JG7
2
1
EXTBOOT
DSP Standard Products Division
2100 East Elliot Road
Tempe, Arizona 85284
3
(480) 413-5090
FAX: (480) 413-2510
DS1818
1
1
1
Title
2
Size
A
A
B
RESET, MODE, CLOCK & IRQS
Document
Number
Rev.
63A10516S
Date: Monday, October 16, 2000
C
Designer: D S P D D e s i g n
D
A-3
Figure A-2. RESET, MODE, CLOCK & IRQS
Sheet 2
of
E
18
1.0
A-4
A
B
C
D
E
64Kx16-bit Program and 64Kx16-bit Data Memory
4
/PS
U2
A[0..15]
DSP56F807EVM Hardware User’s Manual
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
+3.3V
3
R85
10K
SRAM ENABLE JUMPER
OPTION
JG8
SRAM ENABLE
SRAM DISABLE
/RD
/WR
JG8
1 - 2
1
2
NC
5
4
3
2
1
44
43
42
27
26
25
24
21
20
19
18
22
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
A16
41
17
6
39
40
OE
WE
CE
LB
UB
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
7
8
9
10
13
14
15
16
29
30
31
32
35
36
37
38
VDD
VDD
11
33
VSS
VSS
12
34
4
D[0..15]
D0
D1
D2
D3
D4
D5
D6
D7
D8
D9
D10
D11
D12
D13
D14
D15
3
+3.3V
GS72116TP-12
R86
1K
R87
1K
2
2
DSP Standard Products Division
2100 East Elliot Road
Tempe, Arizona 85284
(480) 413-5090
FAX: (480) 413-2510
1
1
Title
Size
A
A
B
PROGRAM & DATA SRAM MEMORY
Document
Number
Rev.
63A10516S
Date: Monday, October 16, 2000
C
Designer: D S P D D e s i g n
D
Figure A-3. PROGRAM & DATA SRAM MEMORY
Sheet 3
of
E
18
1.0
A
B
C
D
E
+3.3V
U13
4
28
+
C60
1.0uF
24
1
+
C61
1.0uF
2
TXD0
T2IN
T3IN
DSP56F807EVM Schematics
+3.3V
RS-232 SHUTDOWN JUMPER
R2OUTB
R1OUT
R2OUT
R3OUT
R4OUT
R5OUT
FORCEON
T14
T15
T16
T17
1
1
1
1
20
19
18
17
16
15
/EN
23
R90
1K
C2-
T1IN
T2IN
T3IN
1
22
VCC
3
V+
27
GND
25
T1OUT
T2OUT
T3OUT
R1IN
R2IN
R3IN
R4IN
R5IN
INVALID
4
26
VC1C2+
14
13
12
T21
RXD0
3
C1+
C62
+
1.0uF
9
10
11
4
5
6
7
8
21
C63 +
1.0uF
P3
1
1
1
6
2
7
3
8
4
9
5
T12
T13
R2IN
R3IN
R4IN
R5IN
1
DCD
DSR
TXD
CTS
RXD
RTS
DTR
+3.3V
SCI0
RS-232
CONNECTOR
T22
FORCEOFF
/EN
R88
1K
T2IN
R89
1K
T3IN
R91
1K
R2IN
R92
1K
R3IN
R93
1K
R4IN
R94
1K
R5IN
R95
1K
3
MAX3245EEAI
RS-232 ENABLE
RS-232 DISABLE
N/C
1 - 2
JG9
1
2
2
2
DSP Standard Products Division
2100 East Elliot Road
Tempe, Arizona 85284
(480) 413-5090
FAX: (480) 413-2510
1
1
Title
Size
A
A
B
RS-232 AND SCI CONNECTORS
Document
Number
Rev.
63A10516S
Date: Monday, November 27, 2000
C
Designer: D S P D D e s i g n
D
A-5
Figure A-4. RS-232 AND SCI CONNECTORS
Sheet 4
of
E
18
1.0
A-6
A
B
C
D
E
4
4
U14
20
+3.3V
DSP56F807EVM Hardware User’s Manual
FBA
2
DIN
OUTA
3
12
DOUT
OUTB
4
10
SCLK
FBB
5
REFAB
6
REFCD
15
FBC
16
OUTC
17
OUTD
18
FBD
19
UP0
13
MOSI
9
MISO
SCLK
8
PB4
7
/RSTO
VDD
CS
CL
3
R96
14
+3.3V
PDL
5.1K
11
DGND
AGND
SERIAL D/A CONNECTOR
J26
+Vref
D/A0
D/A1
D/A2
D/A3
1
3
5
7
2
4
6
8
3
1
T18
1
MAX5251BEAP
+3.3VA
+Vref
2
R97
10K
2
DSP Standard Products Division
2100 East Elliot Road
Tempe, Arizona 85284
(480) 413-5090
FAX: (480) 413-2510
1
1
Title
Size
A
A
B
D E B U G S E RIAL 4-CHANNEL D/A CONVERTER
Document
Number
Rev.
63A10516S
Date: Monday, October 16, 2000
C
Designer: D S P D D e s i g n
D
Figure A-5. DEBUG SERIAL 4-CHANNEL D/A CONVERTER
Sheet 5
of
E
18
1.0
A
B
C
D
E
+3.3V
U15A
1
PWMA0
R98
2
LED4
Y E L L O W LED
LED5
G R EEN LED
270
U15B
4
3
PWMA1
74AC04
R99
4
4
270
U15C
74AC04
5
PWMA2
LED6
Y E L L O W LED
LED7
G R EEN LED
LED8
Y E L L O W LED
R100
6
PWM STATE
LEDS
270
U15D
9
PWMA3
74AC04
R101
8
270
U15E
74AC04
11
PWMA4
R102
10
DSP56F807EVM Schematics
270
3
U15F
13
PWMA5
3
74AC04
LED9
R103
12
G R EEN LED
270
74AC04
+3.3V
U12A
1
PB0
R104
2
LED1
RED LED
270
USER
LEDS
74AC04
U12B
2
3
PB1
LED2
R105
4
Y E L L O W LED
270
U12C
74AC04
5
PB2
LED3
R106
6
2
G R EEN LED
270
74AC04
DSP Standard Products Division
2100 East Elliot Road
Tempe, Arizona 85284
(480) 413-5090
FAX: (480) 413-2510
1
1
Title
Size
A
A
B
PWM PORT A AND 3 USER LEDS
Document
Number
Rev.
63A10516S
Date: Monday, October 16, 2000
Designer: D S P D D e s i g n
C
A-7
Figure A-6. PWM A AND 3 USER LEDS
D
Sheet 6
of
E
18
1.0
A-8
A
B
C
D
E
4
4
J1
GND
+ 5 . 0 V _ U NI3
GNDA
U3_+15
U3_V_S_DCB
AN0
MOTOR BUS VOLTAGE SENSE
MOTOR PHASE A CURRENT SENSE U 3 _ P H A _IS
MOTOR PHASE C CURRENT SENSE U 3 _ P H C _ I S
DSP56F807EVM Hardware User’s Manual
MOTOR DRIVE BRAKE CONTROL
PB5
PHASE B ZERO CROSSING
ZERO_X_B
PHASE B BACK EMF
BK_EMF_B
PFC_PWM
PFC_ZERO_CROSS
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
UNI-3 +/- 15 VOLT ANALOG
AT THE BREAD BOARD AREA
GND
+ 5 . 0 V _ U NI3
TP1
GNDA +3.3VA
U3_-15
U3_I_S_DCB
+15VA
1
P W MA0
P W MA1
P W MA2
P W MA3
P W MA4
P W MA5
AN1
MOTOR BUS CURRENT SENSE
U 3 _ P H B _IS MOTOR PHASE B CURRENT SENSE
AN5
MOTOR DRIVE TEMPERATURE SENSE
U3_+15
SERIAL_COMM
PFC_INHIBIT
ZERO_X_A
Z E RO_X_C
B K _ E M F_A
BK_EMF_C
PHASE
PHASE
PHASE
PHASE
A
C
A
C
ZERO
ZERO
BACK
BACK
CROSSING
CROSSING
EMF
EMF
TP2
-15VA
1
PWM_AT
PWM_AB
PWM_BT
PWM_BB
PWM_CT
PWM_CB
U 3 _ -15
PRIMARY UNI-3 CONNECTOR
3
3
J G 15
PFC_PWM
PFC_ZERO_CROSS
serial_COM
PFC_ENABLE
JUMPER
JUMPER
RXD1
TC0
1
3
5
7
2
4
6
8
SERIAL_COMM
PFC_INHIBIT
TD1
TD2
PFC_PWM JUMPER
PFC_ZERO_CROSSING JUMPER
2
2
PRIMARY UNI-3 OVER-VOLTAGE FAULT DETECTION
AN0
UNI-3 OVER-VOLTAGE
SENSE
R 1 07
R 1 08
16K
16K
R109
C65
0.1uF
1M
+ 3 .3V
+ 5 .0V
R 1 10
5.1K
8
(U3_V_S_DCB)
+5.0V
3
+
2
-
1
F A U LTA0
2100 East Elliot Road
Tempe, Arizona 85284
LM393
4
R 1 11
10K
1
DSP Standard Products Division
U16A
DSP PWM 0
FAULT SENSE A0
(480) 413-5090
Title
Size
B
A
B
C
1
FAX: (480) 413-2510
PRIMARY UNI-3 INTERFACE AND OVER-VOLTAGE FAULT DETECTION
Document
Number
Rev.
63A10516S
Date: Tuesday, October 24, 2000
Designer: DSPD Design
D
Figure A-7. PRIMARY UNI-3 INTERFACE AND OVER-VOLTAGE FAULT DETECTION
Sheet 7
E
of
18
1.0
A
B
C
D
E
J2
PWM_AT
PWM_AB
PWM_BT
PWM_BB
PWM_CT
PWM_CB
P W MB0
P W MB1
P W MB2
P W MB3
P W MB4
P W MB5
GND
4
GNDA
MOTOR PHASE A CURRENT SENSE
MOTOR PHASE C CURRENT SENSE
AN8
S U 3 _ P H A_IS
SU3_PHC_IS
MOTOR DRIVE BRAKE CONTROL
PB6
PHASE C ZERO CROSSING
S U 3_ZERO_X_B
PHASE B BACK EMF
SU3_BK_EMF_B
SU3_V_S_DCB
SU3_PFC_PWM
SU3_PFC_ZERO_CROSS
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
GND
4
GNDA
SU3_I_S_DCB
AN9
S U 3 _ P H B_IS
AN13
SECONDARY UNI-3 DC BUS CURRENT SENSE
MOTOR PHASE B CURRENT SENSE
MOTOR DRIVE TEMPERATURE SENSE
S U 3_ZERO_X_A
S U 3 _ Z ERO_X_C
SU3_BK_EMF_A
S U 3 _BK_EMF_C
PHASE
PHASE
PHASE
PHASE
SU3_SERIAL_COMM
SU3_PFC_INHIBIT
A
B
A
C
ZERO
ZERO
BACK
BACK
CROSSING
CROSSING
EMF
EMF
SECONDARY UNI-3 CONNECTOR
DSP56F807EVM Schematics
3
3
J G 11
SU3_PFC_PWM
SU3_PFC_ZERO_CROSS
Secondary Serial_COM JUMPER
PFC_ENABLE JUMPER
PB7
TC1
1
3
5
7
2
4
6
8
SU3_SERIAL_COMM
SU3_PFC_INHIBIT
TD0
TD3
PFC PWM JUMPER
PFC ZERO CROSSING JUMPER
2
2
SECONDARY UNI-3 OVER-VOLTAGE FAULT DETECTION
R 1 12
R 1 13
R 1 14
1M
AN8
+3.3V
SECONDARY UNI-3
OVER-VOLTAGE SENSE
(SU3_V_S_DCB)
C66
16K
0.1uF
+5.0V
R 1 15
5.1K
8
16K
+ 5 .0V
+
6
-
7
F A ULTB0
DSP Standard Products Division
LM393
4
R 1 16
10K
5
U 1 6B
2100 East Elliot Road
Tempe, Arizona 85284
DSP PWM 1
FAULT SENSE B0
1
(480) 413-5090
Title
Size
B
A
B
C
1
FAX: (480) 413-2510
SECONDARY UNI-3 AND OVER-VOLTAGE FAULT DETECTION
Document
Number
Rev.
63A10516S
Date: Tuesday, October 24, 2000
Designer: DSPD Design
D
A-9
Figure A-8. SECONDARY UNI-3 AND OVER-VOLTAGE DETECTION
Sheet 8
E
of
18
1.0
A-10
A
B
C
D
E
4
4
GP SW 1
S4
+3.3V
PD3
+3.3V
GP SW-2
S5
R120
10K
JG16
PD4
DSP56F807EVM Hardware User’s Manual
1
2
3
PD0
3
GENERAL PURPOSE SWITCHES
R121
10K
JG17
User
Jumper
#0
1
2
3
PD1
User
Jumper
#1
3
R122
10K
R123
10K
RUN/STOP
S6
PD5
SOFTWARE FEATURE JUMPERS
2
2
+3.3V
R117
PD3
DSP Standard Products Division
10K
R118
2100 East Elliot Road
Tempe, Arizona 85284
PD4
10K
(480) 413-5090
R119
FAX: (480) 413-2510
PD5
1
1
Title
10K
Size
A
A
B
U S E R G E N E R A L P U R P O S E SWITCHES AND JUMPERS
Document
Number
Rev.
63A10516S
Date: Monday, October 16, 2000
C
Designer: D S P D D e s i g n
D
Figure A-9. USER GENERAL PURPOSE SWITCHES AND JUMPERS
Sheet
9
of
E
18
1.0
A
B
C
D
JG14
4
BK_EMF_A
JG10
1
SU3_BK_EMF_A
3
BK_EMF_B
4
U3_PHB_IS
6
BK_EMF_C
7
U3_PHC_IS
9
SU3_PHA_IS
DSP56F807EVM Schematics
3
SU3_BK_EMF_B
4
SU3_PHB_IS
6
SU3_BK_EMF_C
7
SU3_PHC_IS
9
AN4
8
2
AN10
5
AN11
8
AN12
3
AN3
5
4
1
AN2
2
U3_PHA_IS
E
3
JG10
JG14
U3_BK_EMF_A
U3_PHA_IS
SU3_BK_EMF_A
SU3_PHA_IS
U3_BK_EMF_B
U3_PHB_IS
SU3_BK_EMF_B
SU3_PHB_IS
U3_BK_EMF_C
U3_PHC_IS
SU3_BK_EMF_C
SU3_PHC_IS
2
2
7
8
9
7
8
9
DSP Standard Products Division
2100 East Elliot Road
Tempe, Arizona 85284
(480) 413-5090
FAX: (480) 413-2510
1
1
Title
Size
A
A
B
M O T O R PHASE-CURRENT/BACK-EMF VOLTAGE ANALOG INPUT SELECTOR
Document
Number
Rev.
63A10516S
Date: Monday, October 16, 2000
C
Designer: D S P D D e s i g n
D
Sheet 1 0
of
E
A-11
Figure A-10. MOTOR PHASE-CURRENT/BACK-EMF VOLTAGE ANALOG INPUT SELECTOR
18
1.0
A-12
A
B
C
D
+5.0V
U 3 _ I _ L I M IT_REF
R2
10K
E
+ 5 .0V
R4
1M
R5
SU3_I_LIMIT_REF
R3
10K
1M
+3.3V
8
R6
5.1K
R9
C9
0.1uF
2
-
16K
U 3 _ I _ L I M IT_REF
R12
16K
+3.3V
1M
8
R14
5.1K
C11
0.1uF
+
2
-
16K
LM393
+3.3V
1M
+5.0V
U4A
1
-
R13
SU3_I_LIMIT_REF
PRIMARY UNI-3
PHASE B CURRENT
FAULT SENSE A2
S _ P H A_IS
1
16K
C10
0.1uF
R18
F A U LTA2
R19
S U 3 _ P HB_IS
LM393
16K
4
U6A
+
2
S U 3 _ P H A_IS
4
16K
3
3
+
2
-
U5A
1
F A U LTB2
LM393
16K
C12
0.1uF
SECONDARY UNI-3
PHASE B CURRENT
FAULT SENSE B2
R15
5.1K
3
3
1M
+3.3V
R22
5.1K
8
+5.0V
R25
AN1
U3_I_S_DCB
R28
16K
16K
R29
C15
0.1uF
-
U4B
7
R30
F A U LTA3
LM393
16K
16K
+3.3V
+5.0V
R36
10K
P R I _ O V E R _ I_LIMIT
5
+
6
-
PRIMARY UNI-3
DC BUS OVER-CURRENT
FAULT SENSE A1
R34
5.1K
8
+5.0V
-
U5B
7
R32
R33
16K
C16
0.1uF
1M
16K
+ 3 .3V
P _ O I _FAULT
+ 5 .0V
1
2
F A U LTB3
LM393
+ 5 .0V
U3B
7
+
6
16K
C14
0.1uF
R31
5
F A U LTA1
3
R37
10K
PRIMARY UNI-3
PHASE A CURRENT/DC BUS CURRENT
FAULT SENSE A1
SECONDARY UNI-3
PHASE C CURRENT
FAULT SENSE B3
R23
5.1K
AN9
JG1
P _ P H A_IS
LM393
R27
R26
S U 3 _ P H C _ IS
1M
+3.3V
S E C _ O V ER_I_LIMIT
5
+
6
-
SECONDARY UNI-3
DC BUS OVER-CURRENT
FAULT SENSE B1
R35
5.1K
8
2
C13
0.1uF
+
6
4
16K
5
1M
+5.0V
4
R24
U3_PHC_IS
R21
SU3_I_LIMIT_REF
PRIMARY UNI-3
PHASE C CURRENT
FAULT SENSE A3
8
R20
4
U 3 _ I _ L I M IT_REF
4
DSP56F807EVM Hardware User’s Manual
R17
U 3 _ P H B _IS
R11
R10
LM393
+5.0V
R16
3
P _ P H A_IS
1
8
16K
U3A
4
U 3 _ P H A _IS
+
4
3
R8
SECONDARY UNI-3
PHASE A CURRENT
FAULT SENSE B1
R7
5.1K
4
4
+3.3V
+5.0V
PRIMARY UNI-3
PHASE A CURRENT
FAULT SENSE A1
8
+5.0V
JG2
S _ P H A_IS
1
U6B
LM393
F A ULTB1
2
S _ O I _ FAULT
7
2
3
SECONDARY UNI-3
PHASE A CURRENT/DC BUS CURRENT
FAULT SENSE B1
DSP Standard Products Division
2100 East Elliot Road
Tempe, Arizona 85284
1
(480) 413-5090
Title
Size
B
A
B
C
1
FAX: (480) 413-2510
PRIMARY AND SECONDARY 3-PHASE OVER CURRENT SENSE
Document
Number
Rev.
63A10516S
Date: Monday, October 16, 2000
Designer: DSPD Design
D
Figure A-11. PRIMARY AND SECONDARY 3-PHASE OVER-CURRENT SENSE
Sheet 11 of
E
18
1.0
A
B
C
D
E
CONNECT
+5.0V
4
+5.0V
1-2: ZERO CROSSING
2-3: ENCODER/HALL EFFECT
4
R38
1K
JG12
ZERO_X_A
1
R40
R39
C17
0.1uF
2
PHASEA0
5
PHASEB0
3
24 Ohm
24 Ohm
+
C19
470pF
+5.0V
C18
2.2uF
R41
1K
ZERO_X_B
J4
DSP56F807EVM Schematics
3
ENCODER/
HALL-EFFECT
CONNECTOR
R42
R43
24 Ohm
24 Ohm
4
6
1
2
3
4
5
6
3
C20
470pF
+5.0V
R44
1K
+5.0V
ZERO_X_C
R46
R45
7
INDEX0
8
9
2
PIN
PIN
PIN
PIN
PIN
PIN
1:
2:
3:
4:
5:
6:
+5.0V
GROUND
PHASE A
PHASE B
INDEX
HOME
24 Ohm
R47
1K
R48
R49
24 Ohm
24 Ohm
24 Ohm
C21
470pF
HOME0
2
C22
470pF
UNI-3: ZERO CROSSING
DSP Standard Products Division
2100 East Elliot Road
Tempe, Arizona 85284
(480) 413-5090
FAX: (480) 413-2510
1
1
Title
Size
A
A
B
PRIMARY ZERO-CROSSING/QUADRATURE-ENCODER OR HALL-EFFECT SELECTOR
Document
Number
Rev.
63A10516S
Date: Monday, October 16, 2000
C
Designer: D S P D D e s i g n
D
Sheet 1 2
of
18
E
A-13
Figure A-12. PRIMARY ZERO-CROSSING/QUADRATURE-ENCODER OR HALL-EFFECT SELECTOR
1.0
A-14
A
B
C
D
E
CONNECT
1-2: ZERO CROSSING
2-3: ENCODER/HALL-EFFECT
+5.0V
4
4
+5.0V
R50
1K
JG13
SU3_ZERO_X_A
R52
R51
C23
0.1uF
1
+
DSP56F807EVM Hardware User’s Manual
2
PHASEA1
5
PHASEB1
8
INDEX1
3
24 Ohm
C24
2.2uF
24 Ohm
+5.0V
C25
470pF
R53
1K
SU3_ZERO_X_B
SECONDARY
ENCODER/
HALL-EFFECT
CONNECTOR
2
+5.0V
GROUND
PHASE A
PHASE B
INDEX
HOME
3
24 Ohm
24 Ohm
C26
470pF
+5.0V
R56
1K
SU3_ZERO_X_C
R58
R57
1:
2:
3:
4:
5:
6:
4
6
1
2
3
4
5
6
+5.0V
PIN
PIN
PIN
PIN
PIN
PIN
R55
R54
J5
3
7
9
24 Ohm
24 Ohm
R59
1K
C27
470pF
R60
R61
HOME1
24 Ohm
2
24 Ohm
C28
470pF
SECONDARY UNI-3: ZERO CROSSING
DSP Standard Products Division
2100 East Elliot Road
Tempe, Arizona 85284
(480) 413-5090
FAX: (480) 413-2510
1
1
Title
Size
A
A
B
SECONDARY ZERO-CROSSING/QUADRATURE-ENCODER OR HALL-EFFECT SELECTOR
Document
Number
Rev.
63A10516S
Date: Monday, October 16, 2000
C
Designer: D S P D D e s i g n
D
Sheet 1 3
of
18
1.0
E
Figure A-13. SECONDARY ZERO-CROSSING/QUADRATURE-ENCODER OR HALL-EFFECT SELECTOR
A
B
C
A[0..15]
A[0..15]
D
D[0..15]
D[0..15]
J6
A0
A2
A4
A6
A8
A10
A12
A14
4
1
3
5
7
9
11
13
15
17
E
J7
2
4
6
8
10
12
14
16
18
D0
D2
D4
D6
D8
D10
D12
D14
A1
A3
A5
A7
A9
A11
A13
A15
1
3
5
7
9
11
13
15
17
+3.3V
ADDRESS BUS
D1
D3
D5
D7
D9
D11
D13
D15
2
4
6
8
10
12
14
16
18
J8
/RD
/WR
/PS
/DS
C L KO
/IRQA
/IRQB
/ R E S ET
/RSTO
D E B U G _EVENT
2
4
6
8
10
12
1
3
5
7
9
11
4
+ 3 .3V
ADDRESS CONTROL
+ 3 .3V
DATA BUS
J9
J10
DSP56F807EVM Schematics
P W MA0
P W MA2
P W MA4
F A U LTA0
F A U LTA2
ISA0
ISA2
3
1
3
5
7
9
11
13
J11
P W MA1
P W MA3
P W MA5
F A U LTA1
F A U LTA3
ISA1
2
4
6
8
10
12
14
P W MB0
P W MB2
P W MB4
F A U LTB0
F A U LTB2
ISB0
ISB2
1
3
5
7
9
11
13
AN0
AN1
AN2
AN3
P W MB1
P W MB3
P W MB5
F A U LTB1
F A U LTB3
ISB1
2
4
6
8
10
12
14
AN4
AN5
AN6
AN7
2
4
6
8
10
1
3
5
7
9
3
+ 3 .3VA
DSP A/D
Port A
PWM2
PWM1
J12
AN8
AN9
A N 10
A N 11
J13
MOSI
MISO
SCLK
1
2
3
4
J14
TXD1
R X D1
1
2
3
J15
TXD0
RXD0
J16
M S C A N_TX
MSCAN_RX
1
2
3
SCI1
SCI0
A N 12
A N 13
A N 14
A N 15
2
4
6
8
10
1
3
5
7
9
+ 3 .3VA
DSP A/D
Port B
1
2
3
CAN
SPI
2
2
J17
J19
J18
TA0
TA1
TA2
TA3
P H ASEA0
P H ASEB0
I N D E X0
H O M E0
+ 3 .3V
1
2
3
4
5
6
TC0
TC1
1
2
3
4
+3.3V
PE0
PE2
PE4
PE6
J20
PB0
PB2
PB4
PB6
TIMER CHANNEL C
1
3
5
7
9
PB1
PB3
PB5
PB7
2
4
6
8
10
TXD0
TXD1
SCLK
MISO
1
3
5
7
9
2
4
6
8
10
R X D0
R X D1
MOSI
/SS
PE1
PE3
PE5
PE7
+3.3V
PORT E
+ 3 .3V
PORT B
TIMER CHANNEL A
DSP Standard Products Division
1
J21
TB0
TB1
TB2
TB3
P H ASEA1
PHASEB1
I N D E X1
H O M E1
+ 3 .3V
1
2
3
4
5
6
TIMER CHANNEL B
2100 East Elliot Road
Tempe, Arizona 85284
J22
TD0
TD1
TD2
TD3
1
2
3
4
5
6
+3.3V
J23
PD0
PD2
PD4
1
3
5
7
(480) 413-5090
PD1
PD3
PD5
2
4
6
8
Title
+ 3 .3V
PORT D
Size
TIMER CHANNEL D
B
A
B
C
1
FAX: (480) 413-2510
DSP PORT EXPANSION CONNECTORS
Document
Number
Rev.
63A10516S
Date: Monday, October 16, 2000
D
A-15
Figure A-14. DSP PORT EXPANSION CONNECTORS
Designer: DSPD Design
Sheet 14 of
E
18
1.0
A-16
A
B
C
D
E
+5.0V
4
4
R62
1K
+5.0V
M S C A N _ TX
MSCAN_RX
1
4
DSP56F807EVM Hardware User’s Manual
8
TXD
RXD
SLOPE
DAISY-CHAIN
CAN BUS CONNECTOR
CAN BUS CONNECTOR
U8
VCC
VREF
3
5
CANH
CANL
7
6
GND
2
1
T19
J24
CANH
CANL
1
3
5
7
9
PCA82C250T
J25
2
4
6
8
10
1
3
5
7
9
CANL
2
4
6
8
10
CANH
3
3
JG3
CANH
1
2
CAN BUS
TERMINATION
R63
120
1/4W
CANL
2
2
DSP Standard Products Division
2100 East Elliot Road
Tempe, Arizona 85284
(480) 413-5090
FAX: (480) 413-2510
1
1
Title
Size
A
A
B
HIGH-SPEED CAN INTERFACE
Document
Number
Rev.
63A10516S
Date: Monday, October 16, 2000
C
Designer: D S P D D e s i g n
D
Figure A-15. HIGH-SPEED CAN INTERFACE
Sheet 1 5
of
E
18
1.0
A
B
C
D
E
Parallel JTAG Interface
R64
4
4
270
P O R T _ I DENT
R65
P1
270
1
U9
14
2
PORT_RESET
3
PORT_TMS
4
P O RT_TCK
5
P O R T _TDI
6
/ P O RT_TRST
7
P O R T_DE
15
16
17
18
19
R66
2
1A1
1Y1
18
P_RESET
270
4
1A2
1Y2
16
TMS
6
1A3
1Y3
14
TCK
8
1A4
1Y4
12
TDI
11
2A1
2Y1
9
/J_TRST
R68
7
2Y2
2A2
13
TDO
270
5
2Y3
2A3
15
+3.3V
3
2Y4
2A4
17
R67
270
20
8
21
T20
P O R T _ VCC
1
R69
5.1K
+3.3V
10
23
R70
P O RT_TDO
11
24
20
1
19
51 Ohm
12
25
GND
10
R71
P O R T _ C O NNECT
13
VCC
1G
2G
3
2
1
DSP56F807EVM Schematics
9
22
3
JG4
51 Ohm
R72
5.1K
DB25M
MC74LCX244D W
On-Board
Host Target Interface
Disable
+3.3V
U 1 8A
2
R73
5.1K
/ J _ R E SET
1
/POR
2
Q1
2 N 2222A
/J_TRST
/ J _ R E SET
U18D
9
5.1K
J3
/ R E S ET
7 4 AC00
U18C
R75
TCK
TDO
TDI
12
8
11
10
2
+3.3V
6
5
74AC00
/ J _ R E SET
P_RESET
U 1 8B
4
3
/TRST
13
13
11
9
7
5
3
1
14
12
10
8
6
4
2
/J_TRST
TMS
KEY
JTAG Connector
R77
47K
74AC00
7 4 AC00
DSP Standard Products Division
+3.3V
TDO
1
2100 East Elliot Road
Tempe, Arizona 85284
R76
(480) 413-5090
47K
Title
/J_TRST
R74
Size
47K
B
A
B
C
1
FAX: (480) 413-2510
PARALLEL JTAG HOST TARGET INTERFACE AND JTAG CONNECTOR
Document
Number
Rev.
63A10516S
Date: Tuesday, December 05, 2000
Designer: DSPD Design
D
A-17
Figure A-16. PARALLEL JTAG HOST TARGET INTERFACE AND JTAG CONNECTOR
Sheet 16 of
E
18
1.0
A-18
A
B
C
D
E
D1
4
4
FM4001
P2
2
+ 5 . 0 V _ U NI3
U10
D2
1
+ C4
470uF
16VDC
FM4001
3
EXTERNAL POWER IN
INPUT 12V DC
C29
0.1uF
3
V IN
VOUT
2
1
GND
VOUT
4
+ 5 .0V
L1
FERRITE BEAD
+
C5
4 7 uF
10VDC
MC33269DT-5.0
R78
470
POWER GOOD LED
DSP56F807EVM Hardware User’s Manual
L E D10
GREEN LED
+5.0V
D3
3
3
FM4001
U11
VCC
3
1
V IN
GND
VOUT
2
VOUT
4
L4
+3.3V
FERRITE BEAD
M C 33269DT-3.3
+
C6
4 7 uF
10VDC
L2
+3.3V
2
+3.3VA
3.3V AND 5.0V
REGULATOR
FERRITE BEAD
C30
0.1uF
2
4
L3
FERRITE BEAD
1
2
3
MC33269
TP5
GROUND
TEST POINT
TP6
DSP Standard Products Division
GROUND
TEST POINT
TP7
2100 East Elliot Road
Tempe, Arizona 85284
TP8
1
+3.3V
TEST POINT
1
1
TP4
1
TP3
1
GROUND
TEST POINT
1
ANALOG GROUND
TEST POINT
1
+3.3VA
TEST POINT
(480) 413-5090
Title
+3.3VA
+3.3V
Size
B
A
B
1
FAX: (480) 413-2510
P O W E R SUPPLIES
Document
Number
Date: Monday, October 16, 2000
C
Figure A-17. POWER SUPPLIES
Rev.
63A10516S
D
Designer: DSPD Design
Sheet 17 of
E
18
1.0
A
B
C
DSP56F807
DSP
D
E
VRH
+3.3V
UNI-3
MAX3225
A/D CONNECTOR
4
4
+3.3VA
C31
0.1uF
C32
0.01uF
C33
0.1uF
C34
0.01uF
DSP56F807EVM Schematics
+ 3 .3V
+3.3V
C48
0.1uF
+ 3 .3V
DATA BUS
CONNECTOR
C53
0.01uF
+3.3V
C54
0.1uF
7 4 AC04
R79
5.1k
1
11
T9
R80
5.1k
C41
0.1uF
LM393
LM393
LM393
LM393
+ 5 .0V
+5.0V
+5.0V
+5.0V
+ 5 .0V
C43
0.1uF
74HC04
C44
0.01uF
C45
0.1uF
C46
0.01uF
+3.3V
+3.3V
C56
0.1uF
C57
0.01uF
2
DSP Standard Products Division
U12F
10
1
7 4 AC04
13
T10
R81
5.1k
12
1
2100 East Elliot Road
Tempe, Arizona 85284
T11
7 4 AC04
(480) 413-5090
Size
B
B
C39
0.01uF
74HC04
Title
A
C40
0.1uF
3
U12E
8
C3
2.2uF
50VDC
+ 3 .3VA
LM393
C52
0.1uF
C55
0.01uF
U12D
+
C38
0.1uF
+3.3V
+Vref
C51
0.1uF
+3.3V
9
1
+ 3 .3V
C50
0.1uF
ADDRESS BUS
CONNECTOR
C37
0.1uF
SERIAL D/A
+ 5 .0V
C49
0.01uF
74LCX244
2
C36
0.01uF
CAN
INTERFACE
SRAM
3
C35
0.1uF
+3.3V
C
1
FAX: (480) 413-2510
BYPASS CAPACITORS AND SPARE GATES
Document
Number
Rev.
63A10516S
Date: Monday, October 16, 2000
D
A-19
Figure A-18. BYPASS CAPACITORS AND SPARE GATES
Designer: DSPD Design
Sheet 18 of
E
18
1.0
A-20
DSP56F807EVM Hardware User’s Manual
Appendix B
DSP56F807EVM Bill of Material
Qty
Description
Ref. Designators
Vendor Part #
Integrated Circuits
1
DSP56F807
U1
5
LM393
1
74LCX244
U9
2
74AC04
U12, U15
1
MC33269DT-5.0
U10
ON Semiconductor, MC33269DT-5.0
1
MC33269DT-3.3
U11
ON Semiconductor, MC33269DT-3.3
1
GS72116
U2
GSI, GS72116TP-12
1
MAX3245
U13
Maxim, MAX3245EEAI
1
MAX5251
U14
Maxim, MAX5251BEAP
1
PCA82C250T
U8
Philips Semiconductor, PCA82C250T
1
74AC00
U18
Fairchild, 74AC00SC
U3, U4, U5, U6, U16
Motorola, DSP56F807FV80
National, LM393M
ON Semiconductor, MC74LCX244DW
Fairchild, 74AC04SC
Resistors
20
16K Ω
R8 - R11, R16 - R19,
R24 - R29, R31, R32, R107,
R108, R112 ,R113
SMEC, RC73L2A16KOHMJT
10
1M Ω
R4, R5, R12, R13, R20, R21,
R30, R33, R109, R114
SMEC, RC73L2A1MOHMJT
18
5.1K Ω
R6, R7, R14, R15, R22, R23,
R34, R35, R69, R72, R73,
R75, R79 - R81, R96, R110,
R115
SMEC, RC73L2A5.1KOHMJT
12
10K Ω
R82 - R85, R117 - R123,
R125
SMEC, RC73L2A10KOHMJT
2
51 Ω
R70, R71
SMEC, RC73L2A51OHMJT
DSP56F807EVM Bill of Material
B-1
Qty
Description
Ref. Designators
Vendor Part #
Resistors (Continued)
3
47K Ω
R74, R76, R77
SMEC, RC73L2A47KOHMJT
1
470 Ω
R78
SMEC, RC73L2A470OHMJT
1
10M Ω
R1
SMEC, RC73L2A10MOHMJT
20
1K Ω
R38, R41, R44, R47, R50,
R53, R56, R59, R62,
R86 - R95, R124
SMEC, RC73L2A1KOHMJT
14
270 Ω
R64 - R68, R98 - R106
SMEC, RC73L2A270OHMJT
16
24 Ω
R39, R40, R42, R43, R45,
R46, R48, R49, R51, R52,
R54, R55, R57, R58, R60,
R61
SMEC, RC73L2A24OHMJT
1
120 Ω, 1/4W
R63
YAGEO, CFR 120QBK
Potentioneters
7
10K Ω
R2, R3, R36, R37, R97, R111,
R116
BC/MEPCOPAL, ST4B103CT
Inductors
4
1.0mH
L1, L2, L3, L4
Panasonic, EXC-ELSA35V
LEDs
1
Red LED
LED1
Hewlett-Packard, HSMS-C650
4
Yellow LED
LED2, LED4, LED6, LED8
Hewlett-Packard, HSMY-C650
5
Green LED
LED3, LED5, LED7, LED9,
LED10
Hewlett-Packard, HSMG-C650
Diode
3
B-2
S2B-FM401
D1, D2, D3
Vishay, DL4001DICT
DSP56F807EVM Hardware User’s Manual
Qty
Description
Ref. Designators
Vendor Part #
Capacitors
5
2.2µF, 50VDC
31
0.1µF
1
C1 - C3, C18, C24
NICHICON, UWX1H2R2MCR2GB
C7 - C17, C23, C29 - C31,
C33, C35, C37, C38, C40,
C41, C43, C45, C48,
C50 - C52, C54, C56, C65,
C66
SMEC, MCCE104K2NR-T1
470µF, 16VDC
C4
ELMA, RV-16V471MH10R
2
47µF, 16VDC
C5, C6
8
470pF
C19 - C22, C25 - C28
SMEC, MCCE471J2NO-T1
10
0.01uF
C32, C34, C36, C39, C44,
C46, C49, C53, C55, C57
SMEC, MCCE103K2NR-T1
4
1.0uF, 50VDC
C60 - C63
ELMA, RV2-16V470M-R
NICHICON, UWX1H010MCR1GB
Jumpers
8
3 × 1 Bergstick
JG1, JG2, JG5, J14, J15,
JG16, J16, JG17
SAMTEC, TSW-103-07-S-S
4
4 × 2 Bergstick
JG11, JG15, J23, J26
SAMTEC, TSW-104-07-S-D
6
1 × 2 Bergstick
JG3, JG4, JG6, JG7, JG8,
JG9
SAMTEC, TSW-102-07-S-S
4
3 x 3 Bergstick
JG10, JG12, JG13, JG14
SAMTEC, TSW-103-07-S-T
2
9 x 2 Bergstick
J6, J7
SAMTEC, TSW-109-07-S-D
3
6 x 1 Bergstick
J18, J21, J22
SAMTEC, TSW-106-07-S-S
6
5 x 2 Bergstick
J9, J12, J17, J20, J24, J25
SAMTEC, TSW-105-07-S-D
2
4 x 1 Bergstick
J13, J19
SAMTEC, TSW-104-07-S-S
3
7 x 2 Bergstick
J3, J10, J11
SAMTEC, TSW-107-07-S-D
2
6 x 1 MTA
1
6 x 2 Bergstick
2
20 x 2 Shrouded
J4, J5
J8
J1, J2
AMP, MTA 640456-6
SAMTEC, TSW-106-07-S-D
3M, 2540-6002UB
DSP56F807EVM Bill of Material
B-3
Qty
Description
Ref. Designators
Vendor Part #
Test Points
8
1 × 1 Bergstick
TP1 - TP8
Samtec, TSW-101-07-S-S
Crystals
1
8.00MHz Crystal
Y1
CTS, ATS08ASM-T
Connectors
1
DB25M Connector
P1
AMPHENOL, 617-C025P-AJ121
1
2.1mm coax
Power Connector
P2
Switch Craft, RAPC-722
1
DE9F Connector
P3
AMPHENOL, 617-C009S-AJ120
Switches
5
SPST Pushbutton
1
SPDT Toggle
S1 - S5
S6
Panasonic, EVQ-PAD05R
C&K, GT11MSCKE
Transistors
1
2N2222A
Q1
ZETEX, FMMT2222ACT
Miscellaneous
28
Shunt
6
Rubber Feet
B-4
SH1–SH28
RF1–RF6
Samtec, SNT-100-BL-T
3M, SJ5018BLKC
DSP56F807EVM Hardware User’s Manual
Index
A
4-Channel 10-bit Serial D/A 2-1
64Kx16-bit of data memory 2-1
64Kx16-bit of program memory 2-1
8.00MHz crystal oscillator 2-1
CAN bus termination 2-1
CAN bypass 2-1
CAN physical layer peripheral 2-2
Development Card 2-1
external memory expansion connectors 2-2
external oscillator frequency input 2-1
FSRAM 2-1
JTAG port interface 2-1
MPIO compatible peripheral 2-2
On-board power regulation 2-2
Parallel JTAG Host Target Interface 2-1
PWM compatible peripheral 2-2
RS-232 interface 2-1
SPI compatible peripheral 2-2
test points 2-36
Timer compatible peripheral 2-2
UNI-3 connector/interface 2-14
A/D x
B
Back-EMF 2-22
signals 2-15
C
CAN x
bus termination 2-1
bypass 2-1
interface 2-1, 2-24
CiA x
Clock Source 2-7
Connector
A/D 2-32, 2-33
Address bus 2-31
CAN 2-34
Data bus 2-32
External Memory Control 2-28
PWM 2-35
SCI 2-33, 2-34
SPI 2-34
Connectors
Peripheral Expansion 2-26
D
D/A x
D/A converter 2-18
Data memory 2-5
Debugging 2-8
DSP x
DSP56302EVM
component layout 1-3
connecting to the PC 1-4
interconnection diagram 1-4
jumper settings 1-3
power connection 1-4
DSP56F803EVM
CAN interface 2-1
real-time debugging 2-8
DSP56F805EVM
16-bit 3.3V Digital Signal Processor 2-1
4.0Amp power supply 2-13
E
Encoder/Hall-Effect 2-23
circuits 2-23
Encoder/Timer 2-29
EVM x
External Memory Control Signal 2-28
F
FSRAM 2-5
G
GPIO x, 2-27, 2-31
signals 2-17
H
Hall-Effect/Quadrature Encoder interface 2-1
Host Parallel Interface Connector 2-8
Host Target Interface 2-8
I
IC x
Index
1
J
JTAG xi, 1-1, 2-1
connector 2-9
Jumper Group 1-3
JG1 1-3
JG10 1-3
JG11 1-3
JG12 1-3
JG13 1-3
JG14 1-3
JG15 1-3
JG16 1-3
JG17 1-3
JG2 1-3
JG3 1-3
JG4 1-3
JG5 1-3
JG6 1-3
JG7 1-3
JG8 1-3
JG9 1-3
jumper settings 1-3
L
Logic
motor bus over-current 2-1
motor bus over-voltage 2-1
motor zero crossing 2-1
LQFP xi
M
motor bus
over-current 2-1
over-voltage 2-1
Motor Phase
signals 2-15
Motor Phase Current 2-22
Motor Protection Logic 2-19
MPIO xi, 2-27, 2-28, 2-29
port 2-30
O
OnCE 1-1
OnCE(TM) xi, 1-1
Operating Mode 2-7
power supply, external 1-4
Program memory 2-5
PWM xi
Q
Quad Encoder 2-23
Quadrature Decoder
interface port 2-29
R
RAM xi
ROM xi
RS-232
interface 2-6
level converter 2-6
schematic diagram 2-6
RS-232 cable connection 1-4
RS-232 Serial Communications 2-6
S
SCI xi
Serial Communications Port 2-33, 2-34
SPI xi
Serial Peripheral Interface 2-34
SRAM xi
external data 2-1
external program 2-1
U
UART xi
UNI-3
Back-EMF 2-23
connector/interface 2-14
DC Bus Over-Voltage signal 2-20
Motor Drive interface 2-15
Motor interface
Primary 2-3
Secondary 2-3
Over-Voltage signal 2-21
Z
Zero-Crossing
circuits 2-23
Zero-Crossing Detection 2-23
P
PCB xi
Peripheral Connectors 2-26
PLL xi
2
DSP56F807EVM Hardware User’s Manual
OnCE™ is a trademark of Motorola, Inc.
© Copyright Motorola, Inc., 2000. All rights reserved.
This document contains information on a new product. Specifications and information herein are subject to change
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