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Download VR Series 64-/32-Bit Microprocessor Programming Guide AN
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CHAPTER 2 PIPELINE Figure 2-5. State of Pipeline During Interlock (Stall) (a) Single-way pipeline IC RF Instruction EX Instruction DC Instruction WB Instruction Instruction (b) 2-way superscalar pipeline IC Instruction RF EX Instruction Instruction DC WB Instruction Instruction Instruction Instruction Instruction Instruction Instruction Figure 2-6. State of Pipeline During Interlock (Slip) (a) Single-way pipeline IC Instruction RF EX Instruction DC Instruction WB Instruction Instruction (b) 2-way superscalar pipeline IC Instruction Instruction RF EX Instruction DC Instruction Instruction Instruction WB Instruction Instruction Instruction Instruction Application Note U10710EJ5V0AN 45
