Download Processor

Chapter 3 – BIOS Setup Menus
Option
Description
Floppy Disk Controller
Allows the floppy drive controller to be enabled, disabled, or autoselected.
1
Base I/O Address
Select a unique address for the corresponding peripheral.
1
Interrupt
Select an interrupt request for the corresponding peripheral.
1
Mode
Controls the protocol for the corresponding peripheral.
1 = Visible only when corresponding peripheral is “Enabled”
Advanced Chipset Control Submenu
Xycom BIOS Setup Utility
Advanced
Advanced Chipset Control
Enable Memory Gap
Item Specific Help
[Disabled]
If the item you
ECC Config:
[Disabled]
are viewing has
SERR Signal Condition:
[Multiple bit]
specific help, it will
8-bit I/O Recovery:
[3.5]
be listed here.
16-bit I/O Recovery:
[3.5]
F1
Help
­¯
ESC
Exit
¨ Select Menu
Select Item
-/+
Change Values
Enter Select » Submenu
F9
Setup Defaults
F10 Save & Exit
Figure 3-6. Advanced Chipset Control Submenu
This menu allows you to change the values in the chipset registers and
optimize your system’s performance.
Note
Most system configurations will work best with these options in their default configurations. Fast processors may cause I/O failures at the default
recovery values. You can increase the number of cycles when encountering this problem; however, slowing down the clock too much may
cause I/O initialization problems. You should increase the number of
clock cycles incrementally, until you see an improvement in I/O performance.
Table 3-6. Advanced Chipset Control Submenu Options
Option
Enable Memory Gap
ECC Configuration
SERR Signal Conditions
8-bit I/O Recovery
16-bit I/O Recovery
3-7
Description
Allows creation at a 128K memory gap in conventional memory from 512K to 640K, or a
1MB memory gap in extended memory from 15 MB to 16 MB. Requires use of conventional or extended memory. Default is [Disabled].
Allows configuration of Error Checking and Correction Memory. Requires ECC memory. Default is [Disabled]
Allows configuration of conditions upon which the SERR signal is to be asserted for
ECC memory. Requires ECC memory. Default is [Multiple bit].
Number of ISA clock cycles inserted between back-to-back I/O operations.