Download LED LCD TV SERVICE MANUAL - Turuta Electronics World

Internal Use Only
North/Latin America
Europe/Africa
Asia/Oceania
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LED LCD TV
SERVICE MANUAL
CHASSIS : LD0AY
MODEL : 26LV255H
26LV255H-ZA
CAUTION
BEFORE SERVICING THE CHASSIS,
READ THE SAFETY PRECAUTIONS IN THIS MANUAL.
P/NO : MFL67180604 (1111-REV00)
Printed in Korea
CONTENTS
CONTENTS .............................................................................................. 2
PRODUCT SAFETY ................................................................................. 3
SPECIFICATION ....................................................................................... 6
ADJUSTMENT INSTRUCTION ................................................................ 8
BLOCK DIAGRAM...................................................................................14
EXPLODED VIEW .................................................................................. 15
SCHEMATIC CIRCUIT DIAGRAM ..............................................................
Copyright ©2011 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
-2-
LGE Internal Use Only
SAFETY PRECAUTIONS
IMPORTANT SAFETY NOTICE
Many electrical and mechanical parts in this chassis have special safety-related characteristics. These parts are identified by
in the
Schematic Diagram and Exploded View.
It is essential that these special safety parts should be replaced with the same components as recommended in this manual to prevent
Shock, Fire, or other Hazards.
Do not modify the original design without permission of manufacturer.
General Guidance
Leakage Current Hot Check (See below Figure)
Plug the AC cord directly into the AC outlet.
An isolation Transformer should always be used during the
servicing of a receiver whose chassis is not isolated from the AC
power line. Use a transformer of adequate power rating as this
protects the technician from accidents resulting in personal injury
from electrical shocks.
It will also protect the receiver and it's components from being
damaged by accidental shorts of the circuitry that may be
inadvertently introduced during the service operation.
If any fuse (or Fusible Resistor) in this TV receiver is blown,
replace it with the specified.
When replacing a high wattage resistor (Oxide Metal Film Resistor,
over 1 W), keep the resistor 10 mm away from PCB.
Do not use a line Isolation Transformer during this check.
Connect 1.5 K / 10 watt resistor in parallel with a 0.15 uF capacitor
between a known good earth ground (Water Pipe, Conduit, etc.)
and the exposed metallic parts.
Measure the AC voltage across the resistor using AC voltmeter
with 1000 ohms/volt or more sensitivity.
Reverse plug the AC cord into the AC outlet and repeat AC voltage
measurements for each exposed metallic part. Any voltage
measured must not exceed 0.75 volt RMS which is corresponds to
0.5 mA.
In case any measurement is out of the limits specified, there is
possibility of shock hazard and the set must be checked and
repaired before it is returned to the customer.
Leakage Current Hot Check circuit
Keep wires away from high voltage or high temperature parts.
AC Volt-meter
Before returning the receiver to the customer,
always perform an AC leakage current check on the exposed
metallic parts of the cabinet, such as antennas, terminals, etc., to
be sure the set is safe to operate without damage of electrical
shock.
Leakage Current Cold Check(Antenna Cold Check)
With the instrument AC plug removed from AC source, connect an
electrical jumper across the two AC plug prongs. Place the AC
switch in the on position, connect one lead of ohm-meter to the AC
plug prongs tied together and touch other ohm-meter lead in turn to
each exposed metallic parts such as antenna terminals, phone
jacks, etc.
If the exposed metallic part has a return path to the chassis, the
measured resistance should be between 1 MΩ and 5.2 MΩ.
When the exposed metal has no return path to the chassis the
reading must be infinite.
An other abnormality exists that must be corrected before the
receiver is returned to the customer.
Copyright ©2011 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
-3-
To Instrument’s
exposed
METALLIC PARTS
0.15 uF
Good Earth Ground
such as WATER PIPE,
CONDUIT etc.
1.5 Kohm/10W
When 25A is impressed between Earth and 2nd Ground
for 1 second, Resistance must be less than 0.1 Ω
*Base on Adjustment standard
LGE Internal Use Only
SERVICING PRECAUTIONS
CAUTION: Before servicing receivers covered by this service
manual and its supplements and addenda, read and follow the
SAFETY PRECAUTIONS on page 3 of this publication.
NOTE: If unforeseen circumstances create conflict between the
following servicing precautions and any of the safety precautions on
page 3 of this publication, always follow the safety precautions.
Remember: Safety First.
General Servicing Precautions
1. Always unplug the receiver AC power cord from the AC power
source before;
a. Removing or reinstalling any component, circuit board
module or any other receiver assembly.
b. Disconnecting or reconnecting any receiver electrical plug or
other electrical connection.
c. Connecting a test substitute in parallel with an electrolytic
capacitor in the receiver.
CAUTION: A wrong part substitution or incorrect polarity
installation of electrolytic capacitors may result in an
explosion hazard.
2. Test high voltage only by measuring it with an appropriate high
voltage meter or other voltage measuring device (DVM,
FETVOM, etc) equipped with a suitable high voltage probe.
Do not test high voltage by "drawing an arc".
3. Do not spray chemicals on or near this receiver or any of its
assemblies.
4. Unless specified otherwise in this service manual, clean
electrical contacts only by applying the following mixture to the
contacts with a pipe cleaner, cotton-tipped stick or comparable
non-abrasive applicator; 10 % (by volume) Acetone and 90 %
(by volume) isopropyl alcohol (90 % - 99 % strength)
CAUTION: This is a flammable mixture.
Unless specified otherwise in this service manual, lubrication of
contacts in not required.
5. Do not defeat any plug/socket B+ voltage interlocks with which
receivers covered by this service manual might be equipped.
6. Do not apply AC power to this instrument and/or any of its
electrical assemblies unless all solid-state device heat sinks are
correctly installed.
7. Always connect the test receiver ground lead to the receiver
chassis ground before connecting the test receiver positive
lead.
Always remove the test receiver ground lead last.
8. Use with this receiver only the test fixtures specified in this
service manual.
CAUTION: Do not connect the test fixture ground strap to any
heat sink in this receiver.
Electrostatically Sensitive (ES) Devices
Some semiconductor (solid-state) devices can be damaged easily
by static electricity. Such components commonly are called
Electrostatically Sensitive (ES) Devices. Examples of typical ES
devices are integrated circuits and some field-effect transistors and
semiconductor "chip" components. The following techniques
should be used to help reduce the incidence of component
damage caused by static by static electricity.
1. Immediately before handling any semiconductor component or
semiconductor-equipped assembly, drain off any electrostatic
charge on your body by touching a known earth ground.
Alternatively, obtain and wear a commercially available
discharging wrist strap device, which should be removed to
prevent potential shock reasons prior to applying power to the
unit under test.
Copyright ©2011 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
2. After removing an electrical assembly equipped with ES
devices, place the assembly on a conductive surface such as
aluminum foil, to prevent electrostatic charge buildup or
exposure of the assembly.
3. Use only a grounded-tip soldering iron to solder or unsolder ES
devices.
4. Use only an anti-static type solder removal device. Some solder
removal devices not classified as "anti-static" can generate
electrical charges sufficient to damage ES devices.
5. Do not use freon-propelled chemicals. These can generate
electrical charges sufficient to damage ES devices.
6. Do not remove a replacement ES device from its protective
package until immediately before you are ready to install it.
(Most replacement ES devices are packaged with leads
electrically shorted together by conductive foam, aluminum foil
or comparable conductive material).
7. Immediately before removing the protective material from the
leads of a replacement ES device, touch the protective material
to the chassis or circuit assembly into which the device will be
installed.
CAUTION: Be sure no power is applied to the chassis or circuit,
and observe all other safety precautions.
8. Minimize bodily motions when handling unpackaged
replacement ES devices. (Otherwise harmless motion such as
the brushing together of your clothes fabric or the lifting of your
foot from a carpeted floor can generate static electricity
sufficient to damage an ES device.)
General Soldering Guidelines
1. Use a grounded-tip, low-wattage soldering iron and appropriate
tip size and shape that will maintain tip temperature within the
range or 500 °F to 600 °F.
2. Use an appropriate gauge of RMA resin-core solder composed
of 60 parts tin/40 parts lead.
3. Keep the soldering iron tip clean and well tinned.
4. Thoroughly clean the surfaces to be soldered. Use a mall wirebristle (0.5 inch, or 1.25 cm) brush with a metal handle.
Do not use freon-propelled spray-on cleaners.
5. Use the following unsoldering technique
a. Allow the soldering iron tip to reach normal temperature.
(500 °F to 600 °F)
b. Heat the component lead until the solder melts.
c. Quickly draw the melted solder with an anti-static, suctiontype solder removal device or with solder braid.
CAUTION: Work quickly to avoid overheating the circuit
board printed foil.
6. Use the following soldering technique.
a. Allow the soldering iron tip to reach a normal temperature
(500 °F to 600 °F)
b. First, hold the soldering iron tip and solder the strand against
the component lead until the solder melts.
c. Quickly move the soldering iron tip to the junction of the
component lead and the printed circuit foil, and hold it there
only until the solder flows onto and around both the
component lead and the foil.
CAUTION: Work quickly to avoid overheating the circuit
board printed foil.
d. Closely inspect the solder area and remove any excess or
splashed solder with a small wire-bristle brush.
-4-
LGE Internal Use Only
IC Remove/Replacement
Some chassis circuit boards have slotted holes (oblong) through
which the IC leads are inserted and then bent flat against the
circuit foil. When holes are the slotted type, the following technique
should be used to remove and replace the IC. When working with
boards using the familiar round hole, use the standard technique
as outlined in paragraphs 5 and 6 above.
Removal
1. Desolder and straighten each IC lead in one operation by gently
prying up on the lead with the soldering iron tip as the solder
melts.
2. Draw away the melted solder with an anti-static suction-type
solder removal device (or with solder braid) before removing the
IC.
Replacement
1. Carefully insert the replacement IC in the circuit board.
2. Carefully bend each IC lead against the circuit foil pad and
solder it.
3. Clean the soldered areas with a small wire-bristle brush.
(It is not necessary to reapply acrylic coating to the areas).
"Small-Signal" Discrete Transistor
Removal/Replacement
1. Remove the defective transistor by clipping its leads as close as
possible to the component body.
2. Bend into a "U" shape the end of each of three leads remaining
on the circuit board.
3. Bend into a "U" shape the replacement transistor leads.
4. Connect the replacement transistor leads to the corresponding
leads extending from the circuit board and crimp the "U" with
long nose pliers to insure metal to metal contact then solder
each connection.
Power Output, Transistor Device
Removal/Replacement
1. Heat and remove all solder from around the transistor leads.
2. Remove the heat sink mounting screw (if so equipped).
3. Carefully remove the transistor from the heat sink of the circuit
board.
4. Insert new transistor in the circuit board.
5. Solder each transistor lead, and clip off excess lead.
6. Replace heat sink.
Circuit Board Foil Repair
Excessive heat applied to the copper foil of any printed circuit
board will weaken the adhesive that bonds the foil to the circuit
board causing the foil to separate from or "lift-off" the board. The
following guidelines and procedures should be followed whenever
this condition is encountered.
At IC Connections
To repair a defective copper pattern at IC connections use the
following procedure to install a jumper wire on the copper pattern
side of the circuit board. (Use this technique only on IC
connections).
1. Carefully remove the damaged copper pattern with a sharp
knife. (Remove only as much copper as absolutely necessary).
2. carefully scratch away the solder resist and acrylic coating (if
used) from the end of the remaining copper pattern.
3. Bend a small "U" in one end of a small gauge jumper wire and
carefully crimp it around the IC pin. Solder the IC connection.
4. Route the jumper wire along the path of the out-away copper
pattern and let it overlap the previously scraped end of the good
copper pattern. Solder the overlapped area and clip off any
excess jumper wire.
At Other Connections
Use the following technique to repair the defective copper pattern
at connections other than IC Pins. This technique involves the
installation of a jumper wire on the component side of the circuit
board.
1. Remove the defective copper pattern with a sharp knife.
Remove at least 1/4 inch of copper, to ensure that a hazardous
condition will not exist if the jumper wire opens.
2. Trace along the copper pattern from both sides of the pattern
break and locate the nearest component that is directly
connected to the affected copper pattern.
3. Connect insulated 20-gauge jumper wire from the lead of the
nearest component on one side of the pattern break to the lead
of the nearest component on the other side.
Carefully crimp and solder the connections.
CAUTION: Be sure the insulated jumper wire is dressed so the
it does not touch components or sharp edges.
Diode Removal/Replacement
1. Remove defective diode by clipping its leads as close as
possible to diode body.
2. Bend the two remaining leads perpendicular y to the circuit
board.
3. Observing diode polarity, wrap each lead of the new diode
around the corresponding lead on the circuit board.
4. Securely crimp each connection and solder it.
5. Inspect (on the circuit board copper side) the solder joints of
the two "original" leads. If they are not shiny, reheat them and if
necessary, apply additional solder.
Fuse and Conventional Resistor
Removal/Replacement
1. Clip each fuse or resistor lead at top of the circuit board hollow
stake.
2. Securely crimp the leads of replacement component around
notch at stake top.
3. Solder the connections.
CAUTION: Maintain original spacing between the replaced
component and adjacent components and the circuit board to
prevent excessive component temperatures.
Copyright ©2011 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
-5-
LGE Internal Use Only
SPECIFICATION
NOTE : Specifications and others are subject to change without notice for improvement.
1. Application range
3. Test method
This specification is applied to the LCD TV used LD0AY
chassis.
2. Requirement for Test
1) Performance: LGE TV test method followed
2) Demanded other specification
- Safety: CE, IEC specification
- EMC:CE, IEC
Each part is tested as below without special appointment.
1) Temperature: 25 ºC ± 5 ºC(77 ºF ± 9 ºF), CST: 40 ºC ± 5 ºC
2) Relative Humidity : 65 % ± 10 %
3) Power Voltage
: Standard input voltage(AC 100-240 V~, 50 / 60 Hz)
* Standard Voltage of each products is marked by models.
4) Specification and performance of each parts are followed
each drawing and specification by part number in
accordance with BOM.
5) The receiver must be operated for about 5 minutes prior to
the adjustment.
4. Component Video Input (Y, PB, PR)
No.
Specification
Resolution
H-freq(kHz)
Remark
V-freq(Hz)
1.
720x480
15.73
60.00
SDTV,DVD 480i
2.
720x480
15.63
59.94
SDTV,DVD 480i
3.
720x480
31.47
59.94
480p
4.
720x480
31.50
60.00
480p
5.
720x576
15.625
50.00
SDTV,DVD 625 Line
6.
720x576
31.25
50.00
HDTV 576p
7.
1280x720
45.00
50.00
HDTV 720p
8.
1280x720
44.96
59.94
HDTV 720p
9.
1280x720
45.00
60.00
HDTV 720p
10.
1920x1080
31.25
50.00
HDTV 1080i
11.
1920x1080
33.75
60.00
HDTV 1080i
12.
1920x1080
33.72
59.94
HDTV 1080i
13.
1920x1080
56.250
50
HDTV 1080p
14.
1920x1080
67.5
60
HDTV 1080p
Copyright ©2011 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
-6-
LGE Internal Use Only
5. RGB Input (PC)
No.
Specification
Resolution
H-freq(kHz)
V-freq(Hz)
Pixel Clock(MHz)
1.
720*400
31.468
70.08
28.321
2.
640*480
31.469
59.94
25.17
Proposed
Remark
For only DOS mode
VESA
Input 848*480 60 Hz, 852*480 60 Hz
-> 640*480 60 Hz Display
3.
800*600
37.879
60.31
40.00
VESA
4.
1024*768
48.363
60.00
65.00
VESA(XGA)
5.
1280*768
47.78
59.87
79.5
WXGA
6.
1360*768
47.72
59.8
84.75
WXGA
7.
1366*768
47.56
59.6
84.75
WXGA
WXGA Model1
8.
1280*1024
63.981
60.02
108.875
SXGA
FHD model
9.
1280*720
45
60
74.25
720p
10.
1920*1080
67.5
60
148.5
WUXGA
HD Model
DTV Standard
FHD model
6. HDMI Input
(1) DTV Mode
No.
Resolution
H-freq(kHz)
V-freq.(Hz)
Pixel clock(MHz)
Proposed
1.
720*480
31.469 / 31.5
59.94 / 60
27.00 / 27.03
SDTV 480P
2.
720*576
31.25
50
54
SDTV 576P
3.
1280*720
37.500
50
74.25
HDTV 720P
4.
1280*720
44.96 / 45
59.94 / 60
74.17 / 74.25
HDTV 720P
5.
1920*1080
33.72 / 33.75
59.94 / 60
74.17 / 74.25
HDTV 1080I
6.
1920*1080
28.125
50.00
74.25
HDTV 1080I
7.
1920*1080
26.97 / 27
23.97 / 24
74.17 / 74.25
HDTV 1080P
8.
1920*1080
33.716 / 33.75
29.976 / 30.00
74.25
HDTV 1080P
9.
1920*1080
56.250
50
148.5
HDTV 1080P
10.
1920*1080
67.43 / 67.5
59.94 / 60
148.35 / 148.50
HDTV 1080P
Remark
(2) PC Mode
No.
Resolution
H-freq(kHz)
V-freq.(Hz)
70.08
Pixel clock(MHz)
Proposed
28.321
Remark
1.
720*400
31.468
HDCP
2.
640*480
31.469
59.94
25.17
VESA
HDCP
3.
800*600
37.879
60.31
40.00
VESA
HDCP
4.
1024*768
48.363
60.00
65.00
VESA(XGA)
HDCP
5.
1280*768
47.78
59.87
79.5
WXGA
HDCP
WXGA
6.
1360*768
47.72
59.8
84.75
7.
1280*720
45
60
74.25
8.
1280*1024
63.981
60.2
108.875
SXGA
HDCP / FHD model
9.
1920*1080
67.5
60
148.5
WUXGA
HDCP / FHD model
Copyright ©2011 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
-7-
HDCP
HDCP
LGE Internal Use Only
ADJUSTMENT INSTRUCTION
1. Application Range
(2)
This specification sheet is applied to all of the LCD TV with
LD0AY chassis.
(3)
2. Designation
1) The adjustment is according to the order which is designated
and which must be followed, according to the plan which can
be changed only on agreeing.
2) Power Adjustment: Free Voltage
3) Magnetic Field Condition: Nil.
4) Input signal Unit: Product Specification Standard
5) Reserve after operation: Above 5 Minutes (Heat Run)
Temperature : at 25 ºC ± 5 ºC
Relative humidity : 65 % ± 10 %
Input voltage : 220 V, 60 Hz
6) Adjustment equipments: Color analyzer(CA-210 or CA-110),
DDC Adjustment Jig equipment, Service remote control.
7) Push the “IN STOP” key - For memory initialization.
Case1 : Software version up
1. After downloading S/W by USB, TV set will reboot
automatically.
2. Push “In-stop” key.
3. Push “Power on” key.
4. Function inspection
5. After function inspection, Push “In-stop” key.
Case2 : Function check at the assembly line
1. When TV set is entering on the assembly line, Push
“In-stop” key at first.
2. Push “Power on” key for turning it on.
-> If you push “Power on” key, TV set will recover
channel information by itself.
3. After function inspection, Push “In-stop” key.
Please Check the Speed :
To use speed between
from 200KHz to 400KHz
5) Click “Auto” tab and set as below.
6) Click “Run”.
7) After downloading, check “OK” message.
(4)
filexxx.bin
(5)
(7)
.OK
(6)
* USB DOWNLOAD
1) Put the USB Stick to the USB socket.
2) Automatically detecting update file in USB Stick.
- If your downloaded program version in USB Stick is Low,
it didn’t work. But your downloaded version is High, USB
data is automatically detecting.
3) Show the message “Copying files from memory”.
3. Main PCB check process
* APC - After Manual-Insult, executing APC
* Boot file Download
1) Execute ISP program “Mstar ISP Utility” and then click
“Config” tab.
(1)
fi lexxx.bin
2) Set as below, and then click “Auto Detect” and check “OK”
message. If “Error” is displayed, Check connection between
computer, jig, and set.
3) Click “Read” tab, and then load download file(XXXX.bin) by
clicking “Read”.
4) Click “Connect” tab. If “Can’t” is displayed, check connection
between computer, jig, and set.
Copyright ©2011 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
-8-
LGE Internal Use Only
3.1. ADC Process
4) Updating is starting.
(1) ADC
- Enter Service Mode by pushing “ADJ” key,
- Enter Internal ADC mode by pushing “G” key at “7. ADC
Calibration”.
<Caution> Using ‘power on’ key of the Adjustment remote
control, power on TV.
* ADC Calibration Protocol (RS232)
No
Item
Enter Adjust
Adjust
Mode
‘Mode In’
ADC adjust ADC Adjust
CMD1 CMD2 Data0
A
A
0
0
When transfer the ‘Mode In’,
A
D
1
0
Automatically adjustment
Carry the command.
(The use of a internal pattern)
5) Uploading completed, the TV will restart automatically.
6) If your TV is turned on, check your updated version and
Tool option.(explain the Tool option, next stage)
* If downloading version is more high than your TV have,
TV can lost all channel data. In this case, you have to
channel recover. if all channel data is cleared, you didn’t
have a DTV/ATV test on production line.
Adjust Sequence
• aa 00 00 [Enter Adjust Mode]
• xb 00 40 [Component1 Input (480i)]
• ad 00 10 [Adjust 480i Comp1]
• xb 00 60 [RGB Input (1024*768)]
• ad 00 10 [Adjust 1024*768 RGB]
• aa 00 90 End Adjust mode
* Required equipment : Adjustment remote control.
3.2. Function Check
* Check display and sound
- Check Input and Signal items. (cf. work instructions)
1) TV
2) AV (SCART)
3) COMPONENT (480i)
4) RGB (PC : 1024 x 768 @ 60 Hz)
5) HDMI
6) PC Audio In
* Display and Sound check is executed by Remote control.
* After downloading, have to adjust Tool Option again.
1) Push “IN-START” key in service remote control.
2) Select “Tool Option 1” and push “OK” key.
3) Punch in the number. (Each model hax their number)
Copyright ©2011 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
-9-
LGE Internal Use Only
4. Total Assembly line process
• Auto adjustment Map(RS-232C)
RS-232C COMMAND
[CMD ID DATA]
Wb 00
00
White Balance Start
Wb 00
ff
White Balance End
4.1. Adjustment Preparation
· W/B Equipment condition
CA210
- CCFL/EEFL -> CH 9, Test signal : Inner pattern(85 IRE)
- LED(AUO) -> CH 14, Test signal : Inner pattern(80 IRE)
· Above 5 minutes H/run in the inner pattern. (“power on” key
of adjustment remote control)
Cool
Medium
Warm
13,000
9,300
6,500
K
X=0.269(±0.002)
K
K
RS-232C COMMAND MIN
[CMD ID DATA]
Aging Time
(Min.)
Cool
Mid
Warm
MAX
(DEFAULT)
Cool
Mid
Warm
R Gain
jg
Ja
jd
00
172
192
192
192
Y=0.273(±0.002)
<Test Signal>
G Gain
jh
Jb
je
00
172
192
192
192
X=0.285(±0.002)
Inner pattern
B Gain
ji
Jc
jf
00
192
192
172
192
Y=0.293(±0.002)
(216gray,85IRE)
R Cut
64
64
64
128
X=0.313(±0.002)
G Cut
64
64
64
128
Y=0.329(±0.002)
B Cut
64
64
64
128
** Caution **
Color Temperature : COOL, Medium, Warm.
One of R Gain/G Gain/ B Gain should be kept on 0xC0, and
adjust other two lower than C0.
(when R/G/B Gain are all C0, it is the FULL Dynamic Range
of Module.)
· Edge LED W/B Table in process of time(Only LGD module)
CA210 : CH14, Test signal : Inner patter (80 IRE)
GP2
CENTER
Cool
Medium
Warm
X
Y
X
Y
X
Y
269
273
285
293
313
329
1
0-2
279
288
295
308
319
338
2
3-5
278
286
294
306
318
336
* Manual W/B process using adjusts Remote control.
3
6-9
277
285
293
305
317
335
4
10-19
276
283
292
303
316
333
5
20-35
274
280
290
300
314
330
• After enter Service Mode by pushing “ADJ” key,
• Enter White Balance by pushing “ G ” key at “8. White
Balance”.
6
36-49
272
277
288
297
312
327
7
50-79
271
275
287
295
311
325
8
80-149
270
274
286
294
310
324
9
Over 150
269
273
285
293
309
323
* Connecting picture of the measuring instrument
(On Automatic control)
Inside PATTERN is used when W/B is controlled. Connect to
auto controller or push Adjustment remote control POWER
ON -> Enter the mode of White-Balance, the pattern will
come out.
Full White Pattern
* After done all adjustments, Press “In-start” button and
compare Tool option and Area option value with its BOM, if
it is correctly same then unplug the AC cable. If it is not
same, then correct it same with BOM and unplug AC cable.
For correct it to the model’s module from factory Jig model.
* Push the “IN STOP” key after completing the function
inspection. And Mechanical Power Switch must be set “ON”.
CA-210
COLOR
ANALYZER
TYPE: CA-210
4.2. DDC EDID Write (RGB 128Byte )
RS-232C Communication
* Auto-control interface and directions
1) Adjust in the place where the influx of light like floodlight
around is blocked. (illumination is less than 10 lux.)
2) Adhere closely the Color Analyzer (CA210) to the module
less than 10 cm distance, keep it with the surface of the
Module and Color Analyzer’s prove vertically.(80° ~ 100°).
3) Aging time
- After aging start, keep the power on (no suspension of
power supply) and heat-run over 5 minutes.
- Using ‘no signal’ or ‘full white pattern’ or the others,
check the back light on.
Copyright ©2011 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
• Connect D-sub Signal Cable to D-sub Jack.
• Write EDID Data to EEPROM(24C02) by using DDC2B
protocol.
• Check whether written EDID data is correct or not.
* For Service main Assembly, EDID have to be downloaded to
Insert Process in advance.
4.3. DDC EDID Write (HDMI 256Byte)
- 10 -
• Connect HDMI Signal Cable to HDMI Jack.
• Write EDID Data to EEPROM(24C02) by using DDC2B
protocol.
• Check whether written EDID data is correct or not.
* For Service main Assembly, EDID have to be downloaded to
Insert Process in advance.
LGE Internal Use Only
4.4. EDID DATA
1) FHD RGB EDID data
1) All Data : HEXA Value
2) Changeable Data :
*: Serial No : Controlled / Data:01
**: Month : Controlled / Data:00
***: Year : Controlled
****: Check sum
00
0
1
2
3
4
5
6
7
8
9
00
FF
FF
FF
FF
FF
FF
00
1E
6D
01
03
68
10
09
78
0A
EE
91
A3
54
4C
99
26
54
A1
08
00
81
C0
61
40
45
40
31
40
01
01
10
- Auto Download
c
B
C
D
a
E
F
b
20
0F
50
30
01
01
01
01
01
01
1B
21
50
A0
51
00
1E
30
48
88
40
35
00
A0
5A
00
00
00
1C
01
1D
00
72
51
D0
1E
20
50
6E
28
55
00
A0
5A
00
00
00
1E
00
00
00
FD
00
3A
60
3E
1F
46
10
00
0A
20
20
20
20
20
20
FF
FF
FF
FF
FF
FF
FF
FF
FF
FF
FF
FF
70
• After enter Service Mode by pushing “ADJ” key,
• Enter EDID D/L mode.
• Enter “START” by pushing “OK” key.
A
80
d
d
FF
FF
00
e
FF
FF
90
FF
FF
FF
FF
FF
FF
FF
FF
FF
FF
FF
FF
FF
FF
FF
FF
A0
FF
FF
FF
FF
FF
FF
FF
FF
FF
FF
FF
FF
FF
FF
FF
FF
B0
FF
FF
FF
FF
FF
FF
FF
FF
FF
FF
FF
FF
FF
FF
FF
FF
C0
FF
FF
FF
FF
FF
FF
FF
FF
FF
FF
FF
FF
FF
FF
FF
FF
D0
FF
FF
FF
FF
FF
FF
FF
FF
FF
FF
FF
FF
FF
FF
FF
FF
E0
FF
FF
FF
FF
FF
FF
FF
FF
FF
FF
FF
FF
FF
FF
FF
FF
F0
FF
FF
FF
FF
FF
FF
FF
FF
FF
FF
FF
FF
FF
FF
FF
FF
A
B
C
D
E
F
2)HD HDMI EDID data
00
0
1
2
3
4
5
6
7
8
9
00
FF
FF
FF
FF
FF
FF
00
1E
6D
01
03
80
10
09
78
0A
EE
91
A3
54
4C
99
26
54
A1
08
00
81
C0
61
40
45
40
31
40
01
01
10
<Caution> Never connect HDMI & D-sub cable when EDID
download
c
NO
Item
CMD1 CMD2 Data0
Enter download Download
Mode
‘Mode In’
EDID data and
Download
A
A
0
0
0F
50
30
01
01
01
01
01
01
1B
21
50
A0
51
00
1E
30
48
88
40
35
00
A0
5A
00
00
00
1C
01
1D
00
72
51
D0
1E
20
50
6E
28
55
00
A0
5A
00
00
00
1E
00
00
00
FD
00
3A
60
3E
1F
46
10
00
0A
20
20
20
20
20
20
80
02
03
20
F1
4E
10
1F
84
13
05
14
03
02
90
22
15
01
26
15
07
50
09
57
07
80
18
71
1C
16
20
58
2C
25
00
A0
5A
00
00
01
1D
00
80
51
D0
0C
20
40
80
35
00
A0
5A
B0
Carry the command.
A
E
00 10 Automatically Download
Model option
(The use of a internal pattern)
download
00
9E
01
e
20
21
f
00
00
00
1E
8C
0A
D0
8A
20
E0
2D
10
10
3E
96
00
D0
A0
5A
00
00
00
18
02
3A
80
18
71
38
2D
40
58
2C
E0
45
00
A0
5A
00
00
00
1E
01
1D
80
D0
72
1C
16
20
F0
10
2C
25
80
A0
5A
00
00
00
9E
00
00
00
00
00
e
* Detail EDID Options are below
ⓐ Product ID
* Caution
1) Use the proper signal cable for EDID Download.
- Analog EDID : Pin3 exists
- Digital EDID : Pin3 exists
2) Never connect HDMI & D-sub Cable at the same time.
3) Use the proper cables below for EDID Writing.
4) Download HDMI1, HDMI2, separately because HDMI1 is
different from HDMI2.
D-sub to D-sub
f
12
C0
- Manual Download
For Analog EDID
d
d
A0
When transfer the ‘Mode In’,
b
20
70
* Edid data and Model option download (RS232)
a
For HDMI EDID
DVI-D to HDMI or HDMI to HDMI
Model Name
HEX
EDID Table
DDC Function
HD Model
0000
00 00
Analog/Digital
ⓑ Serial No: Controlled on production line.
ⓒ Month, Year: Controlled on production line:
ex) Monthly : ‘02’ -> ‘02’
Year : ‘2009’ -> ‘13’
ⓓ Model Name(Hex):
MODEL
MODEL NAME(HEX)
LG TV
00 00 00 FC 00 4C 47 20 54 56 0A 20 20 20 20 20 20 20
ⓔ Checksum: Changeable by total EDID data.
EDID C/S data
HD
HDMI
RGB
CD
Check sum
Block 0
B4
(Hex)
Block 1
65(HDMI1)
55(HDMI2)
Item
Condition
Data(Hex)
Manufacturer ID
GSM
1E6D
Version
Digital : 1
01
Revision
Digital : 3
03
Copyright ©2011 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
45(HDMI3)
ⓕ Vendor Specific(HDMI)
- 11 -
INPUT
MODEL NAME(HEX)
HDMI1
65030C001000
HDMI2
65030C002000
HDMI3
65030C003000
LGE Internal Use Only
4.5. V-COM Adjust(Only LGD(M+S) Module)
5. Model name & Serial number D/L
- Why need Vcom adjustment?
A The Vcom (Common Voltage) is a Reference Voltage of
Liquid Crystal Driving.
-> Liquid Crystal need for Polarity Change with every frame.
• Press “Power on” key of service remote control.
(Baud rate : 115200 bps)
• Connect RS232 Signal Cable to RS-232 Jack.
• Write Serial number by use RS-232.
• Must check the serial number at the Diagnostics of SET UP
menu. (Refer to below.)
Circuit Block
Ga mma
Re f e r e nce V o ltage
Data (R ,G,B ) &
Con t rol si gnal
Da t a I n p u t
Y
S
In t e r f a ce
S
Ti m i n g
Co nt r o ll e r
M
Po w e r
Blo ck
V COM
Gat e Driv e IC
Power
Po w e rInput
I nput
Cont rol si gnal
Gamm a Reference
Volta ge
So urce D r i v e I C
T
E
Data (R ,G,B ) & C ont ro l s ignal
Column Line
Pane l
V COM
CLC
CST
Liquid
Crys tal
Row Li ne TFT
V COM
5.1. Signal TABLE
CMD
- Adjust sequence
· Press the PIP key of the Adjustment remote control.(This
PIP key is hot key to enter the VCOM adjusting mode.)
(Or After enter Service Mode by pushing “ADJ” key, then
Enter V-Com Adjust mode by pushing “G” key at “10. VCom”)
· As pushing the right or the left key on the remote control,
and find the V-COM value which is no or minimized the
Flicker. (If there is no flicker at default value, Press the exit
key and finish the VCOM adjustment.)
· Push the “OK” key to store value. Then the message
“Saving OK” is pop.
· Press the exit key to finish VCOM adjustment.
LENGTH
CMD
LENGTH
ADH
ADL
Data
CS
Delay
ADH
ADL
DATA_1
...
Data_n
CS
DELAY
: A0h
: 85~94h (1~16 bytes)
: EEPROM Sub Address high (00~1F)
: EEPROM Sub Address low (00~FF)
: Write data
: CMD+LENGTH+ADH+ADL+Data_1+…+Data_n
: 20ms
5.2. Command Set
No.
Adjust mode
CMD(hex)
LENGTH(hex)
Description
1
EEPROM WRITE
A0h
84h+n
n-bytes Write(n=1~16)
* Description
FOS Default write : <7mode data> write
Vtotal, V_Frequency, Sync_Polarity, Htotal, Hstart, Vstart, 0,
Phase
Data write: Model name and Serial number write in EEPROM,.
5.3. Method & notice
(Visual Adjust and control the Voltage level)
4.6. Outgoing condition Configuration
- When pressing IN-STOP key by Service remote control, Red
LED are blinked alternatively. And then automatically turn off.
(Must not AC power OFF during blinking)
A. Serial number D/L is using of scan equipment.
B. Setting of scan equipment operated by Manufacturing
Technology Group.
C. Serial number D/L must be conformed when it is produced
in production line, because serial number D/L is mandatory
by D-book 4.0.
4.7. Hi-pot test
Confirm whether is normal or not when between power
board’s ac block and GND is impacted on 1.5 kV(dc) or 2.2
kV(dc) for one second.
Copyright ©2011 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
- 12 -
LGE Internal Use Only
* Manual Download (Model Name and Serial Number)
If the TV set is downloaded by OTA or Service man, sometimes
model name or serial number is initialized.(Not always)
There is impossible to download by bar code scan, so It need
Manual download.
1) Press the ‘Instart’ key of Adjustment remote control.
2) Go to the menu ‘5.Model Number D/L’ like below photo.
3) Input the Factory model name(ex 42LD450-ZA) or Serial
number like photo.
6. CI+ Key Download method
(1) Download Procedure
1) Press “Power on” key of a service remote control.
(Baud rate : 115200 bps)
2) Connect RS232-C Signal Cable.
3) Write CI+ Key through RS-232-C.
4) Check whether the key was downloaded or not at ‘In
Start’ menu.(Refer to below).
4) Check the model name Instart menu. -> Factory name
displayed. (ex 42LD450-ZA)
5) Check the Diagnostics. (DTV country only) -> Buyer model
displayed. (ex 42LD450)
=> Check the Download to CI+ Key value in LGset.
1. Check the method of CI+ Key value.
a. Check the method on Instart menu.
b. Check the method of RS232C Command.
1) Into the main assembly mode (RS232 : aa 00 00)
CMD 1
CMD 2
A
A
Data 0
0
0
2) Check the key download for transmitted command.
(RS232 : ci 00 10)
CMD 1
CMD 2
C
I
Data 0
1
0
3) Result value
- Normally status for download : OKx
- Abnormally status for download : NGx
2. Check the method of CI+ Key value. (RS232)
1) Into the main assembly mode (RS232 : aa 00 00)
CMD 1
CMD 2
A
A
Data 0
0
0
2) Check the method of CI+ key by command.
(RS232 : ci 00 20)
CMD 1
CMD 2
C
I
Data 0
2
0
3) Result value
i 01 OK 1d1852d21c1ed5dcx
CI+ key Value
Copyright ©2011 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
- 13 -
LGE Internal Use Only
PI_TS_DATA[0:7]
LED Panel
LVDS (8bit or 10 bit)
FE_TS_DATA[0]
LGDT1129
FPGA
IC1503
PKT_DATA[0]
FE_TS_DATA[0:7]
74LCX244
Buffer
IC1902
CI Slot
(P1902)
CI_TS_DATA[0:7]
CI_ADDR[0:7]
Serial Flash
IC1401
For Boot
PCM_A[0:7]
A_TMDQ[0:16]
TU_SIF
IF_AGC
TV/DTV_VOUT
Mstar S7
SC1_CVBS/R/G/B/FB_IN
- 14 -
COMPONENT
COMP_Y/Pb/pR
DSUB_H/VSYNC
(IC101)
SC1_L/R_IN, E_AM_AUDIO,AV_L/R_IN,
COMP_L/R_IN, PC_L/R_IN
LED Driver
uPD78F1164A
RS- 232C 5V
(IC1102)
Power SW
(12V On/Off)
LGE Internal Use Only
12V
MAX3232CDR
IC1100
I2C
EEPROM
M24M01-HRMN6
(IC104)
I2C
I2C
I2C SW
IC5005/5006
I2C
Head
Phone
Digital amp
(NTP7100)
IC501
NEC_TX/RX
USB_DM/DP USB
USB Power
MST_TX/RX
Speaker Out
Control
Up/Down
L/R
AQZ1073ATL-3
USB Power
IC402
HPD1/2, HDMI_CEC, 5V_HDMI 1/2
TMDS[0:7] ( Data, Clock (+/-))
MP5000
IC2202
EEPROM
CAT24WC08W-T
(HDCP)IC103
HP_L/ROUT
I2S
NEC Micom
DC/DC Conv.
(12V to 5V)
MP2305
IC2201
NAND Flash
HYNIX(2G)
IC102
PCM_A[0:7]
LGE101DC-R
DSUB_ R/G/B
RGB
DDR3 (1GB)
IC1202
SPDIF_OUT
Audio amp
(TPA3124D2)
IC1500
HDMI 1/2
SPDIF
L/R
Speaker Out
BLOCK DIAGRAM
TU_CVBS
F-SCART
LED Clock
DDR3 (2GB)
IC1201
B_TMDQ[0:16]
IF_N/P_MSTAR
Tuner
(TDTJS001D)
TU3702
Copyright ©2011 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
74LVC16244
Buffer
IC1501
301
LV1
200
521
400
- 15 -
560
511
120
810
510
A2
A31
A9
A10
910
* Stand Base
+ Body
* Set + Stand
900
LGE Internal Use Only
Many electrical and mechanical parts in this chassis have special safety-related characteristics. These
parts are identified by
in the Schematic Diagram and EXPLODED VIEW.
It is essential that these special safety parts should be replaced with the same components as
recommended in this manual to prevent X-RADIATION, Shock, Fire, or other Hazards.
Do not modify the original design without permission of manufacturer.
IMPORTANT SAFETY NOTICE
EXPLODED VIEW
540
Copyright
LG Electronics. Inc. All rights reserved.
Only for training and service purposes
300
IC102
HY27UF082G2B-TPCB
NAND FLASH MEMORY
S7M-PLUS_DivX_MS10
+3.3V_Normal
+3.3V_Normal
LGE107DC-RP [S7M+ DIVX/MS10]
R/B
RE
/PF_OE
CE
NC_7
NC_8
OPT
R108 1K
/PF_CE0
C101
0.1uF
VCC_1
+3.3V_Normal
VSS_1
R105
1K
NC_9
CLE
ALE
PF_ALE
WE
/PF_WE
WP
NC_12
NC_13
E
44
6
43
7
42
8
41
9
40
10
39
11
38
12
37
13
36
NC_14
NC_15
35
15
34
16
33
17
32
18
31
19
30
20
29
21
28
22
27
23
26
24
25
PCM_D[0-7]
<T3 CHIP Config(AUD_LRCH)>
NC_26
AR101
I/O7
PCM_A[7]
I/O6
PCM_A[6]
Boot from SPI flash : 1’b0
Boot from NOR flash : 1’b1
PCM_A[5]
I/O5
<T3 CHIP Config>
(AUD_SCK, AUD_MASTER_CLK, PWM1, PWM0)
PCM_A[4]
I/O4
22
NC_25
PCM_A[0-14]
MIPS_no_EJ_NOR8
MIPS_EJ1_NOR8
MIPS_EJ2_NOR8
B51_Secure_no scramble
B51_Sesure_scramble
NC_24
C102
10uF
NC_23
VCC_2
:
:
:
:
:
4’h3
4’h4
4’h5
4’hb
4’hc
(MIPS
(MIPS
(MIPS
(8051
(8051
as
as
as
as
as
No EJ PAD. Byte mode NAND flash.)
EJ use PAD1. Byte mode NAND flash.)
EJ use PAD2. Byte mode NAND flash.)
Internal SPI flash secure boot, no scramble)
Internal SPI flash secure boot with scarmble)
NC_20
AR102
I/O3
PCM_A[3]
I/O2
PCM_A[2]
I/O1
PCM_A[1]
I/O0
PCM_A[0]
AUD_MASTER_CLK
R148
56
22
NC_19
PCM_D[3]
AB18
PCM_D[4]
AC18
PCM_D[5]
AC19
PCM_D[6]
AC20
PCM_D[7]
AC21
V21
PCM_A[2]
Y22
PCM_A[3]
AA22
PCM_A[4]
R22
PCM_A[5]
R21
PCM_A[6]
T23
PCM_A[7]
T24
PCM_A[8]
AA23
PCM_A[9]
Y20
AB17
PCM_A[11]
AA21
PCM_A[12]
U23
PCM_A[13]
Y23
PCM_A[14]
W23
W21
Y21
/PCM_IOWR
R132
10K
V23
P23
/PCM_CD
R23
/PCM_WAIT
P22
PCM_RST
NC_6
RB
R
E
NC_7
NC_8
VDD_1
VSS_1
NC_9
NC_10
CL
AL
W
WP
NC_11
NC_12
NC_13
NC_14
NC_15
47
3
46
4
45
44
5
6
43
7
42
8
41
9
40
10
39
11
38
12
37
13
36
14
35
15
34
16
33
17
32
18
31
30
19
20
29
21
28
22
27
23
26
24
25
/PF_CE1
AB20
AA18
/PF_OE
NC_29
NC_27
22
AR103
/PF_WE
NC_28
AB21
PF_ALE
AB19
/PF_WP
AD17
/F_RB
AA19
NC_26
22
R134
I/O6
22
for SYSTEM/HDCP
EEPROM&URSA3
I/O4
R135
22
R136
S7_EEPROM_SDA
N23
RGB_DDC_SDA
RGB_DDC_SCL
VSS_2
N22
22
R138
22
A5
R139
22
B5
PWM0
K23
PWM1
K22
PWM2
G23
NC_22
R166
I/O3
DSUB_DET
I/O2
MODEL_OPT_3
B6
C8
C7
A6
GPIO7/PM1/PM_UART_TX
PCM_A11
GPIO8/PM2
PCM_A12
GPIO9/PM3
PCM_A13
GPIO10/PM4
PCM_A14
GPIO11/PM5/PM_UART_RX/INT1
PM_SPI_CS1/GPIO12/PM6
PM_SPI_WP1/GPIO13/PM7
PM_SPI_WP2/GPIO14/PM8/INT2
PCM_OE_N
GPIO15/PM9
PCM_WE_N
PM_SPI_CS2/GPIO16/PM10
PCM_IORD_N
GPIO17/PM11/INT3
PCM_IOWR_N
GPIO18/PM12/INT4
R103
L20
22
R110
M20
ERROR_OUT
G19
MODEL_OPT_0
F20
22
R100
F19
22
R101
MST_NEC_RX
MST_NEC_TX
PM_SPI_CK/GPIO1
PCM_IRQA_N
GPIO0/PM_SPI_CZ
PCM_CD_N
PM_SPI_DI/GPIO2
PCM_WAIT_N
PM_SPI_DO/GPIO3
USB1_OCD
D7
USB1_CTL
E11
HP_DET
G9
CONTROL_ATTEN
F9
MODEL_OPT_6
C5
E8
EXT_VOL+
EXT_VOL-
SC1/COMP1_DET
G20
33
MODEL_OPT_1
R146
E9
/FLASH_WP
MODEL_OPT_2
F7
F6
TUNER_RESET
D8
DEMOD_RESET
G12
F10
D9
PCM_CE_N
TS0_CLK
PCM_PF_CE0Z
TS0_VLD
PCM_PF_CE1Z
TS0_SYNC
PCM_PF_OEZ
PCM_PF_WEZ
TS0_D0
PCM_PF_ALE
TS0_D1
PCM_PF_AD[15]
TS0_D2
PCM_PF_RBZ
TS0_D3
TS0_D5
UART_TX2/GPIO65
TS0_D6
UART_RX2/GPIO64
TS0_D7
33
R147
SPI_SCK
D11
E10
D10
33
R151
/SPI_CS
SPI_SDI
for SERIAL FLASH
SPI_SDO
AA5
CI_TS_CLK
CI_TS_VAL
CI_TS_SYNC
AA10
CI_TS_DATA[0-7]
AB5
CI_TS_DATA[0]
AC4
CI_TS_DATA[1]
Y6
CI_TS_DATA[2]
AA6
CI_TS_DATA[3]
W6
CI_TS_DATA[4]
AA7
CI_TS_DATA[5]
Y9
CI_TS_DATA[6]
AA8
CI_TS_DATA[7]
FE_TS_CLK
FE_TS_VAL_ERR
FE_TS_SYNC
AC5
DDCR_DA/GPIO71
TS1_CLK
DDCR_CK/GPIO72
TS1_VLD
AC6
from CI SLOT
Internal demod out
/External demod in
FE_TS_DATA[0-7]
AB6
TS1_SYNC
DDCA_DA/UART0_TX
TS1_D0
TS1_D2
PWM0/GPIO66
TS1_D3
PWM1/GPIO67
TS1_D4
PWM2/GPIO68
TS1_D5
PWM3/GPIO69
TS1_D6
PWM4/GPIO70
TS1_D7
AC10
FE_TS_DATA[0]
AB10
FE_TS_DATA[1]
AC9
FE_TS_DATA[2]
AB9
FE_TS_DATA[3]
AC8
FE_TS_DATA[4]
AB8
FE_TS_DATA[5]
AC7
FE_TS_DATA[6]
AB7
FE_TS_DATA[7]
D12
SAR0/GPIO31
MPIF_CLK
SAR1/GPIO32
MPIF_CS_N
SAR2/GPIO33
D14
E14
SAR3/GPIO34
Delete /PIF_SPI_CS
R160
1K
MPIF_BUSY
E12
NC_18
F12
D13
E13
MPIF_D3
NC_17
S7R
NC_16
S7MR
S7R_DivX
S7R_DivX_MS10
S7R_RM
IC101-*2
LGE101C-R [S7R MS10]
NC_48
LVACLKP/LLV6P/BLUE[3]
NC_78
LVACLKN/LLV6N/BLUE[2]
NC_64
LVA0P/LLV3P/BLUE[9]
NC_50
LVA0N/LLV3N/BLUE[8]
NC_45
LVA1P/LLV4P/BLUE[7]
NC_34
LVA1N/LLV4N/BLUE[6]
NC_77
LVA2P/LLV5P/BLUE[5]
NC_65
LVA2N/LLV5N/BLUE[4]
NC_62
LVA3P/LLV7P/BLUE[1]
NC_33
LVA3N/LLV7N/BLUE[0]
NC_47
LVA4P/LLV8P
NC_46
LVA4N/LLV8N
W26
AE1
W25
AF16
U26
AF1
U25
AE3
U24
AD14
V26
AD3
V25
AF15
V24
W24
AF2
AE15
Y26
AD2
Y25
AD16
Y24
AD15
AE16
IC101-*3
LGE101DC-R-1 [S7R DIVX]
NC_48
LVACLKP/LLV6P/BLUE[3]
NC_78
LVACLKN/LLV6N/BLUE[2]
NC_64
LVA0P/LLV3P/BLUE[9]
NC_50
LVA0N/LLV3N/BLUE[8]
NC_45
LVA1P/LLV4P/BLUE[7]
NC_34
LVA1N/LLV4N/BLUE[6]
NC_77
LVA2P/LLV5P/BLUE[5]
NC_65
LVA2N/LLV5N/BLUE[4]
NC_62
LVA3P/LLV7P/BLUE[1]
NC_33
LVA3N/LLV7N/BLUE[0]
NC_47
LVA4P/LLV8P
NC_46
LVA4N/LLV8N
LVB0P/RLV6P/RED[1]
AF3
AD1
NC_66
LVB0N/RLV6N/RED[0]
NC_76
LVB1P/RLV7P/GREEN[9]
NC_32
LVB1N/RLV7N/GREEN[8]
NC_44
LVB2N/RLV8N/GREEN[6]
LVB2P/RLV8P/GREEN[7]
AD13
AE14
AE13
NC_61
NC_60
LVB3P/LLV1P/GREEN[3]
LVB3N/LLV1N/GREEN[2]
LVB4P/LLV0P/GREEN[1]
AF4
AD4
NC_67
RLV3P/RED[7]
NC_35
RLV3N/RED[6]
NC_49
RLV0N/LHSYNC
RLV0P/LVSYNC
RLV2P/RED[9]
AF8
NC_71
RLV1P/LDE
NC_40
RLV2N/RED[8]
RLV4P/RED[5]
AE9
AF9
NC_56
RLV4N/RED[4]
NC_72
RLV5P/RED[3]
AD12
AE5
EEPROM_1MBIT_ATMEL
AF12
AF5
AE12
IC104-*1
AT24C1024BN-SH-T
NC_53
TCON15/SCAN_BLK1
TCON18/CS7/GCLK5
AD11
AD7
AD10
AE7
AF10
AD8
TCON19/CS8/GCLK6
NC_43
TCON11/CS5/HCON
NC_52
TCON10/CS4/OPT_N
NC_75
TCON9/CS3/OPT_P
NC_68
TCON16/WPWM
NC_59
TCON12/DPM
TCON1/STV/GSP/VST
AE10
AF7
AC24
AE14
AD26
AE13
NC_57
TCON5/TP/SOE
NC_70
TCON14/SACN_BLK
NC_54
TCON20/CS9/VGH_EVEN
NC_73
TCON13/LEDON
TCON17/CS6/GCLK4
LVB2P/RLV8P/GREEN[7]
NC_61
AD23
AF4
AE23
AD4
AE26
AE25
1
8
VCC
NC_19
NC_67
RLV3P/RED[7]
RLV3N/RED[6]
NC_49
RLV0N/LHSYNC
RLV0P/LVSYNC
AE2
AF26
RLV1N/LCK
AE24
AF8
AF24
AD9
AF23
AD22
AE9
AE22
AF9
AF22
RLV2P/RED[9]
NC_71
RLV1P/LDE
NC_40
RLV2N/RED[8]
RLV4P/RED[5]
NC_56
RLV4N/RED[4]
NC_72
RLV5P/RED[3]
NC_31
NC_55
NC_29
NC_12
NC_21
Y11
A1
2
7
WP
GND_105
AE19
AE6
AD21
AF11
AD6
AD12
AD20
AE5
AE20
AF12
AF20
AF5
AF19
AE12
AD18
AE18
AE10
AF18
AF7
AD11
AD10
AB23
AE7
AC23
AF10
AC22
AD8
TCON3/OE/GOE/GCLK2
NC_53
TCON15/SCAN_BLK1
TCON18/CS7/GCLK5
NC_37
TCON19/CS8/GCLK6
NC_43
TCON11/CS5/HCON
NC_52
TCON10/CS4/OPT_N
NC_75
TCON9/CS3/OPT_P
NC_68
TCON16/WPWM
NC_59
TCON12/DPM
TCON1/STV/GSP/VST
NC_57
TCON5/TP/SOE
NC_70
TCON14/SACN_BLK
GND
4
5
LVACLKN/LLV6N/BLUE[2]
LVA0P/LLV3P/BLUE[9]
LVA0N/LLV3N/BLUE[8]
NC_45
LVA1P/LLV4P/BLUE[7]
NC_34
LVA1N/LLV4N/BLUE[6]
NC_77
LVA2P/LLV5P/BLUE[5]
NC_65
LVA2N/LLV5N/BLUE[4]
NC_62
LVA3P/LLV7P/BLUE[1]
NC_33
LVA3N/LLV7N/BLUE[0]
NC_47
LVA4P/LLV8P
NC_46
LVA4N/LLV8N
NC_54
TCON20/CS9/VGH_EVEN
NC_73
TCON13/LEDON
TCON17/CS6/GCLK4
AA26
AF3
AF14
AB26
AD1
AB25
AB24
LVB0P/RLV6P/RED[1]
NC_66
LVB0N/RLV6N/RED[0]
NC_76
LVB1P/RLV7P/GREEN[9]
NC_32
LVB1N/RLV7N/GREEN[8]
NC_44
LVB2N/RLV8N/GREEN[6]
LVB2P/RLV8P/GREEN[7]
AD13
AC24
AE14
AD26
AE13
NC_61
LVB3P/LLV1P/GREEN[3]
NC_60
AD25
LVB3N/LLV1N/GREEN[2]
LVB4P/LLV0P/GREEN[1]
AD24
NC_19
Y11
Y19
NC_31
NC_55
NC_29
NC_12
NC_21
GND_105
AA11
AD23
AF4
AE23
AD4
AE26
AE25
NC_67
RLV3P/RED[7]
NC_35
RLV3N/RED[6]
NC_49
RLV0N/LHSYNC
RLV0P/LVSYNC
AE2
AF26
RLV1N/LCK
AF25
AE24
AF8
AF24
AD9
AF23
AD22
AE9
AE22
AF9
AF22
RLV2P/RED[9]
NC_71
RLV1P/LDE
NC_40
RLV2N/RED[8]
RLV4P/RED[5]
NC_56
RLV4N/RED[4]
NC_72
RLV5P/RED[3]
AF2
AE15
AD2
AD16
AD15
Y24
AE16
AE19
AE6
AD21
AF11
AD6
AD12
AD20
AE5
AE20
AF12
AF20
AF5
AF19
AE12
AD18
AE18
AE10
AF18
AF7
AD11
AD10
AB23
AE7
AC23
AF10
AC22
AD8
LVA1P/LLV4P/BLUE[7]
NC_34
LVA1N/LLV4N/BLUE[6]
NC_77
LVA2P/LLV5P/BLUE[5]
NC_65
LVA2N/LLV5N/BLUE[4]
NC_62
LVA3P/LLV7P/BLUE[1]
NC_33
LVA3N/LLV7N/BLUE[0]
NC_47
LVA4P/LLV8P
NC_46
LVA4N/LLV8N
TCON3/OE/GOE/GCLK2
NC_53
TCON15/SCAN_BLK1
NC_74
TCON18/CS7/GCLK5
NC_37
TCON19/CS8/GCLK6
NC_43
TCON11/CS5/HCON
NC_52
TCON10/CS4/OPT_N
NC_75
TCON9/CS3/OPT_P
NC_68
TCON16/WPWM
NC_59
TCON12/DPM
TCON1/STV/GSP/VST
NC_57
TCON5/TP/SOE
NC_70
TCON14/SACN_BLK
AF3
AF14
AD1
AB26
AB25
AC24
AE14
AD26
AE13
NC_54
TCON20/CS9/VGH_EVEN
NC_73
TCON13/LEDON
TCON17/CS6/GCLK4
LVB0N/RLV6N/RED[0]
LVB1P/RLV7P/GREEN[9]
NC_32
LVB1N/RLV7N/GREEN[8]
NC_44
LVB2N/RLV8N/GREEN[6]
LVB2P/RLV8P/GREEN[7]
NC_61
LVB3P/LLV1P/GREEN[3]
NC_60
AD25
LVB3N/LLV1N/GREEN[2]
LVB4P/LLV0P/GREEN[1]
AD24
NC_19
AD23
AF4
AE23
AD4
AE26
NC_67
RLV3P/RED[7]
NC_35
RLV3N/RED[6]
NC_49
RLV0N/LHSYNC
RLV0P/LVSYNC
AE2
AE25
AF26
RLV1N/LCK
AF25
AE24
AF8
AF24
AD9
AF23
AD22
AE9
AE22
AF9
AF22
RLV2P/RED[9]
NC_71
RLV1P/LDE
NC_40
RLV2N/RED[8]
RLV4P/RED[5]
NC_56
RLV4N/RED[4]
NC_72
RLV5P/RED[3]
AF2
AE15
AD2
AD16
AD15
Y24
AE16
NC_31
AE8
NC_55
NC_29
NC_12
NC_21
GND_105
AE19
AE6
AD21
AF11
AE21
AD6
AD12
AF21
AD20
AE5
AE20
AF12
AF20
AF5
AF19
AE12
AD18
AE18
AE10
AF18
AF7
AD11
AD10
AB23
AE7
AC23
AF10
AC22
AD8
TCON3/OE/GOE/GCLK2
NC_53
TCON15/SCAN_BLK1
NC_74
TCON18/CS7/GCLK5
NC_37
TCON19/CS8/GCLK6
NC_43
TCON11/CS5/HCON
NC_52
TCON10/CS4/OPT_N
NC_75
TCON9/CS3/OPT_P
NC_68
TCON16/WPWM
NC_59
TCON12/DPM
TCON1/STV/GSP/VST
NC_57
TCON5/TP/SOE
NC_70
TCON14/SACN_BLK
NC_24
LVA1N/LLV4N/BLUE[6]
LVA2P/LLV5P/BLUE[5]
NC_65
LVA2N/LLV5N/BLUE[4]
NC_62
LVA3P/LLV7P/BLUE[1]
NC_33
LVA3N/LLV7N/BLUE[0]
NC_47
LVA4P/LLV8P
NC_46
LVA4N/LLV8N
AF3
AF14
AD1
AB26
AB25
AC24
AE14
AD26
AE13
NC_54
TCON20/CS9/VGH_EVEN
NC_73
TCON13/LEDON
TCON17/CS6/GCLK4
LVB0N/RLV6N/RED[0]
LVB1P/RLV7P/GREEN[9]
NC_32
LVB1N/RLV7N/GREEN[8]
NC_44
LVB2N/RLV8N/GREEN[6]
LVB2P/RLV8P/GREEN[7]
NC_61
LVB3P/LLV1P/GREEN[3]
NC_60
AD25
LVB3N/LLV1N/GREEN[2]
LVB4P/LLV0P/GREEN[1]
AD24
AA14
NC_19
AC15
AD23
AF4
AE23
AD4
AE26
NC_67
RLV3P/RED[7]
NC_35
RLV3N/RED[6]
NC_49
RLV0N/LHSYNC
RLV0P/LVSYNC
AE2
AE25
AF26
RLV1N/LCK
AF25
AE24
AF8
AF24
AD9
AF23
AD22
AE9
AE22
AF9
AF22
RLV2P/RED[9]
NC_71
RLV1P/LDE
NC_40
RLV2N/RED[8]
RLV4P/RED[5]
NC_56
RLV4N/RED[4]
NC_72
RLV5P/RED[3]
NC_31
AE8
Y11
AD2
AD15
Y24
NC_55
NC_29
NC_12
NC_21
GND_105
AE16
AE19
AE6
AD21
AF11
AE21
AD6
AD12
AF21
AD20
AE5
AE20
AF12
AF20
AF5
AF19
AE12
AD18
AE18
AE10
AF18
AF7
AD11
AD10
AB23
AE7
AC23
AF10
AC22
AD8
TCON3/OE/GOE/GCLK2
NC_53
TCON15/SCAN_BLK1
NC_74
TCON18/CS7/GCLK5
NC_37
TCON19/CS8/GCLK6
NC_43
TCON11/CS5/HCON
NC_52
TCON10/CS4/OPT_N
NC_75
TCON9/CS3/OPT_P
NC_68
TCON16/WPWM
NC_59
TCON12/DPM
TCON1/STV/GSP/VST
NC_57
TCON5/TP/SOE
NC_70
TCON14/SACN_BLK
A1M/RLV1N/RED[6]
A2P/RLV2P/RED[5]
A2M/RLV2N/RED[4]
FRC_DDR3_A8/DDR2_A2
A3P/RLV4P/RED[1]
FRC_DDR3_A9/DDR2_A9
A3M/RLV4N/RED[0]
FRC_DDR3_A10/DDR2_A11
A4P/RLV5P/GREEN[9]
FRC_DDR3_A11/DDR2_A4
A4M/RLV5N/GREEN[8]
AA26
AA25
AF3
AA24
AF14
AD1
AB26
NC_54
TCON20/CS9/VGH_EVEN
NC_73
TCON13/LEDON
TCON17/CS6/GCLK4
B0M/RLV6N/GREEN[6]
B1P/RLV7P/GREEN[5]
FRC_DDR3_BA2/DDR2_A12
B1M/RLV7N/GREEN[4]
FRC_DDR3_MCLK/DDR2_MCLK
B2M/RLV8N/GREEN[2]
B2P/RLV8P/GREEN[3]
AD13
AC24
AE14
AD26
AE13
AD25
FRC_DDR3_CKE/DDR2_RASZ
B3P/TCON11/BLUE[9]
FRC_DDR3_MCLKZ/DDR2_MCLKZ
B3M/TCON10/BLUE[8]
B4P/TCON9/BLUE[7]
AD24
AA14
NC_19
AC15
NC_31
AE8
Y11
AD3
AF15
W24
AF2
AE15
Y26
AD2
Y25
AD16
Y24
AD15
AE16
NC_55
NC_29
NC_12
NC_21
GND_105
AD23
AF4
AE23
AD4
AE26
FRC_DDR3_CASZ/DDR2_CKE
CCKP/LLV3P
FRC_DDR3_WEZ/DDR2_BA0
CCKM/LLV3N
C0P/LLV0P/BLUE[5]
AE2
AE25
FRC_DDR3_RESETB/DDR2_A3
AF26
C0M/LLV0N/BLUE[4]
C1P/LLV1P/BLUE[3]
AF25
AE24
AF8
AF24
AD9
C1M/LLV1N/BLUE[2]
AF23
AD22
AE9
AE22
AF9
FRC_DDR3_DQSL/DDR2_DQS0
C2P/LLV2P/BLUE[1]
FRC_DDR3_DQSLB/DDR2_DQSB0
C2M/LLV2N/BLUE[0]
C3P/LLV4P
AF22
FRC_DDR3_DQSU/DDR2_DQS1
C3M/LLV4N
FRC_DDR3_DQSUB/DDR2_DQSB1
C4P/LLV5P
AE19
AE6
AD21
AF11
AE21
AD6
A1M/RLV1N/RED[6]
A2P/RLV2P/RED[5]
FRC_DDR3_A7/DDR2_A5
A2M/RLV2N/RED[4]
FRC_DDR3_A8/DDR2_A2
A3P/RLV4P/RED[1]
FRC_DDR3_A9/DDR2_A9
A3M/RLV4N/RED[0]
FRC_DDR3_A10/DDR2_A11
A4P/RLV5P/GREEN[9]
FRC_DDR3_A11/DDR2_A4
A4M/RLV5N/GREEN[8]
DCKP/TCON5
AE5
AF12
AF20
AF5
AF19
AE12
AE18
AE10
AF7
AD11
AB23
AE7
AC23
AF10
AD8
D0P/LLV6P
D0M/LLV6N
FRC_DDR3_DQL3/DDR2_DQ2
D1P/LLV7P
FRC_DDR3_DQL4/DDR2_DQ4
D1M/LLV7N
D2P/LLV8P
FRC_DDR3_DQL6/DDR2_DQ3
D2M/LLV8N
FRC_DDR3_DQL7/DDR2_DQ5
D3P/TCON3
D3M/TCON2
FRC_DDR3_DQU0/DDR2_DQ8
D4P/TCON1
FRC_DDR3_DQU1/DDR2_DQ14
D4M/TCON0
AF3
AF14
AB26
FRC_DDR3_DQU4/DDR2_DQ15
FRC_DDR3_DQU5/DDR2_DQ9
AD1
AB25
AB24
AC24
AE14
AD26
AE13
GPIO1/TCON14/VSYNC/VDD_EVEN
GPIO2/TCON7/LDE/GCLK4
GPIO3/TCON6/LCK/GCLK2
B0M/RLV6N/GREEN[6]
B1P/RLV7P/GREEN[5]
FRC_DDR3_BA2/DDR2_A12
B1M/RLV7N/GREEN[4]
FRC_DDR3_MCLK/DDR2_MCLK
B2M/RLV8N/GREEN[2]
B2P/RLV8P/GREEN[3]
FRC_DDR3_CKE/DDR2_RASZ
B3P/TCON11/BLUE[9]
FRC_DDR3_MCLKZ/DDR2_MCLKZ
B3M/TCON10/BLUE[8]
B4P/TCON9/BLUE[7]
FRC_GPIO1
AD23
AF4
AE23
AD4
AE26
AE25
FRC_DDR3_CASZ/DDR2_CKE
CCKP/LLV3P
FRC_DDR3_WEZ/DDR2_BA0
CCKM/LLV3N
C0P/LLV0P/BLUE[5]
AE2
FRC_DDR3_RESETB/DDR2_A3
AF26
C0M/LLV0N/BLUE[4]
C1P/LLV1P/BLUE[3]
AF25
AE24
AF8
AF24
AD9
AF23
AD22
AE9
AE22
AF9
AF22
C1M/LLV1N/BLUE[2]
FRC_DDR3_DQSL/DDR2_DQS0
C2P/LLV2P/BLUE[1]
FRC_DDR3_DQSLB/DDR2_DQSB0
C2M/LLV2N/BLUE[0]
C3P/LLV4P
FRC_DDR3_DQSU/DDR2_DQS1
C3M/LLV4N
FRC_DDR3_DQSUB/DDR2_DQSB1
C4P/LLV5P
FRC_GPIO9/UART_TX
AE8
FRC_DDR3_NC/DDR2_DQM0
AA16
Y11
AA15
Y19
FRC_REXT
FRC_TESTPIN
AE19
AE6
AD21
AF11
AE21
AD6
AF21
AD12
AD20
AE5
AE20
AF12
AF20
AF5
AF19
AE12
AD18
AE18
AE10
AF18
AF7
AD11
AD10
AB23
AE7
AC23
AF10
AC22
AD8
DCKP/TCON5
FRC_DDR3_DQL0/DDR2_DQ6
DCKM/TCON4
FRC_DDR3_DQL1/DDR2_DQ0
D0P/LLV6P
FRC_DDR3_DQL2/DDR2_DQ1
D0M/LLV6N
FRC_DDR3_DQL3/DDR2_DQ2
D1P/LLV7P
FRC_DDR3_DQL4/DDR2_DQ4
D1M/LLV7N
FRC_DDR3_DQL5/DDR2_NC
D2P/LLV8P
FRC_DDR3_DQL6/DDR2_DQ3
D2M/LLV8N
FRC_DDR3_DQL7/DDR2_DQ5
D3P/TCON3
D3M/TCON2
FRC_DDR3_DQU0/DDR2_DQ8
D4P/TCON1
FRC_DDR3_DQU1/DDR2_DQ14
D4M/TCON0
FRC_DDR3_DQU5/DDR2_DQ9
GPIO1/TCON14/VSYNC/VDD_EVEN
FRC_DDR3_DQU6/DDR2_DQ10
GPIO2/TCON7/LDE/GCLK4
GPIO3/TCON6/LCK/GCLK2
AF16
AF1
AE3
AD14
AD3
AF15
AF2
EEPROM
AE15
AD2
AD16
AD15
IC103-*1
CAT24C08WI-GT3-H-RECV(TV)
AE16
FRC_DDR3_A0/DDR2_NC
ACKP/RLV3P/RED[3]
FRC_DDR3_A1/DDR2_A6
ACKM/RLV3N/RED[2]
FRC_DDR3_A2/DDR2_A7
A0P/RLV0P/RED[9]
FRC_DDR3_A3/DDR2_A1
A0M/RLV0N/RED[8]
FRC_DDR3_A4/DDR2_CASZ
A1P/RLV1P/RED[7]
FRC_DDR3_A5/DDR2_A10
A1M/RLV1N/RED[6]
FRC_DDR3_A6/DDR2_A0
A2P/RLV2P/RED[5]
FRC_DDR3_A7/DDR2_A5
FRC_DDR3_A8/DDR2_A2
FRC_DDR3_A9/DDR2_A9
FRC_DDR3_A10/DDR2_A11
FRC_DDR3_A11/DDR2_A4
A2M/RLV2N/RED[4]
A3P/RLV4P/RED[1]
A3M/RLV4N/RED[0]
A4P/RLV5P/GREEN[9]
HDCP_EEPROM_CATALYST_OLD
IC103
CAT24WC08W-T
NC_2
C107
0.1uF
VCC
A2
2
3
7
6
WP
SCL
FRC_GPIO1
FRC_GPIO9/UART_TX
AE8
FRC_DDR3_NC/DDR2_DQM0
AA16
Y11
AA15
Y19
IC104
M24M01-HRMN6TP
5
AD1
FRC_DDR3_BA0/DDR2_BA2
B0M/RLV6N/GREEN[6]
FRC_DDR3_BA1/DDR2_ODT
B1P/RLV7P/GREEN[5]
FRC_DDR3_BA2/DDR2_A12
B1M/RLV7N/GREEN[4]
FRC_DDR3_MCLK/DDR2_MCLK
B2M/RLV8N/GREEN[2]
B2P/RLV8P/GREEN[3]
AD13
AE14
AE13
FRC_DDR3_CKE/DDR2_RASZ
B3P/TCON11/BLUE[9]
FRC_DDR3_MCLKZ/DDR2_MCLKZ
B3M/TCON10/BLUE[8]
B4P/TCON9/BLUE[7]
AD4
SDA
FRC_DDR3_CASZ/DDR2_CKE
FRC_DDR3_WEZ/DDR2_BA0
1
8
2
7
VCC
C1M/LLV1N/BLUE[2]
AF8
AD9
FRC_DDR3_DQSL/DDR2_DQS0
C2P/LLV2P/BLUE[1]
FRC_DDR3_DQSLB/DDR2_DQSB0
C2M/LLV2N/BLUE[0]
C3P/LLV4P
AE9
AF9
FRC_DDR3_DQSU/DDR2_DQS1
FRC_DDR3_DQSUB/DDR2_DQSB1
E1
EEPROM_SCL
W24
AE15
Y26
AD2
Y25
AD16
Y24
AD15
AE16
FRC_DDR3_A1/DDR2_A6
ACKM/RLV3N/RED[2]
FRC_DDR3_A2/DDR2_A7
A0P/RLV0P/RED[9]
FRC_DDR3_A3/DDR2_A1
A0M/RLV0N/RED[8]
FRC_DDR3_A4/DDR2_CASZ
A1P/RLV1P/RED[7]
FRC_DDR3_A5/DDR2_A10
A1M/RLV1N/RED[6]
FRC_DDR3_A6/DDR2_A0
A2P/RLV2P/RED[5]
FRC_DDR3_A7/DDR2_A5
FRC_DDR3_A8/DDR2_A2
FRC_DDR3_A9/DDR2_A9
FRC_DDR3_A10/DDR2_A11
FRC_DDR3_A11/DDR2_A4
A2M/RLV2N/RED[4]
A3P/RLV4P/RED[1]
A3M/RLV4N/RED[0]
A4P/RLV5P/GREEN[9]
AF6
AD12
AE5
E2
3
A0’h
6
AF12
SCL
R111
22
AF5
EEPROM_SCL
AE12
AD7
4
5
AD10
SDA
R112
C104
8pF
OPT
C106
8pF
OPT
22
AE7
EEPROM_SDA
AF10
AD8
AF3
AF14
AB26
FRC_DDR3_DQL2/DDR2_DQ1
FRC_DDR3_DQL3/DDR2_DQ2
FRC_DDR3_DQL5/DDR2_NC
FRC_DDR3_DQL6/DDR2_DQ3
D0M/LLV6N
D1P/LLV7P
D1M/LLV7N
D2P/LLV8P
D2M/LLV8N
D3P/TCON3
D3M/TCON2
FRC_DDR3_DQU0/DDR2_DQ8
FRC_DDR3_DQU1/DDR2_DQ14
AC24
AE14
AD26
AE13
AD25
D4P/TCON1
AD23
AF4
AE23
FRC_DDR3_DQU5/DDR2_DQ9
GPIO1/TCON14/VSYNC/VDD_EVEN
GPIO2/TCON7/LDE/GCLK4
GPIO3/TCON6/LCK/GCLK2
B2P/RLV8P/GREEN[3]
FRC_DDR3_CKE/DDR2_RASZ
B3P/TCON11/BLUE[9]
FRC_DDR3_MCLKZ/DDR2_MCLKZ
B3M/TCON10/BLUE[8]
AD4
AE25
FRC_DDR3_CASZ/DDR2_CKE
FRC_DDR3_WEZ/DDR2_BA0
FRC_GPIO1
FRC_DDR3_RESETB/DDR2_A3
AE24
AF24
AD22
C1M/LLV1N/BLUE[2]
AF8
AD9
AF23
AE22
FRC_DDR3_DQSL/DDR2_DQS0
C2P/LLV2P/BLUE[1]
FRC_DDR3_DQSLB/DDR2_DQSB0
C2M/LLV2N/BLUE[0]
C3P/LLV4P
AE9
AF9
FRC_DDR3_DQSU/DDR2_DQS1
FRC_DDR3_DQSUB/DDR2_DQSB1
AF22
FRC_SPI_DO
FRC_TESTPIN
FRC_SPI_CK
AD6
AD12
AD20
AE5
AE20
AF12
AF20
AF5
AF19
AE12
AE18
AF18
C3M/LLV4N
C4P/LLV5P
D0P/LLV6P
AF7
AD10
FRC_DDR3_DQL2/DDR2_DQ1
FRC_DDR3_DQL3/DDR2_DQ2
FRC_DDR3_DQL4/DDR2_DQ4
FRC_DDR3_DQL5/DDR2_NC
FRC_DDR3_DQL6/DDR2_DQ3
AB23
AE7
AC23
AF10
AC22
AD8
D0M/LLV6N
D1P/LLV7P
D1M/LLV7N
D2P/LLV8P
D2M/LLV8N
D3P/TCON3
D3M/TCON2
FRC_DDR3_DQU0/DDR2_DQ8
FRC_DDR3_DQU1/DDR2_DQ14
A0P/RLV0P/RED[9]
A0M/RLV0N/RED[8]
D4P/TCON1
AF1
AE3
AD14
V26
AD3
V25
AF15
AF2
V24
AE15
W24
Y26
AD2
Y25
AD16
AD15
Y24
AE16
AA26
AA25
AF3
AF14
AB26
AD1
AB25
AB24
B0P/RLV6P/GREEN[7]
FRC_DDR3_BA0/DDR2_BA2
B0M/RLV6N/GREEN[6]
FRC_DDR3_BA1/DDR2_ODT
B1P/RLV7P/GREEN[5]
FRC_DDR3_BA2/DDR2_A12
B1M/RLV7N/GREEN[4]
FRC_DDR3_MCLK/DDR2_MCLK
B2M/RLV8N/GREEN[2]
B2P/RLV8P/GREEN[3]
AD13
AC24
AE14
AD26
AE13
AD25
FRC_DDR3_CKE/DDR2_RASZ
B3P/TCON11/BLUE[9]
FRC_DDR3_MCLKZ/DDR2_MCLKZ
B3M/TCON10/BLUE[8]
B4P/TCON9/BLUE[7]
AD24
AD23
AF4
AE23
AD4
AE26
FRC_I2CM_DA
FRC_TESTPIN
FRC_DDR3_CASZ/DDR2_CKE
CCKP/LLV3P
CCKM/LLV3N
C0P/LLV0P/BLUE[5]
FRC_DDR3_RESETB/DDR2_A3
C0M/LLV0N/BLUE[4]
C1P/LLV1P/BLUE[3]
AE24
AF8
AF24
AD9
AF23
AD22
AE9
AE22
AF9
AF22
C1M/LLV1N/BLUE[2]
FRC_DDR3_DQSL/DDR2_DQS0
C2P/LLV2P/BLUE[1]
FRC_DDR3_DQSLB/DDR2_DQSB0
C2M/LLV2N/BLUE[0]
C3P/LLV4P
FRC_DDR3_DQSU/DDR2_DQS1
C3M/LLV4N
FRC_DDR3_DQSUB/DDR2_DQSB1
C4P/LLV5P
AE19
AE6
AD21
AF11
AE21
AD6
AD12
AD20
AE5
AE20
AF12
AF20
AF5
AF19
AE12
AD18
AE18
AE10
AF18
AF7
AD11
AD10
AB23
AE7
AC23
AF10
AC22
AD8
AF3
AF14
AD1
AB26
AB25
A2M/RLV2N/RED[4]
A3P/RLV4P/RED[1]
A3M/RLV4N/RED[0]
FRC_DDR3_A10/DDR2_A11
A4P/RLV5P/GREEN[9]
FRC_DDR3_A11/DDR2_A4
A4M/RLV5N/GREEN[8]
AC24
AE14
AD26
AE13
AD25
DCKP/TCON5
DCKM/TCON4
D0P/LLV6P
D0M/LLV6N
FRC_DDR3_DQL3/DDR2_DQ2
D1P/LLV7P
FRC_DDR3_DQL4/DDR2_DQ4
D1M/LLV7N
FRC_DDR3_DQL5/DDR2_NC
D2P/LLV8P
FRC_DDR3_DQL6/DDR2_DQ3
D2M/LLV8N
FRC_DDR3_DQL7/DDR2_DQ5
D3P/TCON3
D3M/TCON2
FRC_DDR3_DQU0/DDR2_DQ8
D4P/TCON1
FRC_DDR3_DQU1/DDR2_DQ14
D4M/TCON0
AD23
AF4
AE23
AD4
AE26
FRC_DDR3_DQU5/DDR2_DQ9
GPIO1/TCON14/VSYNC/VDD_EVEN
FRC_DDR3_DQU6/DDR2_DQ10
GPIO2/TCON7/LDE/GCLK4
GPIO3/TCON6/LCK/GCLK2
B1M/RLV7N/GREEN[4]
B2M/RLV8N/GREEN[2]
B2P/RLV8P/GREEN[3]
FRC_DDR3_CKE/DDR2_RASZ
B3P/TCON11/BLUE[9]
FRC_DDR3_MCLKZ/DDR2_MCLKZ
B3M/TCON10/BLUE[8]
AA14
FRC_GPIO1
FRC_DDR3_CASZ/DDR2_CKE
CCKP/LLV3P
FRC_DDR3_WEZ/DDR2_BA0
CCKM/LLV3N
C0P/LLV0P/BLUE[5]
AE2
AE25
FRC_DDR3_RESETB/DDR2_A3
AF26
C0M/LLV0N/BLUE[4]
C1P/LLV1P/BLUE[3]
AE24
AF8
AF24
AD9
AF23
AD22
AE9
AE22
AF9
AF22
C1M/LLV1N/BLUE[2]
FRC_DDR3_DQSL/DDR2_DQS0
C2P/LLV2P/BLUE[1]
FRC_DDR3_DQSLB/DDR2_DQSB0
C2M/LLV2N/BLUE[0]
C3P/LLV4P
FRC_DDR3_DQSU/DDR2_DQS1
C3M/LLV4N
FRC_DDR3_DQSUB/DDR2_DQSB1
C4P/LLV5P
FRC_GPIO9/UART_TX
AE8
FRC_DDR3_NC/DDR2_DQM0
AA16
Y11
AA15
Y19
FRC_REXT
FRC_TESTPIN
AE19
AE6
AD21
AF11
AE21
AD6
AD12
AF21
AD20
AE5
AE20
AF12
AF20
AF5
AF19
AE12
AD18
AE18
AE10
AF18
AF7
AD11
AD10
AB23
AE7
AC23
AF10
AC22
AD8
AD15
AE16
DCKP/TCON5
FRC_DDR3_DQL0/DDR2_DQ6
DCKM/TCON4
FRC_DDR3_DQL1/DDR2_DQ0
D0P/LLV6P
FRC_DDR3_DQL2/DDR2_DQ1
D0M/LLV6N
FRC_DDR3_DQL3/DDR2_DQ2
D1P/LLV7P
FRC_DDR3_DQL4/DDR2_DQ4
D1M/LLV7N
FRC_DDR3_DQL5/DDR2_NC
D2P/LLV8P
FRC_DDR3_DQL6/DDR2_DQ3
D2M/LLV8N
FRC_DDR3_DQL7/DDR2_DQ5
D3P/TCON3
D3M/TCON2
FRC_DDR3_DQU0/DDR2_DQ8
D4P/TCON1
FRC_DDR3_DQU1/DDR2_DQ14
D4M/TCON0
ACKM/RLV3N/RED[2]
A0P/RLV0P/RED[9]
A0M/RLV0N/RED[8]
FRC_DDR3_A4/DDR2_CASZ
A1P/RLV1P/RED[7]
FRC_DDR3_A5/DDR2_A10
A1M/RLV1N/RED[6]
FRC_DDR3_A6/DDR2_A0
A2P/RLV2P/RED[5]
FRC_DDR3_A7/DDR2_A5
A2M/RLV2N/RED[4]
FRC_DDR3_A8/DDR2_A2
A3P/RLV4P/RED[1]
FRC_DDR3_A9/DDR2_A9
A3M/RLV4N/RED[0]
FRC_DDR3_A10/DDR2_A11
A4P/RLV5P/GREEN[9]
FRC_DDR3_A11/DDR2_A4
A4M/RLV5N/GREEN[8]
FRC_DDR3_DQU5/DDR2_DQ9
AA26
AF3
AF14
AB26
AD1
AB25
AB24
GPIO1/TCON14/VSYNC/VDD_EVEN
FRC_DDR3_DQU6/DDR2_DQ10
GPIO2/TCON7/LDE/GCLK4
GPIO3/TCON6/LCK/GCLK2
B0M/RLV6N/GREEN[6]
B1P/RLV7P/GREEN[5]
FRC_DDR3_BA2/DDR2_A12
B1M/RLV7N/GREEN[4]
FRC_DDR3_MCLK/DDR2_MCLK
B2M/RLV8N/GREEN[2]
B2P/RLV8P/GREEN[3]
AD13
AC24
AE14
AD26
AE13
AD25
FRC_DDR3_CKE/DDR2_RASZ
B3P/TCON11/BLUE[9]
FRC_DDR3_MCLKZ/DDR2_MCLKZ
B3M/TCON10/BLUE[8]
B4P/TCON9/BLUE[7]
AD24
AA14
FRC_GPIO1
AC15
AD23
AF4
AE23
AD4
AE26
AE25
FRC_GPIO9/UART_TX
AE8
FRC_DDR3_NC/DDR2_DQM0
Y11
Y19
W24
Y26
Y25
Y24
CCKP/LLV3P
CCKM/LLV3N
C0P/LLV0P/BLUE[5]
AE2
FRC_DDR3_RESETB/DDR2_A3
AF26
C0M/LLV0N/BLUE[4]
C1P/LLV1P/BLUE[3]
AF25
AE24
AF8
AF24
AD9
AF23
AD22
AE9
AE22
AF9
AF22
C1M/LLV1N/BLUE[2]
FRC_DDR3_DQSL/DDR2_DQS0
C2P/LLV2P/BLUE[1]
FRC_DDR3_DQSLB/DDR2_DQSB0
C2M/LLV2N/BLUE[0]
C3P/LLV4P
FRC_DDR3_DQSU/DDR2_DQS1
C3M/LLV4N
FRC_DDR3_DQSUB/DDR2_DQSB1
C4P/LLV5P
AE19
AE6
AF11
AD6
AF21
AD12
AD20
AE5
AE20
AF12
AF20
AF5
AF19
AE12
AD18
AE18
AE10
AF18
AF7
AD11
AD10
AB23
AE7
AC23
AF10
AC22
AD8
FRC_REXT
FRC_TESTPIN
DCKM/TCON4
D0P/LLV6P
FRC_DDR3_DQL2/DDR2_DQ1
D0M/LLV6N
FRC_DDR3_DQL3/DDR2_DQ2
D1P/LLV7P
FRC_DDR3_DQL4/DDR2_DQ4
D1M/LLV7N
FRC_DDR3_DQL5/DDR2_NC
D2P/LLV8P
FRC_DDR3_DQL6/DDR2_DQ3
D2M/LLV8N
FRC_DDR3_DQL7/DDR2_DQ5
D3P/TCON3
D3M/TCON2
FRC_DDR3_DQU0/DDR2_DQ8
D4P/TCON1
FRC_DDR3_DQU1/DDR2_DQ14
D4M/TCON0
FRC_DDR3_DQU5/DDR2_DQ9
GPIO1/TCON14/VSYNC/VDD_EVEN
FRC_DDR3_DQU6/DDR2_DQ10
GPIO2/TCON7/LDE/GCLK4
FRC_DDR3_DQU7/DDR2_DQM1
GPIO3/TCON6/LCK/GCLK2
AE24
AF24
AF23
AD22
AE22
AF22
AE19
AD21
AE21
AF21
AD20
AE20
AF20
AF19
AD18
AE18
AF18
FRC_GPIO1
AB23
AC23
AC22
AA14
AC15
FRC_GPIO3
Y16
FRC_GPIO8
AC16
AC14
FRC_GPIO9/UART_TX
AE8
FRC_DDR3_NC/DDR2_DQM0
AA16
Y11
AA15
Y19
FRC_TESTPIN
AA11
AC16
AC14
FRC_GPIO10
AA16
FRC_REXT
FRC_I2CM_DA
AA15
FRC_I2CM_CK
Y10
FRC_I2CS_DA
AA11
FRC_I2CS_CK
AB15
FRC_PWM1
AE25
AF26
AF25
AB16
AA14
FRC_I2CS_CK
FRC_PWM0
AE23
AE26
AB22
GPIO0/TCON15/HSYNC/VDD_ODD
Y10
AB14
AD24
FRC_DDR3_DQU2/DDR2_DQ13
FRC_DDR3_DQU3/DDR2_DQ12
FRC_DDR3_DQU4/DDR2_DQ15
AC15
FRC_I2CM_CK
FRC_I2CS_DA
AA11
AC24
AD26
AD25
AD19
DCKP/TCON5
FRC_DDR3_DQL0/DDR2_DQ6
FRC_DDR3_DQL1/DDR2_DQ0
FRC_GPIO0/UART_RX
FRC_GPIO10
FRC_I2CM_DA
AB26
AB25
AB24
FRC_DDR3_DML/DDR2_DQ7
FRC_DDR3_DMU/DDR2_DQ11
AD21
AA26
AA25
AA24
C4M/LLV5N
AE11
AE21
AC25
AD23
FRC_DDR3_CASZ/DDR2_CKE
FRC_DDR3_WEZ/DDR2_BA0
Y16
FRC_GPIO8
AC16
AA16
V26
V25
V24
FRC_DDR3_ODT/DDR2_BA1
FRC_DDR3_RASZ/DDR2_WEZ
FRC_GPIO3
AA15
U26
U25
U24
B4M/TCON8/BLUE[6]
AE4
AD7
FRC_DDR3_DQU7/DDR2_DQM1
B0P/RLV6P/GREEN[7]
FRC_DDR3_BA0/DDR2_BA2
FRC_DDR3_BA1/DDR2_ODT
AB16
AC14
W25
AC26
BCKP/TCON13/GREEN[1]
AA25
AB22
GPIO0/TCON15/HSYNC/VDD_ODD
AB15
FRC_PWM0
ACKP/RLV3P/RED[3]
FRC_DDR3_A1/DDR2_A6
FRC_DDR3_A2/DDR2_A7
FRC_DDR3_A3/DDR2_A1
BCKM/TCON12/GREEN[0]
AA24
FRC_DDR3_DQU2/DDR2_DQ13
FRC_DDR3_DQU3/DDR2_DQ12
FRC_DDR3_DQU4/DDR2_DQ15
FRC_I2CS_CK
AB15
W26
FRC_DDR3_A0/DDR2_NC
AC25
AF6
Y10
FRC_PWM1
Y24
AD19
FRC_GPIO0/UART_RX
FRC_I2CM_CK
FRC_I2CS_DA
AB14
AD2
FRC_DDR3_DML/DDR2_DQ7
FRC_DDR3_DMU/DDR2_DQ11
FRC_GPIO10
FRC_I2CM_DA
AA11
AF2
AE15
AD16
C4M/LLV5N
AE11
Y16
FRC_GPIO8
AC16
AD3
AF15
W24
Y26
Y25
AD5
FRC_GPIO3
AC14
V26
V25
V24
B4M/TCON8/BLUE[6]
AB16
FRC_GPIO0/UART_RX
AC15
AF1
AE3
AD14
FRC_DDR3_ODT/DDR2_BA1
FRC_DDR3_RASZ/DDR2_WEZ
AF25
AD7
FRC_DDR3_DQU7/DDR2_DQM1
FRC_DDR3_BA2/DDR2_A12
FRC_DDR3_MCLK/DDR2_MCLK
AE4
AB22
GPIO0/TCON15/HSYNC/VDD_ODD
B0M/RLV6N/GREEN[6]
B1P/RLV7P/GREEN[5]
AD24
FRC_DDR3_DQU2/DDR2_DQ13
FRC_DDR3_DQU3/DDR2_DQ12
FRC_DDR3_DQU4/DDR2_DQ15
B0P/RLV6P/GREEN[7]
FRC_DDR3_BA0/DDR2_BA2
FRC_DDR3_BA1/DDR2_ODT
B4P/TCON9/BLUE[7]
AF6
FRC_DDR3_DQL0/DDR2_DQ6
FRC_DDR3_DQL2/DDR2_DQ1
AE1
AF16
U26
U25
U24
FRC_DDR3_A12/DDR2_A8
AD13
AB24
AD19
FRC_DDR3_DQL1/DDR2_DQ0
FRC_I2CS_CK
FRC_PWM0
A1P/RLV1P/RED[7]
A1M/RLV1N/RED[6]
A2P/RLV2P/RED[5]
FRC_DDR3_A7/DDR2_A5
FRC_DDR3_A8/DDR2_A2
FRC_DDR3_A9/DDR2_A9
AA26
AA25
AA24
FRC_DDR3_DML/DDR2_DQ7
FRC_DDR3_DMU/DDR2_DQ11
Y10
AB14
FRC_DDR3_A4/DDR2_CASZ
FRC_DDR3_A5/DDR2_A10
FRC_DDR3_A6/DDR2_A0
IC101-*10
LGE107RC-R [S7MR RM]
W26
W25
AC26
C4M/LLV5N
AE11
FRC_I2CM_CK
FRC_I2CS_DA
AA11
A0P/RLV0P/RED[9]
A0M/RLV0N/RED[8]
BCKP/TCON13/GREEN[1]
AD5
FRC_DDR3_WEZ/DDR2_BA0
AE2
AF26
FRC_GPIO10
FRC_REXT
ACKM/RLV3N/RED[2]
BCKM/TCON12/GREEN[0]
FRC_DDR3_ODT/DDR2_BA1
FRC_DDR3_RASZ/DDR2_WEZ
AF25
AF21
ACKP/RLV3P/RED[3]
FRC_DDR3_A1/DDR2_A6
FRC_DDR3_A2/DDR2_A7
FRC_DDR3_A3/DDR2_A1
AC25
B4M/TCON8/BLUE[6]
AE4
AE25
FRC_DDR3_A0/DDR2_NC
AC26
AB14
FRC_PWM1
FRC_DDR3_A7/DDR2_A5
FRC_DDR3_A8/DDR2_A2
FRC_DDR3_A9/DDR2_A9
FRC_DDR3_A10/DDR2_A11
FRC_DDR3_A11/DDR2_A4
AB15
FRC_PWM0
AB14
FRC_PWM1
AB26
FRC_DDR3_DQU5/DDR2_DQ9
GPIO1/TCON14/VSYNC/VDD_EVEN
GPIO2/TCON7/LDE/GCLK4
GPIO3/TCON6/LCK/GCLK2
AD1
FRC_DDR3_BA2/DDR2_A12
B1M/RLV7N/GREEN[4]
FRC_DDR3_MCLK/DDR2_MCLK
B2M/RLV8N/GREEN[2]
B2P/RLV8P/GREEN[3]
AC24
AE14
AD26
AE13
AD25
FRC_DDR3_CKE/DDR2_RASZ
B3P/TCON11/BLUE[9]
FRC_DDR3_MCLKZ/DDR2_MCLKZ
B3M/TCON10/BLUE[8]
B4P/TCON9/BLUE[7]
AD24
FRC_GPIO1
AA16
Y11
AA15
Y19
FRC_VSYNC_LIKE
FRC_TESTPIN
AD23
AF4
AE23
AD4
AE25
FRC_DDR3_CASZ/DDR2_CKE
FRC_DDR3_WEZ/DDR2_BA0
AE26
AE24
AF24
FRC_DDR3_RESETB/DDR2_A3
AD22
C1M/LLV1N/BLUE[2]
AF8
AD9
FRC_DDR3_DQSL/DDR2_DQS0
C2P/LLV2P/BLUE[1]
FRC_DDR3_DQSLB/DDR2_DQSB0
C2M/LLV2N/BLUE[0]
C3P/LLV4P
AE9
AF9
FRC_DDR3_DQSU/DDR2_DQS1
FRC_DDR3_DQSUB/DDR2_DQSB1
AF22
W24
AE15
Y26
AD2
Y25
AD16
Y24
AD15
AE16
AD6
AD12
AD20
AE5
AE20
AF12
AF20
AF5
AF19
AE12
C3M/LLV4N
C4P/LLV5P
FRC_SPI_CK
AF7
AD10
AB23
AE7
AC23
AF10
AC22
AD8
D0P/LLV6P
FRC_DDR3_DQL2/DDR2_DQ1
FRC_DDR3_DQL3/DDR2_DQ2
FRC_DDR3_DQL4/DDR2_DQ4
FRC_DDR3_DQL5/DDR2_NC
FRC_DDR3_DQL6/DDR2_DQ3
D0M/LLV6N
D1P/LLV7P
D1M/LLV7N
D2P/LLV8P
D2M/LLV8N
D3P/TCON3
D3M/TCON2
FRC_DDR3_DQU0/DDR2_DQ8
FRC_DDR3_DQU1/DDR2_DQ14
D4P/TCON1
FRC_DDR3_A7/DDR2_A5
FRC_DDR3_A8/DDR2_A2
FRC_DDR3_A9/DDR2_A9
FRC_DDR3_A10/DDR2_A11
FRC_DDR3_A11/DDR2_A4
AC24
AE14
AE13
FRC_DDR3_DQU5/DDR2_DQ9
GPIO1/TCON14/VSYNC/VDD_EVEN
GPIO2/TCON7/LDE/GCLK4
GPIO3/TCON6/LCK/GCLK2
B0P/RLV6P/GREEN[7]
B0M/RLV6N/GREEN[6]
B1P/RLV7P/GREEN[5]
FRC_DDR3_BA2/DDR2_A12
B1M/RLV7N/GREEN[4]
FRC_DDR3_MCLK/DDR2_MCLK
B2M/RLV8N/GREEN[2]
B2P/RLV8P/GREEN[3]
FRC_DDR3_CKE/DDR2_RASZ
B3P/TCON11/BLUE[9]
FRC_DDR3_MCLKZ/DDR2_MCLKZ
B3M/TCON10/BLUE[8]
AD24
FRC_GPIO1
AD23
AF4
AE23
AD4
AE25
FRC_DDR3_CASZ/DDR2_CKE
FRC_DDR3_WEZ/DDR2_BA0
AE26
AA16
FRC_DDR3_RESETB/DDR2_A3
AE24
AF24
AD22
C1M/LLV1N/BLUE[2]
AF8
AD9
AF23
AE22
FRC_DDR3_DQSL/DDR2_DQS0
C2P/LLV2P/BLUE[1]
FRC_DDR3_DQSLB/DDR2_DQSB0
C2M/LLV2N/BLUE[0]
C3P/LLV4P
AE9
AF9
FRC_DDR3_DQSU/DDR2_DQS1
FRC_DDR3_DQSUB/DDR2_DQSB1
AF22
AD6
AD12
AD20
AE5
AE20
AF12
AF20
AF5
AF19
AE12
AE18
AF18
C3M/LLV4N
C4P/LLV5P
DCKM/TCON4
D0P/LLV6P
FRC_DDR3_DQL2/DDR2_DQ1
FRC_DDR3_DQL3/DDR2_DQ2
FRC_DDR3_DQL4/DDR2_DQ4
FRC_DDR3_DQL5/DDR2_NC
FRC_DDR3_DQL6/DDR2_DQ3
AF7
AD10
AB23
AE7
AC23
AF10
AC22
AD8
D0M/LLV6N
D1P/LLV7P
D1M/LLV7N
D2P/LLV8P
D2M/LLV8N
D3P/TCON3
D3M/TCON2
AE10
AD11
FRC_SPI_DO
Y11
Y19
FRC_VSYNC_LIKE
FRC_TESTPIN
FRC_SPI_CK
FRC_DDR3_DQU0/DDR2_DQ8
FRC_DDR3_DQU1/DDR2_DQ14
D4P/TCON1
FRC_DDR3_DQU5/DDR2_DQ9
R156
10K
PWM0
R157
100
PWM2
A_DIM
AD24
PWM_DIM
AE23
AE26
AE25
AF26
AF25
AE24
AF24
AF23
NEC_SDA
NEC_SCL
AD22
AE22
C111
2.2uF
AF22
AE19
AD21
AE21
AF21
AMP_SDA
AMP_SCL
AD20
AE20
AF20
AF19
AD18
AE18
AF18
PI_SDA
AB22
GPIO1/TCON14/VSYNC/VDD_EVEN
FRC_DDR3_DQU6/DDR2_DQ10
GPIO2/TCON7/LDE/GCLK4
GPIO3/TCON6/LCK/GCLK2
AB23
AC23
AC22
PI_SCL
AB16
FRC_SPI_CZ
FRC_GPIO1
AA14
AC15
FRC_SPI1_CK
Y16
FRC_GPIO8
AC16
AC14
FRC_SPI_DO
AE8
FRC_DDR3_NC/DDR2_DQM0
AA16
Y11
AA15
Y19
AA16
FRC_VSYNC_LIKE
FRC_TESTPIN
AA11
AC16
AC14
FRC_SPI1_DI
FRC_SPI_CK
AA15
FRC_SPI_DI
Y10
Y10
FRC_I2CS_DA
AA11
FRC_I2CS_CK
AB15
FRC_PWM1
EEPROM_SDA
EEPROM_SCL
D4M/TCON0
GPIO0/TCON15/HSYNC/VDD_ODD
FRC_DDR3_DQU7/DDR2_DQM1
AA14
FRC_I2CS_CK
FRC_PWM0
AC24
AD26
AD25
FRC_DDR3_DQU2/DDR2_DQ13
FRC_DDR3_DQU3/DDR2_DQ12
FRC_DDR3_DQU4/DDR2_DQ15
AC15
FRC_SPI_DI
FRC_I2CS_DA
AB26
AB25
AB24
AD19
DCKP/TCON5
FRC_DDR3_DQL0/DDR2_DQ6
FRC_DDR3_DQL1/DDR2_DQ0
FRC_DDR3_DQL7/DDR2_DQ5
AD18
AA25
AA24
FRC_DDR3_DML/DDR2_DQ7
FRC_DDR3_DMU/DDR2_DQ11
AE6
AF11
AC25
AA26
C4M/LLV5N
AE11
AE19
AD21
AE21
AF21
C0M/LLV0N/BLUE[4]
C1P/LLV1P/BLUE[3]
FRC_SPI1_DI
AB15
AB14
Y24
AD23
CCKP/LLV3P
CCKM/LLV3N
C0P/LLV0P/BLUE[5]
AE2
AF26
AF25
Y16
FRC_GPIO8
AA15
W24
Y26
Y25
FRC_DDR3_ODT/DDR2_BA1
FRC_DDR3_RASZ/DDR2_WEZ
FRC_SPI1_CK
FRC_DDR3_NC/DDR2_DQM0
V26
V25
V24
B4M/TCON8/BLUE[6]
AE4
AB16
FRC_SPI_CZ
AE8
U26
U25
U24
A4M/RLV5N/GREEN[8]
FRC_DDR3_BA0/DDR2_BA2
FRC_DDR3_BA1/DDR2_ODT
B4P/TCON9/BLUE[7]
AD7
FRC_DDR3_DQU6/DDR2_DQ10
AC16
AA11
A2M/RLV2N/RED[4]
A3P/RLV4P/RED[1]
A3M/RLV4N/RED[0]
A4P/RLV5P/GREEN[9]
W25
AC26
AD1
AD26
AB22
FRC_DDR3_DQU7/DDR2_DQM1
AA14
AC14
A1P/RLV1P/RED[7]
A1M/RLV1N/RED[6]
A2P/RLV2P/RED[5]
AD13
AD25
D4M/TCON0
GPIO0/TCON15/HSYNC/VDD_ODD
Y10
FRC_PWM1
AB26
AB25
AB24
FRC_DDR3_DQU2/DDR2_DQ13
FRC_DDR3_DQU3/DDR2_DQ12
FRC_DDR3_DQU4/DDR2_DQ15
AC15
FRC_SPI_DI
FRC_PWM0
A0P/RLV0P/RED[9]
A0M/RLV0N/RED[8]
BCKP/TCON13/GREEN[1]
AF3
AF14
AF6
DCKM/TCON4
AE10
AD11
FRC_SPI1_DI
FRC_I2CS_DA
ACKM/RLV3N/RED[2]
FRC_DDR3_A4/DDR2_CASZ
FRC_DDR3_A5/DDR2_A10
FRC_DDR3_A6/DDR2_A0
BCKM/TCON12/GREEN[0]
AA25
AA24
AD19
DCKP/TCON5
FRC_DDR3_DQL0/DDR2_DQ6
FRC_DDR3_DQL1/DDR2_DQ0
FRC_DDR3_DQL7/DDR2_DQ5
AD18
AE18
FRC_DDR3_A1/DDR2_A6
FRC_DDR3_A2/DDR2_A7
FRC_DDR3_A3/DDR2_A1
AC25
FRC_DDR3_DML/DDR2_DQ7
FRC_DDR3_DMU/DDR2_DQ11
AE6
AF11
AF18
DIMMING
ACKP/RLV3P/RED[3]
AA26
C4M/LLV5N
AE11
AE19
AD21
AE21
AF21
C0M/LLV0N/BLUE[4]
C1P/LLV1P/BLUE[3]
AF23
AE22
CCKP/LLV3P
CCKM/LLV3N
C0P/LLV0P/BLUE[5]
AE2
AF26
AF25
FRC_I2CS_CK
AB14
AF2
AD5
Y16
FRC_GPIO8
FRC_SPI_DO
FRC_DDR3_NC/DDR2_DQM0
AD3
AF15
FRC_DDR3_ODT/DDR2_BA1
FRC_DDR3_RASZ/DDR2_WEZ
FRC_SPI1_CK
AE8
AF1
AE3
AD14
V26
V25
V24
B4M/TCON8/BLUE[6]
AE4
AB16
FRC_SPI_CZ
AC16
U26
U25
U24
W26
FRC_DDR3_A0/DDR2_NC
FRC_DDR3_A12/DDR2_A8
B0P/RLV6P/GREEN[7]
B0M/RLV6N/GREEN[6]
B1P/RLV7P/GREEN[5]
AD13
AD7
FRC_DDR3_DQU6/DDR2_DQ10
AA14
AA11
A2M/RLV2N/RED[4]
A3P/RLV4P/RED[1]
A3M/RLV4N/RED[0]
A4P/RLV5P/GREEN[9]
+3.5V_ST
IC101-*14
LGE107RC-RP [S7M+ RM]
AE1
AF16
A4M/RLV5N/GREEN[8]
FRC_DDR3_BA0/DDR2_BA2
FRC_DDR3_BA1/DDR2_ODT
+3.3V_Normal
S7M-PLUS_RM
W26
W25
AC26
AB25
AB24
AB22
FRC_DDR3_DQU7/DDR2_DQM1
AC15
AC14
A1P/RLV1P/RED[7]
A1M/RLV1N/RED[6]
A2P/RLV2P/RED[5]
BCKP/TCON13/GREEN[1]
AF3
AF14
D4M/TCON0
GPIO0/TCON15/HSYNC/VDD_ODD
AB15
FRC_PWM1
ACKM/RLV3N/RED[2]
FRC_DDR3_A4/DDR2_CASZ
FRC_DDR3_A5/DDR2_A10
FRC_DDR3_A6/DDR2_A0
BCKM/TCON12/GREEN[0]
AA25
AA24
FRC_DDR3_DQU2/DDR2_DQ13
FRC_DDR3_DQU3/DDR2_DQ12
FRC_DDR3_DQU4/DDR2_DQ15
Y10
FRC_PWM0
FRC_DDR3_A1/DDR2_A6
FRC_DDR3_A2/DDR2_A7
FRC_DDR3_A3/DDR2_A1
AC25
AF6
DCKM/TCON4
AE10
AD11
FRC_I2CS_CK
Copyright © 2011 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
AD2
AD15
AE16
ACKP/RLV3P/RED[3]
AA26
AD19
DCKP/TCON5
FRC_DDR3_DQL0/DDR2_DQ6
FRC_DDR3_DQL1/DDR2_DQ0
FRC_DDR3_DQL7/DDR2_DQ5
AD18
FRC_SPI_DI
FRC_I2CS_DA
THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.
AE15
AD16
Y24
FRC_DDR3_DML/DDR2_DQ7
FRC_DDR3_DMU/DDR2_DQ11
AE6
AF11
FRC_SPI1_DI
Y11
FRC_VSYNC_LIKE
W24
Y26
Y25
C4M/LLV5N
AE11
AE19
AD21
AE21
AF21
CCKP/LLV3P
CCKM/LLV3N
C0M/LLV0N/BLUE[4]
C1P/LLV1P/BLUE[3]
Y16
FRC_GPIO8
Y19
AF2
AD5
C0P/LLV0P/BLUE[5]
AE2
AF26
FRC_SPI1_CK
FRC_DDR3_NC/DDR2_DQM0
AD3
AF15
B4M/TCON8/BLUE[6]
AB16
FRC_SPI_CZ
AE8
AF1
AE3
AD14
V26
V25
V24
FRC_DDR3_ODT/DDR2_BA1
FRC_DDR3_RASZ/DDR2_WEZ
AF25
AD7
FRC_DDR3_DQU6/DDR2_DQ10
B1M/RLV7N/GREEN[4]
B2M/RLV8N/GREEN[2]
B4P/TCON9/BLUE[7]
AE26
AB22
FRC_DDR3_DQU7/DDR2_DQM1
FRC_DDR3_BA2/DDR2_A12
FRC_DDR3_MCLK/DDR2_MCLK
AE4
D4M/TCON0
GPIO0/TCON15/HSYNC/VDD_ODD
B0M/RLV6N/GREEN[6]
B1P/RLV7P/GREEN[5]
AD24
FRC_DDR3_DQU2/DDR2_DQ13
FRC_DDR3_DQU3/DDR2_DQ12
FRC_DDR3_DQU4/DDR2_DQ15
U26
U25
U24
FRC_DDR3_A0/DDR2_NC
FRC_DDR3_A12/DDR2_A8
B0P/RLV6P/GREEN[7]
FRC_DDR3_BA0/DDR2_BA2
FRC_DDR3_BA1/DDR2_ODT
AD13
AF6
D0P/LLV6P
FRC_DDR3_DQL4/DDR2_DQ4
AD1
AB25
AB24
AD19
DCKM/TCON4
FRC_DDR3_DQL7/DDR2_DQ5
AF7
AD11
VSS
C3M/LLV4N
C4P/LLV5P
DCKP/TCON5
FRC_DDR3_DQL0/DDR2_DQ6
FRC_DDR3_DQL1/DDR2_DQ0
AE10
22
AE1
AF16
AC26
BCKM/TCON12/GREEN[0]
AA25
AA24
FRC_DDR3_DML/DDR2_DQ7
FRC_DDR3_DMU/DDR2_DQ11
AE6
AF11
W26
W25
A4M/RLV5N/GREEN[8]
BCKP/TCON13/GREEN[1]
AC25
AA26
C4M/LLV5N
AE11
WP
AD6
EEPROM_SDA
CCKP/LLV3P
CCKM/LLV3N
C0M/LLV0N/BLUE[4]
C1P/LLV1P/BLUE[3]
4.7K
R129
AF2
AD5
C0P/LLV0P/BLUE[5]
FRC_DDR3_RESETB/DDR2_A3
SDA
AD3
AF15
FRC_DDR3_ODT/DDR2_BA1
FRC_DDR3_RASZ/DDR2_WEZ
AE2
22
AF1
AE3
AD14
V26
V25
V24
B4M/TCON8/BLUE[6]
AE4
NC
R128
U26
U25
U24
ACKP/RLV3P/RED[3]
FRC_DDR3_A12/DDR2_A8
B0P/RLV6P/GREEN[7]
AF3
AF14
AF4
4
AE1
AF16
U26
U25
U24
FRC_DDR3_A12/DDR2_A8
Y16
FRC_GPIO8
AC16
FRC_PWM1
IC101-*13
LGE107DC-RP-1 [S7M+ DIVX]
FRC_DDR3_A0/DDR2_NC
AC26
BCKM/TCON12/GREEN[0]
C105
0.1uF
AD5
VSS
AE1
AF16
A4M/RLV5N/GREEN[8]
BCKP/TCON13/GREEN[1]
EEPROM_1MBIT_ST
A4P/RLV5P/GREEN[9]
A4M/RLV5N/GREEN[8]
FRC_GPIO3
AB15
S7M-PLUS_DivX
IC101-*12
LGE107C-RP [S7M+ MS10]
W26
W25
FRC_DDR3_A12/DDR2_A8
VCC
FRC_DDR3_A10/DDR2_A11
FRC_DDR3_A11/DDR2_A4
AB16
FRC_GPIO0/UART_RX
R169
1K
+3.5V_ST
Addr:10101--
8
A2M/RLV2N/RED[4]
A3P/RLV4P/RED[1]
A3M/RLV4N/RED[0]
I2C
S7M-PLUS_MS10
IC101-*11
LGE107C-RP-1 [S7M+ BASIC]
1
A1M/RLV1N/RED[6]
A2P/RLV2P/RED[5]
FRC_DDR3_A7/DDR2_A5
FRC_DDR3_A8/DDR2_A2
FRC_DDR3_A9/DDR2_A9
BCKP/TCON13/GREEN[1]
AD7
FRC_DDR3_DQU7/DDR2_DQM1
AA14
AC14
A1P/RLV1P/RED[7]
FRC_DDR3_A5/DDR2_A10
FRC_DDR3_A6/DDR2_A0
W26
W25
SDA
AE1
NC_1
A0P/RLV0P/RED[9]
A0M/RLV0N/RED[8]
SCL
S7M-PLUS_BASIC
HDCP_EEPROM_ON_SEMI_NEW
ACKM/RLV3N/RED[2]
BCKM/TCON12/GREEN[0]
AA24
AB22
GPIO0/TCON15/HSYNC/VDD_ODD
FRC_I2CS_CK
FRC_PWM0
ACKP/RLV3P/RED[3]
FRC_DDR3_A1/DDR2_A6
FRC_DDR3_A2/DDR2_A7
FRC_DDR3_A3/DDR2_A1
FRC_DDR3_A4/DDR2_CASZ
S7MR_RM
IC101-*9
LGE107DC-R [S7MR DIVX/MS10]
FRC_DDR3_A0/DDR2_NC
AC25
FRC_DDR3_DQU2/DDR2_DQ13
FRC_DDR3_DQU3/DDR2_DQ12
FRC_DDR3_DQU4/DDR2_DQ15
S7MR-PLUS
+3.5V_ST
AD15
AE16
AF6
Y10
NC_24
Y24
AD19
AC15
FRC_I2CM_CK
FRC_I2CS_DA
AB14
AD2
FRC_DDR3_DML/DDR2_DQ7
FRC_DDR3_DMU/DDR2_DQ11
FRC_GPIO10
FRC_I2CM_DA
AA11
AF2
AE15
AD16
C4M/LLV5N
AE11
Y16
FRC_GPIO8
AC16
AD3
AF15
W24
Y26
Y25
AD5
FRC_GPIO3
AC14
V26
V25
V24
FRC_DDR3_ODT/DDR2_BA1
FRC_DDR3_RASZ/DDR2_WEZ
AB16
FRC_GPIO0/UART_RX
AA14
AF1
AE3
AD14
B4M/TCON8/BLUE[6]
AE4
AD7
FRC_DDR3_DQU6/DDR2_DQ10
B0P/RLV6P/GREEN[7]
FRC_DDR3_BA0/DDR2_BA2
AD24
AB22
GPIO0/TCON15/HSYNC/VDD_ODD
FRC_DDR3_DQU7/DDR2_DQM1
AC15
AE1
AF16
U26
U25
U24
FRC_DDR3_A12/DDR2_A8
FRC_DDR3_BA1/DDR2_ODT
AD13
AD25
FRC_DDR3_DQU2/DDR2_DQ13
FRC_DDR3_DQU3/DDR2_DQ12
AD10
AC22
DCKM/TCON4
FRC_DDR3_DQL5/DDR2_NC
AD18
AF18
FRC_DDR3_DQL0/DDR2_DQ6
FRC_DDR3_DQL2/DDR2_DQ1
AD12
AF21
AD20
AE20
AA26
AF6
AB15
NC_24
A1P/RLV1P/RED[7]
FRC_DDR3_A5/DDR2_A10
FRC_DDR3_A6/DDR2_A0
W26
W25
AC26
AD19
FRC_DDR3_DQL1/DDR2_DQ0
NC_17
NC_25
A0P/RLV0P/RED[9]
A0M/RLV0N/RED[8]
BCKP/TCON13/GREEN[1]
AA25
FRC_DDR3_DML/DDR2_DQ7
FRC_DDR3_DMU/DDR2_DQ11
Y10
AB14
ACKM/RLV3N/RED[2]
BCKM/TCON12/GREEN[0]
AA24
C4M/LLV5N
AE11
NC_20
NC_11
AA11
ACKP/RLV3P/RED[3]
FRC_DDR3_A1/DDR2_A6
FRC_DDR3_A2/DDR2_A7
FRC_DDR3_A3/DDR2_A1
FRC_DDR3_A4/DDR2_CASZ
S7MR_DivX_MS10
IC101-*8
LGE107DC-R-1 [S7MR DIVX]
FRC_DDR3_A0/DDR2_NC
AC25
AD5
Y16
NC_15
AC16
Y19
V26
V25
V24
FRC_DDR3_ODT/DDR2_BA1
FRC_DDR3_RASZ/DDR2_WEZ
NC_30
AA16
AF1
AE3
AD14
B4M/TCON8/BLUE[6]
AE4
AD7
NC_39
FRC_DDR3_BA0/DDR2_BA2
FRC_DDR3_BA1/DDR2_ODT
AB16
AA15
AE1
AF16
U26
U25
U24
FRC_DDR3_A12/DDR2_A8
B0P/RLV6P/GREEN[7]
AB25
AB24
AB22
TCON21/CS10/VGH_ODD
NC_26
AC14
W26
W25
AC26
NC_42
NC_38
NC_41
AB15
NC_24
A1P/RLV1P/RED[7]
FRC_DDR3_A5/DDR2_A10
FRC_DDR3_A6/DDR2_A0
BCKP/TCON13/GREEN[1]
AF6
NC_17
NC_25
A0P/RLV0P/RED[9]
A0M/RLV0N/RED[8]
BCKM/TCON12/GREEN[0]
AD19
Y10
AB14
ACKM/RLV3N/RED[2]
AC25
NC_58
NC_69
NC_20
NC_11
AA11
ACKP/RLV3P/RED[3]
FRC_DDR3_A1/DDR2_A6
FRC_DDR3_A2/DDR2_A7
FRC_DDR3_A3/DDR2_A1
FRC_DDR3_A7/DDR2_A5
S7MR_DivX
IC101-*7
LGE107C-R [S7MR MS10]
FRC_DDR3_A0/DDR2_NC
FRC_DDR3_A4/DDR2_CASZ
AF2
AE15
AD16
RLV5N/RED[2]
AE11
Y16
NC_15
AC16
Y19
AD3
AF15
W24
Y26
Y25
AD5
NC_30
AA16
V26
V25
V24
NC_51
NC_36
AB16
AA15
AF1
AE3
AD14
LVB4N/LLV0N/GREEN[0]
AE4
AD7
NC_39
LVB0P/RLV6P/RED[1]
NC_66
NC_76
AD13
AB24
AB22
TCON21/CS10/VGH_ODD
NC_26
AC14
AE1
AF16
U26
U25
U24
FRC_DDR3_A12/DDR2_A8
AA26
AA25
AA24
NC_42
NC_38
NC_41
AB15
NC_25
LVA1P/LLV4P/BLUE[7]
NC_34
NC_77
W26
W25
AC26
AF6
NC_17
AB15
LVA0P/LLV3P/BLUE[9]
LVA0N/LLV3N/BLUE[8]
LVBCLKP/LLV0P/GREEN[5]
AD19
Y10
AB14
LVACLKN/LLV6N/BLUE[2]
LVBCLKN/LLV0N/GREEN[4]
NC_58
NC_69
NC_20
NC_11
AA11
LVACLKP/LLV6P/BLUE[3]
NC_78
NC_64
NC_50
NC_45
S7MR_MS10
IC101-*6
LGE107C-R-1 [S7MR BASIC]
NC_48
AC25
RLV5N/RED[2]
AE11
Y16
NC_15
AC16
Y11
AD3
AF15
W24
Y26
Y25
AD5
NC_30
Y19
V26
V25
V24
NC_51
NC_36
AB16
AA16
AF1
AE3
AD14
LVB4N/LLV0N/GREEN[0]
AE4
AD7
NC_39
LVB0P/RLV6P/RED[1]
NC_66
NC_76
AD13
AB24
AB22
TCON21/CS10/VGH_ODD
NC_26
AA15
AE1
AF16
U26
U25
U24
NC_63
AA26
AA25
AA24
NC_42
NC_38
NC_41
AA14
AC14
W26
W25
AC26
AF6
Y10
NC_25
LVA0P/LLV3P/BLUE[9]
LVA0N/LLV3N/BLUE[8]
LVBCLKP/LLV0P/GREEN[5]
AD19
AC15
NC_20
NC_11
LVACLKN/LLV6N/BLUE[2]
LVBCLKN/LLV0N/GREEN[4]
NC_58
NC_69
AE21
AF21
LVACLKP/LLV6P/BLUE[3]
NC_78
NC_64
NC_50
NC_45
S7MR_BASIC
IC101-*5
LGE101RC-R [S7R RM]
NC_48
AC25
RLV5N/RED[2]
AE11
NC_17
AB14
AD3
AF15
W24
Y26
Y25
AD5
Y16
NC_15
AA16
V26
V25
V24
NC_51
NC_36
NC_30
AA15
AF1
AE3
AD14
LVB4N/LLV0N/GREEN[0]
AE4
AB16
NC_26
AE8
AE1
AF16
U26
U25
U24
AC26
AD7
NC_39
AC16
W26
W25
NC_63
LVBCLKP/LLV0P/GREEN[5]
AA25
AB22
TCON21/CS10/VGH_ODD
Y10
NC_24
LVACLKP/LLV6P/BLUE[3]
NC_78
NC_64
NC_50
LVBCLKN/LLV0N/GREEN[4]
AA24
NC_42
NC_38
NC_41
AA14
AC14
IC101-*4
LGE101DC-R [S7R DIVX/MS10]
NC_48
AC25
AF6
AB15
6
AD15
AE16
AD19
NC_74
AC15
NC_17
3
Y24
NC_58
NC_69
AE21
NC_20
NC_11
NC_25
A2
AD2
RLV5N/RED[2]
AE11
Y16
NC_15
Y19
AF2
AE15
AD16
AD5
NC_35
NC_30
AE8
AD3
AF15
W24
Y26
Y25
LVB4N/LLV0N/GREEN[0]
AB16
NC_26
NC
V26
V25
V24
NC_51
NC_36
AF25
AF21
LVB3P/LLV1P/GREEN[3]
LVB3N/LLV1N/GREEN[2]
LVB4P/LLV0P/GREEN[1]
AD7
NC_39
LVB1N/RLV7N/GREEN[8]
LVB2N/RLV8N/GREEN[6]
AE4
AB22
TCON21/CS10/VGH_ODD
NC_32
NC_44
AD24
NC_42
NC_38
NC_41
LVB0N/RLV6N/RED[0]
LVB1P/RLV7P/GREEN[9]
NC_60
AD25
AF6
NC_74
NC_37
AD1
LVB0P/RLV6P/RED[1]
NC_66
NC_76
AD13
AD19
TCON3/OE/GOE/GCLK2
AE6
AD6
AB26
AB25
AB24
NC_58
NC_69
AF11
AF3
AF14
RLV5N/RED[2]
AE11
AF6
AA26
AA25
AD5
RLV1N/LCK
AD9
LVBCLKN/LLV0N/GREEN[4]
AA24
NC_51
NC_36
AE2
AF1
AE3
AD14
AC26
LVBCLKP/LLV0P/GREEN[5]
AC25
LVB4N/LLV0N/GREEN[0]
AE4
AD5
AE1
AF16
U26
U25
U24
NC_63
AC26
LVBCLKP/LLV0P/GREEN[5]
AF14
W26
W25
NC_63
LVBCLKN/LLV0N/GREEN[4]
5
GPIO6/PM0/INT0
PCM_A10
MPIF_D2
NC_63
4
R164
22
E7
PCM_A9
MPIF_D1
AD15
VSS
GPIO51/UART1_TX
PCM_A8
MPIF_D0
AE16
R127
GPIO50/UART1_RX
PCM_A7
NC_19
AD2
SCL
PCM_A6
SAR4/GPIO35
I/O0
AD3
WP
PCM_A5
C6
I/O1
AF2
6
G21
PCM_5V_CTL
AE15
7
GPIO42
R163
22
K20
NC_20
AD16
3
G22
100
R167
100
NC_21
AF15
2
PCM_A4
DDCA_CK/UART0_RX
VDD_2
IC101-*1
LGE101C-R-1 [S7R BASIC]
$0.199
GPIO41
TS1_D1
AF1
A2
GPIO40
PCM_A3
NC_23
AE3
A1
GPIO39
PCM_A2
M22
22
R137
S7_EEPROM_SCL
NC_24
AE1
8
PCM_A1
NC_25
AD14
1
GPIO38
22
L23
I/O5
AF16
A0
PCM_A0
M23
S7_RXD
S7R_MS10
R113
4.7K
GPIO37/UART3_TX
I/O7
S7R_BASIC
HDCP EEPROM
K21
GPIO36/UART3_RX
TS0_D4
S7_TXD
P21
R145
2.2K
NC_5
48
PCM_D6
R144
2.2K
NC_4
2GBIT_NUMONYX
2
5V_DET_HDMI_4
L21
PCM_D5
R143
3.3K
NC_3
1
AC17
R140
1K
NC_2
5V_DET_HDMI_2
L22
AA9
/PF_CE0
R168
1K
NC_1
GPIO151/TCON8
5V_DET_HDMI_1
M21
PCM_RESET
C109
0.1uF
C108
0.1uF
OPT
AR104
IC102-*1
NAND02GW3B2DN6E
GPIO149/TCON6
PCM_D4
AA20
/PCM_CE
/PCM_IRQA
R133
10K
PCM_D3
PCM_REG_N
V22
/PCM_WE
/PCM_IORD
+5V_Normal
GPIO147/TCON4
AA17
/PCM_OE
NC_16
GPIO145/TCON2
PCM_D2
W22
/PCM_REG
NC_17
GPIO143/TCON0
PCM_D1
PCM_D7
PCM_A[10]
PWM0
N21
PCM_D0
U21
AUD_SCK
PWM1
NC_18
T22
AUD_LRCH
AUD_MASTER_CLK_0
C112
100pF
50V
T21
PCM_D[2]
PCM_A[1]
NC_22
NC_21
U22
PCM_D[1]
PCM_A[0]
+3.3V_Normal
C103
0.1uF
VSS_2
host.
host.
host.
host.
host.
PCM_D[0]
R142
3.3K
3.3K
R102
NC_11
R106
1K
Q101
KRC103S
OPT
B
/PF_WP
45
5
IC101
PCM_A[0-7]
NC_27
R141
1K
OPT
R104
10K
/PF_CE1
C
4
14
NC_10
OPT
46
R123
OPT1K
R125
OPT 1K
NC_6
47
3
NC_28
R126
1K
1K
3.9K
NC_5
R109
R107
/F_RB
NC_4
48
R124
1K
2
NC_3
2GBIT_HYNIX
EAN60708701
R117
1K
1
NC_2
R115
1K
/PF_CE0
H : Serial Flash
L : NAND Flash
/PF_CE1
H : 16 bit
L :
8 bit
NC_29
R116
1K OPT
R118
1K OPT
R121
1K
NC_1
AB14
AB15
FRC_PWM0
AB14
FRC_PWM1
GP3_Saturn7M
FLASH/EEPROM/GPIO
Ver. 0.1
1
LGE Internal Use Only
+1.26V_VDDC
+3.3V_Normal
+1.26V_VDDC
VDDC 1.26V
MODEL OPTION
VDDC : 2026mA
MODEL_OPT_1
MODEL_OPT_2
F7
2D
3D
MODEL_OPT_3
B6
HD
FHD
MODEL_OPT_5
D18
Ready
default
MODEL_OPT_3
MODEL_OPT_4
MODEL_OPT_5
0
MODEL_OPT_6
MODEL_OPT_6
0.1uF
C4024
0.1uF
0.1uF
C4011
C4019
0.1uF
C4006
C4013
0.1uF
0.1uF
C299
0.1uF
0.1uF
C292
C283
0.1uF
C280
0.1uF
10uF
OPT
S7M-PLUS_DivX_MS10
IC101
[S7M+ DIVX/MS10]
Normal Power 3.3V
+3.3V_Normal
VDD33
H11
H12
VDD33_T/VDDP/U3_VD33_2:47mA
L204
BLM18PG121SN1D
F5
DDC_SDA_1
F4
DDC_SCL_1
E6
HPD1
C1
CK-_HDMI2
D1
D0+_HDMI2
D2
D0-_HDMI2
D1+_HDMI2
E2
E3
D1-_HDMI2
F3
D2+_HDMI2
E1
D2-_HDMI2
D4
DDC_SDA_2
E4
DDC_SCL_2
D5
HPD2
W1
TP202
0.1uF
0.1uF
C4020
C4031
0.1uF
C4014
OPT
0.1uF
0.1uF
OPT
C4025
0.1uF
0.1uF
C4012
47
OPT
C4007
0.1uF R4003
OPT
C4001 10uF
C251
TU_SIF
C293 10uF
47
C284 10uF
0.1uF R4002
IF_N_MSTAR
J14
J13
J15
J16
L18
AVDD_MEMPLL:24mA
AU33:31mA
V1
IM
A_RX1N
L227
BLM18PG121SN1D
Y2
A_RX2P
SSIF/SIFP
A_RX2N
SSIF/SIFM
DDCDA_DA/GPIO24
C4064
0.1uF
U3
DDCDA_CK/GPIO23
QP
HOTPLUGA/GPIO19
QM
TP203
V3
Close to MSTAR
R4019
1K
VDD33
TP204
R4020
10K
Y5
B_RXCP
IFAGC
B_RXCN
RF_TAGC
B_RX0P
IF_AGC_MAIN
Y4
TP205
U1
B_RX0N
TGPIO0/UPGAIN
B_RX1P
TGPIO1/DNGAIN
B_RX1N
TGPIO2/I2C_CLK
B_RX2P
TGPIO3/I2C_SDA
B_RX2N
AMP_SCL
AMP_SDA
22
FULL_NIM R291
FULL_NIM R292
U2
XTALIN
DDCDB_CK/GPIO25
XTALOUT
DEMOD_SCL
M19
N18
N19
N20
P18
FRC_MPLL:4mA
OPT
TU_SCL
T3
M18
P19
DEMOD_SDA
R3
P20
C261
T1
HOTPLUGB/GPIO20
X201
24MHz
+3.3V_Normal
C262
AVDD2P5
VDD33_DVI:163mA
VDD33_DVI
AVDD_DMPLL
1uF
L7
AB4
DDC_SDA_4
AA4
DDC_SCL_4
AC3
DM_P0
C_RX1N
DP_P0
C_RX2N
DM_P1
DDCDC_DA/GPIO28
DP_P1
A3
B3
A1
B2
C2
C3
PI_SDA
B4
C4
PI_SCL
E5
D6
CEC_REMOTE_S7
D_RXCP
I2S_IN_SD/GPIO176
D_RXCN
I2S_IN_WS/GPIO174
D_RX0P
R228
DSUB_R+
DSUB_G+
DSUB_B+
C204
0.047uF
K1
R229
68
C205
0.047uF
L3
33
C206
0.047uF
K3
R231
68
C207
0.047uF
K2
R232
33
C208
0.047uF
J3
68
C209
C210
10K
10K
R4023
R4026
33
R230
R233
SCART1_RGB/COMP1
G6
0.047uF
1000pF
J2
J1
D_RX0N
I2S_OUT_BCK/GPIO181
D_RX1P
I2S_OUT_MCK/GPIO179
D_RX1N
I2S_OUT_SD/GPIO182
D_RX2P
I2S_OUT_SD1/GPIO183
D_RX2N
I2S_OUT_SD2/GPIO184
DDCDD_DA/GPIO30
I2S_OUT_SD3/GPIO185
DDCDD_CK/GPIO29
I2S_OUT_WS/GPIO180
0.1uF
C4017
0.1uF
C4008
0.1uF
C4002
AVDD_DMPLL
F13
Y15
F15
VDD33_DVI
Normal 2.5V
AUD_SCK
E20
AUD_MASTER_CLK_0
D19
AUD_LRCH
F18
LED_DRIVER_D/L_SCL
E18
MODEL_OPT_4
D18
MODEL_OPT_5
E19
+2.5V_Normal
C236
HSYNC0
LINE_IN_1L
VSYNC0
LINE_IN_1R
RIN0P
LINE_IN_2L
RIN0M
LINE_IN_2R
GIN0P
LINE_IN_3L
GIN0M
LINE_IN_3R
BIN0P
LINE_IN_4L
BIN0M
LINE_IN_4R
LINE_IN_5L
P3
C237
P1
C238
P2
C239
2.2uF
2.2uF
2.2uF
C4059
2.2uF
2.2uF
P5
C4060
2.2uF
R6
C242
P4
C243
2.2uF
U5
C244
2.2uF
V5
U6
C245
C246
V6
C247
SC1/COMP1_R_IN
2.2uF
T6
AU33
COMP2_L_IN
COMP2_R_IN
AU25:10mA
2.2uF OPT
2.2uF OPT
VDD33
AVDD25_PGA:13mA
V20
U19
W20
U20
LINE_OUT_2R
BIN1P
LINE_OUT_3R
BIN1M
C224
1000pF
M3
BIN2P
VAG
BIN2M
VRP
SOGIN2
C248
TU_CVBS
SC1_CVBS_IN
AV_CVBS_IN2
C203
1000pF
OPT
HP_OUT_1L
R244
33
C225
0.047uF
N4
R245
33
C226
0.047uF
N6
R246
Delete CHB_CVBS_IN
0.047uF
33
C227
0.047uF
L4
R4016
33
C4057 0.047uF
L5
R248
33
C229
L6
R249
33
C230
0.047uF
0.047uF
M4
R250
33
C231
0.047uF
M5
R251
33
C232
0.047uF
K7
CVBS3P
ET_TXD0
CVBS4P
M7
DTV/MNT_VOUT
R252
68
C233
0.047uF
CVBS_OUT1
ET_TX_EN
CVBS_OUT2
ET_MDC
ET_MDIO
N5
VCOM0
HP_LOUT
5.6uH
F21
GND_32
AVDD2P5_ADC_1
GND_33
AVDD2P5_ADC_2
GND_34
AVDD25_REF
GND_35
GND_37
GND_38
GND_40
PVDD_1
GND_41
PVDD_2
GND_42
GND_43
GND_44
GND_46
GND_47
GND_49
AVDD_DVI_1
GND_50
AVDD_DVI_2
GND_51
AVDD3P3_CVBS
GND_52
AVDD_DMPLL
GND_53
GND_55
AVDD_AU33
GND_56
AVDD_EAR33
GND_57
GND_59
GND_60
GND_61
VDDP_1
GND_62
VDDP_2
GND_63
VDDP_3
GND_64
GND_66
FRC_VD33_2_1
GND_67
FRC_VD33_2_2
GND_68
GND_69
FRC_AVDD_RSDS_1
GND_70
FRC_AVDD_RSDS_2
GND_71
FRC_AVDD_RSDS_3
GND_72
GND_73
FRC_AVDD
GND_74
FRC_AVDD_LPLL
GND_75
FRC_AVDD_MPLL
GND_76
GND_77
GND_78
GND_81
AVDD_MEMPLL
GND_82
FRC_AVDD_MEMPLL
GND_83
C285
AVDD_DDR0_D_1
GND_86
AVDD_DDR0_D_2
GND_87
AVDD_DDR0_D_3
GND_88
AVDD_DDR0_D_4
GND_89
AVDD_DDR0_C
GND_90
GND_91
F16
F17
MVREF
GND_85
G17
H17
AVDD_DDR1_D_1
GND_92
AVDD_DDR1_D_2
GND_93
AVDD_DDR1_D_3
GND_94
AVDD_DDR1_D_4
GND_95
AVDD_DDR1_C
GND_96
GND_98
AB11
AB12
AC11
AC12
D22
AA12
F22
FRC_AVDD_DDR_D_1
GND_99
FRC_AVDD_DDR_D_2
GND_100
FRC_AVDD_DDR_D_3
GND_101
FRC_AVDD_DDR_D_4
GND_102
FRC_AVDD_DDR_C
GND_103
GND_104
D23
F23
RSDS Power OPT
GND_105
+1.26V_VDDC
GND_106
G8
MVREF
GND_107
G15
MVREF
TP206
L228
BLM18SG700TN1D
OPT
R298
100
GND_109
SOC_RESET
Y17
L226
BLM18SG700TN1D
10K
R4006
U3_RESET
0.1uF
MIU1VDDC
C4066 10uF
K8
A4
GND_108
GND_110
Y7
Y8
NC_1
GND_FU
NC_2
PGA_VCOM
H10
H18
H19
J10
J17
J18
J19
K9
K10
K11
K12
K13
K14
K15
K16
K17
K18
L9
L10
L11
L12
L13
L14
L15
L16
L17
M9
M10
M11
M12
M13
M14
M15
M16
M17
N10
N11
N12
N13
N14
N15
N16
N17
P10
P11
P12
P13
P14
P15
P16
P17
R10
R11
R12
R13
R14
R15
R16
R17
R18
T10
T11
T12
T13
T14
T15
T16
T17
T18
T19
U10
U11
U12
U13
U14
U15
U16
U17
V7
V8
V9
V10
V11
V12
V13
V14
V15
V16
V17
V18
W7
W8
W9
W10
W11
W12
W13
W16
W17
W18
Y13
Y18
AA13
AB13
AC13
D17
H23
AF13
J9
L223
U9 BLM18SG121TN1D
C4056
RESET
D16
E23
C4063 10uF
IRINT
Copyright © 2011 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
GND_30
D15
G16
MIU0VDDC
TESTPIN
THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.
GND_29
DVDD_NODIE
GND_97
F8
TP211
W14
E22
ET_CRS
AVLINK
0.1uF
AVDD_DDR0
HP_ROUT
Close to MSTAR
AV_CVBS_IN2
AVDD1P2
R19
E16
AVDD_DDR0
ET_TXD1
ET_REFCLK
M6
OPT
OPT
OPT
D21
ET_RXD1
CVBS7P
TP210
R2 L205
E21
ET_RXD0
OPT
H/P OUT
CM2012F5R6KT
CVBS2P
CVBS6P
T20
E17
CM2012F5R6KT
5.6uH
R1 L203
CVBS0P
CVBS5P
U18
E15
P6
HP_OUT_1R
CVBS1P
OPT
C4038
L1
C263
10uF
0.1uF
0.047uF
C256
0.1uF
0.1uF
C223
R7
C253
1uF
C4036
68
C249
4.7uF
C4032
R242
L2
GIN2M
AVDD_DDR0
0.1uF
0.047uF
0.047uF
P7
VRM
OPT
C4028
C221
C222
M1
R241
68
33
RIN2M
GIN2P
GND_28
GND_80
0.1uF
M2
L202
BLM18SG121TN1D
AUCOM
10uF
0.047uF
GND_26
GND_84
C241
C220
GND_25
T4
C4018
33
GND_24
VDD33
AVDD_DDR0
C4022
R239
AVDD_DDR0
10uF
N2
AVDD_DDR1:55mA
1/16W
1%
0.047uF
FRC_VDDC_8
GND_79
1/16W
1%
C219
GND_23
Y14
AVDD_DDR0:55mA
0.1uF
68
T5 C234 OPT 2.2uF
R5 C235
2.2uF
OPT
HSYNC2
RIN2P
FRC_VDDC_7
AVDD_DDR0
+1.5V_DDR
R4014
1K
N3
GND_22
FRC_VDD33_DDR
R4015
1K
0.047uF
R238
R240
COMP2_Pb+
C218
EXT_R_AMP
0.1uF
COMP2_Y+
33
TP209
W5
C4042
COMP2_Pr+
MIC_DET_IN
MICIN
H5
R237
SCART1_Rout
R4
MICCM
OPT
Y3
DDR3 1.5V
C4009
SOGIN1
0
TP208
0.1uF
GIN1M
V4
0.1uF
J5
LINE_OUT_0R
C4003
1000pF
GND_21
FRC_VDDC_6
T9
R9
0.1uF
C217
J6
FRC_VDDC_5
H9
C4062
0.047uF
H4
GIN1P
0.1uF
R236
C216
K6
GND_20
AVDD33_T
FRC_LPLL
0.1uF
SC1_SOG_IN
68
C215
0.047uF
0.047uF
J4
EXT_L_AMP
C4046
R258
C214
0.047uF
TP207
W4
C297
R257
SC1_B+/COMP1_Pb+
68
33
C213
LINE_OUT_3L
0.1uF
R256
33
LINE_OUT_2L
RIN1M
SCART1_Lout
C290
R255
SC1_G+/COMP1_Y+
RIN1P
W3
BLM18PG121SN1D
K4
FRC_VDDC_4
W19
C281
0.047uF
U4
LINE_OUT_0L
10uF
C212
HSYNC1
10uF
68
GND_19
GND_65
PC_R_IN
L209
R254
GND_18
FRC_VDDC_3
GND_58
L219
BLM18PG121SN1D
L212
BLM18PG121SN1D
C278
K5
FRC_VDDC_2
T7
T8
PC_L_IN
2.2uF
P8
U7
AVDD25_PGA
+2.5V_Normal
AU25
+2.5V_Normal
R217
22K
0.047uF
GND_17
R8
C272
4.7uF
C211
GND_16
FRC_VDDC_1
GND_54
L211
BLM18PG121SN1D
SC1/COMP1_L_IN
C268
4.7uF
33
FRC_VDDC_0
N9
N8
AVDD_DMPLL
AVDD2P5
AVDD2P5
AVDD2P5
AUD_LRCK
C200
0.01uF
R253
GND_15
M8
P9
AVDD2P5/ADC2P5:162mA
AUDIO OUT
SC1_R+/COMP1_Pr+
GND_14
GND_48
NEC_SCL
N1
LINE_IN_0R
VSYNC1
GND_13
B_DVDD
U8
G4
H6
A_DVDD
W15
V19
SC1_FB
GND_12
COMP2_DET
LINE_IN_5R
SC1_ID
GND_11
AVDD_NODIE
HOTPLUGD/GPIO22
SOGIN0
GND_10
VDDC_11
GND_45
AUDIO IN
DSUB_VSYNC
VDDC_10
AVDD25_PGA
NEC_SDA
D20
LINE_IN_0L
DSUB_HSYNC
AVDD25_PGA
SIDE_USB_DP
F14
I2S_IN_BCK/GPIO175
G5
GND_9
SIDE USB
CEC/GPIO5
R4024 22
R4025 22
SIDE_USB_DM
AE17
I2S_I/F
B1
GND_8
VDDC_9
L8
AVDD_DMPLL/AVDD_NODIE:7.362mA
DDCDC_CK/GPIO27
A2
AVDD2P5
OPT
AF17
HOTPLUGC/GPIO21
HPD4
A7
AVDD2P5
C_RX2P
VDDC_8
GND_39
0.1uF
D2-_HDMI4
B7
C_RX1P
GND_7
AVDD_AU25
C4026
AC1
B/T USB
C_RX0N
AU25
C288
0.1uF
0.1uF
AC2
D2+_HDMI4
C287
10uF
C_RX0P
C4027
AB2
D1-_HDMI4
SPDIF_OUT
0.1uF
AB3
SPDIF_OUT/GPIO178
VDDC_7
GND_36
C295
D0-_HDMI4
D1+_HDMI4
C_RXCN
100
L217
BLM18PG121SN1D
0.1uF
AA3
GND_6
H7
J7
C296
AB1
D0+_HDMI4
L207
BLM18PG121SN1D
0.1uF
CK-_HDMI4
R296
GND_5
VDDC_6
J11
27pF
LED_DRIVER_D/L_SDA
G13
VDDC_5
27pF
C289 10uF
AA1
SPDIF_IN/GPIO177
GND_4
GND_31
G14
C_RXCP
VDDC_4
GND_27
C4045
C294
AA2
GND_3
U3_DVDD_DDR
J8
CK+_HDMI4
GND_2
VDDC_3
Y12
TU_SDA
T2
DDCDB_DA/GPIO26
C4065
0.022uF
16V
TU/DEMOD_I2C
22
FRC_LPLL:13mA
FRC_LPLL
L206
BLM18PG121SN1D
GND_1
VDDC_2
L19
C4015
0.1uF
OPT
Y1
K19
MIU1VDDC
L215
BLM18PG121SN1D
+3.3V_Normal
G18
VDDC_1
H16
MIU0VDDC
AU33
V2
IP
D3
CK+_HDMI2
C250
IF_P_MSTAR
0.1uF
H2
D2-_HDMI1
0.1uF
C4023
H1
D2+_HDMI1
A_RX1P
C258
J12
0.1uF
G1
D1-_HDMI1
100
H15
C4016
H3
R289
VDD33
A_RX0P
A_RX0N
0.1uF
ANALOG SIF
Close to MSTAR
TP201
VIFM
C257
0.1uF
G3
D0-_HDMI1
D1+_HDMI1
A_RXCN
100
H13
H14
C286
G2
D0+_HDMI1
VIFP
1M
CK-_HDMI1
A_RXCP
R287
F2
W2
R288
C4044
DTV_IF
Close to MSTAR
CK+_HDMI1
HDMI
OPT
LGE107DC-RP
+1.26V_VDDC
--> MODEL_OPT_5, MODEL_OPT_6
: Only 3D_SG GPIO OUTPUT CONTROL
F1
DSUB
OPT
OLED
LCD
1K
F9
S7M-PLUS_DivX_MS10
IC101
LGE107DC-RP [S7M+ DIVX/MS10]
COMP2
OPT
-->In case of GP2, This port was used for GIP/NON_GIP
R227
PHM_OFF
R212
1K
1K
HD
R207
NON_DVB_T2
R209
1K
50/60Hz LVDS
R297
1K
R293 OPT 1K
1K
OPT
R215
--> This option is only applied in EU.
In case of NON_EU, default value set LOW.
MODEL_OPT_2
OPT
CVBS In/OUT
C276
PHM_ON
C277
PHM_OFF
10uF
C5
10uF
MODEL_OPT_1
LOW
LOW
HIGH
HIGH
C275
100/120Hz LVDS
C228
50/60Hz LVDS
1K
OPT
R226
PHM_ON
R211
1K
1K
DVB_T2
R208
1K
E18
: LOW
: HIGH
:HIGH
: LOW
0.1uF
OPT
MODEL_OPT_4
OPT_0 OPT_4
NO_FRC
U3_INTERNAL
U5_EXTERNALBOOT
reserved for FRC
C4043
OPT 100
OPT
0
R216
FRC_HW_OPT
1000pF
R210
R213
HIGH
NO FRC
OPT
C264
100
LOW
G19
MODEL_OPT_0
R203 RF_SW_OPT 100
R204
PIN NO.
R200
22K
LNA2_CTL
RF_SWITCH_CTL
PIN NAME
MODEL_OPT_0
C201
0.01uF
IF_AGC_SEL
FHD
R206
1K
OPT 100
R201
R202 BOOSTER_OPT100
100/120Hz LVDS
R294
1K
OPT
R295
OPT
R214
1K
MODEL OPTION
GP2R
MAIN2, HW OPT
20101023
2
LGE Internal Use Only
S7M-PLUS_DivX_MS10
IC101
LGE107DC-RP [S7M+ DIVX/MS10]
AE1
AF16
AF1
AE3
AD14
AD3
AF15
AF2
AE15
AD2
AD16
AD15
AE16
W26
FRC_DDR3_A0/DDR2_NC
ACKP/RLV3P/RED[3]
FRC_DDR3_A1/DDR2_A6
ACKM/RLV3N/RED[2]
FRC_DDR3_A2/DDR2_A7
A0P/RLV0P/RED[9]
FRC_DDR3_A3/DDR2_A1
A0M/RLV0N/RED[8]
FRC_DDR3_A4/DDR2_CASZ
A1P/RLV1P/RED[7]
FRC_DDR3_A5/DDR2_A10
A1M/RLV1N/RED[6]
FRC_DDR3_A6/DDR2_A0
A2P/RLV2P/RED[5]
FRC_DDR3_A7/DDR2_A5
A2M/RLV2N/RED[4]
FRC_DDR3_A8/DDR2_A2
A3P/RLV4P/RED[1]
FRC_DDR3_A9/DDR2_A9
A3M/RLV4N/RED[0]
FRC_DDR3_A10/DDR2_A11
A4P/RLV5P/GREEN[9]
FRC_DDR3_A11/DDR2_A4
A4M/RLV5N/GREEN[8]
W25
U26
U25
U24
V26
V25
V24
W24
Y26
Y25
Y24
RXBCK+
RXBCKRXB0+
RXB0RXB1+
RXB1RXB2+
RXB2RXB3+
RXB3RXB4+
RXB4-
FRC_DDR3_A12/DDR2_A8
AC26
BCKP/TCON13/GREEN[1]
BCKM/TCON12/GREEN[0]
B0P/RLV6P/GREEN[7]
AF3
AF14
AD1
FRC_DDR3_BA0/DDR2_BA2
B0M/RLV6N/GREEN[6]
FRC_DDR3_BA1/DDR2_ODT
B1P/RLV7P/GREEN[5]
FRC_DDR3_BA2/DDR2_A12
B1M/RLV7N/GREEN[4]
B2P/RLV8P/GREEN[3]
AD13
AE14
AE13
FRC_DDR3_MCLK/DDR2_MCLK
B2M/RLV8N/GREEN[2]
FRC_DDR3_CKE/DDR2_RASZ
B3P/TCON11/BLUE[9]
FRC_DDR3_MCLKZ/DDR2_MCLKZ
B3M/TCON10/BLUE[8]
B4P/TCON9/BLUE[7]
AF4
AD4
FRC_DDR3_RASZ/DDR2_WEZ
FRC_DDR3_CASZ/DDR2_CKE
FRC_DDR3_RESETB/DDR2_A3
CCKM/LLV3N
C0M/LLV0N/BLUE[4]
C1P/LLV1P/BLUE[3]
C1M/LLV1N/BLUE[2]
AF8
FRC_DDR3_DQSL/DDR2_DQS0
C2P/LLV2P/BLUE[1]
FRC_DDR3_DQSLB/DDR2_DQSB0
C2M/LLV2N/BLUE[0]
C3P/LLV4P
AE9
FRC_DDR3_DQSU/DDR2_DQS1
C3M/LLV4N
FRC_DDR3_DQSUB/DDR2_DQSB1
C4P/LLV5P
AD12
AE5
AF12
AF5
AE12
FRC_DDR3_DQL0/DDR2_DQ6
DCKM/TCON4
FRC_DDR3_DQL1/DDR2_DQ0
D0P/LLV6P
FRC_DDR3_DQL2/DDR2_DQ1
D0M/LLV6N
FRC_DDR3_DQL3/DDR2_DQ2
D1P/LLV7P
FRC_DDR3_DQL4/DDR2_DQ4
D1M/LLV7N
FRC_DDR3_DQL5/DDR2_NC
D2P/LLV8P
FRC_DDR3_DQL6/DDR2_DQ3
D2M/LLV8N
FRC_DDR3_DQL7/DDR2_DQ5
D3P/TCON3
D3M/TCON2
AE10
AF7
AD11
AD7
AD10
AE7
AF10
AD8
AB24
AC24
AD26
AD25
AD24
RXA0RXA1+
RXA1RXA2+
RXA2RXA3+
RXA3RXA4+
RXA4-
AE23
AE26
AE25
AF26
AF25
AE24
AF24
AF23
AD22
AE22
AF22
AD19
DCKP/TCON5
AE6
AD6
AB25
RXA0+
FRC_DDR3_DML/DDR2_DQ7
FRC_DDR3_DMU/DDR2_DQ11
AF11
AB26
RXACK-
C4M/LLV5N
AE11
AF6
AA24
AD23
CCKP/LLV3P
C0P/LLV0P/BLUE[5]
AE2
AF9
AA25
RXACK+
FRC_DDR3_ODT/DDR2_BA1
FRC_DDR3_WEZ/DDR2_BA0
AD9
AA26
B4M/TCON8/BLUE[6]
AE4
AD5
AC25
FRC_DDR3_DQU0/DDR2_DQ8
D4P/TCON1
FRC_DDR3_DQU1/DDR2_DQ14
D4M/TCON0
AE19
AD21
AE21
AF21
AD20
AE20
AF20
AF19
AD18
AE18
AF18
FRC_DDR3_DQU2/DDR2_DQ13
FRC_DDR3_DQU3/DDR2_DQ12
FRC_DDR3_DQU4/DDR2_DQ15
FRC_DDR3_DQU5/DDR2_DQ9
AB22
GPIO0/TCON15/HSYNC/VDD_ODD
GPIO1/TCON14/VSYNC/VDD_EVEN
FRC_DDR3_DQU6/DDR2_DQ10
GPIO2/TCON7/LDE/GCLK4
FRC_DDR3_DQU7/DDR2_DQM1
GPIO3/TCON6/LCK/GCLK2
AB23
AC23
AC22
2D/3D_CTL
AB16
FRC_SPI_CZ
FRC_GPIO1
AA14
AC15
FRC_SPI1_CK
R301
33
FRC_L/DIM
L/DIM_SCLK
Y16
FRC_GPIO8
FRC_SPI_DO
AE8
FRC_DDR3_NC/DDR2_DQM0
R300
820
S7M-R
R300-*1
4.7K
S7M-PLUS
AC14
FRC_SPI1_DI
Y11
Y19
AC16
R302
33
FRC_L/DIM
L/DIM_MOSI
AA16
FRC_VSYNC_LIKE
FRC_TESTPIN
FRC_SPI_CK
AA15
FRC_SPI_DI
Y10
FRC_I2CS_DA
AA11
FRC_I2CS_CK
AB15
FRC_PWM0
AB14
FRC_PWM1
THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.
Copyright © 2011 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
GP2R
FRC_DDR
20101023
3
LGE Internal Use Only
ST_3.5V--> 3.375V --> 3.46V
20V-->3.51V --> 3.76V (3.59V)
GND/V-sync
18
INV ON
19
20
A.DIM
12V
21
22
P.DIM1
GND/P.DIM2
23
24
Err OUT
OPT
R463
10K
R450
0
PD_+12V
1%
R448
2.7K
R447
1.21K
1/10W
1%
PD_+12V
3
2
RESET
B
OPT
E
R427
10K
OPT
POWER_18_A_DIM
0
R451
L420
VIN_1
R484
0
C461
10uF
10V
C468
0.1uF
16V
VIN_2
2
GND_1
3
GND_2
12
PH_3
11
PH_2
10
IC407
TPS54319TRE
9
PH_1
4
5
R606-*1
1K
PWM_PULL-DOWN_1K
AGND
+3.3V_Normal
1%
R482
8.2K
L423
3.6uH
AGND
C472
22uF
10V
C470
0.1uF
16V
C476
22uF
10V
0.01uF
50V
R1
R452
1/16W 330K 5%
8
2
7
LX_2
1/16W
L424
CIC21J501NE
5%
3A
3
6
LX_1
POWER_ON/OFF2_2
EN
R456
10K
C459
10uF
25V
FB
4
5
COMP
12K
R454
C485
0.1uF
16V
C473
0.1uF
16V
C469
22uF
16V
R1
OPT
C423
100pF
50V
2200pF
C464
C463
100pF
50V
C467
4700pF
R455
15K
ERROR_OUT
C457
10uF
25V
NR8040T3R6N
C465
R2
Vout=(1+R1/R2)*0.8
50V
R2
100
R420
1
NR8040T3R6N
SS/TR
OPT
R486
4.7K
100
POWER_24_ERROR_OUT
PGND
VIN
THERMAL
17
POWER_20_ERROR_OUT
R437
+1.5V_DDR
1934 mA
L421
3.6uH
16V
1
PWM_DIM
R471 0
PWM_PULL-DOWN_3.9K
POWER_22_PWM_DIM
R606
3.9K
C416
OPT
0.1uF
16V
C462
0.1uF
A_DIM
POWER_20_A_DIM
0
POWER_20_PWM_DIM R453
POWER_24_PWM_DIM
R472 0
IC405
AOZ1073AIL-3
0.1uF
16V
+3.5V_ST
POWER_22_A_DIM
R485
0
+3.3V_Normal
+12V/+15V
C475
INV_CTL
Q405
2SC3052
+3.3V_Normal
1074 mA
POWER_ON/OFF1
R421
10K
VCC
GND
S7M DDR 1.5V
OPT
R425
100
C
R418
POWER_24_INV_CTL
6.8K
3
Power_DET
R460
27K
R426
10K
2
1
PD_+12V_PWR_DET_DIODES
R461
4.7K
+3.5V_ST
NCP803SN293
PD_+12V_PWR_DET_ON_SEMI
GND
+3.3V_Normal
R419
1K
VCC
IC409-*1
R480
100
E
POWER_18_INV_CTL
R415
100
3
GND
PD_+12V
RESET
1
1%
R403
1.5K
R440
5.6K
1:AK10
POWER_+24V
2
1
APX803D29
VCC
C412
0.1uF
16V
PD_+12V
RESET
R462
10K
SLIM_32~52
P401
SMAW200-H24S2
POWER_24_GND
R475
0
R476
0
POWER_23_GND
L402-*1
CIS21J121
25
OPT
R407
2.2K
L416
C407
0.1uF
16V
OPT
C404
0.1uF
16V
C455
0.1uF
16V
R457
L402
MLB-201209-0120P-N2
OPT
R405
2.2K
PD_+12V
100K
IC409
BOOT
+12V/+15V
R404
1%
16
17
C474
0.1uF
IC408-*1
1%
15
12V
POWER_DET
PWR_DET_DIODES
1%
GND
12V
PWRGD
GND
13
14
14
13
R402
100
RESET
NCP803SN293
PWR_DET_ON_SEMI
POWER_+24V
E
R435
22K
Q406
2SC3052
7
GND
C
R429
47K
B
PANEL_CTL
GND
+24V
Q407
2SC3052
8
3.5V
COMP
3.5V
12
2
1
R405-*1
3K
C
RT/CLK
10
11
3.5V
G
C451
0.1uF
50V
1608
OPT
B
10K
R464
8
9
3.5V
C408
0.1uF
16V
OPT
OPT
R430
10K
C426
68uF
35V
EN
C406
0.1uF
16V
POWER_16_GND
C401
100uF
16V
C418
0.1uF
50V
VIN_3
7
GND
15
GND
6
24V
6
5
VSENSE
4
GND
EP[GND]
L404
MLB-201209-0120P-N2
C411
0.1uF
16V
PANEL_VCC
3
PANEL_DISCHARGE_RES
+24V
L407
MLB-201209-0120P-N2
0
2
24V
R412
PWR ON 1
24V
3
GND
+3.5V_ST
L407-*1
CIS21J121
R431
22K
L404-*1
CIS21J121
E
R439
33K
S
Q401
2SC3052
B
NORMAL_32
P404
FM20020-24
NORMAL_EXPEPT_32
P403
FW20020-24S
2
R407-*2
3K
C443
10uF
25V
47K 1%
C
PANEL_DISCHARGE_RES
D
D401
A2
A1
C
3
IC408
APX803D29
VCC
Q402
1
+3.5V_ST
R488
100K
New item
Q409
AO3407A
RT1P141C-T112
R406
4.7K
R401
10K
C402
100uF
16V
C442
10uF
16V
OPT
C438
0.1uF
16V
+3.5V_ST -> 3.375V
+3.5V_ST
12V -->3.58V --> 3.82V (3.68V)
PD_+3.5V
5%
L412
RL_ON
0.01uF
C409
C436
0.015uF
0.01uF
50V
25V
0.015uF
+3.5V_ST
+12V/+15V
24V-->3.78V --> 3.92V (3.79V)
18.5V-->3.5V --> 3.75V (3.59V)
16
EXT5V_CTRL
PANEL_POWER
C
D400
A2
A1
EXT12V_CTRL
+12V/+15V
FROM LIPS & POWER B/D
R449
56K
1/16W
1%
3A $ 0.145
Vout=0.827*(1+R1/R2)=1.521V
INV_ON
A-DIM
INV_ON
+12V/+15V
GND
INV_ON
TP5303
V_SYNC
TP5304
SCAN_BLK2
INV_ON
+2.5V/+1.8V
SCAN_BLK1/OPC_OUT
TP5305
+3.3V_Normal
52/60:ERROR
20
VBR-A
Err_out
NC
26/32HD:NC
TP5306
Err_out
OPC_OUT
IC402
PGND
23
C490
0.1uF
AGND
16V
Err_out INV_ON PWM_DIM
GND
GND
GND
VIN
NC
60:NC
26/32/52:GND
60:PWM
VOUT
1 Vd=550mV3
300 mA
2
PWM_DIM
C432
0.1uF
16V
GND
C458
10uF
25V
1
NC
R473
24
PWM_DIM PWM_DIM
<LED MODULE PIN MAP -> latest update 20100618>
32LE5300-TA
CMO10"LED
(PSU)
NC
32LE4500-TA
AUO 10"LED
16
NC
18
INV_ON
INV_ON INV_ON
INV_ON
20
NC
err_out err_out
--> NC --> NC
NC
NC
22
PWM_DIM
24
err_out
--> NC PWM_DIM PWM_DIM
23
NC
NC
NC
INV
#11
#12
#13
#14
(PSU)
NC
NC
2
7
L422
3.6uH
LX_2
3
2A
6
LX_1
POWER_ON/OFF2_2
EN
R459
10K
C460
10uF
25V
FB
4
5
COMP
12K
R458
<-->
<-->
<-->
<-->
<-->
2200pF
C466
Vout=0.8*(1+R1/R2)
MAIN
#24
#18
#20
#22
R1
C471
22uF
16V
C477
0.1uF
16V
OPT
C427
100pF
50V
C440
0.1uF
16V
<Module Inv to Main Pin Connection>
32LE5300-TA
LGD 10"LED
(PSU)
8
GND
GND
C403
10uF
10V
PIN No LGD LPB/
OS LPB
1
NR8040T3R6N
VIN
+2.5V_Normal
AZ2940D-2.5TRE1
26/32/52:PWM
22
MAX 1A
IC406
AOZ1072AI-3
1%
GND
R465
24K
GND
1%
(PSU)
GND
+5V_Normal
IPS-@
(PSU)
R466
51K
18
(PSU)
GND
AUO 10"Lamp
R467
10K
16
SHARP
(PSU)
CMO10"Lamp
L417
PIN No LGD(PSU)
or LIPS
1%
<MODULE PIN MAP>
R2
+5V_TUNER
IC410
AP1117EG-13
PWM_DIM
IN
S7M core 1.26V volt
NC
C491
0.1uF
50V
IN
330
R411
110
R417
R424
1
5%
C415
10uF
10V
10K
R445
C414
0.1uF
16V
OUT
ADJ/GND
R422
1
5%
POWER_ON/OFF2_1
LGD edge led error-out use or not? checking is necessary...
IC411
AP1117EG-13
OUT
ADJ/GND
err_out
--> NC
NC
+5V_Normal
C422
0.1uF
50V
330
R409
110
R408
C417
0.1uF
16V
C419
10uF
10V
C447
0.1uF
16V
+3.5V_ST
4
5
COMP
2200pF
C413
C420
22uF
16V
C424
0.1uF
16V
C428
0.1uF
16V
OPT
GND_2
THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.
Copyright © 2011 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
13
PWRGD
14
15
EN
BOOT
SS
C453
22uF
10V
C456
22uF
10V
0.01uF
50V
R432
1/16W 330K 5%
1/16W
5%
R1
C444
0.1uF
16V
50V
100pF
C439
C448
3300pF
50V
R2
R2
4A
Vout=(1+R1/R2)*0.8
NR8040T3R6N
C488
R442
OPT
C429
100pF
50V
PH_1
R436
7.5K
R423
10K
12K
R413
R1
PH_2
2
3
22K 1% 24K 1%
FB
1%
R414
51K
POWER_ON/OFF2_1
R410
10K
11
10
IC403
SN1007054RTER
4
9
VIN_2
GND_1
L415
3.6uH
R444
EN
C431
0.1uF
16V
8
6
C430
10uF
10V
RT/CLK
3A
1%
3
LX_1
R416
1.5K
C410
10uF
25V
7
1%
C405
10uF
25V
2
PH_3
THERMAL
17
7
NR8040T3R6N
VIN
C489
0.1uF
16V AGND
C421,C422 Close to LDO
16V
12
1
6
VIN_1
COMP
LX_2
VSENSE
8
1
L413
5
PGND
2000 mA
L406
3.6uH
AGND
L401
IC401
AOZ1073AIL-3
VIN_3
EP[GND]
+12V/+15V
+1.26V_VDDC
C441
0.1uF
16
+5V_USB
+5V_USB
$ 0.165
R441
75K
1/8W
1%
Vout=0.8*(1+R1/R2)=1.29V
GP2R
POWER_LARGE
20101023
4
LGE Internal Use Only
OPT R5025
OPT R5026
MICOM_RESET
47K
R5057
R5070 OPT 22
OPT
22
R5069
P120/INTP0/EXLVI
P47/INTP2
P46/INTP1/TI05/TO05
P45/SO01
P44/SI01
P43/SCK01
P42/TI04/TO04
TOOL1
TOOL0
P40/TOOL0
RESET
P41/TOOL1
FLMD0
P124/XT2
P123/XT1
FLMD0
RTC_INT
22
R5060
13pF
C5006
13pF
C5004
R5051
1M
P122/X2/EXCLK
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
63
22
P05/CLKOUT
19
62
P25/ANI5
20
61
P26/ANI6
R5033
22
P80/EX0
21
60
P27/ANI7
R5034
22
P81/EX1
22
59
P150/ANI8
R5035
22
P82/EX2
24
57
P152/ANI10
P84/EX4
25
56
P153/ANI11
R5038
22
P85/EX5
26
55
P154/ANI12
R5039
22
P86/EX6
27
54
P155/ANI13
R5040
10K
P87/EX7
28
53
P156/ANI14
R5041
0 P30/INTP3/RTC1HZ
29
52
P157/ANI15
EVDD1
30
51
AVSS
22
R5058
R5053
22
22
R5050
R5052
22
R5049
22
100
22
R5048
R5046
R5027
R5047
R5024
100
4.7K
4.7K
R5030
R5045
4.7K
4.7K
R5029
R5102
10
10
9
R5104
10
8
NEC_EEPROM_SCL
7
IC5009
AMP_MUTE
KID65003AF
6
I1
1
16
2
15
3
14
4
13
5
12
6
11
7
10
8
9
O1
R5096
10
O2
R5095
10
5
I2
4
I3
+5V_ST
R5101
10
O3
3
I4
O4
R5097
10
O5
R5098
10
O6
R5100
10
O7
R5099
10
2
I5
1
C
I6
Q5001
+5V_ST
2SC3875S(ALY)
B
4.7K
R5081
I7
R5089
10K
E
GND
12507WR-12L
+3.5V_ST
P5001
COMMON
R5110
0
C
+5V_ST
Q5002
2SC3875S(ALY)
B
4.7K
R5082
E
R5068
10K
C
IR_OUT_CTRL
MST_NEC_TX
EEPROM_SW
Q5004
+5V_ST
2SC3875S(ALY)
E
+3.5V_ST
P5000
12507WS-06L
C
B
4.7K
R5085
R5093
4.7K
Q5003
2SC3875S(ALY)
E
+5V_ST
R5094
4.7K
1
2
MICOM_RESET
R5092
10K
NEC_TX
MST_NEC_RX
NEC_RX
EXT12V_CTRL
EXT_PWR_DET
SCART1_MUTE
EXT5V_CTRL
AMP_RESET
SIDE_HP_MUTE
13
R5106
10
C
C
NEC_EEPROM_SDA
B
POWER_ON/OFF2_1
C
R5103
10
4.7K
R5083
S/T_SDA
B
B
C
E Q5010
2SA1504S
SUBAMP_SD
SUBAMP_MUTE
22
EYEQ_SCL
EYEQ_SDA
S/T_SCL
B
E Q5009
2SA1504S
R5105
10
AVREF0
P111/ANO1
+3.5V_ST
E Q5008
2SA1504S
12
22
P51/EX9
P50/EX8
31
E
B
C
22
50
P83/EX3
49
22
22
48
58
R5036
R5037
E Q5007
2SA1504S
11
R5067
POWER_DET
23
P151/ANI9
P110/ANO0
SOC_RESET
EVSS1
R5066 OPT22
TBD
VSS
18
P24/ANI4
47
HIGH
HIGH
EVSS0
P23/ANI3
PANEL_CTL
B
VDD
P22/ANI2
64
POWER_ON/OFF1
C
Q5000
2SC3052
97
65
17
P06/WAIT
UART_SW1
UART_DBG_SW
OPT
R5014
DBG_SW
10K
INV_CTL
EDID_WP
98
16
P70/EX16/KR0
AVREF1
LE7300
99
P71/EX17/KR1
22
46
LOW
EVDD0
66
22
22
OPT R5020
R5021
45
LOW
100
15
R5018
R5019
+3.5V_ST
32/37/42/47/55LE5300(10)
NEC_MICOM
44
HIGH
14
P72/EX18/KR2
P10/EX24/SCK00
HIGH
P20/ANI0
13
P73/EX19/KR3
22
LD420
P130
67
P74/EX20/KR4/INTP8
22
22 P11/EX25/SI00/RXD0
LOW
68
22
22
22 P12/EX26/SO00/TXD0
LOW
P131/TI06/TO06
R5064
LOW
HIGH
69
R5063
HIGH
LOW
UPD78F1164GF(S)70
12
R5061
HIGH
11
P75/EX21/KR5/INTP9
43
19/22/26LE3300(5500)
P76/EX22/KR6/INTP10
42
LOW
22
41
HIGH
R5022
P13/EX27/TXD3
LOW
HIGH
22
R5073
P03/SI10/RXD1/SDA10
P04/SCK10/SCL10 R5074
P14/EX28/RXD3
HIGH
POWER_ON/OFF2_2
R5080
P02/SO10/TXD1
71
P15/EX29/RTCDIV/RTCCL
LD350/450/550
P01/TO00
72
10
22
LOW
73
9
22
LOW
8
R5059
LOW
P66/WR1
P67/ASTB
P77/EX23/KR7/INTP11
40
LOW
22
39
MODEL_OPT_3
R5079
38
MODEL_OPT_2
P00/TI00
IC5004
Q5006
E 2SA1504S
NEC_DBG_TX
P145/TI07/TO07
74
R5017
1
NEC_DBG_RX
75
R5016
1Y
22 OPT
22 OPT
7
P21/ANI1
LED_B
UART_SW2
RL_ON
MODEL_OPT_1
R5078
6
22
22
R5077
P64/RD
R5028
OPT R5023
R5015
LED_R
MODEL_OPT_0
4.7K
BU5000
PKLCS1212E4001-R1
+5V_ST
R5087
4.7K
R5084
4.7K
P65/WR0
P57/EX15
NEC_IR
P144/SO20/TXD2
P17/EX31/TI02/TO02
GP3
76
P16/EX30/TI01/TO01/INTP5
GP2
22
77
5
37
31
R5076
4
22 P31/TI03/TO03/INTP4
36
MODEL_OPT_3
MODEL1_OPT_2
22
P56/EX14
TACT_KEY
R5075
P143/SI20/RXD2/SDA20
P55/EX13
TOUCH_KEY
P142/SCK20/SCL20
35
30
P141/PCLBUZ1/INTP7
78
P54/EX12
MODEL_OPT_2
CEC_ON/OFF
PWM_LED
PWM_BUZZ/IIC_LED
79
3
34
11
80
2
33
B/L_LAMP
8
MODEL_OPT_1
4
B
1
32
B/L_LED
MODEL_OPT_0
3
+3.5V_ST
P63
4.7K
C5011
0.1uF
16V
2
L5002
BLM18PG121SN1D
P62
P53/EX11
LOW
VCC
2
SIGN340048
22 P61/SDA0
P52/EX10
HIGH
PIN NO.
GND
P140/PCLBUZ0/INTP6
R5044
R5031
CEC_REMOTE_NEC
3
5
R5088
10K
MODEL OPTION
1
4
1
R5090
10K
CLOCK_SDA
CLOCK_SDA
SW5000
JTP-1127WEM
2
1A
R5091
10K
CLOCK_SCL
NC
R5043
22
P60/SCL0
96
4.7K
4.7K
R5042
R5032
CLOCK_SCL
IC5007
74LX1G14CTR
C5007
2.2uF
10V
R5054
100K
P121/X1
+3.5V_ST
B/L_LAMP
R5009
10K
PWM_LED
R5006
10K
TACT_KEY
R5004
10K
GP3
R5001
10K
MODEL_OPT_3
0.1uF
16V
MODEL1_OPT_2
CEC_ON/OFF
REGC C5005
MODEL_OPT_1
X5000
10MHz
C5003
0.1uF
16V
MODEL_OPT_0
PANEL_CTL
PIN NAME
Closed to Crystal
+3.5V_ST
L5000
BLM18PG600SN1D
+3.5V_ST
AMP_RESET
B/L_LED
R5008
10K
TOUCH_KEY
R5003
10K
GP2
R5000
10K
PWM_BUZZ/IIC_LED
R5005
10K
+3.5V_ST
MICOM MODEL OPTION
+3.5V_ST
+3.5V_ST
R5107
22
3
TOOL0
C
Q5005
2SC3875S(ALY)
B
4.7K
R5086
4
R5108
22
E
5
TOOL1
R5109
22
6
EEPROM_SW
FLMD0
SELECT CONNECTION
7
R5071
0
KEY1
KEY2
B0 - A
H
B1 - A
R5013
100
UART_SW1
UART_SW2
SELECT
C5000
0.1uF
VCC
6
1
ON SEMICONDUCTOR
ANALOG SWITCH
5
2
IC5002
NLASB3157DFT2G
+3.5V_ST
B1
SELECT
S7_DBG_TX
GND
C5001
0.1uF
6
VCC
MST_NEC_TX
ON SEMICONDUCTOR
ANALOG SWITCH
5
2
VCC
SELECT
B1
1
6
S7_TXD
4
3
B0
UART_TX
NEC_RX
R5011
100
A
C5002
0.1uF
A
GND
4
4
EAN38256201
B0
3
A
S7_RXD
1
ON SEMICONDUCTOR
ANALOG SWITCH
5
2
4
IC5008
SC632ULTRT
NEC_EEPROM_SCL
GND5V
3.3V to
1
OPT
3.3V to 5V
IC5006
NLASB3157DFT2G
IC5003
NLASB3157DFT2G
SELECT
3
B1
SELECT
GND
VCC
B0
UART_RX
NEC_TX
OPT
R5002
0
B0
3
R5056
0
S7_DBG_RX
VCC
Step Up regulator 3.3V to 5V(MAX 250mA)
EAN38256201
IC5001
NLASB3157DFT2G
6
S7_EEPROM_SCL
GND
R5012
100
A
6
1
ON SEMICONDUCTOR
ANALOG SWITCH
5
2
4
3
EAN38256201
EAN38256201
[EP]GND
EAN38256201
UART_RX
R5010
OPT
0
SELECT
B1
1
ON SEMICONDUCTOR
ANALOG SWITCH
5
2
EEPROM_SCL
A
C5008
1uF
50V
IC5005
NLASB3157DFT2G
+3.5V_ST
IC5000
NLASB3157DFT2G
+3.5V_ST
B1
VCC
MST_NEC_RX
GND
A
EEPROM_SDA
6
1
ON SEMICONDUCTOR
ANALOG SWITCH
2
5
4
3
+3.5V_ST
C5010
2.2uF
10V
C1+
C1-
2
8
9
L
R5072
0
THERMAL
R5007
100
SELECT CONNECTION
B0 - A
B1 - A
22
R5065
UART SWITCH
L
H
7
3
6
4
5
C2-
3.3V to 5V
C2+
C5012
2.2uF
10V
3.3V to 5V
B1
S7_EEPROM_SDA
3.3V to 5V
IN
GND
B0
+5V_ST
OUT
NEC_EEPROM_SDA
EN
C5013
22uF
25V
BLM18PG600SN1D 3.3V to 5V
L5001
C5009
22uF
25V
EAN38256201
B0
UART_TX
R5055
0
OPT
THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.
Copyright © 2011 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
GP2R
20101023
MICOM
5
LGE Internal Use Only
CONTROL
IR & LED
+3.5V_ST
OPT
R2421
100
EYEQ_SCL
EYEQ/TOUCH_KEY
R2411
100
R2405
10K
1%
R2404
10K
1%
S/T_SCL
S/T_SDA
L2401
BLM18PG121SN1D
R2401
100
EYEQ_SDA
OLD_SUB
EYEQ/TOUCH_KEY
100
EYEQ/TOUCH_KEY
5.6V
C2408
18pF
50V
OPT
R2412
OPT
100
NEW_SUB
P2401
P2402
12507WR-12L
12507WR-15L
D2403
1
1
2
2
3
3
JP2407
4
4
JP2408
5
5
6
6
7
7
JP2409
8
8
JP2410
9
9
10
10
11
11
R2420
KEY1
EYEQ/TOUCH_KEY
L2402
BLM18PG121SN1D
R2402
100
D2402
5.6V
AMOTECH
KEY2
C2401
0.1uF
5.6V
D2404
C2409
18pF
50V
OPT
C2402
0.1uF
D2401
5.6V
AMOTECH
+3.5V_ST
+3.5V_ST
L2403
BLM18PG121SN1D
R2406
1K
OPT
R2400
22
NEC_IR
+3.5V_ST
+3.5V_ST
R2408
47K
NEC_IR
R2413
C2404
1000pF
50V
1.5K
LED_B
OPT
C2410
0.1uF
16V
R2407
10K
C
Q2400
2SC3052
OPT
C2403
0.1uF
16V
B
E
OPT
R2409
47K
C
R2410
3.3K
OPT
IR_IN
B
Q2401
2SC3052
E
C2407
100pF
50V
+3.3V_Normal
D2405
5.6V
L2404
BLM18PG121SN1D
+5V_ST
JP2411
R2403
0
R2414
R2422
3.3K
C2405
0.1uF
16V
R2423
22
IR_OUT_RS232C
Q2405
2SC3052
12
LED_R
C2406
1000pF
50V
1.5K
OPT
R2416
10K
12
13
13
R2429
10K
C
B
14
E
+5V_ST
15
OPT
100
R2428
3.3K
R2418
R2427
22
100
IR_OUT_HDMI1
S/T_SCL
Q2403
2SC3052
R2424
30K
C
B
E
16
NEC_EEPROM_SCL
Q2404
2SC3052
R2425
10K
C
R2415
B
NEW_SUB
C906
18pF
50V
OPT
E
S/T_SDA
+5V_ST
100
R2417
100
NEC_EEPROM_SDA
OPT
R2419
R2426
3.3K
D902
CDS3C05HDMI1
5.6V
C907
18pF
50V
OPT
NEW_SUB
D903
CDS3C05HDMI1
5.6V
R2431
22
IR_OUT_HDMI2
Q2406
2SC3052
R2432
30K
C
B
IR_OUT_CTRL
E
R2430
10K
C
B
E
Q2402
2SC3052
+5V_ST
R2435
3.3K
R2436
22
IR_OUT_SIDE_HDMI
Q2407
2SC3052
R2434
30K
C
B
E
B
E
Q2408
2SC3052
THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.
Copyright © 2011 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
R2433
10K
C
GP2R
IR/CONTROL-L
20101023
6
LGE Internal Use Only
USB_DIODES
EAN61849601
IC1450
AP2191DSG
L1451-*1
CIS21J121
NC
L1451
MLB-201209-0120P-N2
OUT_2
8
1
$0.077
7
2
6
3
5
4
GND
+5V_USB
IN_1
120-ohm
R1458
2K
1/8W
1%
R1459
2K
1/8W
1%
OUT_1
C1452
10uF
10V
IN_2
C1451
22uF
16V
FLG
C1453
0.1uF
+3.3V_Normal
EN
USB1_OCD
2
SIDE_USB_DM
3
4
Copyright © 2011 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
47
1
R1451
5
THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.
USB1_CTL
R1454
10K
USB DOWN STREAM
3AU04S-305-ZC-(LG)
JK1450
SIGN6409
R1455
4.7K
OPT
SIDE_USB_DP
D1451
CDS3C05HDMI1
5.6V
OPT
D1452
CDS3C05HDMI1
5.6V
OPT
GP2R
USB_OCP_DIODE
20101023
7
LGE Internal Use Only
HDMI EEPROM
A1
A2
5V_HDMI_1 +5V_Normal
C
ENKMC2838-T112
D821
HDMI_1_RENESAS
5V_DET_HDMI_1
IC801-*1
R1EX24002ASAS0A
C
A0
SHIELD
Q802
2SC3052
R896
20
17
3.3K
R802
1.8K
1
VCC
8
A0
1
A1
C802
0.1uF
16V
A2
VSS
DDC_SDA_1
2
7
3
6
4
5
VCC
8
HPD1
E
R804
18
R830
10K
1K
19
B
EDID_WP
AT24C02BN-SH-T
10K
5V_HDMI_1
R874
HDMI_1
HDMI_1_ATMEL
IC801
$0.055
WP
A1
SCL
A2
SDA
GND
2
WP
7
3
6
4
5
C806
R884
R888
0.1uF
2.7K
2.7K
SCL
R876
22
R875
22
DDC_SCL_1
SDA
16
DDC_SDA_1
DDC_SCL_1
15
R805
R824
0
IR_OUT_HDMI1
5V_HDMI_2 +5V_Normal
HDMI_CEC
13
12
9
8
7
6
5
4
3
2
D0-
HDMI_2_RENESAS
D0+_HDMI1
D1-
HDMI_2_ATMEL
IC802
IC802-*1
R1EX24002ASAS0A
D0-_HDMI1
D0_GND
D0+
C
CK+_HDMI1
A0
1
8
2
7
AT24C02BN-SH-T
VCC
A0
WP
A1
1
D1-_HDMI1
D1_GND
A1
D1+
8
$0.055
2
7
EDID_WP
VCC
A2
D2-
D2-_HDMI1
3
6
4
5
SCL
A2
3
6
VSS
SDA
GND
4
5
D2+_HDMI1
R885
R889
2.7K
2.7K
JP810
SCL
DDC_SCL_2
D2_GND
D2+
C807
0.1uF
WP
D1+_HDMI1
R878
22
R877
22
SDA
DDC_SDA_2
OPT
D802
1
ENKMC2838-T112
D822
CK+
10K
11
10
A1
A2
CK-_HDMI1
R873
HDMI_1
EAG59023302
14
0
JK802
A1
A2
5V_HDMI_4 +5V_Normal
BODY_SHIELD
HPD2
19
1.8K
17
A2
15
R898
14
12
8
7
6
5
4
3
2
D0-_HDMI2
11
10
9
8
D1-
D0+_HDMI2
7
D1-_HDMI2
6
D1_GND
5
D1+
D2-
D1+_HDMI2
4
D2-_HDMI2
3
D2_GND
2
D2+
VSS
4
5
6
R887
R891
2.7K
2.7K
DDC_SCL_4
R881 22
4
5
SDA
DDC_SDA_4
SDA
R882 22
D2+_HDMI2
1
JK801
JK803
0
IR_OUT_SIDE_HDMI
0
HDMI_CEC
CK-_HDMI4
12
D0_GND
D0+
R841
13
OPT
D801
1
CK+_HDMI2
D0-
3
C809
0.1uF
JP812
SCL
CK+
CK+_HDMI4
D0D0-_HDMI4
D0_GND
D0+
+3.3V_Normal
D0+_HDMI4
D1D1-_HDMI4
68K
D1_GND
D1+
D1+_HDMI4
R854
For CEC
D2D2-_HDMI4
D2_GND
R855
0
R856
10K
OPT
R857
68K
OPT
D2+
D2+_HDMI4
S
B
D
HDMI_CEC
CK-_HDMI2
CK+
6
WP
JP806
IR_OUT_HDMI2
13
9
3
7
SCL
OPT
D811
0
$0.055
2
WP
DDC_SCL_4
EAG62611201
0
7
GND
DDC_SDA_4
HDMI_SIDE
HDMI_2
EAG59023302
R815
2
EDID_WP
VCC
VCC
JP805
16
R800
8
A1
A1
A2
DDC_SCL_2
15
14
1
HPD4
10K
DDC_SDA_2
16
11
10
A0
R862
C803
0.1uF
16V
R837
18
B
E
1K
3.3K
17
R801
1.8K
Q803
2SC3052
R897
E
C801
0.1uF
16V
R803
18
R828
10K
8
G
19
B
20
1K
1
D804
Q801
2SC3052
C
R835
SHIELD
R895
AT24C02BN-SH-T
A0
C
20
IC804-*1
R1EX24002ASAS0A
5V_DET_HDMI_4
10K
5V_HDMI_4
R871
SIDE_HDMI
5V_DET_HDMI_2
D803
AVRL161A1R1NT
5V_HDMI_2
3.3K
HDMI_2
C
ENKMC2838-T112
D824
HDMI_SIDE_ATMEL
IC804
HDMI_SIDE_RENESAS
CEC_REMOTE_S7
Q806
BSS83
OPT
C805
0.1uF
16V
GND
GND
CEC_ON/OFF
68K
+3.5V_ST
D825
R892
R883
0
R893
10K
OPT
R853
68K
THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.
Copyright © 2011 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
G
D826
AVRL161A1R1NT
S
B
D
HDMI_CEC
CEC_REMOTE_NEC
Q805
BSS83
OPT
C810
0.1uF
16V
GND
GND
GP2R
HDMI
20101023
8
LGE Internal Use Only
RGB/SPDIF/PC/HP
New Item Development
EARPHONE BLOCK
HP_LOUT
C
Q1101
MMBT3904-(F)
E
B
B
MMBT3904-(F)
Q1104
E
JK3301
KJA-PH-0-0177
+3.3V_Normal
C
R1155
1K
HP_ROUT
5
L
4
DETECT
3
R
1
HP_DET
C
C
Q1102
MMBT3904-(F)
E
B
B
C
MMBT3904-(F)
Q1103
E
R1129
3.3K
B
C
E
PEJ027-01
3
E_SPRING
OPT
T_TERMINAL1
7A
B_TERMINAL1
3
T_TERMINAL1
7A
B_TERMINAL1
4
R_SPRING
5
T_SPRING
7B
B_TERMINAL2
6B
T_TERMINAL2
+3.3V_Normal
5.15 Mstar Circuit Application
C
A2
GND
5
T_SPRING
D1101
AMOTECH
5.6V
OPT
C1107
100pF
50V
R1107
15K
R1102
470K
002:S12
VCC
R1110
10K
VINPUT
SPDIF_OUT
7B
6B
R1108
15K
B_TERMINAL2
C1131
PC_L_IN
T_TERMINAL2
D1102
AMOTECH
5.6V
OPT
C1108
100pF
50V
R1103
470K
R1111
10K
002:S12
002:T18
0.1uF
16V
C1121
100pF
50V
RGB_EEMPROM_ATMEL
IC1105
RGB_EEMPROM_RENESAS
A0
A0
1
8
2
7
3
6
4
5
7
3
6
4
5
WP
EDID_WP
SCL
RGB_DDC_SCL
SCL
GND
VSS
2
C1129
0.1uF
16V
R1142
10K
WP
A2
A2
8
VCC
VCC
A1
A1
1
R1140
2.2K
R1139
2.2K
AT24C02BN-SH-T
IC1105-*1
R1EX24002ASAS0A
4
4
PC_R_IN
R_SPRING
+5V_Normal
D1115
ENKMC2838-T112
A1
SPDIF OPTIC JACK
E_SPRING
6A
Fiber Optic
6A
RGB PC
PEJ027-04
JST1223-001
JK1103
JK1102
New
JK1102-*1
1
PC AUDIO
SIDE_HP_MUTE
Q1106
2SC3052
2
R1128
1K
3
C1116
1000pF
50V
OPT
FIX_POLE
C1119
10uF
16V
+3.5V_ST
B
002:V7
GND
Q1105
ISA1530AC1
R1125
1K
E
C1115
1000pF
50V
OPT
R1130
10K
C1118
10uF
16V
002:V7
SDA
RGB_DDC_SDA
SDA
R1141
22
C1128
18pF
50V
C1127
18pF
50V
R1143
22
DSUB_VSYNC
DSUB_HSYNC
C1122
68pF
50V
OPT
C1126
68pF
50V
OPT
D1109
30V
D1113
D1116
D1114
5.6V
OPT
5.6V
OPT
30V
DSUB_B+
R1133
75
D1110
30V
DSUB_G+
R1135
75
D1111
30V
+3.3V_Normal
R1146
10K
DSUB_DET
R1147
1K
DSUB_R+
R1137
75
D1112
30V
D1117
5.6V
THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.
Copyright © 2011 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
RGB/SPDIF/HP
16
SHILED
DDC_GND
DDC_CLOCK
SYNC_GND
15
GP2R
5
V_SYNC
GND_1
10
BLUE
H_SYNC
NC
14
4
9
GREEN
BLUE_GND
13
8
3
GREEN_GND
RED
DDC_DATA
12
7
2
GND_2
11
6
1
SPG09-DB-010
JK1104
RED_GND
OPT
20101023
9
LGE Internal Use Only
EXT_12V
EXT_5V
RS232C
JP1002
10
5
9
IR_OUT_RS232C
4
R1006
0
8
R1007
100
JP1000
R1008
100
JP1001
3
+3.5V_ST
7
2
D1000
CDS3C30GTH
30V
OPT
6
D1001
CDS3C30GTH
30V
OPT
1
C1000 0.33uF
SPG09-DB-009
IC1000
C1+
C1001
0.1uF
C1002
0.1uF
V+
C1-
C2+
C1003
0.1uF
C2-
VC1004
0.1uF
DOUT2
RIN2
1
16
2
15
3
14
4
13
5
12
6
11
7
10
8
9
P1000
C1005
0.1uF
MAX3232CDR
D1002
BAP70-02
VCC
50V
R1004
47K
GND
DOUT1
RIN1
R1000
4.7K
R1005
1K
OPT
+3.5V_ST
R1001
4.7K
ROUT1
DIN1
DIN2
ROUT2
R1002 0
EAN41348201
UART_RX
R1003 0
UART_TX
THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.
Copyright © 2011 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
GP2R
RS232C_9PIN
20101023
10
LGE Internal Use Only
[51Pin LVDS Connector]
(For FHD 60/120Hz)
PANEL_VCC
[30Pin LVDS Connector]
(For HD 60Hz_Normal)
L702
120-ohm
WAFER_FHD
P705
P703
FF10001-30
FI-RE51S-HF-J-R1500
HD
WAFER_FHD
C709
1000pF
50V
OPT
C700
10uF
16V
OPT
1
C710
0.1uF
16V
WAFER_FHD
1
OPT
2
2
3
3
4
4
0 R713
TP721
PWM_DIM
TP722
OPC_OUT
5
5
6
7
6
RXA3-
7
RXA3+
8
8
9
10
9
RXACK-
10
RXACK+
11
11
RXA4-
12
RXA4+
13
RXA3-
14
RXA3+
12
RXA2-
13
RXA2+
14
15
16
RXACK-
17
RXACK+
15
RXA1-
16
RXA1+
17
18
19
18
RXA0-
19
RXA0+
RXA2-
LVDS_SEL
+3.3V_Normal
R712
3.3K
OPT
20
20
RXA2+
21
RXA1-
22
RXA1+
23
RXA0-
24
RXA0+
21
R711
10K
OPT
22
23
PANEL_VCC
24
BIT_SEL
L701
25
25
120-ohm
26
26
27
RXB4-
R709
10K
BIT_SEL_LOW
28
28
RXB4+
29
RXB3-
30
RXB3+
HD
27
29
C701
10uF
16V
OPT
OPT
C702
1000pF
50V
HD
C703
0.1uF
16V
30
31
31
32
RXBCK-
33
RXBCK+
34
35
RXB2-
36
RXB2+
37
RXB1-
38
RXB1+
39
RXB0-
40
RXB0+
LVDS_SEL
41
SCAN_BLK2
+3.3V_Normal
42
43
44
SCAN_BLK1/OPC_OUT
R703
0
LVDS_PWM_44
R705
PWM_DIM
45
46
R710
10K
OPT
47
48
3.3K
OPT
R701
0
3D_SG
LED_DRIVER_D/L_SDA
49
50
51
52
THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.
Copyright © 2011 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
R702
0
3D_SG
LED_DRIVER_D/L_SCL
100
2D/3D_CTL
LVDS_51PIN_GPIO
R706
R707
0
LVDS_51PIN_GND
GP2R
LVDS_LARGE
20101023
11
LGE Internal Use Only
R1227
1K 1%
1K
1%
0.1uF
C1250
1000pF
C1249
R1228
R1224
1K 1%
1%
R1225
1K
C1248
1000pF
C1246
10uF
0.1uF
C1245
0.1uF
C1244
0.1uF
C1243
0.1uF
C1242
0.1uF
C1241
0.1uF
C1239
0.1uF
C1238
0.1uF
C1237
C1236
C1235
0.1uF
0.1uF
C1234
0.1uF
0.1uF
C1233
0.1uF
C1232
0.1uF
C1231
0.1uF
C1230
0.1uF
C1229
0.1uF
C1228
0.1uF
C1227
0.1uF
0.1uF
C1224
C1223
0.1uF
0.1uF
C1222
0.1uF
C1221
0.1uF
C1220
C1219
0.1uF
0.1uF
C1218
0.1uF
C1217
0.1uF
C1216
0.1uF
C1215
C1214
0.1uF
0.1uF
C1213
0.1uF
C1212
0.1uF
C1211
0.1uF
C1210
0.1uF
C1208
0.1uF
C1207
C1206
10uF
Close to DDR Power Pin
0.1uF
B-MVREFDQ
B-MVREFCA
C1205
0.1uF
VCC_1.5V_DDR
DDR3 1.5V By CAP - Place these Caps near Memory
C1247
DDR3 1.5V By CAP - Place these Caps near Memory
A-MVREFCA
1000pF
C1204
1%
R1205
1K
C1203
1000pF
0.1uF
C1202
VCC_1.5V_DDR
A-MVREFDQ
Close to DDR Power Pin
CLose to Saturn7M IC
CLose to DDR3
VCC_1.5V_DDR
VCC_1.5V_DDR
1K 1%
R1204
VCC_1.5V_DDR
1K 1%
1%
R1202
1K
C1201
R1201
VCC_1.5V_DDR
CLose to Saturn7M IC
CLose to DDR3
IC1201-*1
K4B2G1646C
IC1202-*1
K4B1G1646G-BCH9
2G_DDR_1333_SS_NEW
DDR_1333_SS_NEW
N3
P7
P3
N2
P8
P2
R8
R2
T8
R3
L7
R7
VCC_1.5V_DDR
N7
+1.5V_DDR
T3
M8
A0
A3
R1215
B-TMA0
C1225
10uF
10V
R1213
VDD_1
VDD_2
A11
VDD_3
A12/BC
VDD_4
A13
VDD_5
VDD_6
A-TMA11
A-MA11
2G_DDR_1333_HYNIX
N3
M8
A0
A1
VREFDQ
A3
A4
R1203
A5
L8
ZQ
240
1%
A7
A8
B2
D9
G7
K2
K8
N1
N9
R1
VCC_1.5V_DDR
A6
R9
VDD_1
A9
VDD_2
A10/AP
VDD_3
A11
VDD_4
A12/BC
VDD_5
A13
C9
D2
E9
F1
H2
H9
VDDQ_2
VDDQ_3
VDDQ_4
L9
T7
R3
L7
R7
N7
T3
CK
CK
N8
M3
K9
RAS
CAS
K1
J3
K3
L3
WE
NC_1
T2
RESET
J2
J8
M1
M9
P1
P9
T1
T9
DQSL
G3
C7
VSS_1
DQSU
VSS_2
DQSU
VSS_3
VSS_4
VSS_5
VSS_7
VSS_8
E2
E8
F9
G1
G9
B7
E7
DML
D3
DMU
A-MA9
A-MA10
E3
DQL0
DQL1
VSS_9
DQL2
VSS_10
DQL3
VSS_11
DQL4
DQL5
F7
F2
F8
H3
H8
G2
H7
DQL7
VSSQ_1
VSSQ_2
A-TMA1
A-TMA4
A-MA12
A-TMA12
A-MBA1
A-TMBA1
A-TMA10
A-MA10
A-MA11
56
A-MA12
A-MBA0
A-MBA2
A-MCK
0.01uF
25V
A-TMBA2
A-TMA9
A-TMA13
A-TMA9
A-MA9
56
A-TMA13
A-MCKB
A-TMBA0
A-TMBA1
A-TMRASB
A-MODT
A-TMODT
A-MWEB
A-TMWEB
A-MCASB
56
R1231
10K
A-TMDQSLB
A-TMDQSU
A-TMDQSUB
A-MDQSUB
D7
A-TMDQL1
A-MDQL1
A-TMDQL3
A-MDQL3
DQU0
VSSQ_3
DQU1
VSSQ_4
DQU2
VSSQ_5
DQU3
VSSQ_6
DQU4
VSSQ_7
DQU5
VSSQ_8
DQU6
VSSQ_9
DQU7
C3
C8
C2
A7
A2
B8
A3
22
A-MDQU2
A-MDQU3
B-MA3
B-MA5
B-MA4
B-TMA7
B-MA7
A-TMODT
A-TMWEB
A-TMRESETB
A-TMDQSL
A-TMDQSLB
A-TMDQSU
A-TMCKE
A-TMDML
A-TMDQL7
A-TMDMU
A-MDQL5
A-TMDQL5
A-TMDQL0
22
A-TMDQL1
AR1205
A-TMDQL2
A-MDQL0
A-TMDQL0
A-MDQL2
A-TMDQL2
A-MDQL6
A-MDQL4
A-TMDQL3
A-TMDQL4
A-TMDQL6
A-TMDQL5
A-TMDQL4
A-TMDQL6
22
A-TMDQL7
A10
B22
C9
C23
B11
A9
C10
B23
B_DDR3_A2/DDR2_A9
A_DDR3_A3/DDR2_A1
B_DDR3_A3/DDR2_A1
A_DDR3_A4/DDR2_A2
A_DDR3_A5/DDR2_A10
A_DDR3_A6/DDR2_A4
B_DDR3_A4/DDR2_A2
B_DDR3_A5/DDR2_A10
B_DDR3_A6/DDR2_A4
A_DDR3_A7/DDR2_A3
B_DDR3_A7/DDR2_A3
A_DDR3_A8/DDR2_A6
B_DDR3_A8/DDR2_A6
A_DDR3_A9/DDR2_A12
A_DDR3_A10/DDR2_RASZ
A_DDR3_A11/DDR2_A11
B_DDR3_A9/DDR2_A12
B_DDR3_A10/DDR2_RASZ
B_DDR3_A11/DDR2_A11
A_DDR3_A12/DDR2_A0
B_DDR3_A12/DDR2_A0
A_DDR3_A13/DDR2_A7
B_DDR3_A13/DDR2_A7
P25
C24
P26
B26
R24
B25
T26
D24
A26
C25
T25
B-TMA1
B-TMA2
B-TMA6
B-TMA7
B-TMA8
B-MBA1
B-TMA10
B-MA10
B21
A11
A23
P24
B-TMRESETB
A_DDR3_BA0/DDR2_BA2
A_DDR3_BA1/DDR2_CASZ
A_DDR3_BA2/DDR2_A5
B_DDR3_BA0/DDR2_BA2
B_DDR3_BA1/DDR2_CASZ
B12
R26
B_DDR3_BA2/DDR2_A5
A12
C11
C26
D26
A_DDR3_MCLK/DDR2_MCLK
A_DDR3_MCLKZ/DDR2_MCLKZ
A_DDR3_CKE/DDR2_DQ5
B_DDR3_MCLK/DDR2_MCLK
B_DDR3_MCLKZ/DDR2_MCLKZ
D25
E24
B_DDR3_CKE/DDR2_DQ5
A-TMDQU7
A-MDQU3
A-MDQU5
A-MDMU
A-TMDQU0
A-TMDQU3
A-TMDQU1
A-TMDQU5
A-TMDQU2
A-TMDMU
A-TMDQU3
22
A-TMDQU4
AR1207
A-TMDQU5
A-TMDQU6
A-MDQU6
A-TMDQU0
A-MDQU0
B-MA13
B-MBA2
B-TMA13
B-MA13
B-TMA9
B-MBA0
R1222
B-TMCK
B-MCK
22
R1223
B-TMCKB
B-MCKB
C1240
0.01uF
25V
B-TMRASB
B-MCKB
B-MRASB
B-TMCASB
B-MCASB
B-TMBA2
B-TMWEB
P7
P3
N2
P8
P2
R8
R2
T8
R3
L7
R7
N7
T3
M8
A0
A2
B-MCKE
B-MODT
B-MRASB
B-MCASB
R1232
10K
22
R1220
M3
A6
K9
B-MWEB
B-MRESETB
K1
J3
K3
L3
C20
A20
B20
A21
N25
A7
A8
A_DDR3_ODT/DDR2_ODT
A_DDR3_RASZ/DDR2_WEZ
A_DDR3_CASZ/DDR2_BA1
A_DDR3_WEZ/DDR2_BA0
B_DDR3_ODT/DDR2_ODT
B_DDR3_RASZ/DDR2_WEZ
B_DDR3_CASZ/DDR2_BA1
M26
N24
N26
B_DDR3_WEZ/DDR2_BA0
C22
R25
A_DDR3_RESETB
B_DDR3_RESETB
B-TMODT
C16
B16
J25
A_DDR3_DQSL/DDR2_DQS0
A_DDR3_DQSLB/DDR2_DQSB0
B_DDR3_DQSL/DDR2_DQS0
J24
B_DDR3_DQSLB/DDR2_DQSB0
B-TMDQSU
B-MDQSU
22
R1218
B-TMRASB
B-TMCASB
B-TMDQSUB
B-MDQSUB
22
B-TMWEB
VDD_1
B-TMDQL1
B-MDQL1
B-TMDQL3
B-MDQL3
B-TMDML
B-TMDQSL
B-MDML
B-TMDQU2
B-MDQU2
B-TMDQSLB
A16
C15
H26
A_DDR3_DQSU/DDR2_DQSB1
B_DDR3_DQSU/DDR2_DQSB1
22
A_DDR3_DQSUB/DDR2_DQS1
B_DDR3_DQSUB/DDR2_DQS1
H25
B-TMDQSUB
A14
B18
F26
A_DDR3_DML//DDR2_DQ13
A_DDR3_DMU/DDR2_DQ6
B_DDR3_DML/DDR2_DQ13
C18
B13
A19
C13
C19
A13
B19
C12
L24
B_DDR3_DMU/DDR2_DQ6
L25
A_DDR3_DQL0/DDR2_DQ3
A_DDR3_DQL1/DDR2_DQ7
A_DDR3_DQL2/DDR2_DQ1
A_DDR3_DQL3/DDR2_DQ10
A_DDR3_DQL4/DDR2_DQ4
B_DDR3_DQL0/DDR2_DQ3
B_DDR3_DQL1/DDR2_DQ7
B_DDR3_DQL2/DDR2_DQ1
B_DDR3_DQL3/DDR2_DQ10
B_DDR3_DQL4/DDR2_DQ4
A_DDR3_DQL5/DDR2_DQ0
B_DDR3_DQL5/DDR2_DQ0
A_DDR3_DQL6/DDR2_CKE
B_DDR3_DQL6/DDR2_CKE
A_DDR3_DQL7/DDR2_DQ2
F24
L26
F25
M25
E26
M24
E25
B_DDR3_DQL7/DDR2_DQ2
A-TMDQU6
A-TMDQU7
A15
A17
B14
C17
B15
A18
C14
B17
G26
A_DDR3_DQU0/DDR2_DQ15
B_DDR3_DQU0/DDR2_DQ15
A_DDR3_DQU1/DDR2_DQ9
B_DDR3_DQU1/DDR2_DQ9
A_DDR3_DQU2/DDR2_DQ8
B_DDR3_DQU2/DDR2_DQ8
A_DDR3_DQU3/DDR2_DQ11
B_DDR3_DQU3/DDR2_DQ11
A_DDR3_DQU4/DDR2_DQM1
B_DDR3_DQU4/DDR2_DQM1
A_DDR3_DQU5/DDR2_DQ12
B_DDR3_DQU5/DDR2_DQ12
A_DDR3_DQU6/DDR2_DQM0
A_DDR3_DQU7/DDR2_DQ14
B_DDR3_DQU6/DDR2_DQM0
B_DDR3_DQU7/DDR2_DQ14
J26
G24
K25
H24
K26
G25
K24
B-TMCKE
B-MCKE
B-TMDQL7
B-MDQL7
B-TMDQL5
B-MDQL5
B-TMDML
B-TMDMU
B-TMDQL1
B-TMDQL2
B-TMDQL3
B-TMDQL0
B-MDQL2
B-TMDQL6
B-MDQL6
B-TMDQL4
B-MDQL4
B-TMDQL4
22
B-TMDQL5
B-TMDQL6
B-TMDQL7
B-TMDQU0
B-MDQU7
B-TMDQU3
B-MDQU3
B-TMDQU5
B-MDQU5
B-TMDMU
B-TMDQU1
A10/AP
VDD_2
A11
VDD_3
A12/BC
VDD_4
A13
VDD_5
VDD_8
BA0
B-MDQL2
B-MDQL3
B-MDQL4
B-MDQL5
B-MDQU0
B-MDQU1
B-MDQU2
B-MDQU3
B-MDQU5
B-MDQU6
B-MDQU7
K8
F7
N1
F2
F8
H3
R1
H8
R9
G2
VCC_1.5V_DDR
BA1
VDDQ_2
CK
VDDQ_3
CKE
VDDQ_4
CS
VDDQ_6
ODT
VDDQ_7
RAS
VDDQ_8
CAS
VDDQ_9
A1
C3
A8
C8
C1
C2
A7
C9
VDDQ_5
VDDQ_7
RAS
VDDQ_8
CAS
VDDQ_9
NC_4
DQSL
A2
D2
B8
E9
A3
RESET
DQSL
H8
G2
H7
VSS_1
VSS_2
VSS_3
DML
VSS_4
DMU
VSS_5
VSS_6
DQL0
VSS_7
DQL1
VSS_8
DQL2
VSS_9
DQL3
VSS_10
DQL4
VSS_11
DQL5
VSS_12
C2
A7
A2
B8
A3
K7
K9
D2
E9
L2
F1
K1
H2
J3
H9
K3
L3
VDDQ_4
A8
C1
CS
VDDQ_6
C9
ODT
VDDQ_7
D2
RAS
VDDQ_8
CAS
VDDQ_9
E9
F1
H2
H9
J1
J9
NC_2
L1
NC_3
L9
NC_4
F3
DQSL
G3
A9
C7
B3
B7
T7
NC_6
A9
E1
G8
J2
D3
J8
M1
E3
VSSQ_2
VSSQ_3
DQU2
VSSQ_4
DQU3
VSSQ_5
DQU4
VSSQ_6
DQU5
VSSQ_7
DQU6
VSSQ_8
DQU7
VSSQ_9
VSS_2
M9
F7
P1
F2
P9
F8
T1
H3
T9
H8
DML
VSS_4
B3
DMU
VSS_5
E1
G8
J2
J8
VSS_6
G2
DQL0
VSS_7
DQL1
VSS_8
DQL2
VSS_9
DQL3
VSS_10
DQL4
VSS_11
DQL5
VSS_12
M1
M9
P1
P9
T1
T9
DQL6
DQL7
B1
VSSQ_1
DQU1
VSS_1
DQSU
E7
H7
DQU0
DQSU
VSS_3
B9
D7
D1
C3
D8
C8
E2
C2
E8
A7
F9
A2
G1
B8
G9
A3
B1
VSSQ_1
DQU0
VSSQ_2
DQU1
VSSQ_3
DQU2
VSSQ_4
DQU3
VSSQ_5
DQU4
VSSQ_6
DQU5
VSSQ_7
DQU6
VSSQ_8
DQU7
VSSQ_9
B9
D1
D8
E2
E8
F9
G1
G9
IC1202-*2
NT5CB64M16DP-CF
DDR_1333_NANYA_NEW
N3
P7
L9
P3
T7
N2
P8
R8
A9
DQSU
VSS_1
DQSU
VSS_2
VSS_3
DML
VSS_4
DMU
VSS_5
VSS_7
DQL1
VSS_8
DQL2
VSS_10
DQL4
VSS_11
DQL5
VSS_12
E1
R3
G8
L7
R7
N7
J8
T3
M1
P1
N8
T1
M3
VSSQ_1
DQU4
VSSQ_6
DQU5
VSSQ_7
DQU6
VSSQ_8
DQU7
VSSQ_9
K1
D1
VSSQ_3
VSSQ_5
A6
L8
ZQ
A7
A8
B2
A9
VDD_1
A10/AP
VDD_2
A11
VDD_3
A12
VDD_4
NC_6
VDD_5
VDD_6
VDD_7
VDD_8
BA0
J3
D8
K3
E2
L3
VDDQ_2
CK
VDDQ_3
CKE
VDDQ_4
VDDQ_5
CS
VDDQ_6
ODT
VDDQ_7
RAS
VDDQ_8
CAS
VDDQ_9
K8
N1
N9
R1
R9
T2
RESET
NC_2
NC_3
NC_4
F3
DQSL
A8
C1
C9
D2
E9
F1
H2
H9
J1
NC_1
G1
G3
K2
A1
VDDQ_1
CK
E8
G9
G7
VDD_9
WE
F9
D9
BA1
L2
B9
VSSQ_2
DQU3
A5
J7
B1
VSSQ_4
H1
VREFDQ
A4
T9
K9
DQU2
A3
BA2
K7
DQU1
VREFCA
A2
M2
P9
EAN61857201
A1
NC_5
DQL6
DQU0
M8
A0
M7
M9
VSS_9
DQL3
T8
J2
VSS_6
DQL0
R2
B3
J9
L1
L9
T7
NC_7
DQSL
C7
B-TMDQU4
B-MDQU4
IC1201-*3
K4B2G1646C
IC1202-*3
K4B2G1646C
DDR_DVB_T2_2G
P7
P3
N2
P8
P2
R8
R2
L7
R7
N7
T3
M8
A0
H1
VREFDQ
L8
T8
A9
VDD_1
A10/AP
VDD_2
A11
VDD_3
A12/BC
VDD_4
VDD_5
VDD_6
NC_5
VDD_7
BA0
VDD_9
VDD_8
K7
K1
K3
L3
D9
L7
G7
R7
K2
N7
K8
VDDQ_2
CK
VDDQ_3
VDDQ_4
CS
VDDQ_6
ODT
VDDQ_7
VDDQ_5
RAS
VDDQ_8
CAS
VDDQ_9
WE
N9
R9
NC_2
NC_3
NC_4
F3
DQSL
K7
D2
F1
K1
J3
K3
L3
DQSU
DQSU
D3
F7
F2
F8
H3
H8
G2
H7
VSS_2
DML
VSS_4
DMU
VSS_5
DQL0
VSS_7
VSS_6
E3
DQL1
VSS_8
DQL2
VSS_9
DQL3
VSS_10
DQL4
VSS_11
DQL5
VSS_12
C3
C8
C2
A7
A2
B8
A3
VDD_3
VDD_4
VDD_5
VDD_6
NC_5
VDD_7
BA0
VDD_9
VDD_8
G3
G7
H7
VSS_2
VSS_3
DML
VSS_4
DMU
VSS_5
VSS_6
CK
VDDQ_3
CKE
VDDQ_4
CS
VDDQ_6
ODT
VDDQ_7
VDDQ_5
RAS
VDDQ_8
CAS
VDDQ_9
NC_2
NC_4
DQL1
VSS_8
DQL2
VSS_9
DQL3
VSS_10
DQL4
VSS_11
DQL5
VSS_12
N9
R9
C3
A8
C2
C1
C9
A7
D2
E9
A2
F1
H2
B8
H9
A3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9
B1
VSSQ_1
D7
R1
B3
DQL6
K8
J1
NC_1
VSS_7
N1
C8
VDDQ_2
DQL0
DQL7
K2
A1
VDDQ_1
DQSL
G2
D9
BA1
F3
A9
C7
B7
E7
J2
D3
J8
M1
DQU0
VSSQ_2
DQU1
VSSQ_3
DQU2
VSSQ_4
DQU3
VSSQ_5
DQU4
VSSQ_6
DQU5
VSSQ_7
DQU6
VSSQ_8
DQU7
VSSQ_9
B9
D1
D8
E2
E8
F9
G1
G9
J9
L1
L9
T7
NC_6
M9
F7
F2
P9
F8
T1
H3
H8
G2
H7
VSSQ_2
DQU1
VSSQ_3
DQU2
VSSQ_4
DQU3
VSSQ_5
DQU4
VSSQ_6
DQU5
VSSQ_7
DQU6
VSSQ_8
DQU7
VSSQ_9
B9
VSS_1
VSS_2
VSS_3
DML
VSS_4
DMU
VSS_5
DQL0
VSS_7
VSS_6
E3
P1
T9
A9
DQSU
DQSU
E1
G8
DQL1
VSS_8
DQL2
VSS_9
DQL3
VSS_10
DQL4
VSS_11
DQL5
VSS_12
D1
C3
C8
E2
C2
E8
A7
F9
A2
G1
B8
G9
A3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9
B1
VSSQ_1
D7
D8
B3
DQL6
DQL7
B1
VSSQ_1
DQU0
A11
A12/BC
NC_3
B3
DQL6
DQL7
D7
VDD_1
VDD_2
RESET
VSS_1
DQSU
DQSL
VSS_1
VSS_3
E7
A9
WE
DQSL
C7
B7
B2
A10/AP
L9
T7
H8
A7
T2
L1
NC_6
L8
ZQ
A8
CK
F8
H3
A5
A6
L2
H2
J9
H1
A4
J7
K9
F2
VREFDQ
BA2
C1
H9
VREFCA
A2
A3
A13
C9
E9
A0
A1
M2
N8
A8
M8
M7
R1
J1
NC_1
RESET
T3
N1
M3
CKE
T2
G3
R3
A1
VDDQ_1
L2
J3
B2
BA1
CK
R8
R2
A7
BA2
K9
P8
ZQ
A8
A13
N2
P2
A5
M2
M3
P7
A4
A6
N3
P3
A2
M7
N8
VREFCA
A1
A3
F7
DDR_DVB_T2_2G
N3
A9
DQSU
E3
B-TMDQU6
B-MCKE
CKE
RESET
B-TMDQU5
R1234
VDDQ_3
L9
D3
10K
VDDQ_2
CK
T2
L1
B-MDQU0
A-TMDQU1
A1
CK
NC_1
B-TMDQU0
B-MDQU1
R9
WE
B-TMDQU4
R1221
R1
VDDQ_5
E7
22
N9
VDD_9
VDDQ_1
B-MDQU6
B-TMDQU7
N1
BA1
P2
D7
C8
J7
C9
DQL6
L1
DQL7
C3
K8
DQSL
DQSU
NC_6
E3
H3
K2
BA2
C1
T7
G7
VDD_7
BA0
J9
NC_4
E7
F8
VDD_5
D9
VDD_8
H9
C7
F2
A13
M2
A8
NC_6
DQSU
DQSL
F7
VDD_4
H2
NC_2
F3
D3
A12/BC
NC_5
N8
J9
VDD_3
J1
T2
B7
NC_2
VDD_2
A11
VDD_6
J1
NC_1
VDD_1
A10/AP
M7
R1
R9
B2
A9
F1
NC_1
J7
Copyright © 2011 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
ODT
D7
CK
N9
B-TMDQU6
R1210
THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.
VDDQ_6
DQL7
T8
10K
E3
H7
VDDQ_1
N1
B7
22
22
K2
VDD_9
R3
R1233
D3
N9
VDD_7
WE
G3
CS
22
22
A-MCKE
VDDQ_5
E7
G7
VDD_6
T3
A8
AR1218
B-TMDQU1
A-MDQU1
VDDQ_4
B-MDMU
B-TMDQU2
B-TMDQU3
B-MDQL0
B-MDQU4
AR1217
B-TMDQU7
B-MDML
B-MDMU
B-MDQL7
B-MDQL0
B-TMDQL2
B-MDQSU
B-MDQL6
22
AR1216
B-TMDQL0
B-MDQSLB
B-MDQL1
AR1213
B-TMDQSU
B-MDQSL
B7
D9
NC_3
B-MDQSUB
AR1212
B-TMRESETB
CKE
C7
B2
A9
K8
ZQ
A7
DQSL
240
1%
B-MDQSLB
R1217
G3
ZQ
BA2
K7
B-MDQSL
B-TMCKE
VDDQ_3
NC_3
R1226
L8
L2
B-MWEB VCC_1.5V_DDR
56
R1219
B-TMDQSL
VDDQ_2
F3
A5
N7
L8
A6
A1
VDDQ_1
CK
RESET
B-MVREFDQ
VREFDQ
A4
A5
M3
CK
T2
H1
A3
R7
K2
VDD_9
WE
J7
B-MODT
B-TMCK
B-MBA1
B-MBA2
L3
A1
M2
N8
K3
B-MVREFCA
VREFCA
NC_5
B-MCK
56
B-TMODT
N3
M7
B-MA9
A-TMDQU4
A-MDQU4
B-MA11
B-MA12
B-TMBA2
B-TMBA1
B-TMCKB
B-MA10
J3
B-MRESETB
B-TMA12
B-TMBA0
B-MA9
AR1219
B-TMA10
B-TMA13
B-MA8
56
B-TMA9
B-TMA11
B-MA7
B-TMBA1
B-TMA4
B-TMA5
B-MA6
B-MA12
B-TMA3
AR1206
A-MDQU7
B-MA5
B-MA4
B-TMA12
K1
22
A-TMDQSUB
A-MCKE
A-MDQU5
A-MDQU7
B-MA2
B-MA3
B-TMDQSLB
A-MDQL7
A-MDQU4
A-MDQU6
A22
A_DDR3_A2/DDR2_A9
A24
AR1210
A-MDQL7
A-MDQU1
A-TMDQU2
B-MA1
B-TMA5
A-TMDML
A-MDQU2
B-MA0
B-TMA3
B-TMA4
B-TMA0
22
A-MDQL6
A-MDQU0
B10
B_DDR3_A1/DDR2_A8
B24
AR1209
A-MDQL2
A-MDQL5
A-TMCKB
A-TMCASB
22
R1212
A-MDQL1
A-MDQL3
A-TMCK
A-TMRASB
A-MDQSU
A-MDQSUB
A-MDQL4
A-TMBA2
A-TMCKE
R1211
A-MDQSL
A-MDQL0
C21
A_DDR3_A1/DDR2_A8
B_DDR3_A0/DDR2_A13
A-TMDQSL
22
R1209
A-MRESETB
A-MDMU
A8
A25
A_DDR3_A0/DDR2_A13
R1208
A-MDQSL
A-MDML
B9
K9
DDR_1333_HYNIX
B-MBA0
22
AR1220
A-TMCKB
A-TMCASB
A-MDQSU
B-MA6
22
R1207
A-MCASB
A-MDQSLB
B8
A-TMCK
A-MCKB A-MRASB
VCC_1.5V_DDR
A-TMA10
A-TMA11
A-TMA12
A-MCK
A-MCKE
A-MRASB
A-TMA5
A-TMA8
22
AR1202
A-MODT
A-TMA4
A-TMRESETB
R1206
C1209
A-TMA3
A-TMA7
A-MBA2
A-MBA1
A-TMA2
A-TMA6
AR1201
A-MA13
B-TMA6
K7
L7
G7
BA1
L2
56
AR1215
A-TMA0
A-MA4
A-MA8
A-MWEB
S7M-PLUS_DivX_MS10
IC101
LGE107DC-RP [S7M+ DIVX/MS10]
A-TMA7
56
AR1204
A-MA7
B-MA8
A-TMA5
A-MDML
VSS_6
B1
D8
A-MA7
A-MA6
B-TMA8
A-TMA3
22
F3
DQL6
D1
A-MA5
B-MA1
B-TMBA0
A-TMBA0
A-MDQSLB
NC_4
VSS_12
B9
A-MA5
NC_3
A9
G8
A-MA4
L2
CS
ODT
VDDQ_8
DQSL
E1
A-MA3
K7
CKE
VDDQ_7
NC_6
B3
A-MA3
J7
VDDQ_6
NC_2
A-MBA0
A-MA13
VDDQ_5
VDDQ_9
L1
T8
M2
BA0
VDDQ_1
J1
J9
R2
BA2
A1
C1
R8
A-MA2
B-TMA1
56
AR1214
56
AR1203
A-MA0
A15
BA1
A8
P2
A-TMA6
A-MA1
M7
VDD_8
VDD_9
P8
A-MA6
A-MRESETB
VDD_6
VDD_7
N2
A-TMA8
1%
H1
P3
R1235
56
A-MVREFDQ
A2
P7
1%
VREFCA
R1236
56
A-MVREFCA
A-MA8
VDD_8
J7
EAN61828901
IC1202
H5TQ1G63DFR-H9C
B-MA11
A-TMA1
A-MA1
VDD_7
R3
D9
VREFDQ
A4
R2
B2
H1
A3
R8
T8
A10/AP
B-MA2
56
R1237
IC1201
H5TQ2G63BFR-H9C
1%
B-TMA11
A-TMA2
1%
56
AR1208
56
AR1211
ZQ
A9
BA0
A2
N2
P2
A8
VREFCA
A1
P8
L8
BA2
56
R1238
EAN61570701
B-TMA2
M3
1%
A-MA2
A-TMA0
1%
56
R1214
1%
1%
A-MA0
56
R1216
C1226
0.1uF
16V
N8
VREFDQ
A7
M2
B-MA0
H1
A5
NC_5
M8
A0
P7
A4
A6
N3
P3
A2
M7
L1201
VREFCA
A1
DQU0
VSSQ_2
DQU1
VSSQ_3
DQU2
VSSQ_4
DQU3
VSSQ_5
DQU4
VSSQ_6
DQU5
VSSQ_7
DQU6
VSSQ_8
DQU7
VSSQ_9
B9
D1
D8
E2
E8
F9
G1
G9
GP2R
DDR_256
20101023
12
LGE Internal Use Only
+3.3V_Normal
+3.3V_Normal
4.7K
+3.3V_Normal
R1404
S_FLASH_MAIN_MACRONIX
IC1401
MX25L8006EM2I-12G
R1403
10K
CS#
/SPI_CS
8
2
7
3
6
4
5
VCC
C1401
0.1uF
SO/SIO1
SPI_SDO
WP#
/FLASH_WP
GND
C
R1401
1
HOLD#
SCLK
SPI_SCK
R1405
SI/SIO0 33
SPI_SDI
Q1401
KRC103S
B
OPT 0
E
OPT
IC1401-*1
W25Q80BVSSIG
CS
DO[IO1]
%WP[IO2]
GND
1
8
2
7
3
6
4
5
VCC
HOLD[IO3]
CLK
DI[IO0]
S_FLASH_MAIN_WINBOND
THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.
Copyright © 2011 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
GP2R
SFLASH_1MB
20101023
13
LGE Internal Use Only
GP2R_LARGE_TUNER
+5V_TU
BOOSTER : CHINA OPT
RF_SWITCH_CTL
L3701 BOOSTER_OPT
BLM18PG121SN1D
Pull-up can’t be applied
because of MODEL_OPT_2
BOOSTER_OPT
R3734
BOOSTER_OPT
R3743
0
close to TUNER
10K
Q3701
BOOSTER_OPT
ISA1530AC1
R3737
2.2K
E
OPT
R3762
0
CONTROL_ATTEN
B
C
CN_2INPUT_H_LG3911
TU3701
TDFR-C036D
1
BST_CNTL
2
+B
3
NC[RF_AGC]
4
4
AS
5
5
SCL
6
6
SDA
7
7
NC[IF_TP]
8
8
SIF
9
9
NC
10
10
VIDEO
11
11
GND
12
12
1.2V
13
13
3.3V
14
14
RESET
15
15
IF_AGC_CNTL
16
16
DIF_1
17
17
DIF_2
18
18
19
19
20
SHIELD
21
22
23
24
25
TUNER MULTI-OPTION
26
GP3_ATSC_1INPUT_H_SANYO
TU3702-*3
UDA55AL
27
TU3702-*1
TDVJ-H101F
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
ANT_PWR[OPT]
1
BST_CNTL
2
+B
3
NC[RF_AGC]
4
AS
5
SCL
6
SDA
7
NC(IF_TP)
8
SIF
9
NC
10
VIDEO
11
GND
12
1.2V
13
3.3V
14
RESET
15
IF_AGC_CNTL
16
DIF_1
17
DIF_2
18
19
28
NC_1
R3705
C3701
0.1uF
16V
BST_CNTL
R3707
+5V_TU
OPTION : RF AGC
RF_SW_OPT
C3703
100pF
50V
C3704
0.1uF
16V
C3728
0.1uF
16V
OPT
B
R3754
10K
TU_IIC_NON_ATSC_SANYO
FE_AGC_SPEED_CTL
IF_AGC_SEL
OPT
TU_IIC_NON_ATSC_SANYO
OPT
TU_IIC_ATSC_SANYO
R3740
1.2K
TU_I2C_NON_FILTER
C3713
33 R3736
18pF TU_I2C_NON_FILTER
50V
TU_I2C_NON_FILTER
C3742
C3711
20pF
18pF
50V
50V
NC_2
C3702
0.1uF
NC_3
TU_IIC_ATSC_SANYO
R3741
1.2K
TU_SCL
close to TUNER
C3743
20pF
50V
TU_I2C_FILTER
TU_SDA
R3751
220
R3752
220
TU_CVBS
TU_I2C_FILTER
E
R3749
+3.3V_TU
VIDEO
GND
+B2[1.2V]
C3738
0.1uF
16V
FULL_NIM
C3705
100uF
16V
CN
C3739
10uF
6.3V
C3707
100pF
50V
C3708
0.1uF
16V
R3732
100
TU_I2C_FILTER
R3735-*1
R3733
100K
C
Q3703
ISA1530AC1
COIL
DEMOD_RESET
C3710
0.1uF
16V
close to the tuner pin, add,09029
B
TU_I2C_FILTER
R3736-*1
COIL
TUNER_RESET
0
R3750
1K
OPT
C3713-*1
C3711-*1
20pF
20pF
50V
50V
TU_I2C_FILTER TU_I2C_FILTER
+3.3V_TU
+1.2V/+1.8V_TU
+B3[3.3V]
+3.3V_TU
This was being applied to the only china demod,
so this has to be deleted in both main and ISDB sheet.
RESET
NC_4
R3704
SDA
0
IF_AGC_MAIN
HALF_NIM
SCL
FULL_NIM
R3702
100
R3701
ERR
R3742
4.7K
FULL_NIM
R3744
4.7K
FULL_NIM
should be guarded by ground
FULL_NIM
HALF_NIM_1.2V_BCD
IC3703
DEMOD_SCL
100
DEMOD_SDA
close to IF line
C3712
22pF
50V
FULL_NIM
SYNC
HALF_NIM
R3760
0
29
NC[RF_AGC]
INPUT
C3714
22pF
50V
FULL_NIM
IC3703-*1
AP1117EG-13
IN
MCL
30
SDA
NC(IF_TP)
31
1. should be guarded by ground
2. No via on both of them
3. Signal Width >= 12mils
Signal to Signal Width = 12mils
Ground Width >= 24mils
OUTPUT
+1.2V/+1.8V_TU
HALF_NIM
R3768
1.2K
R1
OUT
R3766
1
1/10W
HALF_NIM_1.2V_DIODES
FULL_NIM_BCD
R3748-*1
10K
Close to the tuner
R3771
1
R3770
EN
10K
2
FULL_NIM_SEMTEK
D5
VIN
R3769
D6
FULL_NIM_BCD
VIDEO
GND
SHIELD
+3.3V
380mA
R3764
0
1/10W
FULL_NIM
R3748
ADJ
7
5.1K
3
6
4
5
R1
VOUT
NC
D7
NC_3
+1.2V/+1.8V_TU
FULL_NIM_SEMTEK
10K
VCTRL
+5V_Normal
GND
8
FULL_NIM_BCD
FULL_NIM_BCD
C3717
0.1uF
16V
D4
PG
10K
C3741
10uF
10V
HALF_NIM
C3740
0.1uF
16V
HALF_NIM
IC3701
AP2132MP-2.5TRG1
[EP]
D3
R3703
150
OPT
HALF_NIM
FULL_NIM
C3729
0.1uF
16V
R3747
9.1K
1005
FULL_NIM
C3730
10uF
10V
R2
IC3701-*1
SC4215ISTRT
Vo=0.8*(1+R1/R2)
RESET
NC_1
IF_AGC_CNTL
DIF_1
FULL_NIM
DIF_2
R3724
0
FE_TS_SYNC
FE_TS_DATA[0-7]
EN
19
SHIELD
R2
HALF_NIM
R3767
10
Please, check multi Item! 10/12
SIF
+1.2V
ADJ/GND
ADJ/GND
IF_P_MSTAR
R3761 0
HALF_NIM
D1
D2
1
IF_N_MSTAR
VALID
D0
3
2
AS
SCL
AZ1117BH-ADJTRE1
+3.3V_TU
NC_2
+B[+5V]
Q3705
C
+5V_TU
16V
C3737
100pF
50V
ISA1530AC1
R3753
4.7K
R3741-*1
1K
33 R3735
TU_I2C_NON_FILTER
SDAT
SIF
TU_SIF
B
+3.3V_TU
R3740-*1
1K
C3706
0.1uF
16V
SCLT
R3758
82
E
GPIO must be added.
C
Q3704
2SC3052
OPT
0
R3755
470
C3731
10uF
10V
OPT
E
NC_1
FE_BOOSTER_CTL
LNA2_CTL
The pull-up/down of LNA2_CTL
is depended on MODLE_OPT_1.
GPIO must be added for FE_BOOSTER_CTL
+5V_TU
0
+B1[+5V]
NC[RF_AGC]
BOOSTER_OPT
L3704
3
close to TUNER
RF_S/W_CNTL
E
BOOSTER_OPT
R3745
10K
FULL_NIM_BCD
2
C3709
0.01uF
25V
BOOSTER_OPT
B
FULL_NIM
ANT_PWR[OPT]
Q3702
2SC3052
9
DVB_1INPUT_H_LGIT
BOOSTER_OPT
THERMAL
TU3702
TDTJ-S001D
1
C
SHIELD
FULL_NIM
R3730
0
FE_TS_VAL_ERR
VIN
GP3_ATSC_1INPUT_H_LGIT
FULL_NIM
R3731
0
R3725
0
2
7
3
6
4
5
ADJ
VO
FE_TS_CLK
NC_2
FULL_NIM_CHINA
GND
1
8
FULL_NIM_SEMTEK
NC_3
FE_TS_DATA[0]
NTSC_2INPUT_H_LGIT
CN_2INPUT_H_ALTO
GP2R_AU_1INPUT_H_LGIT
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
FULL_NIM
R3727
0
FE_TS_DATA[1]
FULL_NIM
R3728
0
FE_TS_DATA[2]
FULL_NIM
R3729
TU3702-*4
TDTJ-S101D
RF_S/W_CTL
TU3701-*4
TDFR-C236D
BST_CTL
+B1[5V]
1
NC_1[RF_AGC]
2
NC_2
3
SCLT
4
SDAT
5
NC_3
6
SIF
7
NC_4
8
VIDEO
9
GND
10
+B2[1.2V]
11
+B3[3.3V]
12
RESET
13
IF/AGC
14
DIF_1[N]
15
DIF_2[P]
16
17
19
18
ANT_PWR
1
NC_1
FULL_NIM_BR
RF_AGC
2
TU3701-*2
TDFR-B036F
+B1[5V]
4
0
MOPLL_AS
FE_TS_DATA[3]
1
2
SCL
SDA
3
FULL_NIM
R3726
0
FE_TS_DATA[4]
4
NC_2
5
SIF
6
NC_3
FULL_NIM
R3721
7
0
VIDEO
FE_TS_DATA[5]
8
9
GND
+B2[1.2V]
10
FULL_NIM
R3722
11
0
+B3[3.3V]
FE_TS_DATA[6]
12
13
RESET
IF_AGC
14
FULL_NIM_CHINA
R3723
0
DIF_1[N]
15
FE_TS_DATA[7]
16
17
DIF_2[P]
18
SHIELD
19
19
TU3702-*2
TDTR-T036F
Close to the CI Slot
20
SHIELD
21
22
23
R3706
3
24
0
25
26
FULL_NIM_BR
27
28
29
31
30
RF_S/W_CNTL
5
BST_CNTL
6
7
NC_2
8
SCLT
9
SDAT
10
+B1[+5V]
NC[RF_AGC]
NC_1
SCLT
SDAT
NC_2
SIF
NC_3
NC_3
SIF
11
NC_4
12
VIDEO
13
GND
14
+5V_TUNER
VIDEO
+3.3V_Normal
GND
+5V_TU
+B2[1.2V]
+B3[3.3V]
+B2[1.2V]
+B3[3.3V]
15
RESET
16
NC_5
17
SCL
18
NC_4
+3.3V_TU
Size change
L3702
RESET
200mA
60mA
MLB-201209-0120P-N2
SCL
Size change
L3703
MLB-201209-0120P-N2
SDA
SDA
19
ERR
SYNC
20
VALID
21
MCL
22
ERR
SYNC
VALID
MCL
C3719
22uF
10V
C3724
0.1uF
16V
C3722
22uF
16V
C3726
0.1uF
16V
D0
D1
23
D2
24
D3
25
D4
26
C3723
22uF
10V
C3725
0.1uF
16V
C3715
C3727
22uF
0.1uF
10V
16V
D0
D1
D2
location movement,0929
D3
Add,0929
D5
27
D6
D7
28
29
31
Copyright © 2011 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
BST_CNTL
+B1[5V]
NC_1[RF_AGC]
SHIELD
THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.
RF_S/W_CNTL
30
D4
D5
D6
D7
SHIELD
GP2R
TUNER_L
20101023
14
LGE Internal Use Only
+3.5V_ST
EXT_SPK_CONTROL/DEBUG
R1515
100
UART_DBG_SW
New
JK1501-*1
PEJ027-04
3
EXT_SPEAKER_AMP
BLM18PG121SN1D
L1500
+24V
L1501
BLM18PG121SN1D
R1508
100
E_SPRING
6A
T_TERMINAL1
7A
B_TERMINAL1
C1506
0.1uF
50V
R_SPRING
5
T_SPRING
B_TERMINAL2
6B
T_TERMINAL2
C1516
0.1uF
SELECT
VCC
3 E_SPRING
6A T_TERMINAL1
A
SD
PVCCL_2
SUBAMP_MUTE
R1500
100
MUTE
LIN
EXT_L_AMP_IN
RIN
EXT_R_AMP_IN
BYPASS
AGND_1
AGND_2
PVCCR_1
C1500
1uF
50V
2
23
3
22
4
21
5
20
6
19
7
18
8
17
9
16
10
15
11
14
PGNDL_1
LOUT
BSL
C1504
0.22uF
50V
22.0uH
L1503
AVCC_2
R1506
4.7K
C1508
1uF
50V
C1510
0.47uF
50V
R1507
4.7K
C1509
1uF
50V
C1511
0.47uF
50V
PVCCR_2
12
13
EXT_VOL+
DBG_TX
B1
1
A
4
GND
R1517
0
S7_DBG_TX
B0
3
NEC_DBG_TX
B0
DBG_TX
+3.5V_ST
IC1503
NLASB3157DFT2G
R1512
3.6K
SELECT
VCC
6B T_TERMINAL2
A
6
1
ON SEMICONDUCTOR
ANALOG SWITCH
5
2
B1
4
3
R1510
0
SELECT
EXT_VOL-
GND
VCC
B0
A
DBG_RX DBG_RX
EAN38256201
6
1
ON SEMICONDUCTOR
ANALOG SWITCH
5
2
4
3
B1
S7_DBG_RX
GND
B0
NEC_DBG_RX
EAN38256201
EXT_OUT_R
AVCC_1
R1502
10K
OPT
GAIN0
R1504
10K
OPT
GAIN1
R1503
10K
BSR
ROUT
C1505
0.22uF
50V
R1505
10K
EXT_SPEAKER
PGNDR_2
EXT_SPEAKER_MUTE
PEJ027-04
3
C1501
1uF
50V
C1502
0.1uF
50V
VCC
IC1502
NLASB3157DFT2G
New
JK1500-*1
VCLAMP
R1511
3.6K
6
ON SEMICONDUCTOR
ANALOG SWITCH
5
2
EAN38256201
7B B_TERMINAL2
EXT_OUT_L
L1502
22.0uH
3
R1509
0
C1517
0.1uF
GND
5 T_SPRING
C1512
47uF
25V
R1501
100
PGNDL_2
C1513
47uF
25V
SUBAMP_SD
24
4
B1
EAN38256201
4 R_SPRING
1
1
ON SEMICONDUCTOR
ANALOG SWITCH
5
2
7A B_TERMINAL1
IC1500
TPA3124D2PWPR
PVCCL_1
6
SELECT
+3.5V_ST
IC1501
NLASB3157DFT2G
PEJ027-01
C1507
4.7uF
50V
R1516
4.7K
IC1504
NLASB3157DFT2G
+3.5V_ST
+3.5V_ST
4
7B
OPT
JK1501
C1503
0.1uF
50V
DBG_SW
PGNDR_1
OPT
T_TERMINAL1
7A
B_TERMINAL1
+3.5V_ST
JK1500
PEJ027-01
3
E_SPRING
6A
E_SPRING
6A
T_TERMINAL1
7A
B_TERMINAL1
4
R_SPRING
5
T_SPRING
7B
B_TERMINAL2
6B
T_TERMINAL2
EXT_OUT_L
R1518
10K
Q1500
2SC3052
RT1P141C-T112
Q1502
R1513
2K
SUBAMP_MUTE
4
5
R_SPRING
3
EXT_OUT_R
1
EXT_OUT_R
T_SPRING
EXT_OUT_L
7B
B_TERMINAL2
6B
T_TERMINAL2
OPT
C1514
1uF
10V
OPT
C1515
1uF
10V
Q1501
2SC3052
2
C1518
0.1uF
R1514
2K
THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.
Copyright © 2011 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
LGE Internal Use Only
+1.8V_AMP
+3.3V_Normal
IC404
IN
3 Vd=1.4V 1
R474
1
AP1117E18G-13
ADJ/GND
120 mA
2
C434
0.1uF
16V
OUT
C446
0.1uF
16V
C421
10uF
10V
+24V
SPK_L+
D501
1N4148W
100V
OPT
OPT
R535
3.3
C515
0.1uF
50V
AUD_LRCK
AUD_SCK
AMP_SDA
AMP_SCL
PVDD1B_2
PVDD1B_1
OUT1B_2
OUT1B_1
PGND1B_2
PGND1B_1
BST1B
VDR1B
48
47
46
45
44
43
PVDD1A_1
49
PVDD1A_2
OUT1A_1
OUT1A_2
PGND1A_1
51
50
52
53
PGND1A_2
PGND2A_1
6
37
OUT2A_2
CLK_I
7
36
OUT2A_1
VDD_IO
8
35
PVDD2A_2
34
PVDD2A_1
33
PVDD2B_2
32
PVDD2B_1
DGND_PLL
9
R508
AGND_PLL
10
LF
11
IC501
EAN60969603
NTP-7100
12
31
OUT2B_2
DVDD_PLL
13
30
OUT2B_1
29
PGND2B_2
C513
0.1uF
16V
SPEAKER_L
C537
0.1uF
50V
R524
12
R528
4.7K
SPK_R+
C525
22000pF
D503
1N4148W
100V
OPT
50V
R521
12
R525
12
R522
12
NRS6045T100MMGK
L508
10.0uH
L509
10.0uH
C532
390pF
50V
D504
1N4148W
100V
OPT
NRS6045T100MMGK
R523
12
C535
0.47uF
50V
C538
R529
0.1uF
50V
4.7K
C539
R530
0.1uF
50V
4.7K
SPEAKER_R
SPK_R-
28
+24V
PGND2B_1
27
BST2B
26
VDR2B
24
25
/FAULT
MONITOR2
23
MONITOR1
22
MONITOR0
21
SCL
20
SDA
19
BCK
18
WCK
17
14
15
C505
0.1uF
16V
R520
12
4.7K
C534
0.47uF
50V
L507
NRS6045T100MMGK
C531
390pF
50V
AVDD_PLL
OPT
C511
10uF
10V
R503
54
EP_PAD
PGND2A_2
38
+1.8V_AMP
AUD_LRCH
55
56
39
SDATA
OPT
C503
10uF
10V
C522
25V1uF
5
GND
C530
390pF
50V
D502
1N4148W
100V
OPT
GND_IO
C508
1000pF
50V
3.3K
C502
0.1uF
16V
4
AD
THERMAL
57
3
DGND_2
OPT
C501
10uF
10V
100pF
50V
BST2A
DGND_1
L502
C504
VDR2A
40
2
C509
0.1uF
BLM18PG121SN1D
BLM18PG121SN1D
L501
NC
41
1
+1.8V_AMP
+1.8V_AMP
10.0uH
R527
C520
1uF
25V
42
BST1A
VDR1A
25V /RESET
C512
1uF
NRS6045T100MMGK
C536
0.1uF
50V
SPK_L-
16
C506
1000pF
50V
AUD_MASTER_CLK
L506
10.0uH
C518
22000pF
50V
L504
TP502
AMP_RESET
C514
22000pF
50V
DVDD
BLM18PG121SN1D
+3.3V_Normal
C519
0.1uF
50V
C529
390pF
50V
OPT
C547
0.01uF
50V
C521
10uF
35V
R526
12
R519
12
C517
1uF
25V
C526
C527
0.1uF
50V
0.1uF
50V
C528
10uF
35V
C524
22000pF
50V
100
R504
100
R505
100
R506
33
R507
33
R513
0
POWER_DET
C516
1000pF
50V
OPT
+3.5V_ST
C507
18pF
50V
C510
18pF
50V
C546
22pF
50V
C544
22pF
50V
C545
22pF
50V
OPT
OPT
OPT
WAFER-ANGLE
R515
10K
R514
C
100
B
Q501
2SC3052
R517
SPK_L+
AMP_MUTE
4
10K
E
SPK_L-
SPK_R+
SPK_R-
3
2
1
P501
THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.
Copyright © 2011 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
GP2R
AMP_NTP
20101023
16
LGE Internal Use Only
[SCART/EXT AUDIO 1st AMP]
IC1600
SN324
EXT_L_AMP_IN
+12V/+15V
SCART1_Lout
R1600
R1622
5.6K
100
R1645
NON_INV_IN1
10K
C1606
33pF
VCC
C1600
0.1uF
50V
SCART1_Rout
R1601
R1624
5.6K
100
C1602
0.01uF
NON_INV_IN2
R1644
33K
R1603
22K
INV_IN2
R1646
10K
OUT2
C1613
33pF
R1610
2.2K
2
13
3
12
4
11
5
10
6
9
7
8
R1651
33K
INV_IN4
R1647
NON_INV_IN4
10K
100
C1624
10uF
16V
OPT
R1655
470K
C1615
33pF
OPT
INV_IN1
CLOSE TO MSTAR
R1659
2.2K
OUT4
EU_OPT_AUK
R1643
33K
OPT
R1638
470K
R1602
22K
14
R1657
5.6K
R1658
5.6K
NON_INV_IN3
R1653
33K
INV_IN3
OUT3
R1649
10K
C1614
33pF
R1661
2.2K
DTV/MNT_R_OUT
OPT
R1656
470K
OPT
R1637
470K
C1605
10uF
16V
100
R1665
100
R1664
EXT_L_AMP
GND
EXT_R_AMP
OPT
C1603
10uF
16V
C1601
0.01uF
1
R1663
OUT1
100
R1611
2.2K
DTV/MNT_L_OUT
R1662
CLOSE TO MSTAR
C1622
10uF
16V
EXT_R_AMP_IN
IC1600-*1
AS324MTR-E1
OUT1
1
14
OUT4
EU_OPT_BCD
IN1-
IN1+
VCC
IN2+
IN2-
OUT2
2
13
3
12
4
11
5
10
6
9
7
8
IN4-
IN4+
GND
IN3+
IN3-
OUT3
COMPONENT2
+3.3V_Normal
R1612
10K
R1615
1K
COMP2_DET
+3.3V_Normal
D1613
5.6V
OPT
R1613
10K
[GN]E-LUG
SC1/COMP1_DET
R4223
0
D1611
5.6V
OPT
C1607
0.1uF
16V
R1614
1K
R1609
75
AV_DET
22
21
10
SYNC_IN
[GN]G
20
[GN]C_DET
19
8
17
RGB_IO
[RD]R
16
[WH]L_IN
15
5
D1604
30V
14
R1628
75
C1620
100uF
16V
30V
R1620
75
[RD]E-LUG-S
C1621
47uF
16V
B
R1621
75
7C
[RD]O-SPRING_1
5C
DTV/MNT_VOUT
[WH]O-SPRING
COMP2_Pr+
D1615
30V
R1633
10K
5D
[RD]CONTACT
Rg
Gain=1+Rf/Rg
R1639
180
R1642
15K
4E
[RD]O-SPRING_2
COMP2_L_IN
D1616
5.6V
R1625
470K
C1616
1000pF
50V
OPT
R1626
470K
C1617
1000pF
50V
OPT
OPT
5E
D2B_OUT
R1636
12K
[RD]E-LUG
SC1_R+/COMP1_Pr+
R1616
75
R1608
75
R1632
10K
6E
COMP2_R_IN
R1627
22
PPJ234-01
JK1603
REAR_COMP2
D1617
5.6VOPT
R_GND
13
[RD]MONO
R1641
47K
SC1_FB
RGB_GND
[RD]R_IN
4
R1634
12K
R4221
0
12
G_OUT
SC1_G+/COMP1_Y+
11
D2B_IN
PPJ-230-01
JK1601
COMPONENT1
D1610
30V
OPT
R_OUT
6
13
D1603
30V
OPT
SYNC_GND1
[BL]B
Q1602
2SC3052
E
Rf
SYNC_GND2
D1614
5B
R1635
390
18
7
[BL]E-LUG-S
7B
COMP2_Pb+
C
R4211
390
SYNC_OUT
9
C1625
0.1uF
50V
[BL]O-SPRING
C
C1608
220pF
50V
OPT
C1604
47pF
50V
C1623
0.1uF
50V
R1640
470
D1602
30V
OPT
COM_GND
[GN]GND
11
[GN]CONTACT
B
SC1_CVBS_IN
COMP2_Y+
D1612
30V
5A
4A
SC1_SOG_IN
E
ISA1530AC1
Q1601
FIX-TER
[GN]O-SPRING
+12V/+15V
L1606
R4210
0
COMPONENT1
R1619
75
6A
IN CASE OF SMALL= 15V
D1605
30V
10
R1604
75
G_GND
9
ID
8
B_OUT
SC1_B+/COMP1_Pb+
7
AUDIO_L_IN
6
D1606
30V
B_GND
OPT
D1618 R1623
30V
15K
R1605
75
SC1_ID
R1629
3.9K
5
AUDIO_GND
4
AUDIO_L_OUT
R1617
10K
3
AUDIO_R_IN
2
AUDIO_R_OUT
1
SC1/COMP1_L_IN
D1607
5.6V
OPT
R1606
470K
L1604
120-ohm
C1611
330pF
50V
PSC008-01
JK1602
R1630
12K
R1618
10K
SC1/COMP1_R_IN
D1609
5.6V
OPT
L1603
120-ohm
R1607
470K
C1612
330pF
50V
R1631
12K
Full Scart/ Comp1
[SCART AUDIO MUTE]
+3.5V_ST
DTV/MNT_L_OUT
D1608
5.6V
OPT
L1601
BLM18PG121SN1D
C1609
1000pF
50V
C1618
4700pF
DTV/MNT_L_OUT
R1652
10K
Q1607
2SC3052
RT1P141C-T112
Q1610
R1648
2K
DTV/MNT_R_OUT
D1601
5.6V
OPT
THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.
Copyright © 2011 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
L1602
BLM18PG121SN1D
C1610
1000pF
50V
C1619
4700pF
SCART1_MUTE
3
DTV/MNT_R_OUT
Q1608
2SC3052
1
2
C1636
0.1uF
R1650
2K
GP2R
REAR_JACK
20101023
17
LGE Internal Use Only
THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.
Copyright © 2011 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
GP2R
SIDE_JACK
20101023
18
LGE Internal Use Only
* Option name of this page : CI_SLOT
(because of Hong Kong)
CI Region
CI SLOT
+5V_CI_ON
CI TS INPUT
CI_DATA[0-7]
CI_DATA[0-7]
EAG41860102
CI_SLOT_JACK_LV3400
P1901
P1902
10067972-050LF
10067972-000LF
CI_SLOT_JACK
35
R1908
100
2
CI_DATA[3]
37
3
38
4
39
5
CI_DATA[6]
CI_TS_DATA[6]
CI_TS_DATA[7]
40
6
CI_DATA[7]
41
7
42
8
43
9
R1905
10K
R1919
47
CI_ADDR[10]
CI_ADDR[11]
10
45
11
CI_ADDR[9]
CI_ADDR[8]
46
12
CI_MDI[0]
47
13
CI_ADDR[13]
CI_MDI[1]
48
14
CI_ADDR[14]
CI_MDI[2]
49
15
50
16
51
17
0
R1910
GND
OPT
52
18
OPT
19
20
21
CI_MDI[7]
56
22
CI_ADDR[7]
57
23
CI_ADDR[6]
REG
10K
47
CI_ADDR[5]
24
59
25
CI_ADDR[4]
AR1902
60
26
CI_ADDR[3]
61
27
CI_ADDR[2]
62
28
CI_ADDR[1]
63
29
CI_ADDR[0]
64
30
65
31
CI_DATA[1]
66
32
CI_DATA[2]
67
33
33
CI_TS_DATA[0]
33
CI_TS_DATA[1]
CI_TS_DATA[2]
CI_TS_DATA[3]
0
100
OPT
R1909
R1907
/CI_CD2
CI_DATA[0]
CI_ADDR[0-14]
34
68
AR1903
CI HOST I/F
CI_ADDR[12]
58
CI_TS_SYNC
FE_TS_CLK
CI_MCLKI
GND
47
CI_TS_CLK
CI_TS_VAL
CI_MIVAL_ERR
/PCM_CE
CI_OE
G2
2
69
G1
1
CI_DET
+5V_Normal
IC1902
GND
1OE
GND
PCM_A[0]
GND
19
2
2OE
0ITO742440D
C1904
0.1uF
16V
2Y4
CI_ADDR[7]
1A2
PCM_A[1]
CI_MISTRT
CI_MIVAL_ERR
2Y3
CI_ADDR[6]
3
18
4
17
5
CI_MCLKI
1A3
PCM_A[2]
2Y2
CI_ADDR[5]
1A4
PCM_A[3]
2Y1
CI DETECT
CI_ADDR[4]
GND
+3.3V_Normal
+3.3V_CI
C1913
0.1uF
VCC
16V
TOSHIBA
1A1
R1904
10K
20
1
TC74LCX244FT
R1902
FE_TS_SYNC
FE_TS_VAL_ERR
/PCM_IRQA
55
R1901
33
C1909
0.1uF
54
PCM_RST
FE_TS_DATA[0]
FE_TS_DATA[0-7]
100
53
/PCM_WAIT
FE_TS_DATA[2]
FE_TS_DATA[1]
CI_MDI[1]
CI_WE
R1920
CI_MDI[6]
R1906
FE_TS_DATA[3]
0
R1916
CI_MDI[5]
CI_MDI[4]
AR1906
AR1904
44
0.1uF
33
CI_MDI[2]
CI_MISTRT
CI_IOWR
C1905
FE_TS_DATA[5]
CI_MDI[0]
CI_IORD
CI_MDI[3]
FE_TS_DATA[6]
FE_TS_DATA[4]
CI_MDI[4]
1
36
CI_TS_DATA[5]
CI_TS_DATA[4]
33
FE_TS_DATA[7]
CI_MDI[5]
CI_MDI[3]
CI_DATA[4]
CI_DATA[5]
AR1901
AR1905
R1921
10K
C1903
0.1uF
16V
CI_DATA[0-7]
/CI_CD1
33
CI_MDI[7]
CI_MDI[6]
@netLa
C1906
10uF
10V
10K
R1903
+5V_Normal
+3.3V_CI
+3.3V_CI
6
16
15
7
14
8
13
9
12
10
11
1Y1
CI_ADDR[0]
2A4
PCM_A[7]
1Y2
CI_ADDR[1]
2A3
PCM_A[6]
1Y3
CI_ADDR[2]
2A2
PCM_A[5]
1Y4
CI_ADDR[3]
2A1
PCM_A[4]
+3.3V_CI
CI_SLOT_OR_GATE_NXP
IC1901
74LVC1G32GW
1
A
2
3
5
VCC
4
Y
R1917
0.1uF
16V
C1908
/CI_CD1
OPT
C1902
0.1uF
0.1uF
CI_DATA[0]
GND
R1915
33
AR1907
PCM_D[0]
CI_DATA[1]
CI_DET
CI_DATA[0-7]
C1901
47
R1918
OPT
/PCM_CD
47
PCM_D[1]
CI_DATA[2]
PCM_D[2]
CI_DATA[3]
PCM_D[3]
CI_DATA[4]
33
AR1908
PCM_D[4]
CI_DATA[5]
PCM_D[5]
CI_DATA[6]
PCM_D[6]
CI_DATA[7]
PCM_D[7]
PCM_D[0-7]
B
GND
/CI_CD2
10K
L1901
BLM18PG121SN1D
CI POWER ENABLE CONTROL
PCM_D[0-7]
CI_DATA[0-7]
+5V_CI_ON
+5V_Normal
Q1902
RSR025P03
S
L1902
BLM18PG121SN1D
CI_ADDR[8]
D
33
AR1912
PCM_A[8]
R1914
22K
R1912
10K
C1911
4.7uF
16V
C1910
G
0.1uF
16V
0.1uF
C1907
CI_ADDR[9]
16V
R1923
10K
OPT
C1912
0.1uF
16V
OPT
PCM_A[10]
CI_ADDR[11]
PCM_A[11]
OPT
OPT
PCM_A[9]
CI_ADDR[10]
CI_ADDR[12]
33
AR1913
CI_ADDR[13]
R1922
PCM_A[12]
PCM_A[13]
PCM_A[14]
CI_ADDR[14]
/PCM_REG
REG
2.2K
R1913
10K
PCM_5V_CTL
C
R1924
10K
THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.
Copyright © 2011 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
Q1901
2SC3052
B
E
CI_OE
CI_WE
AR1909
33
/PCM_OE
/PCM_WE
CI_IORD
/PCM_IORD
CI_IOWR
/PCM_IOWR
GP2R
PCMCI
20101023
20
LGE Internal Use Only
THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.
Copyright © 2011 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
9.5T_GAS
MDS61887708
GAS5-*4
12.5T_GAS
MDS61887708
GAS6-*4
12.5T_GAS
MDS61887708
GAS7-*4
8.5T_GAS
MDS62110209
GAS5-*5
8.5T_GAS
MDS62110209
GAS6-*5
8.5T_GAS
MDS62110209
GAS7-*5
GAS4-*4
12.5T_GAS
GAS4-*5
GAS3-*4
GAS3-*5
12.5T_GAS
MDS61887708
MDS62110209
MDS61887708
12.5T_GAS
8.5T_GAS
8.5T_GAS
GAS2-*4
GAS2-*5
MDS62110209
MDS61887708
MDS62110209
MDS62110204
GAS2-*1
MDS62110205
GAS2-*2
GAS5-*1
5.5T_GAS
GAS4-*2
7.5T_GAS
MDS62110205
GAS5-*2
7.5T_GAS
GAS4-*3
9.5T_GAS
MDS61887710
GAS5-*3
9.5T_GAS
GAS7-*2
GAS7-*3
GAS7-*1
MDS62110204
5.5T_GAS
7.5T_GAS
9.5T_GAS
MDS62110205
GAS6-*1
GAS6-*2
GAS6-*3
MDS61887710
MDS62110204
MDS62110205
MDS61887710
MDS62110204
5.5T_GAS
GAS4-*1
MDS62110204
7.5T_GAS
MDS62110205
9.5T_GAS
5.5T_GAS
GAS3-*1
MDS62110204
MDS61887710
GAS3-*2
MDS62110205
5.5T_GAS
GAS1-*1
5.5T_GAS
GAS1-*2
7.5T_GAS
7.5T_GAS
5.5T_GAS
MDS62110204
7.5T_GAS
MDS62110205
GAS3-*3
MDS61887710
9.5T_GAS
GAS2-*3
MDS61887710
GAS1-*3
9.5T_GAS
GAS1-*4
12.5T_GAS
GAS1-*5
MDS61887710
8.5T_GAS
12.5T_GAS
MDS61887708
8.5T_GAS
MDS62110209
6.5T_GAS
GAS7
MDS62110206
6.5T_GAS
GAS6
MDS62110206
6.5T_GAS
GAS5
MDS62110206
6.5T_GAS
GAS4
MDS62110206
6.5T_GAS
GAS3
MDS62110206
6.5T_GAS
GAS2
MDS62110206
6.5T_GAS
GAS1
MDS62110206
SMD GASKET
GP2R
SMD_GAS
20101023
20
LGE Internal Use Only
+3.3V_Normal
L/DIM_LED/DRIVER
+3.3V_Normal
P2100
12507WR-08L
3
R2100
2.2K
R2103
10K
FRC_L/DIM_REVERSE_SEL
2
LED_DRIVER_D/L
OPT
1
R2101
2.2K
LED_DRIVER_D/L
R2102
10K
L/DIM_SCLK
4
5
L/DIM_MOSI
LED_DRIVER_D/L
R4029
22
6
LED_DRIVER_D/L_SCL
R4028
22
7
LED_DRIVER_D/L_SDA
LED_DRIVER_D/L
8
9
V_SYNC
C2100
18pF
50V
OPT
THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.
Copyright © 2011 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
C2101
18pF
50V
OPT
C2102
18pF
50V
OPT
C2103
18pF
50V
OPT
C2104
18pF
50V
OPT
GP2R
L/DIM_LED
20101023
21
LGE Internal Use Only
DC DC CONVERTER +12V
(For External power)
PSU
R2202
100K
Switching noise reducing [MPS recommend]
0.1uF
50V
PSU
IC2200
MP4460DQ-LF-Z
EP_GND
MBRA340T3G
close to pin
1
10
D2200
VIN_2
PSU
3
8
VIN_1
FREQ
PSU
R2204
200K
GND
1/8W
1%
PSU
5
6
PSU
PSU
R2211
270K
R2212
10K
1/16W
1%
1/16W
1%
PSU
L2201
22UH
PSU
PSU
C2207
0.1uF
50V
C2204
22uF
25V
REAL TIME CLOCK
5V/12V EXT PowerOut
IC2202
MP5000DQ
R2203
100K
GND
C2211
470pF
50V
OPT
LIPS
IC2201
MP2305DS
SW
8
1
2
7
3
6
SS
4
5
I-LIMIT
R2209
1K
EN
NC
EXT5V_CTRL
COMP
C2205
2700pF
50V
GND
EXT12V_CTRL
FB
9
3
8
4
7
5
6
SOURCE_4
L2204
CB3216PA501E
SOURCE_3
SOURCE_2
C2217
2pF
50V
C2214
22uF
16V
C2215
0.1uF
50V
SOURCE_1
+3.5V_ST
IC2204
M41T81
C2216
2pF
50V
XI
XO
R2221
1K
M2200
BATTERY
11
L2203
CB3216PA501E
R2207
56K
EXT_12V
EXT_5V
R2208
10K
R2206
12.4K
2
SOURCE_5
VBAT
1
8
2
7
3
6
4
5
VCC
R2227
4.7K
VSS
C2219
0.1uF
16V
IRQ/FT/OUT/SQW
RTC_INT
SCL
R2225
22
CLOCK_SCL
SDA
R2226
22
CLOCK_SDA
2
C2201
0.47uF
25V
IN
C2206
0.1uF
50V
10
VCC
+12V
C2209
22uF
16V
A2
BS
C2202
0.01uF
50V
DV/DT
R2213
ENABLE/FAULT
1K
1
X2200
32.768KHz
+12V
L2200
CB3216PA501E
1
+12V/+15V
R2215
43
L2202
22UH
C2212
1uF
16V
+3.5V_ST
C2213
22uF
16V
D2201
+3.5V_ST
R2214
4.7K
R2218
10K
R2217
4.7K
EXT_PWR_DET
A1
FB
C
C2200
150pF
50V
$0.21
7
PSU
R2201
150K
PSU
18K
PSU
R2200
PSU
4
PSU
C2210
0.1uF
50V
C
Q2200
2SC3875S(ALY)
R2216
1K
C
B
B
COMP
C2208
3.3uF
50V
E
E
EN
BST
+12V
9
1/16W
1%
2
+24V
R2210
20K
SW_2
11
THERMAL
SW_1
PSU
R2205
22
PSU
C2203
Q2201
2SC3875S(ALY)
THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.
Copyright © 2011 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
LGE Internal Use Only