Download LG Electronics 47LE7300 Flat Panel Television User Manual

Internal Use Only
North/Latin America
Europe/Africa
Asia/Oceania
http://aic.lgservice.com
http://eic.lgservice.com
http://biz.lgservice.com
LED LCD TV
SERVICE MANUAL
CHASSIS : LD03E
MODEL : 47LE7300
MODEL : 47LE730N
MODEL : 47LE7380
47LE7300-ZA
47LE730N-ZA
47LE7380-ZA
CAUTION
BEFORE SERVICING THE CHASSIS,
READ THE SAFETY PRECAUTIONS IN THIS MANUAL.
P/NO : MFL63263214 (1008-REV00)
Printed in Korea
CONTENTS
CONTENTS .............................................................................................. 2
PRODUCT SAFETY ..................................................................................3
SPECIFICATION ....................................................................................... 4
ADJUSTMENT INSTRUCTION ................................................................ 7
BLOCK DIAGRAM...................................................................................14
EXPLODED VIEW .................................................................................. 15
SVC. SHEET ...............................................................................................
Copyright © 2010 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
-2-
LGE Internal Use Only
SAFETY PRECAUTIONS
IMPORTANT SAFETY NOTICE
Many electrical and mechanical parts in this chassis have special safety-related characteristics. These parts are identified by
in the
Schematic Diagram and Exploded View.
It is essential that these special safety parts should be replaced with the same components as recommended in this manual to prevent
Shock, Fire, or other Hazards.
Do not modify the original design without permission of manufacturer.
Leakage Current Hot Check (See below Figure)
Plug the AC cord directly into the AC outlet.
General Guidance
An isolation Transformer should always be used during the
servicing of a receiver whose chassis is not isolated from the AC
power line. Use a transformer of adequate power rating as this
protects the technician from accidents resulting in personal injury
from electrical shocks.
It will also protect the receiver and it's components from being
damaged by accidental shorts of the circuitry that may be
inadvertently introduced during the service operation.
If any fuse (or Fusible Resistor) in this TV receiver is blown,
replace it with the specified.
When replacing a high wattage resistor (Oxide Metal Film Resistor,
over 1 W), keep the resistor 10 mm away from PCB.
Do not use a line Isolation Transformer during this check.
Connect 1.5 K / 10 watt resistor in parallel with a 0.15 uF capacitor
between a known good earth ground (Water Pipe, Conduit, etc.)
and the exposed metallic parts.
Measure the AC voltage across the resistor using AC voltmeter
with 1000 ohms/volt or more sensitivity.
Reverse plug the AC cord into the AC outlet and repeat AC voltage
measurements for each exposed metallic part. Any voltage
measured must not exceed 0.75 volt RMS which is corresponds to
0.5 mA.
In case any measurement is out of the limits specified, there is
possibility of shock hazard and the set must be checked and
repaired before it is returned to the customer.
Leakage Current Hot Check circuit
Keep wires away from high voltage or high temperature parts.
AC Volt-meter
Before returning the receiver to the customer,
always perform an AC leakage current check on the exposed
metallic parts of the cabinet, such as antennas, terminals, etc., to
be sure the set is safe to operate without damage of electrical
shock.
Leakage Current Cold Check(Antenna Cold Check)
With the instrument AC plug removed from AC source, connect an
electrical jumper across the two AC plug prongs. Place the AC
switch in the on position, connect one lead of ohm-meter to the AC
plug prongs tied together and touch other ohm-meter lead in turn to
each exposed metallic parts such as antenna terminals, phone
jacks, etc.
If the exposed metallic part has a return path to the chassis, the
measured resistance should be between 1 MΩ and 5.2 MΩ.
When the exposed metal has no return path to the chassis the
reading must be infinite.
An other abnormality exists that must be corrected before the
receiver is returned to the customer.
Copyright © 2010 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
-3-
To Instrument's
exposed
METALLIC PARTS
0.15 uF
Good Earth Ground
such as WATER PIPE,
CONDUIT etc.
1.5 Kohm/10W
When 25A is impressed between Earth and 2nd Ground
for 1 second, Resistance must be less than 0.1 Ω
*Base on Adjustment standard
LGE Internal Use Only
SPECIFICATION
NOTE : Specifications and others are subject to change without notice for improvement.
3. Test method
1. Application range
This specification is applied to the LCD TV used LD03E
chassis.
2. Requirement for Test
1) Performance: LGE TV test method followed
2) Demanded other specification
- Safety : CE, IEC specification
- EMC :CE, IEC
Each part is tested as below without special appointment.
1) Temperature: 25 ºC ± 5 ºC(77 ºF ± 9 ºF), CST: 40 ºC ± 5 ºC
2) Relative Humidity : 65 % ± 10 %
3) Power Voltage
: Standard input voltage (AC 100-240 V~ 50 / 60 Hz)
* Standard Voltage of each products is marked by models.
4) Specification and performance of each parts are followed
each drawing and specification by part number in
accordance with BOM.
5) The receiver must be operated for about 5 minutes prior to
the adjustment.
4. Module General Specification
No.
Item
Specification
Remark
1
Display Screen Device
119 cm(47 inch) wide color display module
2
Aspect Ratio
16:9
3
LCD Module
119 cm(47 inch) TFT LCD FHD
4
Operating Environment Temp. : 0 deg ~ 50 deg
LCD
LGD/ IOP
Humidity : 20 % ~ 90 %
5
Storage Environment
Temp. : -20 deg ~ 60 deg
Humidity : 10 ~ 90 %
6
Input Voltage
AC 100-240V~, 50 / 60Hz
7
Power Consumption
Power on (White)
LGD
Typ : 103
LCD (Module) + Backlight(EDGE LED)
8
Module Size
1083.6(H) x 628.8(V) x 25.5 mm(D)
8
Pixel Pitch
0.5415 (H) x 0.5415 (V)
9
Back Light
LED(EDGE), LGE(IOP)
10
Display Colors
1.06 B(true) colors
11
Coating
3H
Copyright © 2010 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
-4-
With inverter
LGE Internal Use Only
5. Module optical specification
No.
Item
Specification
Min.
Typ.
1.
Viewing Angle<CR>10>
Right/Left/Up/Down
89/89/89/89
2.
Luminance
Luminance (cd/m2)
360
450
3.
Contrast Ratio
CR
1000
1400
4.
CIE Color Coordinates
White
Max.
CR > 10
Variation
1.3
RED
Wx
0.279
Wy
0.292
Xr
Green
Blue
Remark
MAX /MIN
0.636
Yr
Typ.
0.335
Typ.
Xg
-0.03
0.291
+0.03
Yg
0.603
Xb
0.146
Yb
0.061
1) Stable for approximately 60 minutes in a dark environment at 25 ºC ± 2 ºC and windless room.
2) Operating Ambient Humidity: Min 10, Max 90 %RH
3) Suppl Voltage: 24 V
4) Frame Frequency: 120 Hz
6. Component Video Input (Y, CB/PB, CR/PR)
Specification
No.
Resolution
1.
720x480
Remark
H-freq(kHz)
15.73
V-freq(Hz)
60.00
SDTV,DVD 480i
2.
720x480
15.63
59.94
SDTV,DVD 480i
3.
720x480
31.47
59.94
480p
4.
720x480
31.50
60.00
480p
5.
720x576
15.625
50.00
SDTV,DVD 625 Line
6.
720x576
31.25
50.00
HDTV 576p
7.
1280x720
45.00
50.00
HDTV 720p
8.
1280x720
44.96
59.94
HDTV 720p
9.
1280x720
45.00
60.00
HDTV 720p
10.
1920x1080
31.25
50.00
HDTV 1080i
11.
1920x1080
33.75
60.00
HDTV 1080i
12.
1920x1080
33.72
59.94
HDTV 1080i
13.
1920x1080
56.250
50
HDTV 1080p
14.
1920x1080
67.5
60
HDTV 1080p
Copyright © 2010 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
-5-
LGE Internal Use Only
7. RGB (PC)
Specification
No.
Resolution
H-freq(kHz)
V-freq(Hz)
Pixel Clock(MHz)
Proposed
Remarks
Input 848*480 60 Hz, 852*480 60 Hz
1.
720*400
31.468
70.08
28.321
2.
640*480
31.469
59.94
25.17
VESA
For only DOS mode
3.
800*600
37.879
60.31
40.00
VESA
4.
1024*768
48.363
60.00
65.00
VESA(XGA)
5.
1280*768
47.78
59.87
79.5
WXGA
6.
1360*768
47.72
59.8
84.75
WXGA
7.
1280*1024
63.595
60.0
108.875
SXGA
FHD model
8.
1920*1080
66.587
59.93
138.625
WUXGA
FHD model
-> 640*480 60 Hz Display
8. HDMI Input
(1) DTV Mode
No.
Resolution
H-freq(kHz)
V-freq.(Hz)
59.94 /60
Pixel clock(MHz)
27.00/27.03
Proposed
1.
720*480
31.469 /31.5
2.
720*576
31.25
50
54
SDTV 576P
3.
1280*720
37.500
50
74.25
HDTV 720P
4.
1280*720
44.96 /45
59.94 /60
74.17/74.25
HDTV 720P
5.
1920*1080
33.72 /33.75
59.94 /60
74.17/74.25
HDTV 1080I
6.
1920*1080
28.125
50.00
74.25
HDTV 1080I
7.
1920*1080
26.97 /27
23.97 /24
74.17/74.25
HDTV 1080P
8.
1920*1080
33.716 /33.75
29.976 /30.00
74.25
HDTV 1080P
9.
1920*1080
56.250
50
148.5
HDTV 1080P
10.
1920*1080
67.43 /67.5
59.94 /60
148.35/148.50
HDTV 1080P
Remark
SDTV 480P
(2) PC Mode
No.
Resolution
H-freq(kHz)
V-freq.(Hz)
70.08
Pixel clock(MHz)
Proposed
720*400
31.468
2.
640*480
31.469
59.94
25.17
VESA
HDCP
3.
800*600
37.879
60.31
40.00
VESA
HDCP
4.
1024*768
48.363
60.00
65.00
VESA(XGA)
HDCP
5.
1280*768
47.78
59.87
79.5
WXGA
HDCP
6.
1360*768
47.72
59.8
84.75
WXGA
HDCP
7.
1280*1024
63.595
60.0
108.875
SXGA
HDCP/FHD model
8.
1920*1080
67.5
60.00
138.625
WUXGA
HDCP/FHD model
Copyright © 2010 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
28.321
Remark
1.
-6-
HDCP
LGE Internal Use Only
ADJUSTMENT INSTRUCTION
(3) Adjustment
1) Adjustment method
- Using RS-232, adjust items listed in 3.1 in the other
shown in “3.1.(3).3)”
1. Application Range
This specification sheet is applied to all of the LCD TV with
LD03E chassis.
2) Adj. protocol
2. Designation
Protocol
(1) Because this is not a hot chassis, it is not necessary to use
an isolation transformer. However, the use of isolation
transformer will help protect test instrument.
(2) Adjustment must be done in the correct order.
(3) The adjustment must be performed in the circumstance of
25 ºC ± 5 ºC of temperature and 65 % ±10 % of relative
humidity if there is no specific designation.
(4) The input voltage of the receiver must keep AC 100-240
V~ 50 / 60Hz.
(5) The receiver must be operated for about 5 minutes prior to
the adjustment when module is in the circumstance of over
15.
Command
Set ACK
Enter adj. mode
aa 00 00
a 00 OK00x
Source change
xb 00 40
b 00 OK40x (Adjust 480i Comp1 )
xb 00 60
b 00 OK60x (Adjust 1024*768 RGB)
Begin adj.
ad 00 10
Return adj. result
OKx (Case of Success)
NGx (Case of Fail)
Read adj. data
Confirm adj.
(main)
(main)
ad 00 20
000000000000000000000000007c007b006dx
(sub)
(Sub)
ad 00 21
000000070000000000000000007c00830077x
ad 00 99
NG 03 00x (Fail)
In case of keeping module is in the circumstance of 0 °C, it
should be placed in the circumstance of above 15 °C for 2
hours
NG 03 01x (Fail)
NG 03 02x (Fail)
OK 03 03x (Success)
End adj.
In case of keeping module is in the circumstance of below 20 °C, it should be placed in the circumstance of above 15
°C for 3 hours.
a 00 OK90x
Ref.) ADC Adj. RS232C Protocol_Ver1.0
[Caution]
When still image is displayed for a period of 20 minutes or
longer (especially where W/B scale is strong. Digital pattern
13ch and/or Cross hatch pattern 09ch), there can some
afterimage in the black level area.
3) Adj. order
- aa 00 00
- xb 00 40
- ad 00 10
- xb 00 60
- ad 00 10
- ad 00 90
3. Automatic Adjustment
3.1. ADC Adjustment
aa 00 90
[Enter ADC adj. mode]
[Change input source to Component1(480i)]
[Adjust 480i Comp1]
[Change input source to RGB(1024*768)]
[Adjust 1024*768 RGB]
End adj.
3.2. MAC Address
(1) Overview
ADC adjustment is needed to find the optimum black level
and gain in Analog-to-Digital device and to compensate
RGB deviation.
(1) Equipment & Condition
- Play file: Serial.exe
- MAC Address edit
- Input Start / End MAC address
(2) Equipment & Condition
1) Jig (RS-232C protocol)
2) MSPG-925 Series Pattern Generator(MSPG-925FA,
pattern - 65)
- Resolution : 480i Comp1
1080P Comp1
1920*1080 RGB
- Pattern : Horizontal 100 % Color Bar Pattern
- Pattern level : 0.7 ± 0.1 Vp-p
- Image
(2) Download method
1) Communication Prot connection
PCBA
PC(RS-232C)
RS-232C Po rt
Connect: PCBA Jig-> RS-232C Port== PC-> RS-232C Port
Copyright © 2010 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
-7-
LGE Internal Use Only
2) MAC Address Download
- Com 1,2,3,4 and 115200(Baud rate)
- Port connection button click(1)
3.4. LAN PORT INSPECTION(PING TEST)
Connect SET -> LAN port == PC -> LAN Port
SET
PC
(1) Equipment setting
1) Play the LAN Port Test PROGRAM.
2) Input IP set up for an inspection to Test
Program.
*IP Number : 12.12.2.2
(2) LAN PORT inspection (PING TEST)
1) Play the LAN Port Test Program.
2) Connect each other LAN Port Jack.
3) Play Test (F9) button and confirm OK Message.
4) Remove LAN CABLE
- Load button click(2) for MAC Address write.
- Start MAC Address write button(3)
- Check the OK Or NG
3.3. LAN
(1) Equipment & Condition
A Each other connection to LAN Port of IP Hub and Jig
(2) LAN inspection solution
A LAN Port connection with PCB
A Network setting at MENU Mode of TV
A setting automatic IP
A Setting state confirmation
-> If automatic setting is finished, you confirm IP and
MAC Address.
3.5. V-COM Adjust(Only LGD(M+S) Module)
- Why need Vcom adjustment?
A The Vcom (Common Voltage) is a Reference Voltage of
Liquid Crystal Driving.
-> Liquid Crystal need for Polarity Change with every frame.
Circuit Block
Ga mma
Re f e r e nce V o ltage
Data (R ,G,B ) &
Cont rol si gnal
Y
Da t a I n p u t
S
In t e r f a ce
S
Ti m i n g
Co nt r o ll e r
Power
Po w e rInput
I nput
Po w e r
Blo ck
V COM
Gat e Driv e IC
E
Gamm a Reference
Volta ge
Cont rol si gnal
So urce D r i v e I C
T
M
Data (R ,G,B ) & C ont ro l s ignal
Column Line
Pane l
V COM
CST
CLC
Liquid
Crys tal
Row Li ne TFT
V COM
Copyright © 2010 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
-8-
LGE Internal Use Only
- Adjust sequence
A Press the PIP key of the ADJ remote controller. (This PIP
key is hot key to enter the VCOM adjusting mode)
(Or After enter Service Mode by pushing “ADJ” key, then
Enter V-Com Adjust mode by pushing “G” key at “10. VCom”)
A As pushing the right or the left button on the remote
controller, And find the V-COM value Which is no or
minimized the Flicker.
(If there is no flicker at default value, Press the exit key
and finish the VCOM adjustment.)
A Push the OK key to store value. Then the message
“Saving OK” is pop.
A Press the exit key to finish VCOM adjustment.
3.7. CI+ Key Download method
(1) Download Procedure
1) Press "Power on" button of a service R/C.(Baud rate :
115200 bps)
2) Connect RS232-C Signal Cable.
3) Write CI+ Key through RS-232-C.
4) Check whether the key was downloaded or not at ‘In
Start’ menu. (Refer to below).
[Visual Adjust and control the Voltage level]
3.6. Model name & serial number download
(1) Model name & Serial number D/L
A Press “Power on” key of service remocon.(Baud rate :
115200 bps)
A Connect RS232 Signal Cable to RS-232 Jack.
A Write Serial number by use RS-232.
A Must check the serial number at Instart menu.
(2) Method & notice
A. Serial number D/L is using of scan equipment.
B. Setting of scan equipment operated by Manufacturing
Technology Group.
C.Serial number D/L must be conformed when it is
produced in production line, because serial number D/L
is mandatory by D-book 4.0
* Manual Download (Model Name and Serial Number)
If the TV set is downloaded by OTA or service man,
sometimes model name or serial number is initialized.(Not
always)
There is impossible to download by bar code scan, so It
need Manual download.
a. Press the ‘instart’ key of ADJ remote control.
b. Go to the menu ‘5.Model Number D/L’ like below photo.
c. Input the Factory model name(ex 42LD450-ZA) or Serial
number like photo.
=> Check the Download to CI+ Key value in LGset.
1. check the method of CI+ Key value
a. check the method on Instart menu
b. check the method of RS232C Command
1) into the main ass’y mode (RS232 : aa 00 00)
CMD 1
CMD 2
A
A
Data 0
0
0
2) check the key download for transmitted command
(RS232 : ci 00 10)
CMD 1
CMD 2
C
I
Data 0
1
0
3) result value
- normally status for download : OKx
- abnormally status for download : NGx
2. Check the method of CI+ Key value (RS232)
1) into the main ass’y mode (RS232 : aa 00 00)
CMD 1
CMD 2
A
A
Data 0
0
0
2) Check the method of CI+ key by command (RS232 :
ci 00 20)
CMD 1
CMD 2
C
I
Data 0
2
0
3) Result value
i 01 OK 1d1852d21c1ed5dcx
CI+ key Value
d. Check the model name Instart menu -> Factory name
displayed (ex 42LE7500-ZA)
e. Check the Diagnostics (DTV country only) -> Buyer model
displayed (ex 42LE7500-ZA)
Copyright © 2010 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
-9-
LGE Internal Use Only
4.2. EDID(The Extended Display Identification
Data)/DDC(Display Data Channel) download
4. Manual Adjustment
4.1. ADC(GP2) Adjustment
4.1.1. Overview
ADC adjustment is needed to find the optimum black level and
gain in Analog-to-Digital device and to compensate RGB
deviation.
4.1.2. Equipment & Condition
(1) Adjust Remocon
(2) 801GF(802B, 802F, 802R) or MSPG925FA Pattern
Generator
- Resolution :
480i, 720*480 (MSPG-925FA -> Model: 209, Pattern: 65)
- 480i
1080p, 1920*1080 (MSPG-925FA -> Model: 225, Pattern:
65) - 1080p
- Pattern : Horizontal 100% Color Bar Pattern
- Pattern level: 0.7 ± 0.1 Vp-p
- Image
(3) Must use standard cable
(1) Overview
It is a VESA regulation. A PC or a MNT will display an
optimal resolution through information sharing without any
necessity of user input. It is a realization of “Plug and Play”.
(2) Equipment
- Adjust remote control
- Since embedded EDID data is used, EDID download JIG,
HDMI cable and D-sub cable are not need.
(3)Download method
1) Press Adj. key on the Adj. R/C, then select “10.EDID
D/L”, By pressing Enter key, enter EDID D/L menu.
2) Select [Start] button by pressing Enter key, HDMI1 /
HDMI2 / HDMI3 / HDMI4 / RGB are Writing and display
OK or NG.
For Analog EDID
For HDMI EDID
D-sub to D-sub
DVI-D to HDMI or HDMI to HDMI
(4) EDID DATA
A HDMI
4.1.3. Adjust method
(1) ADC 480i, 1080p Comp1
1) Check connected condition of Comp1 cable to the equipment
2) Give a 480i, 1080p Mode, Horizontal 100% Color Bar
Pattern to Comp1.
(MSPG-925FA -> Model: 209, Pattern: 65) - 480i
(MSPG-925FA -> Model: 225, Pattern: 65) - 1080p
3) Change input mode as Component1 and picture mode
as “Standard”
4) Press the In-start Key on the ADJ remote after at least 1
min of signal reception. Then, select 7. External ADC ->
1. COMP 1080p on the menu. Press enter key. The
adjustment will start automatically.
5) If ADC calibration is successful, “ADC RGB Success” is
displayed.
If ADC calibration is failure, “ADC RGB Fail” is displayed.
6) If ADC calibration is failure, after recheck ADC pattern or
condition retry calibration Error message refer to 5).
0x00 0x01 0x02 0x03 0x04 0x05 0x06 0x07 0x08 0x09 0x0A 0x0B 0x0C 0x0D 0x0E 0x0F
0x00 00
0x02 0F
Copyright © 2010 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
- 10 -
50
ⓐ
ⓑ
FF
FF
FF
FF
FF
00
1E
6D
01
03
80
10
09
78
0A
EE
91
A3
54
4C
99
26
54
A1
08
00
71
4F
81
80
01
01
01
01
01
01
2C
0x03 01
01
01
01
01
01
02
3A
80
18
71
38
2D
40
58
0x04 45
00
A0
5A
00
00
00
1E
01
1D
00
72
51
D0
1E
20
0x05 6E
28
55
00
A0
5A
00
00
00
1E
00
00
00
FD
00
3A
0x06 3E
1E
53
10
00
0A
20
20
20
20
20
20
84
13
05
14
03
02
12
ⓓ
ⓓ
0x07
0x00 02
03
0x01 22
15
ⓕ
0x02
26
F1
4E
10
1F
01
ⓔ
20
21
2C
ⓕ
01
26
15
07
50
09
57
07
67
E3
05
03
01
01
1D
80
18
71
1C
16
20
58
0x03 25
00
A0
5A
00
00
00
9E
01
1D
00
80
51
D0
0C
20
0x04 40
80
35
00
A0
5A
00
00
00
1E
02
3A
80
18
71
38
0x05 2D
40
58
2C
45
00
A0
5A
00
00
00
1E
66
21
50
B0
0x06 51
00
1B
30
40
70
36
00
A0
5A
00
00
00
1E
00
00
0x07 00
00
00
00
00
00
00
00
00
00
00
00
00
00
01
ⓔ
A
(2) ADC 1920*1080 RGB
1) Check connected condition of Component & RGB cable
to the equipment
2) Give a 1920*1080 Mode, 100 % Horizontal Color Bar
Pattern to RGB port.
(MSPG-925 Series -> model:126 , pattern:65 )
3) Change input mode as RGB and picture mode as “Standard”.
4) Press the In-start Key on the ADJ remote after at least 1
min of signal reception. Then, select 7. External ADC ->
1. COMP 1080p on the menu. Press enter key. The
adjustment will start automatically.
5) If ADC calibration is successful, “ADC RGB Success” is
displayed.
If ADC calibration is failure, “ADC RGB Fail” is displayed.
6) If ADC calibration is failure, after recheck ADC pattern or
condition retry calibration Error message refer to 5).
FF
ⓒ
0x01
RGB
0x00 0x01 0x02 0x03 0x04 0x05 0x06 0x07 0x08 0x09 0x0A 0x0B 0x0C 0x0D 0x0E 0x0F
0x00 00
FF
ⓒ
0x01
0x02 0F
50
ⓐ
ⓑ
FF
FF
FF
FF
FF
00
1E
6D
01
03
68
10
09
78
0A
EE
91
A3
54
4C
99
26
54
A1
08
00
81
80
61
40
45
40
31
40
01
01
2C
0x03 01
01
01
01
01
01
02
3A
80
18
71
38
2D
40
58
0x04 45
00
A0
5A
00
00
00
1E
01
1D
00
72
51
D0
1E
20
0x05 6E
28
55
00
A0
5A
00
00
00
1E
00
00
00
FD
00
3A
0x06 3E
1E
53
10
00
0A
20
20
20
20
20
20
00
ⓔ
ⓓ
0x07
ⓓ
Reference
- HDMI1 ~ HDMI4 / RGB
- In the data of EDID, bellows may be different by S/W or
Input mode.
A
LGE Internal Use Only
4.3.4. Adj. Command (Protocol)
ⓐ Product ID
Model Name
HEX
EDID Table
DDC Function
FHD Model
0001
01 00
Analog
FHD Model
0001
01 00
Digital
<Command Format>
LEN
ⓒ Month, Year: Controlled on production line:
ex) Monthly : ‘01’ -> ‘01’
Year : ‘2010’ -> ‘14’
ⓓ Model Name(Hex):
A
all
MODEL NAME(HEX)
ⓔ Checksum: Changeable by total EDID data.
ⓕ Vendor Specific(HDMI)
MODEL NAME(HEX)
HDMI1
67 03 0C 00 10 00 B8 2D
HDMI2
67 03 0C 00 20 00 B8 2D
HDMI3
67 03 0C 00 30 00 B8 2D
HDMI4
67 03 0C 00 40 00 B8 2D
HDMI5
67 03 0C 00 50 00 B8 2D
CS
RS-232C Command used during auto-adj.
RS-232C COMMAND
00 00 00 FC 00 4C 47 20 54 56 0A 20 20 20 20 20 20 20
INPUT
VAL
- LEN: Number of Data Byte to be sent
- CMD: Command
- VAL: FOS Data value
- CS: Checksum of sent data
- A: Acknowledge
Ex) [Send: JA_00_DD] / [Ack: A_00_okDDX]
ⓑ Serial No. : Controlled on product line
MODEL
CMD
Explanation
[CMD
ID
DATA]
wb
00
00
wb
00
10
Gain adj.(internal white pattern)
wb
00
1f
Gain adj. completed
wb
00
20
Offset adj.(internal white pattern)
wb
00
2f
Offset adj. completed
wb
00
ff
End White Balance adj.(Internal pattern disappears)
Ex) wb 00 00 -> Begin white balance auto-adj.
wb 00 10 -> Gain adj.
ja 00 ff -> Adj. data
jb 00 c0
...
...
wb 00 1f -> Gain adj. completed
*(wb 00 20(Start), wb 00 2f(completed)) -> Off-set adj.
wb 00 ff -> End white balance auto-adj.
4.3. White Balance Adjustment
4.3.1 Overview
(1) W/B adj. Objective & How-it-works
(2) Objective: To reduce each Panel’s W/B deviation
(3) How-it-works : When R/G/B gain in the OSD is at 192, it
means the panel is at its Full Dynamic Range. In order to
prevent saturation of Full Dynamic range and data, one of
R/G/B is fixed at 192, and the other two is lowered to find
the desired value.
(4) Adj. condition : normal temperature
1) Surrounding Temperature : 25 ºC ± 5 ºC
2) Warm-up time: About 5 Min
3) Surrounding Humidity : 20 % ~ 80 %
A
Adj. Map
ITEM
Cool
4.3.2 Equipment
1) Color Analyzer: CA-210 (LED Module : CH 14)
2) Adj. Computer(During auto adj., RS-232C protocol is
needed)
3) Adjust Remocon
4) Video Signal Generator MSPG-925F 720p/216-Gray
(Model:217, Pattern:78)
-> Only when internal pattern is not available
Begin White Balance adj.
Command
Data Range
Default
(Hex.)
(Decimal)
Cmd 1
Cmd 2
Min
Max
R-Gain
j
g
00
C0
G-Gain
j
h
00
C0
B-Gain
j
i
00
C0
R-Gain
j
a
00
C0
G-Gain
j
b
00
C0
B-Gain
j
c
00
C0
R-Cut
G-Cut
B-Cut
Medium
R-Cut
A
Color Analyzer Matrix should be calibrated using CS-1000
G-Cut
B-Cut
4.3.3. Equipment connection MAP
Warm
Co lo r Analyzer
R-Gain
j
d
00
C0
G-Gain
j
e
00
C0
B-Gain
j
f
00
C0
RS -232C
Probe
R-Cut
Co m p ut er
G-Cut
RS -232C
RS -232C
Pat t ern Generat o r
Signal Source
* If TV internal pattern is used, not needed
Copyright © 2010 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
- 11 -
LGE Internal Use Only
4.3.5. Adj. method
A
(1) Auto adj. method
1) Set TV in adj. mode using POWER ON key.
2) Zero calibrate probe then place it on the center of the
Display.
3) Connect Cable (RS-232C)
4) Select mode in adj. Program and begin adjustment.
5) When adj. is complete (OK Sing), check adj. status pre
mode. (Warm, Medium, Cool)
6) Remove probe and RS-232C cable to complete adj.
A
W/B Adj. must begin as start command “wb 00 00” , and
finish as end command “wb 00 ff”, and Adj. offset if need.
Mode
If internal pattern is not available, use RF input. In EZ
Adj. menu 7.White Balance, you can select one of 2
Test-pattern: ON, OFF. Default is inner(ON). By
selecting OFF, you can adjust using RF signal in 216
Gray pattern.
A
Adj. condition and cautionary items
1) Lighting condition in surrounding area
Surrounding lighting should be lower 10 lux. Try to
isolate adj. area into dark surrounding.
2) Probe location
: Color Analyzer (CA-210) probe should be within
10cm and perpendicular of the module surface (80°~
100°)
3) Aging time
- After Aging Start, Keep the Power ON status during
5 Minutes.
- In case of LCD, Back-light on should be checked
using no signal or Full-white pattern.
Color Coordination
x
Temp
∆UV
y
COOL
0.269 ± 0.002
0.273 ± 0.002 13000 K
0.0000
MEDIUM
0.285 ± 0.002
0.293 ± 0.002
9300 K
0.0000
WARM
0.313 ± 0.002
0.329 ± 0.002
6500 K
0.0000
4.4. EYE-Q function check
Step 1) Turn on TV
Step 2) Press EYE key of Adj. R/C
Step 3) Cover the Eye Q II sensor on the front of the using
your hand and wait for 6 seconds
Step 4) Confirm that R/G/B value is lower than 10 of the “Raw
Data (Sensor data, Back light)”. If after 6 seconds,
R/G/B value is not lower than 10, replace Eye Q II
sensor.
Step 5) Remove your hand from the Eye Q II sensor and wait
for 6 seconds.
Step 6) Confirm that “ok” pop up. If change is not seen,
replace Eye Q II sensor.
(2) Manual adj. method
1) Set TV in Adj. mode using POWER ON
2) Zero Calibrate the probe of Color Analyzer, then place it
on the center of LCD module within 10cm of the surface.
3) Press ADJ key -> EZ adjust using adj. R/C -> 7. WhiteBalance then press the cursor to the right (KEY G).
(When KEY(G) is pressed 216 Gray internal pattern will
be displayed)
4) One of R Gain / G Gain / B Gain should be fixed at 192,
and the rest will be lowered to meet the desired value.
5) Adj. is performed in COOL, MEDIUM, WARM 3 modes
of color temperature.
A
Standard color coordinate and temperature using CA210(CH 9)
4.5. Local Dimming Function Check
Step 1) Turn on TV.
Step 2) Press Tilt key of Adj. R/C.
Step 3) Confirm under the screen.
4.3.6. Reference (White Balance Adj. coordinate
and temperature)
A
A
Luminance : 216 Gray
Standard color coordinate and temperature using CS-1000
(over 26 inch)
Mode
Color Coordination
x
Temp
∆UV
y
COOL
0.269
0.273
13000 K
0.0000
MEDIUM
0.285
0.293
9300 K
0.0000
WARM
0.313
0.329
6500 K
0.0000
Copyright © 2010 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
- 12 -
LGE Internal Use Only
4.6. Option selection per country
6. Audio
(1) Overview
- Option selection is only done for models in Non-EU
- Applied model: LD03D/03E Chassis applied EU model
No.
1.
(Distortion=10%
Tool 1
Tool 2
Tool 3
Tool 4
Tool 5
31795
64556
22958
2066
Speaker (8Ω
Impedance)
10.0 12.0
8.5
8.9
W
EQ Off
AVL Off
9.8 Vrms Clear Voice Off
10.0 15.0
W
EQ On
AVL On
Clear Voice On
Measurement condition:
1. RF input: Mono, 1 KHz sine wave signal, 100 % Modulation
2. CVBS, Component: 1 KHz sine wave signal 0.4 Vrms
3. RGB PC: 1 KHz sine wave signal 0.7 Vrms
- Method : Press Adj. key on the Adj. R/C, then select Tool
option.
33056
9.0
max Output)
2.
4.7. Tool Option selection
MODEL
Min. Typ. Max. Unit
Output, L/R
(2) Method
1) Press ADJ key on the Adj. R/C, then select Country
Group Menu
2) Depending on destination, select Country Group Code
04 or Country Group EU then on the lower Country
option, select US, CA, MX. Selection is done using +, or GF KEY.
47LE7300
Item
Audio practical max
7. USB S/W Download (option, Service only)
4.8. Ship-out mode check(In-stop)
After final inspection, press IN-STOP key of the Adj. R/C and
check that the unit goes to Stand-by mode.
After final inspection, Always turn on the Mechanical S/W.
1) Put the USB Stick to the USB socket
2) Automatically detecting update file in USB Stick
- If your downloaded program version in USB Stick is Low,
it didn’t work. But your downloaded version is High, USB
data is automatically detecting
3) Show the message “Copying files from memory”
5. GND and Internal Pressure check
5.1. Method
1) GND & Internal Pressure auto-check preparation
- Check that Power Cord is fully inserted to the SET.
(If loose, re-insert)
2) Perform GND & Internal Pressure auto-check
- Unit fully inserted Power cord, Antenna cable and A/V
arrive to the auto-check process.
- Connect D-terminal to AV JACK TESTER
- Auto CONTROLLER(GWS103-4) ON
- Perform GND TEST
- If NG, Buzzer will sound to inform the operator.
- If OK, changeover to I/P check automatically.
(Remove CORD, A/V form AV JACK BOX)
- Perform I/P test
- If NG, Buzzer will sound to inform the operator.
- If OK, Good lamp will lit up and the stopper will allow the
pallet to move on to next process.
4) Updating is starting.
5.2. Checkpoint
• TEST voltage
- GND: 1.5 KV/min at 100 mA
- SIGNAL: 3 KV/min at 100 mA
• TEST time: 1 second
• TEST POINT
- GND TEST = POWER CORD GND & SIGNAL CABLE
METAL GND
- Internal Pressure TEST = POWER CORD GND & LIVE &
NEUTRAL
• LEAKAGE CURRENT: At 0.5 mArms
5) Updating Completed, The TV will restart automatically
6) If your TV is turned on, check your updated version and
Tool option. (explain the Tool option, next stage)
* If downloading version is more high than your TV have,
TV can lost all channel data. In this case, you have to
channel recover. if all channel data is cleared, you didn’t
have a DTV/ATV test on production line.
* After downloading, have to adjust TOOL OPTION again.
1. Push "IN-START" key in service remote control.
2. Select "Tool Option 1" and Push “OK” button.
3. Punch in the number. (Each model has their number.)
Copyright © 2010 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
- 13 -
LGE Internal Use Only
BLOCK DIAGRAM
Copyright © 2010 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
- 14 -
LGE Internal Use Only
EXPLODED VIEW
IMPORTANT SAFETY NOTICE
Copyright
LG Electronics. Inc. All rights reserved.
Only for training and service purposes
- 15 -
* Stand Base * Stand + Set
+ Stand Body
510
500
501
300
A2
A21
122
120
A5
A9
810
200
A10
802
900
910
LV1
803
LV2
530
801
540
A7
521
400
710
Many electrical and mechanical parts in this chassis have special safety-related characteristics. These
parts are identified by
in the Schematic Diagram and EXPLODED VIEW.
It is essential that these special safety parts should be replaced with the same components as
recommended in this manual to prevent X-RADIATION, Shock, Fire, or other Hazards.
Do not modify the original design without permission of manufacturer.
LGE Internal Use Only
CI_A[8]
H28
CI_A[9]
J26
CI_A[13]
H27
CI_A[12]
G26
CI_A[11]
J27
CI_A[10]
J28
55LD650_5.5T
F27
CI_A[7]
22
R116
22
R122
R117
/CI_WAIT
EBI_WE
G24
H26
G27
33
4.7K
4.7K
R194
R193
GAS9-*3
MDS61887710
9.5T_GAS
GAS8-*3
MDS61887710
9.5T_GAS
From wireless_I2C to micom I2C
+3.3V_NORMAL
22 R127
K23
22
G25
R140
NAND_DATA[0-7]
+3.3V_NORMAL
NVRAM
G28
GPIO_02
EBI_ADDR1
GPIO_03
EBI_ADDR0
GPIO_04
EBI_ADDR5
GPIO_05
EBI_ADDR6
GPIO_06
EBI_ADDR8
GPIO_07
EBI_ADDR9
GPIO_08
EBI_ADDR13
GPIO_09
EBI_ADDR12
GPIO_10
EBI_ADDR11
GPIO_11
EBI_ADDR10
GPIO_12
EBI_ADDR7
GPIO_13
EBI_TAB
GPIO_14
EBI_WE1B
GPIO_15
EBI_CLK_IN
GPIO_16
EBI_CLK_OUT
GPIO_17
EBI_RWB
GPIO_18
EBI_CS0B
GPIO_19
NAND_DATA[1]
T26
NAND_DATA[2]
T27
NAND_DATA[3]
U26
NAND_DATA[4]
U27
NAND_DATA[5]
V26
NAND_DATA[6]
V27
NAND_DATA[7]
V28
NAND_CEb
T24
NAND_ALE
R23
NAND_REb
T23
NAND_CLE
T25
NAND_WEb
R24
NAND_RBb
U25
NAND_DATA0
GPIO_22
NAND_DATA1
GPIO_23
NAND_DATA2
GPIO_24
NAND_DATA3
GPIO_25
NAND_DATA4
GPIO_26
NAND_DATA5
GPIO_27
NAND_DATA6
GPIO_28
NAND_DATA7
GPIO_29
NAND_CS0B
GPIO_30
NAND_ALE
GPIO_31
NAND_REB
GPIO_32
NAND_CLE
GPIO_33
NAND_WEB
GPIO_34
NAND_RBB
GPIO_35
A8’h
4
6
5
OPT
10K
R173
GPIO_38
SF_MOSI
GPIO_39
SF_SCK
GPIO_40
SF_CSB
GPIO_41
AA28
SDA
R1028
C171
8pF
OPT
22
22
C167
8pF
OPT
S
D
* I2C MAP
N27
AD19
0
* I2C_2 :
WIRELESS
R110
100
12K
HDMI_HPD_1 IR_IN
Y28
BCM_AVC_DEBUG_TX1
Y27
BCM_AVC_DEBUG_RX1
A_DIM
R1041
5V_HDMI_1
BB Add.
EPHY_ACTIVITY
EPHY_LINK
M_REMOTE_TX
R107
100
G6
R108
100
DTV_ATV_SELECT
5V_HDMI_2
G4
L24
R1033
22
L5
R1046
22
R115
1.8K
For CI
AV_CVBS_DET
R1044
0
P25
C173
22uF
16V
M_REMOTE_TX 17page : Motion Remocon
M_REMOTE_RX 17page : Motion Remocon
M_REMOTE_RX
VREG_CTRL
TUNER_RESET
G5
EMI
C180
100pF
50V
For CI
/CI_CD1
G3
CI_OUTCLK
/CI_CD2
/CI_IREQ
MODEL_OPT_6
K4
K1
MODEL_OPT_3
L27
WIRELESS_DL_RX
M26
N23
R132
22
R28
R1050
100
R27
R161
R26
R133
WIRELESS_DL_TX
FE_TS_VAL_ERR
5V_HDMI_4
MODEL_OPT_2
SCART1_DET
P27
SIDE_COMP_DET
R103
K6
K5
0
R129
22
P26
M3
100
22
M2
22
RF_SWITCH_CTL_CHB
RGB_DDC_SCL
R160
FRC_RESET
R102
L6
15page : CHB_SUB_TUNER
+3.3V_NORMAL
RGB_DDC_SDA
COMP2_DET
22
R1051
LOCAL DIMMING
L4
SIDE_COMP_DET
RF_SWITCH_CTL_CHB
R1052 +3.3V_NORMAL
4.7K
R1049
M1
GPIO_57
External Demod.
5V_HDMI_3
100
22
P28
LG5111_RESET
HP_DET
LG5111_RESET
W27
SCL0_3.3V
W28
SGPIO_01
SDA0_3.3V
W26
SGPIO_02
SCL1_3.3V
W25
SGPIO_03
SDA1_3.3V
J2
SGPIO_04
SCL2_3.3V
J1
SGPIO_05
SDA2_3.3V
K3
SGPIO_06
SCL3_3.3V
K2
SDA3_3.3V
SGPIO_07
* NAND FLASH MEMORY 4Gbit (512M for BB)
Boot Strap
100
G2
GPIO_55
* I2C_3 :
100
R109
L23
SGPIO_00
R124
R1048
M4
17page : Motion Remocon
56
AUD_MASTER_CLK
R105
HDMI_HPD_2 IR_IN
1K
R106
AE19
M5
DD
DD
1K
R199
M23
GPIO_56
* I2C_1 :
MODEL_OPT_0
BT_MUTE
P23
GPIO_53
* I2C_0 :
0 WIRELESS
CI_MOD_RESET
AH18
GPIO_54
OPT
R123
22
R111
N28
GPIO_52
SCL2_3.3V
SC_RE2
R25
GPIO_51
Q104
FDV301N
WIRELESS_SCL
SC_RE1
AA25
GPIO_49
OPT
BCM_RX
BCM_TX
M27
GPIO_48
SDA2_3.3V
MODEL_OPT_1
Y26
GPIO_50
WIRELESS_SDA
DEMOD_RESET
HDMI_HPD_3
BT_RESET
/RST_HUB
Y25
GPIO_47
Q103
FDV301N
28page : ISDB Demod
DEMOD_RESET
PWM_DIM
DSUB_DET
L2
GPIO_46
SDA3_3.3V
100
L3
GPIO_45
SCL3_3.3V
R1042
1K
R1029
For CI
HDMI_HPD_4
R113
L1
GPIO_44
R1026
R114
AA26
GPIO_43
SCL
CI_5V_CTL
1K
K25 DEMOD_RESET 22
AA27
GPIO_42
WP
MODEL_OPT_4
K26
G
VSS
3
7
V24
SF_MISO
G
E2
2
V23
S
E1
8
1
U23
VCC
D
4.7K
R1025
IC102
M24M01-HRMN6TP
NC
R1032
0
C103
0.1uF
PWM0 : GPIO_24
PWM1 : GPIO_09
17page : Motion Remocon
DC
SIDE_AV_DET
K24
GPIO_37
W24
INTERRUPT PIN
INTERRUPT PIN
INTERRUPT PIN
MODEL_OPT_5
K28
GPIO_36
+3.3V_NORMAL
ERROR_OUT
K27
GPIO_21
U24
POWER_DET
DC
R192
L25
GPIO_20
NAND_DATA[0]
0
N25
1.2K
R171
CI_A[6]
F26
EBI_ADDR2
GPIO_23
GPIO_25
GPIO_29
GPIO_26
OPT R1047
0
L26
1.2K
R176
J25
GPIO_01
1.2K
R177
H23
GPIO_00
EBI_ADDR4
1.2K
R180
CI_A[0]
CI_A[5]
N26
EBI_ADDR3
1.2K
R183
CI_A[1]
H24
GAS3-*4
EBI_CS
GAS6-*3
9.5T_GAS
MDS61887710
GAS5-*3
MDS61887710
GAS4-*3
9.5T_GAS
MDS61887710
GAS3-*3
9.5T_GAS
MDS61887710
GAS2-*3
9.5T_GAS
MDS61887710
9.5T_GAS
GAS1-*3
9.5T_GAS
H25
MDS62110204
EBI_CS
MDS61887710
J24
1.2K
R184
MDS62110204
55LD650_5.5T
J23
CI_A[4]
CI_A[2]
1.2K
R187
R1045
4.7K
CI_A[3]
:
:
:
:
1.2K
R170
GAS9
MDS62110206
OPT
GAS8
MDS62110206
GAS1-*4
GAS7-*1
MDS62110204
+3.3V_NORMAL
EBI_RW
+3.3V_NORMAL
IR_INT
IR1_IN
IR2_IN
IR_OUT
IC100
LGE3556C (C0 VERSION)
CI_A[0-13]
GAS7-*2
MDS62110205
GAS6-*1
5.5T_GAS
MDS62110204
GAS6-*2
7.5T_GAS
7.5T_GAS
MDS62110205
5.5T_GAS
OPT
OPT
GAS7
MDS62110206
GAS6
6.5T_GAS
MDS62110206
GAS5
6.5T_GAS
MDS62110206
GAS4
MDS62110206
GAS3
OPT
OPT
GAS2
MDS62110206
MDS62110206
GAS1
6.5T_GAS
MDS62110206
OPT
GAS1-*1
5.5T_GAS
7.5T_GAS
SYS_RESETb
MDS62110204
0
GAS1-*2
R1030
MDS62110205
R1027
10K
+3.3V_NORMAL
SOC_RESET
EXT IRQ
GPIO_00, GPIO_01, GPIO_02,
GPIO_11, GPIO_11, GPIO_39
SMD GASKET
RESET
Default Res. of all NAND pin is Pull-down
+3.3V_NORMAL
+3.3V_NORMAL
2.7K
OPT R1008
2.7K
VSS_1
NC_9
NAND_IO[0] : Flash Select (1)
0 : Boot From Serial Flash
1 : Boot From NAND Flash
NC_10
CL
NAND_CLE
NAND_IO[1] : NAND Block 0 Write (DNS)
0 : Enable Block 0 Write
1 : Disable Block 0 Write
AL
NAND_ALE
W
NAND_WEb
NAND_IO[3:2] : NAND ECC (1, DNS)
00 : No ECC
01 : 1 ECC Bit
10 : 4 ECC Bit
11 : 8 ECC Bit
+3.3V_NORMAL
4.7K
R136
NC_11
NC_12
NAND_IO[4] : CPU Endian (0)
0 : Little Endian
1 : Big Endian
NC_13
NC_14
C
NAND_IO[6:5] : Xtal Bias Control (1, DNS)
00 : 1.2mA (Fundmental Recommand)
01 : 1.8mA
10 : 2.4mA (3rd over tune Recommand)
11 : 3.0mA
WP
FLASH_WP
B
Q101
KRC103S
NC_15
39
11
38
12
37
13
36
14
35
15
34
16
33
17
32
18
31
19
30
20
29
21
28
22
27
23
26
24
25
NC_24
+3.3V_NORMAL
NC_23
C136
10uF
10V
VDD_2
VSS_2
C115
0.1uF
NC_22
NC_21
IF_AGC_SEL
LNA2_CTL/BOSTER_CTL
RF_SWITCH_CTL
BT_ON/OFF
NC_20
NAND_DATA[3]
I/O2
NAND_DATA[2]
I/O1
NAND_DATA[1]
I/O0
NAND_DATA[0]
NC_18
NC_17
100
100
R1024
100
MODEL_OPT_0
/CI_SEL
R130
MODEL_OPT_1
AA26
MAIN_MINI_LVDS
MAIN_LVDS
MODEL_OPT_2
R26
DDR-256M
DDR-512M
MODEL_OPT_3
K1
FHD
MODEL_OPT_4
L25
FRC
MODEL_OPT_5
K27
GIP
NON-GIP
MODEL_OPT_6
K4
OLED
NON_OLED
HD
NON_FRC
MODEL_OPT_1
MODEL_OPT_2
R181
100
BCM BT MODULE
MODEL_OPT_3 17page:M_RFMODULE_RESET
MODEL_OPT_4 15page:TW_9910_RESET
I/O3
NC_19
R1012
R1019
1K
10
NON_URSA3
URSA3
+3.3V_NORMAL
1K
40
NAND_DATA[4]
NC_25
FRC
R1020
VDD_1
9
NAND_DATA[5]
I/O4
N28
LOW
HIGH
PIN NO.
PIN NAME
MODEL_OPT_0
22
*MODEL_OPT_0 & MODEL_OPT_4
REFER TO THIS OPTION
MODEL_OPT_515page:CHB_RESET
MODEL_OPT_0 MODEL_OPT_4
MODEL_OPT_6
LOW
LOW
HIGH
LOW
URSA3 Internal
HIGH
HIGH
URSA3 External
LOW
HIGH
PWIZ Pannel T-con
with LG FRC
NO_FRC
R1018
1K
R1001
2.7K
41
NAND_DATA[6]
I/O5
MODEL OPTION
MINI_LVDS/NO LOCAL_D
R1011
1K
C114
0.1uF
2.7K
NAND_CLE
NC_8
42
8
I/O6
LVDS/LOCAL_D
R1014
1K
R156
2.7K
7
NAND_DATA[7]
DDR_512MB
R1022
1K
C116
4700pF
2.7K
43
I/O7
DDR_256MB
R1015
1K
NC_7
6
NAND_DATA[0-7]
NC_26
FHD
R1017
R1038
2.7K
44
1K
NAND_CEb
5
NC_27
HD
E
45
R1021
R
NAND_REb
4
NC_28
1K
NAND_RBb
OPT R1007
2.7K
RB
Open Drain
46
EXTERNEL FRC/T_CON FRC
R1013
1K
R1035
2.7K
3
NC_29
1K
NC_6
47
NO FRC/INTERNER FRC
R1010
1K
R157 OPT
NC_5
48
GIP
R1009
R1006OPT
2.7K
R158 OPT
NAND_ALE
R1003
2.7K
2.7K
NAND_DATA[6]
NAND_DATA[7]
NC_4
R1002
OPT 2.7K
R1034
NC_3
NAND FLASH
2
OLED
R118
NAND_DATA[5]
R1037OPT
2.7K
OPT R1004
2.7K
1
NON_GIP
R1023
1K
NAND_DATA[4]
2.7K
NAND_DATA[3]
NC_2
NON_OLED
R119
1K
NC_1
R169
2.7K
2.7K
NAND_DATA[0-7]
R1040
OPT 2.7K
NAND_DATA[2]
R1039
IC101
NAND04GW3B2DN6E
R1005
2.7K
2.7K
R1036
OPT 2.7K
NAND_DATA[1]
R191
NAND_DATA[0]
R134
R1000
NAND_DATA[0-7]
NO FRC
FOR ESD 12V Pattern
NC_16
+12V
E
NAND_IO[7] : MIPS Frequency (DNS)
0 : 405MHz
1 : 378MHz
C178
0.1uF
50V
C179
0.1uF
50V
NAND_ALE : I2C Level (DNS)
0 : 3.3V Switching
1 : 5V Switching
NAND_CLE
0 : Enable D2CDIFF AC (DNS)
1 : Disabe D2CDIFF AC
THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.
Copyright © 2010 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
BCM (EUROBBTV)
BCM3556 & NAND FLASH
2009.06.18
1
LGE Internal Use Only
When usding FUNDMENTAl then series R = 0 ohm and CL = 8 pF
IC100
LGE3556C (C0 VERSION)
D23
B28
B27
A27
F24
F23
E25
A2.5V
C28
LVDS_TX_1_DATA2_P
POD2CHIP_MISTRT
LVDS_TX_1_DATA2_N
POD2CHIP_MIVAL
LVDS_TX_1_DATA3_P
CHIP2POD_MCLKO
LVDS_TX_1_DATA3_N
CHIP2POD_MDO0
LVDS_TX_1_DATA4_P
CHIP2POD_MDO1
LVDS_TX_1_DATA4_N
CHIP2POD_MDO2
LVDS_TX_1_CLK_P
CHIP2POD_MDO3
LVDS_TX_1_CLK_N
CHIP2POD_MDO4
LVDS_PLL_VREG
CHIP2POD_MDO5
LVDS_TX_AVDDC1P2
CHIP2POD_MDO6
LVDS_TX_AVDD2P5_1
CHIP2POD_MDO7
LVDS_TX_AVDD2P5_2
CHIP2POD_MOSTRT
LVDS_TX_AVSS_1
CHIP2POD_MOVAL
LVDS_TX_AVSS_2
LVDS_TX_AVSS_3
LVDS_TX_AVSS_4
AC18
AF20
0.1uF
AG21
C223
0.1uF
C219
0.1uF
C214
BROAD BAND STUDIO
C212
4.7uF
AG20
VDAC_AVDD2P5
LVDS_TX_AVSS_5
VDAC_AVDD1P2
LVDS_TX_AVSS_6
VDAC_AVDD3P3_1
LVDS_TX_AVSS_7
VDAC_AVDD3P3_2
LVDS_TX_AVSS_8
LVDS_TX_AVSS_9
LVDS_TX_AVSS_10
AF19
AD20
R220 : BCM recommened resistor 562 ohm
+3.3V_NORMAL
R220
P200
C215
0.1uF
TJC2508-4A
AH20
1%
C213
0.01uF
75
R238
R200
1.5K
R201
1.5K
AG19
C2028
4.7uF
1
AE20
560AH22
VDAC_AVSS_1
VDAC_AVSS_3
CLK54_AVDD1P2
VDAC_1
CLK54_AVDD2P5
VDAC_2
CLK54_AVSS
CLK54_XTAL_N
VDAC_VREG
CLK54_XTAL_P
CLK54_MONITOR
VCXO_AGND_2
R6
R7
T7
A2.5V
T8
R3
U3
L200
BLM18PG121SN1D
T4
T3
R4
0.1uF
4.7uF
0.1uF
R209
3.9K
C201
100pF
0.1uF
Route INCM between associated
left and right signals of same channel
0.1uF
U4
V1
BT_DM
V2
BT_DP
U1
SIDE_USB_DM
U2
T5
C209
C208
C207
R210
120
C203
C202
D3.3V SIDE_USB_DP
The INCM trace ends at the
same point where the connector
ground connects to the board ground
(thru-hole connector pin).
R5
R235
Place test points, resistors
near audio connector.
Connect the other side of
the resistor to GND as close
as possible to the ground
connection of the associated
audio connector.
R266
R1
2.7K
R2
T2
2.7K
T1
USB_AVSS_1
VCXO_AGND_3
USB_AVSS_2
VCXO_AVDD1P2
USB_AVSS_3
VCXO_PLL_AUDIO_TESTOUT
1K R219
P5
P3
A2.5V
A1.2V
BLM18PG121SN1D
L209
BLM18PG121SN1D
P2
EPHY_TDN
EPHY_TDP
N2
N3
P1
P4
BLM18PG121SN1D
N4
N1
C2018
4.7uF
C2020
0.1uF
L210
C2021
4.7uF
C244
0.1uF
16V
C2026
4.7uF
C247
0.1uF
L212
N5
P7
USB_AVDD1P2PLL
USB_AVDD2P5
USB_AVDD2P5REF
RESET_OUTB
RESETB
NMIB
TMODE_0
USB_AVDD3P3
TMODE_1
USB_RREF
TMODE_2
USB_DM1
TMODE_3
USB_DP1
SPI_S_MISO
USB_DM2
POR_OTP_VDD2P5
USB_DP2
POR_VDD1P2
USB_MONCDR
C206
0.015uF
AE6
AD7
041:B5
REAR_AV_L_IN
041:B5
REAR_AV_R_IN
R214
51
C210
0.015uF
002:J6 REAR_AV_LR_INCM
COMP2_L_IN
R215
51
C211
0.015uF
AH4
COMP2_R_IN
R228
51
C232
0.015uF
AG5
002:J6
041:B5
041:B5
SC1_L_IN
SC1_R_IN
SC1_LR_INCM
SIDE_AV_L_IN
041:B5
SIDE_AV_R_IN
002:J6 SIDE_AV_LR_INCM
009:I3
PC_L_IN
009:I3
002:J7
AG4
COMP2_LR_INCM
002:J7
041:B5
AF6
PC_R_IN
R229
51
C220
0.015uF
AG6
R230
51
C221
0.015uF
AF7
AE7
R231
51
C224
0.015uF
AH5
R232
51
C225
0.015uF
AG7
R233
51
C226
0.015uF
AD8
R234
51
C227
0.015uF
AF8
AH6
AE8
PC_LR_INCM
AH7
AH8
AG8
AF5
0.047uF
C256
0.047uF
C254
0.047uF
0.047uF
C253
C252
0.047uF
0.047uF
0.047uF
C299
C298
C296
0.047uF
C279
0.047uF
C277
0
C2027 0.047uF
R265
R264
0
AB9
AA10
AB10
AA11
C222
0.1uF
AB11
AC8
AE5
PLACE NEAR BCM CHIP
C1
F3
C4
A5
E5
Near Q1705
C258
0.1uF
C2019
0.1uF
C261
0.1uF
TU_CVBS_INCM
003:A3
Run Along TUNER_CVBS_IF_P Trace
E6
D7
E7
F7
G7
SC1_RGB_INCM
003:A4
Near J1500
A1.2V
H7
Run Along SC1_R,SC_G,SC_B Trace
A2.5V
AD28
AD26
AC26
AC27
54MHz_XTAL_N
002:I1
54MHz_XTAL_P
002:I2
AE25
REAR_AV_CVBS_INCM
003:A3
Y23
Near J1603
A1.2V
C262
0.1uF
C2015
0.1uF
C2016
0.1uF
C264
0.1uF
COMP2_VID_INCM
Run Along COMP_Y_IN,COMP_Pr_IN,COMP_Pb_IN Trace
AB24
AC24
L203
BLM18PG121SN1D
AF25
AF24
C235
4.7uF
C233
0.1uF
F6
V25
AH3
R_VID_INCM
003:A5
Run Along DSUB_R Trace
A2.5V
J4
J3
Near P1600
R221
J5
J6
SYS_RESETb
001:A6;001:B7
4.7K
N24
L211
BLM18PG121SN1D
G_VID_INCM
003:A5
Run Along DSUB_G Trace
A1.2V
C234
0.1uF
C231
10uF
Run Along DSUB_B Trace
AB8
+3.3V_NORMAL
B_VID_INCM
003:A5
H4
USB_MONPLL
EJTAG_TCK
USB_PWRFLT_1
EJTAG_TDI
USB_PWRFLT_2
EJTAG_TDO
USB_PWRON_1
EJTAG_TMS
USB_PWRON_2
EJTAG_TRSTB
H3
OPT
R224
2.7K
H2
H1
OPT
R225
2.7K
1K R249
G1
C2011
H6
Near J1500
0.1uF
SC1_CVBS_INCM 003:A3
Run Along SC1_CVBS_IN Trace
H5
EJTAG_CE1
EPHY_VREF
EPHY_RDAC
A1.2V
L204
BLM18PG121SN1D
AB26
EPHY_RDN
PLL_MAIN_AVDD1P2
EPHY_RDP
PLL_MAIN_AGND
EPHY_TDN
PLL_MAIN_MIPS_EREF_TESTOUT
EPHY_TDP
PLL_RAP_AVD_TESTOUT
EPHY_AVDD1P2
PLL_RAP_AVD_AVDD1P2
EPHY_AVDD2P5
PLL_RAP_AVD_AGND
EPHY_AGND_1
EPHY_AGND_2
2.7K
R227
2.7K
AB27
M6
N6
R240
A1.2V
L207
BLM18PG121SN1D
390
OPT
C2023
Near J1501
0.1uF
SIDE_AV_CVBS_INCM 003:A3
Run Along SC2_CVBS_IN Trace
N7
AA24
BYP_CPU_CLK
BYP_DS_CLK
BYP_SYS175_CLK
AUDMX_LEFT1
R226
AC25
EPHY_PLL_VDD1P2
BYP_SYS216_CLK
51
VIDEO INCM
F2
P24
USB_AVDD1P2
EPHY_AGND_3
R204
013:E7;035:AK13
F4
+3.3V_NORMAL
USB_AVSS_5
P6
EPHY_RDN
EPHY_RDP
LVDS_TX_0_CLK_P
OPT
C228
10uF
A1.2V A2.5V
USB_AVSS_4
EJTAG_CE0
R218
240
D4
AA23
VCXO_AGND_1
T6
LVDS_TX_0_DATA0_P013:E7;035:AK11
LVDS_TX_0_CLK_N 013:E7;035:AK13
D3
F1
12pF
C229
LVDS_TX_0_DATA0_N013:E7;035:AK11
E4
F5
22
R211
LVDS_TX_0_DATA1_P013:E7;035:AK11
E3
BSC_S_SCL
BSC_S_SDA
A1.2V
LVDS_TX_0_DATA1_N013:E7;035:AK12
E2
PM_OVERRIDE
3
A3.3V
LVDS_TX_0_DATA2_P013:F7;035:AK12
E1
AD27
VDAC_RBIAS
M25
4
LVDS_TX_0_DATA2_N013:F7;035:AK12
D2
VDAC_AVSS_2
AH21
M24
LVDS_TX_0_DATA3_P013:F7;035:AK14
D1
LVDS_TX_AVSS_11
DTV/MNT_V_OUT
2
LVDS_TX_0_DATA3_N013:F7;035:AK14
C3
2
LVDS_TX_1_DATA1_N
POD2CHIP_MDI7
54MHz_XTAL_P
LVDS_TX_0_DATA4_P013:F7;035:AK14
C2
3
POD2CHIP_MDI6
54MHz_XTAL_N
013:E7;035:AK18
LVDS_TX_0_DATA4_N013:F7;035:AK15
B2
X903
54MHz
LVDS_TX_1_DATA1_P
LVDS_TX_1_CLK_P
B1
1
LVDS_TX_1_DATA0_N
POD2CHIP_MDI5
C257
POD2CHIP_MDI4
0
L202
BLM18PG121SN1D
R237
R236
0
A28
LVDS_TX_1_DATA0_P
R250
34
C26
POD2CHIP_MDI3
LVDS_TX_1_DATA0_P013:E7;035:AK16
LVDS_TX_1_CLK_N 013:E7;035:AK18
R248
34
C27
LVDS_TX_0_CLK_N
R247
34
F25
POD2CHIP_MDI2
LVDS_TX_1_DATA0_N013:E7;035:AK16
B5
R251
34
E24
LVDS_TX_0_CLK_P
C5
R244
34
E23
CI_OUTVALID
POD2CHIP_MDI1
LVDS_TX_1_DATA1_P013:E7;035:AK16
D6
R245
34
CI_OUTSTART
LVDS_TX_0_DATA4_N
R246
34
CI_OUTDATA[6] D27
CI_OUTDATA[7] D26
POD2CHIP_MDI0
LVDS_TX_1_DATA1_N013:E7;035:AK17
D5
R260
34
CI_OUTDATA[4] E26
CI_OUTDATA[5] D28
LVDS_TX_0_DATA4_P
A2
R261
34
CI_OUTDATA[2] C25
CI_OUTDATA[3] E27
POD2CHIP_MCLKI
LVDS_TX_1_DATA2_P013:E7;035:AK17
A1
4.7uF
CI_OUTDATA[0] D25
CI_OUTDATA[1] D24
A3.3V A1.2V
LVDS_TX_0_DATA3_N
G23
LVDS_TX_1_DATA2_N013:E7;035:AK17
L208
LVDS_TX_0_DATA2_N
LVDS_TX_0_DATA3_P
CI_A[14]
C230
12pF
22
R212
LVDS_TX_1_DATA3_P013:E7;035:AK19
1008LS-272XJLC 33pF
RMX0_SYNC
CI_OUTDATA[0-7],CI_OUTSTART,CI_OUTVALID
045:V14
LVDS_TX_1_DATA3_N013:E7;035:AK19
A3
R243
604
LVDS_TX_0_DATA2_P
B3
0.1uF
RMX0_DATA
LVDS_TX_1_DATA4_P013:E7;035:AK19
B6
0.1uF
C240
TP4023
LVDS_TX_0_DATA1_N
C6
C251
A26
RMX0_CLK
LVDS_TX_1_DATA4_N013:E7;035:AK20
A4
C237
TP4022
LVDS_TX_0_DATA1_P
4.7uF
B25
PKT0_SYNC
C236
0.1uF
TP4021
LVDS_TX_0_DATA0_N
C239
0.1uF
C242
4.7uF
C295
0.1uF
C2013
4.7uF
A25
LVDS_TX_0_DATA0_P
PKT0_DATA
C2012
0.1uF
FE_TS_SYNC
When usding Dip-type X-tal then series R = 22 ohm and CL = 12 pF
B4
PKT0_CLK
C241
B26
0.1uF
C24
C238
FE_TS_DATA_CLK
FE_TS_SERIAL
54MHz X-TAL
Y24
AE24
1K
R222
AD25
1K
R262
TP is Necessory
AUDIO INCM
AUDMX_RIGHT1
AUDMX_INCM1
PLACE NEAR BCM CHIP
AUDMX_LEFT2
AUDMX_RIGHT2
AUDMX_INCM2
PLACE NEAR Jacks
AUDMX_LEFT3
5.1
AUDMX_RIGHT3
AUDMX_INCM3
Near J1501
R256
Route Between SC2_L_IN & SC2_R_IN
AUDMX_LEFT4
0.15uF
C2014
AUDMX_RIGHT4
SIDE_AV_LR_INCM
002:C6
0.47uF
C271
AUDMX_INCM4
5.1
AUDMX_LEFT5
AUDMX_RIGHT5
Near J1600
AUDMX_INCM5
002:C6
REAR_AV_LR_INCM
R258
Route Between AV1_L_IN & AV1_R_IN
AUDMX_LEFT6
0.15uF
C2024
0.47uF
C2017
AUDMX_RIGHT6
AUDMX_INCM6
AUDMX_AVSS_1
5.1
AUDMX_AVSS_2
AUDMX_AVSS_3
AUDMX_AVSS_4
Near J1603
R259
Route Between COMP1_L_IN & COMP1_R_IN
0.15uF
C265
Route Between SC1_L_IN & SC1_R_IN
0.15uF
C2022
AUDMX_AVSS_5
COMP2_LR_INCM
002:C6
C2025
0.47uF
AUDMX_AVSS_6
AUDMX_LDO_CAP
AUDMX_AVDD2P5
5.1
Near J1500
R257
A2.5V
C217
10uF
SC1_LR_INCM
002:C6
0.47uF
C270
5.1
Near J1602
R252
Route Between PC_L_IN & PC_R_IN
0.15uF
C269
PC_LR_INCM
002:C6
0.47uF
C2010
Near Q1704
TU_SIF_INCM
Route Along With TUNER_SIF_IF_N
THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.
Copyright © 2010 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
BCM (EUROBBTV)
BCM3556 AUD_IN/LVDS
003:A3
2009.06.18
2
LGE Internal Use Only
D1.2V
Place here for common circuit with ATSC
+1.8V_AMP
+1.8V_HDMI
+3.3V_NORMAL
L111
BLM18PG121SN1D
D3.3V
D1.2V
A3.3V
L112
CIC21J501NE
C243
0.1uF
C249
4.7uF
C381
0.1uF
C382
0.01uF
C250
1000pF
C380
10uF
C379
10uF
C287
100uF
C286
33uF
C383
1000pF
C246
0.01uF
C378
0.1uF
C376
4.7uF
C374
0.01uF
C259
1000pF
C366
0.1uF
C266
4.7uF
C288
1000pF
C245
4.7uF
C290
0.01uF
C255
1000pF
C377
0.01uF
C375
0.1uF
C263
4.7uF
C267
0.01uF
C373
1000pF
C289
0.1uF
FOR ESD
C2008
0.1uF
16V
C2007
0.1uF
16V
D3.3V
AG28
AG27
AE26
TU_IF_N_1
TU_IF_P_1
AE28
C172
4.7uF
TU_IF_N_1
C113
0.1uF
L103
TU_IF_P_1
BLM18PG121SN1D
C119
0.1uF
A1.2V
A1.2V
AE27
AD24
C144
0.1uF
AB19
AB25
C122
4.7uF
EDSAFE_AVSS_2
I2S_DATA_OUT
EDSAFE_AVSS_3
I2S_LR_IN
EDSAFE_AVSS_4
I2S_LR_OUT
EDSAFE_AVSS_5
AUD_LEFT0_N
EDSAFE_AVDD2P5
AUD_LEFT0_P
EDSAFE_DVDD1P2
AUD_AVDD2P5_0
EDSAFE_IF_N
AUD_AVSS_0_1
EDSAFE_IF_P
AUD_AVSS_0_2
PLL_DS_AGND
AUD_AVSS_0_3
PLL_DS_AVDD1P2
AUD_AVSS_0_4
PLL_DS_TESTOUT
AUD_AVSS_0_5
AUD_RIGHT0_N
A2.5V
AUD_RIGHT0_P
AB18
C112
0.1uF
C111
0.1uF
BLM18PG121SN1D
AC17
L104 C120
1000pF
BLM18PG121SN1D
AB17
L105
C117
1000pF
C123
0.01uF
AD14
AD16
AB15
AC15
AD13
C118
0.01uF
AE13
AC13
DSUB
AB14
DSUB_R
R_VID_INCM
DSUB_G
AC12
G_VID_INCM
DSUB_B
AB13
B_VID_INCM
AC11
AD12
AA14
AD11
10
C101 47pF
COMP2_Pr
1%
AB12
0.1uF
C128
0.1uF
C129
0.1uF
AD10
AE9
AF9
AH9
AG9
SC1_RGB(EU)/COMPNENT1[NON_EU]
COMP1_Y ==>
C127
AC10
1%
R312 75
1%
R120 82
C104 OPT
R131 75
COMP2_Pb
COMP2_VID_INCM
C169 47pF
1%
C17047pF
R195
AC14
C130
0.1uF
AG15
C131
0.1uF
AE15
C132
SC1_G
0.1uF
AF15
AH15
SC1_RGB_INCM
C134
0.1uF
AF16
C135
0.1uF
AH17
NON_EU
1%
1%
NON_EU
R313
OPT 1%
R135
75
SIDE COMPONENT
75
C133
0.1uF
C105 OPT
NON_EU
R315
75
COMP1_Pr ==> SC1_R
COMP1_Pb ==> SC1_B
ONLY USE NON_EU
FOR COMP 1
R135-*1
AH16
82 1%
C174
0.1uF
AG14
C175
0.1uF
AE14
C176
R196
10
0.1uF
AG10
1%
R167 75
1%
SIDE_COMP_Y
R166 75
1%
R165 82
SIDE_COMP_Pb
SIDE_COMP_INCM
C177 OPT
AH10
1%
R100
R142
R143
R141
SIDE_COMP_Pb
SIDE_COMP_INCM
EU
R2112
TU_CVBS
1% 18
REAR_AV_CVBS
NON_EU
R2112-*1
AE10
NON_EU
R141-*1
5%
5% 12
SIDE_COMP_Pr
CVBS
AE11
AF11
62
AH11
62
OPT
62
75 1% EU
AH13
AE12
AF12
C110
R2113
12
SC1_CVBS_IN
R2114
R2115
0
SIDE_AV_CVBS
0.1uF
AD9
C124
0.1uF
AG11
C125
0.1uF
AG12
C100
0.1uF
AF13
AC9
12
TU_CVBS_INCM
REAR_AV_CVBS_INCM
AF10
A2.5V
SC1_CVBS_INCM
AH12
A2.5V
AG13
R137
10K
R4020
10K
0.1uF
C106
R128
0
AG17
AD15
A1.2V
SC1_ID
OPT
L106
BLM18PG121SN1D
R3055
240
R139
12K
C121
0.1uF
C140
4.7uF
AE16
AE17
AB16
AA15
AC16
AG3
12K
R4021
120
R3056
TU_SIF_INCM
OPT
AUD_LEFT1_N
SD_V5_AVDD2P5
AUD_LEFT1_P
SD_V5_AVSS
AUD_RIGHT1_N
SD_V1_AVDD1P2
AUD_RIGHT1_P
SD_V1_AVDD2P5
AUD_AVDD2P5_1
SD_V1_AVSS_1
AUD_AVSS_1_1
SD_V1_AVSS_2
AUD_AVSS_1_2
SD_V2_AVDD1P2
AUD_AVSS_1_3
SD_V2_AVDD2P5
AUD_LEFT2_N
SD_V2_AVSS_1
AUD_LEFT2_P
SD_V2_AVSS_2
AUD_RIGHT2_N
SD_V2_AVSS_3
AUD_RIGHT2_P
SD_V3_AVDD1P2
AUD_AVDD2P5_2
SD_V3_AVDD2P5
AUD_AVSS_2_1
SD_V3_AVSS_1
AUD_AVSS_2_2
SD_V3_AVSS_2
C4020
0.1uF
AF4
AUD_SPDIF
SD_V4_AVDD1P2
SPDIF_AVDD2P5
SD_V4_AVDD2P5
SPDIF_AVSS
SD_V4_AVSS
SPDIF_IN_N
SD_R
SPDIF_IN_P
SD_G
HDMI_RX_0_CEC_DAT
SD_B
HDMI_RX_0_HTPLG_IN
SD_INCM_B
HDMI_RX_0_HTPLG_OUT
SD_Y1
HDMI_RX_0_DDC_SCL
SD_PR1
HDMI_RX_0_DDC_SDA
SD_PB1
HDMI_RX_0_RESREF
SD_INCM_COMP1
HDMI_RX_0_CLK_N
SD_Y2
HDMI_RX_0_CLK_P
SD_PR2
HDMI_RX_0_DATA0_N
SD_PB2
HDMI_RX_0_DATA0_P
SD_INCM_COMP2
HDMI_RX_0_DATA1_N
SD_Y3
HDMI_RX_0_DATA1_P
SD_PR3
HDMI_RX_0_DATA2_N
SD_PB3
HDMI_RX_0_DATA2_P
SD_INCM_COMP3
HDMI_RX_0_VDD3P3
SD_L1
HDMI_RX_0_VDD1P2
SD_C1
HDMI_RX_0_VDD2P5
SD_INCM_LC1
HDMI_RX_0_AVSS_1
SD_L2
HDMI_RX_0_AVSS_2
SD_C2
HDMI_RX_0_AVSS_3
SD_INCM_LC2
HDMI_RX_0_AVSS_4
SD_L3
HDMI_RX_0_AVSS_5
SD_C3
HDMI_RX_0_AVSS_6
SD_INCM_LC3
HDMI_RX_0_PLL_AVSS
SD_CVBS1
HDMI_RX_0_PLL_DVDD1P2
SD_CVBS2
HDMI_RX_0_PLL_DVSS
SD_INCM_CVBS1
HDMI_RX_1_CEC_DAT
SD_INCM_CVBS2 HDMI_RX_1_HTPLG_IN
SD_INCM_CVBS3 HDMI_RX_1_HTPLG_OUT
HDMI_RX_1_DDC_SCL
SD_SIF1
HDMI_RX_1_DDC_SDA
SD_INCM_SIF1
HDMI_RX_1_RESREF
SD_FB
HDMI_RX_1_CLK_N
SD_FS
HDMI_RX_1_CLK_P
SD_FS2
HDMI_RX_1_DATA0_N
HDMI_RX_1_DATA0_P
PLL_VAFE_AVDD1P2
PLL_VAFE_AVSS HDMI_RX_1_DATA1_N
HDMI_RX_1_DATA1_P
PLL_VAFE_TESTOUT
RGB_HSYNC
HDMI_RX_1_DATA2_N
HDMI_RX_1_DATA2_P
HDMI_RX_1_VDD1P2
HDMI_RX_1_VDD2P5
HDMI_RX_1_AVSS_1
RGB_HSYNC
HDMI_RX_1_AVSS_2
RGB_VSYNC
HDMI_RX_1_AVSS_3
HDMI_RX_1_AVSS_4
HDMI_RX_1_AVSS_5
SC1_FB
HDMI_RX_1_AVSS_6
HDMI_RX_1_AVSS_7
0
R2116
HDMI_RX_1_AVSS_8
OPT
AUD_LRCK
HP_LOUT_N
AG26
AH26
HDMI_RX_1_AVSS_9
HDMI_RX_1_PLL_AVSS
HDMI_RX_1_PLL_DVDD1P2
HDMI_RX_1_PLL_DVSS
C370
0.1uF
C293
0.01uF
C294
0.1uF
C274
0.1uF
C272
0.1uF
C275
0.1uF
C276
0.1uF
C278
4.7uF
C280
4.7uF
C297
4.7uF
C2004
33uF
A2.5V
C147
0.01uF
AA20
AB21
C155
0.1uF
C162
10uF
AC22
D1.8V
AC23
AD23
AH25
D1.8V
HP_ROUT_N
AG25
HP_ROUT_P
AH23
BT_LOUT_N
AG23
BT_LOUT_P
AG24
C248
1000pF
BT_ROUT_N
AH24
C281
1000pF
C282
1000pF
C283
1000pF
C284
0.01uF
C285
0.01uF
C2005
0.01uF
BT_ROUT_P
AE22
C148
0.01uF
AB20
AC21
C156
0.1uF
C2006
0.01uF
C365
0.1uF
16V
C364
0.1uF
16V
C357
10uF
10V
C363
0.1uF
16V
C356
0.1uF
16V
C348
0.1uF
16V
C320
0.1uF
16V
C319
0.1uF
16V
C318
0.1uF
16V
C304
0.1uF
16V
C163
10uF
AE23
AF21
SCART1_Lout_N
AE21
SCART1_Lout_P
AF22
SCART1_Rout_N
AG22
SCART1_Rout_P
AD21
C149
0.01uF
AC20
AD22
C157
0.1uF
C164
10uF
AH2
SPDIF_OUT
AC6
AE4
C150
0.1uF
AF3
+5V_NORMAL
IC100
LGE3556C (C0 VERSION)
AH1
R2036
1K
D1.2V
AA6
AA5
R309
10K
AB3
0
R307
Y6
0
R308
AC4
499
IC100
LGE3556C (C0 VERSION)
HDMI_SDA
J8
C3006
0.1uF
16V
HDMI_CLK-
AC2
HDMI_CLK+
AD1
K8
L8
M8
HDMI_RX0-
AD2
N8
A3.3V
HDMI_RX0+
AE1
P8
HDMI_RX1-
AE2
R8
HDMI_RX1+
AF1
HDMI_RX2+
AD3
AA8
BLM18PG121SN1D
L109
HDMI_RX2-
AF2
A1.2V
H9
H10
A2.5V
AE3
H11
AC3
H12
H13
C160
0.1uF
C153
0.1uF
C145
4.7uF
H14
BLM18PG121SN1D
L107
AB6
H15
AG2
H16
AB4
H17
AA7
H18
Y8
H19
C151
0.01uF
C158
1000pF
AC5
C165
10uF
H21
J21
W8
K21
V4
U6
V5
D3.3V
L21
M21
N21
P21
R21
T21
V3
W4
W2
499
A3.3V
R153
U21
V21
OPT
W21
W3
R205
20
Y1
Y2
Y21
VDDC_2
M7
VDDC_3
AB7
VDDC_4
AC7
VDDC_5
G8
VDDC_6
D9
VDDC_7
AA9
VDDC_8
G10
VDDC_9
A11
VDDC_10
L11
VDDC_11
M11
VDDC_12
N11
VDDC_13
P11
VDDC_14
R11
VDDC_15
T11
VDDC_16
U11
VDDC_17
V11
VDDC_18
D12
VDDC_19
G12
VDDC_20
L12
VDDC_21
M12
VDDC_22
N12
VDDC_23
P12
VDDC_24
R12
VDDC_25
T12
VDDC_26
U12
VDDC_27
V12
VDDC_28
L13
VDDC_29
M13
VDDC_30
N13
VDDC_31
P13
VDDC_32
R13
VDDC_33
T13
V13
AH27
AB1
BLM18PG121SN1D
L110
Y3
A1.2V
AB2
A2.5V
C2003
0.1uF
L14
W5
AA18
W1
AA19
C154
0.1uF
E28
C161
0.1uF
U7
L28
U28
FOR ESD
AB28
V7
BLM18PG121SN1D
L108
W7
U8
V8
C384
33uF
10V
VDDO_2
P14
VDDO_3
R14
VDDO_4
T14
VDDO_5
U14
VDDO_6
V14
VDDO_7
L15
VDDO_8
M15
P15
A9
V6
G11
AA4
G13
C166
10uF
N14
N15
G9
C152
0.01uF
VDDO_1
D1.8V
Y5
C159
1000pF
M14
AA12
Y4
C146
4.7uF
G14
AGC_VDDO
D3.3V
AA13
Y7
L7
U13
AA1
W6
VDDC_1
A3.3V
AA2
U5
K7
H8
AC1
AB5
AD6
J7
HDMI_SCL
R152
AD4
AD5
A2.5V
A14
G15
A19
G19
Copyright © 2010 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
C292
1000pF
HP_LOUT_P
G17
THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.
C369
4.7uF
AF23
AA3
HDMI_RX_1_VDD3P3
R2117
0
AG18
SD_CVBS3
SD_CVBS4
C371
0.01uF
AUD_LRCH
AD18
AG1
SD_INCM_G
RGB_VSYNC
CONNECT NEAR BCM CHIP
AH19
SD_INCM_R
SD_INCM_CVBS4
AF17
SIDE_AV_CVBS_INCM
TU_SIF
AF14
AH14
SIDE_COMP_Y
SIDE_COMP_Pr
AG16
SD_V5_AVDD1P2
C268
1000pF
AUD_SCK
AD17
R2035
0
AF28
C216
0.1uF
AF18
10K
AF27
I2S_DATA_IN
R2039
AF26
A1.2V
BLM18PG121SN1D
L102
I2S_CLK_OUT
EDSAFE_AVSS_1
10K
TU_IF_AGC_1
TU_IF_AGC_2
I2S_CLK_IN
DS_AGCT_CTL
10K
AB22
A2.5V
AE18
DS_AGCI_CTL
R310
AA21
R2038
AH28
TU_IF_AGC_2
R2037
OPT
10K
TU_IF_AGC_1
COMP2_Y
D1.8V
IC100
LGE3556C (C0 VERSION)
26page : TUNER(HALF NIM)
COMPONENT
C291
10uF
DDRV_1
R15
DDRV_2
T15
DDRV_3
U15
DDRV_4
V15
DDRV_5
A16
DDRV_6
G16
DDRV_7
L16
DDRV_8
M16
DDRV_9
N16
P16
DVSS_1
DVSS_62
DVSS_2
DVSS_63
DVSS_3
DVSS_64
DVSS_4
DVSS_65
DVSS_5
DVSS_66
DVSS_6
DVSS_67
DVSS_7
DVSS_68
DVSS_8
DVSS_69
DVSS_9
DVSS_70
DVSS_10
DVSS_71
DVSS_11
DVSS_72
DVSS_12
DVSS_73
DVSS_13
DVSS_74
DVSS_14
DVSS_75
DVSS_15
DVSS_76
DVSS_16
DVSS_77
DVSS_17
DVSS_78
DVSS_18
DVSS_79
DVSS_19
DVSS_80
DVSS_20
DVSS_81
DVSS_21
DVSS_82
DVSS_22
DVSS_83
DVSS_23
DVSS_84
DVSS_24
DVSS_85
DVSS_25
DVSS_86
DVSS_26
DVSS_87
DVSS_27
DVSS_88
DVSS_28
DVSS_89
DVSS_29
DVSS_90
DVSS_30
DVSS_91
DVSS_31
DVSS_92
DVSS_32
DVSS_93
DVSS_33
DVSS_94
DVSS_34
DVSS_95
DVSS_35
DVSS_96
DVSS_36
DVSS_97
DVSS_37
DVSS_98
DVSS_38
DVSS_99
DVSS_39
DVSS_100
DVSS_40
DVSS_101
DVSS_41
DVSS_102
DVSS_42
DVSS_103
DVSS_43
DVSS_104
DVSS_44
DVSS_105
DVSS_45
DVSS_106
DVSS_46
DVSS_107
DVSS_47
DVSS_108
DVSS_48
DVSS_109
DVSS_49
DVSS_110
DVSS_50
DVSS_111
DVSS_51
DVSS_112
DVSS_52
DVSS_113
DVSS_53
DVSS_114
DVSS_54
DVSS_115
DVSS_55
DVSS_116
DVSS_56
DVSS_117
R16
T16
U16
V16
AA16
D17
L17
M17
N17
P17
R17
T17
U17
V17
AA17
AC19
G18
L18
M18
N18
P18
R18
T18
U18
V18
D20
G20
H20
A21
E21
F21
G21
E22
F22
G22
H22
J22
K22
L22
M22
N22
P22
R22
T22
U22
V22
W22
Y22
AA22
W23
AB23
F28
M28
T28
AC28
DVSS_57
DVSS_58
DVSS_59
DVSS_60
DVSS_61
EUROBBTV
BCM3556 VIDEO IN
2009.06.18
3
LGE Internal Use Only
D1.8V
A1.2V
IC100
LGE3556C (C0 VERSION)
DDR_EXT_CLK
DDR0_CLK
DDR0_CLKB
DDR1_CLK
DDR1_CLKB
DDR01_A00
DDR01_A01
DDR01_A02
DDR01_A03
DDR0_A04
DDR0_A05
DDR0_A06
DDR01_A07
DDR01_A08
DDR01_A09
DDR01_A10
DDR01_A11
DDR01_A12
DDR01_A13
DDR1_A04
DDR1_A05
DDR1_A06
DDR01_BA0
DDR01_BA1
DDR01_BA2
DDR01_CASB
DDR0_DQ00
DDR0_DQ01
DDR0_DQ02
DDR0_DQ03
DDR0_DQ04
DDR0_DQ05
DDR0_DQ06
DDR0_DQ07
DDR0_DQ08
DDR0_DQ09
DDR0_DQ10
DDR0_DQ11
DDR0_DQ12
DDR0_DQ13
DDR0_DQ14
DDR0_DQ15
DDR1_DQ00
DDR1_DQ01
DDR1_DQ02
DDR1_DQ03
DDR1_DQ04
DDR1_DQ05
DDR1_DQ06
DDR1_DQ07
DDR1_DQ08
DDR1_DQ09
DDR1_DQ10
DDR1_DQ11
DDR1_DQ12
DDR1_DQ13
DDR1_DQ14
DDR1_DQ15
DDR0_DM0
DDR0_DM1
DDR1_DM0
DDR1_DM1
DDR0_DQS0
DDR0_DQS0B
DDR0_DQS1
DDR0_DQS1B
DDR1_DQS0
DDR1_DQS0B
DDR1_DQS1
DDR1_DQS1B
DDR01_RASB
DDR_VREF0
DDR_VREF1
DDR01_WEB
DDR_VDDP1P8_1
B23
B17
R411
OPT
004:A7;004:C4
DDR0_CLK 004:C7;004:C4
DDR0_CLKb 004:C7;004:C4
DDR1_CLK 004:F7;004:F4
C12
A13
A12
004:A7;004:C4
DDR1_CLKb 004:F7;004:F4
B15
DDR01_A[0]
E14
DDR01_A[1]
A15
DDR01_A[2]
D15
DDR01_A[3]
E12
DDR0_A[5]
F13
DDR0_A[6]
C14
DDR01_A[7]
F14
DDR01_A[8]
B14
DDR01_A[9]
DDR01_A[11]
D13
DDR01_A[12]
B13
DDR01_A[13]
DDR0_A[4-6]
C15
DDR1_A[5]
D16
DDR1_A[6]
E8
F8
F2
DDR01_RASb
F7
DDR01_CASb
G7
DDR01_WEb
F3
G8
G3
G1
DDR01_BA2
DDR0_A[4-6]
DDR1_A[4-6]
DDR01_A[1]
H3
DDR01_A[2]
H7
DDR0_A[5]
J3
DDR0_A[6]
J7
A17
DDR01_CASb
DDR01_A[7]
K2
DDR01_A[8]
K8
J8
A8
DDR0_DQ[0]
B11
DDR0_DQ[1]
DDR01_A[9]
K3
B8
DDR0_DQ[2]
DDR01_A[10]
H2
D11
DDR0_DQ[3]
DDR01_A[11]
DDR01_A[12]
K7
DDR0_DQ[0-7]
DDR0_DQ[4]
E10
DDR0_DQ[9]
DQ5
CAS
DQ6
WE
DQ7
DDR01_A[13]
BA1
DQS
DM/RDQS
DDR0_DQ[10]
DDR0_DQ[11]
DDR0_DQ[12]
E8
DDR0_DQ[13]
D10
DDR0_DQ[14]
L2
L8
A0
VDDQ_1
A1
VDDQ_2
A2
VDDQ_3
A3
VDDQ_4
A4
VDDQ_5
A5
VDD_1
A6
VDD_2
A7
A8
VDD_3
DQ1
CKE
DQ2
DDR0_DQ[4]
D9
DDR0_DQ[5]
DDR01_RASb
F7
B1
DDR0_DQ[6]
DDR01_CASb
G7
DDR01_WEb
F3
DDR0_DQ[7]
G8
DQ4
RAS
DQ5
CAS
DQ6
WE
DQ7
C8
DDR1_DQ[0]
C2
DDR1_DQ[1]
D7
DDR1_DQ[5]
D3
DDR1_DQ[3]
L7
A10/AP
VSSQ_1
A11
VSSQ_2
A12
VSSQ_3
A13
VSSQ_4
NC_2/A14
NC_3/A15
VSS_2
VSS_3
DDR1_A[4-6]
B7
DDR0_DQS0
004:A4
A8
DDR0_DQS0b
004:A4
B3
DDR0_DM0
DDR01_BA1
DDR1_A[6]
G3
A2
G1
DDR01_BA2
BA0
BA1
NC_1/BA2
D1
DDR1_DQ[4]
D9
DDR1_DQ[2]
R408
75
B1
DDR1_DQ[6]
DDR01_A[12] R409
75
B9
DDR1_DQ[7]
DDR0_A[4-6]
DDR01_CASb
DQS
DM/RDQS
B7
DDR1_DQS0
DDR1_DQS0b
004:A3
DDR01_A[11]
B3
DDR1_DM0
004:A4
DDR01_A[8]
DDR1_A[4]
004:A4
A2
NU/RDQS
DDR01_A[0-3,7-13]
B18
DDR1_DQ[5]
B20
DDR1_DQ[6]
D18
E18
DDR1_DQ[7]
DDR1_DQ[8]
D21
DDR1_DQ[9]
F18
DDR1_DQ[10]
D1.8V
DDR01_A[0]
H8
C1
DDR01_A[1]
H3
C3
DDR01_A[2]
H7
004:B6;004:F3;004:I7 DDR1_A[4-6]
C7
DDR01_A[3]
DDR1_A[4]
J2
A1
DDR1_A[5]
J3
L1
DDR1_A[6]
J7
E9
DDR01_A[7]
K2
H9
DDR01_A[8]
K8
C9
DDR01_A[9]
K3
DDR01_A[10]
H2
B2
DDR01_A[11]
K7
DDR01_A[12]
L2
DDR01_A[13]
L8
B8
D2
D8
VREF
VDDL
A0
VDDQ_1
A1
VDDQ_2
A2
VDDQ_3
A3
VDDQ_4
A4
VDDQ_5
A5
VDD_1
A6
VDD_2
A7
VDD_3
A8
VSSQ_1
A11
VSSQ_2
A12
VSSQ_3
A13
VSSQ_4
VSS_1
J1
DDR0_VREF0
K9
L7
NC_2/A14
NC_3/A15
004:A7;004:C5;004:C2;004:F2;004:I4;004:I6
DDR01_ODT
E1
C449
E7
DDR01_BA1
C3
DDR01_BA0
C7
B22
DDR1_DQ[14]
E17
DDR01_WEb
A1
DDR01_CKE
DDR01_ODT
L1
E9
DDR1_DQ[15]
R410
VSS_2
VSS_3
D2
D8
DDR01_RASb
DDR01_A[2]
A3
E3
DDR0_A[6]
DDR1_VREF0
K9
DDR01_A[3]
DDR0_DM0 004:E6
F19
B10
DDR01_A[1]
C452
VDDL
C463
75
DDR01_BA1
DDR01_A[12] AR406
C466
E7
VSSDL
0.1uF 470pF
F10
F9
IC401
NT5TU128M8DE_BD
C19
004:A7;004:C7
DDR0_CLK
470pF 0.1uF
DDR01_A[9]
004:A7;004:C7
DDR0_CLKb
F8
DDR01_CKE
004:A7;004:C7;004:F7;004:F4
F2
D19
DDR1_DQS1b 004:H3
DDR01_RASb
C16
CK
DDR0_VREF0
DDR1_VREF0
A7
A23
CK
DQ1
CKE
DQ2
DDR01_RASb
F7
DDR01_CASb
G7
DDR01_WEb
F3
G8
DQ4
RAS
DQ5
CAS
DQ6
DDR01_WEb
WE
G3
1uF
1uF
470pF
470pF
1uF
470pF
1uF
470pF
G1
BA0
DQS
BA1
DM/RDQS
NC_1/BA2
NU/RDQS
DDR01_A[1]
H3
DDR01_A[2]
H7
DDR01_A[3]
J2
DDR0_A[4]
J8
DDR0_A[5]
J3
J7
DDR01_A[7]
K2
DDR01_A[8]
K8
DDR01_A[9]
K3
DDR01_A[10]
H2
DDR01_A[11]
K7
DDR01_A[12]
L2
DDR01_A[13]
L8
A0
VDDQ_1
A1
VDDQ_2
A2
VDDQ_3
A3
VDDQ_4
A4
VDDQ_5
A5
VDD_1
A6
VDD_2
A7
VDD_3
A8
VDD_4
A9
A10/AP
VSSQ_1
A11
VSSQ_2
A12
VSSQ_3
A13
VSSQ_4
10K
R418
D1.8V
L3
NC_2/A14
NC_3/A15
EN
DDR1_VREF0
VTTS
DDR0_VREF0
8
2
7
3
6
4
5
75
C494
0.1uF
C496
0.1uF
DDR1_DQ[8-15]
F8
D7
DDR0_DQ[12]
DDR01_CKE
F2
D3
DDR0_DQ[13]
D1
DDR0_DQ[15]
CK
DQ0
CK
DQ1
CKE
DQ2
DQ3
D9
DDR0_DQ[11]
DDR01_RASb
F7
B1
DDR0_DQ[10]
DDR01_CASb
G7
B9
DDR0_DQ[14]
DDR01_WEb
F3
G8
DQ4
RAS
DQ5
CAS
DQ6
WE
C8
DDR1_DQ[9]
C2
DDR1_DQ[8]
D7
DDR1_DQ[12]
D3
DDR1_DQ[13]
D1
DDR1_DQ[15]
D9
DDR1_DQ[14]
B1
DDR1_DQ[10]
B9
DDR1_DQ[11]
DQ7
C497
0.1uF
C498
0.1uF
SI
B7
DDR0_DQS1
004:A4
A8
DDR0_DQS1b
004:A4
B3
DDR0_DM1
VSS_2
VSS_3
DDR01_BA1
A2
DQS
G2
G3
004:A4
G1
DDR01_BA2
BA0
BA1
DM/RDQS
NC_1/BA2
NU/RDQS
B7
DDR1_DQS1
A8
DDR1_DQS1b
B3
DDR1_A[4-6]
004:B6;004:F6;004:I7
C3
C7
DDR01_A[1]
H3
DDR01_A[2]
H7
DDR01_A[3]
J2
J8
A1
DDR1_A[5]
J3
DDR1_A[6]
A9
H8
DDR1_A[4]
J7
E9
DDR01_A[7]
K2
H9
DDR01_A[8]
K8
DDR01_A[9]
K3
A7
DDR01_A[10]
H2
B2
DDR01_A[11]
K7
B8
DDR01_A[12]
L2
D2
DDR01_A[13]
L8
D8
A0
VDDQ_1
A1
VDDQ_2
A2
VDDQ_3
A3
VDDQ_4
A4
VDDQ_5
A5
VDD_1
A6
VDD_2
A7
VDD_3
A8
VDD_4
A9
VSSQ_1
A11
VSSQ_2
A12
VSSQ_3
A13
VSSQ_4
A3
VSS_1
L3
J1
L7
DDR0_VREF0
NC_2/A14
NC_3/A15
VSS_4
C1
C3
C7
C9
A1
L1
E9
H9
A7
A10/AP
VSSQ_5
E3
004:A3
D1.8V
DDR01_A[0]
C9
L1
004:A3
004:A4
DDR1_DM1
A2
DDR01_A[0-3,7-13]
C1
K9
DQS
VSS_2
VSS_3
B2
B8
D2
D8
A3
E3
J1
K9
DDR1_VREF0
VSS_4
VTT
DDR01_ODT
F9
E2
ODT
VREF
VDDL
VTT_IN
VSSDL
E1
E7
DDR01_ODT
C450
C453
0.1uF 470pF
F9
E2
ODT
VREF
VDDL
VSSDL
E1
C464
C467
E7
470pF 0.1uF
VCC
VDDQ
C422
1uF
10V
R417
220
C416
10uF
10V
C420
0.1uF
16V
Close to IC
C418
1uF
10V
Close to IC
0.1uF
16V
VREF
1
DDR1_CLKb
A9
H8
L7
GND
DDR0_DQ[8]
D1.8V
DDR01_A[0]
VSS_1
IC404
BD35331F-E2
E8
DDR0_DQ[9]
C2
DDR01_A[0-3,7-13]
D3.3V
C414
C493
0.1uF
75
AR409
CS
VSSQ_5
C423
10uF
10V
75
AR408
004:B5
C8
DQ7
DQS
G2
* DDR_VTT
0
C492
0.1uF
DDR01_A[8]
DDR01_BA0
DDR01_BA2
DDR_VTT
IC403
NT5TU128M8DE_BD
CS
DDR0_A[6]
R415
DDR01_A[11]
DDR01_A[13]
DDR0_DQ[8-15]
DDR01_BA0
DDR01_BA1
C17 D1.8V
DQ0
DQ3
DDR1_DQS0b 004:H6
DDR1_DQS1 004:H3
E19
0
Close to IC
C484
0.1uF
75
AR407
DDR1_CLK
E8
DDR0_DQS1b 004:E3
DDR1_DQS0 004:H6
B19
C413
0.1uF
16V
C483
0.1uF
DDR01_A[10]
E1
Close to IC
DDR0_DQS0 004:E6
DDR0_DQS0b 004:E6
DDR0_DQS1 004:E3
B9
C415
75
AR405
R404
DDR0_DM1 004:E3
DDR1_DM0 004:H6
DDR1_DM1 004:H3
0.1uF
C491
0.1uF
DDR01_A[0]
J1
E2
VREF
PI
B8
VSS_4
F9
ODT
C421
0.1uF
DDR_VTT
B2
DDR01_CKE
DDR01_ODT
A20
D22
C499
0.1uF
75
H9
DDR01_BA2
C10
C7
75
AR404
DDR01_WEb
A10
R414
C495
470pF
DDR01_BA2
C9
DDR1_DQ[11]
DDR1_DQ[12]
DDR1_DQ[13]
C490
0.1uF
75
AR403
A7
A10/AP
L3
C1
DDR01_BA0
F17
C489
0.1uF
DDR01_A[10]
VDD_4
A9
VSSQ_5
E3
VSSDL
DDR1_DQ[0-7]
A9
A3
E2
ODT
J8
A7
DDR1_DQ[8-15]
A22
C488
0.1uF
75
DDR01_A[13]
DDR01_A[3] AR402
DDR0_A[4]
DDR1_DQ[4]
C487
0.1uF
75
AR401
A8
DDR1_DQ[2]
DDR1_DQ[3]
C21
C486
0.1uF
DDR01_A[9]
DDR0_A[5]
B21
75
AR400
DDR01_A[7]
DQS
G2
004:A4
C485
0.1uF
DDR01_A[0]
DDR01_A[7]
C419
10uF
10V
C482
0.047uF
DDR01_A[2]
DDR1_DQ[0]
C417
10uF
10V
C481
0.1uF
DDR01_RASb
DDR1_A[5]
VSS_4
F9
DDR01_ODT
DDR0_DQ[15]
E20
C480
10uF
SI
DDR01_A[0-3,7-13]
DDR1_DQ[1]
A18
C479
470pF
C478
0.047uF
C477
0.1uF
C476
10uF
C475
22uF
C474
10uF
C473
10uF
C472
0.1uF
C471
0.047uF
C470
470pF
C469
10uF
C468
0.1uF
C465
0.047uF
C462
470pF
C461
470pF
C460
0.047uF
C459
0.1uF
C458
10uF
C457
470pF
C456
0.047uF
C455
0.1uF
C454
10uF
C451
22uF
C448
10uF
C447
10uF
C446
0.1uF
C445
0.047uF
D1
B9
CK
DQ3
VDD_4
A9
VSSQ_5
DDR0_A[4-6]
C412
0.1uF
16V
F2
DDR01_CKE
DQ0
C20
C406
C411
0.1uF
16V
F8
CK
C18
0.1uF
C425
22uF
10V
DDR0_DQ[3]
A9
L3
F12
DDR0_DQ[2]
D3
NU/RDQS
VSS_1
F11
D7
004:A7;004:F4 DDR1_CLKb
E8
CS
DQS
BA0
DDR0_DQ[8-15]
E9
DDR0_DQ[1]
004:B5
R407
100
1%
DDR01_A[1]
DDR01_A[3]
DDR0_A[4]
DDR0_DQ[8]
DQ4
RAS
DDR0_DQ[0]
D1.8V
H8
DDR01_BA1
D8
DQ2
NC_1/BA2
DDR01_A[0]
DDR01_BA2
DDR0_DQ[7]
CKE
C2
DDR01_A[0-3,7-13]
DDR01_BA0
DDR0_DQ[6]
DQ1
G2
E15
DDR0_DQ[5]
CK
DDR01_BA1
B16
C9
DDR1_DQ[0-7]
DDR01_BA0
DDR01_A[7-13]
F16
C11
DQ0
CS
J2
C8
C8
CK
DDR01_BA0
DDR1_A[4]
F15
DDR0_CLKb
R406
100
1%
DQ3
DDR01_A[10]
C13
DDR0_CLK
DDR01_A[0-3]
DDR0_A[4]
E13
IC402
NT5TU128M8DE_BD
DDR0_DQ[0-7] 004:B6
004:A7;004:F4 DDR1_CLK
DDR01_CKE
DDR_VDDP1P8_2
C426
22uF
10V
C444
470pF
IC400
NT5TU128M8DE_BD
DDR01_ODT
B12
F8
C443
10uF
DDR_VTT
240
1%
C23
E11
C442
0.1uF
DDR01_CKE
R412
E16
D14
C441
0.047uF
C440
470pF
0
C22
C410
DDR01_ODT
F20
C400
DDR_COMP
C404
B24
C409
DDR01_CKE
C403
0.1uF
B7
C401
DDR_PLL_LDO
0.1uF
A24
C408
DDR_BVSS1
DDR_PLL_TEST
A6
C402
DDR_BVSS0
C407
DDR_BVDD1
C405
DDR_BVDD0
D1.8V
THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.
Copyright © 2010 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
BCM (EUROBBTV)
HONG YEON HYUK
DDR Memory
2009.06.18
4
LGE Internal Use Only
New Item Development
EARPHONE BLOCK
HP_LOUT
C
OPT
Q900
MMBT3904-(F)
E
OPT
MMBT3904-(F)
Q903
B
B
E
JK901
KJA-PH-0-0177
+3.3V_NORMAL
GND
5
R917
10K
OPT
C902
1000pF
50V
C
R912
1K
HP_DET
L
4
DETECT
3
R
1
HP_ROUT
OPT
C903
1000pF
50V
C
E
OPT
Q901
MMBT3904-(F)
B
E
OPT
MMBT3904-(F)+3.5V_ST
Q902
B
OPT
C
R914
10K
SIDE_HP_MUTE
COMPONENT
+3.3V_NORMAL
R902
10K
Rear CVBS
R903
1K
COMP2_DET
D900
5.6V
REAR_AV
C931
100pF
50V
REAR_AV
D906
5.5V
L904
270nH
D903
5.1V
[GN]O-SPRING
D910
5.1V
5A
C904
27pF
50V
C932
27pF
50V
L903
270nH
4A
D904
5.5V
[BL]E-LUG-S
[BL]O-SPRING
C933
27pF
50V
5B
L902
270nH
[RD]O-SPRING_1
5C
5.5V
D905
[RD]E-LUG-S
7C
C934
27pF
50V
[WH]O-SPRING
C935
25V
5D
C906
27pF
50V
C905
27pF
50V
[RD]O-SPRING_2
R907
470K
COMP2_Pr
1uF
C939
100pF
50V
C936
25V
6E
[RD]O-SPRING
3C
[RD]CONTACT
4B
[WH]C-LUG
3A
[YL]CONTACT
4A
[YL]O-SPRING
5A
[YL]E-LUG
D909
5.6V
REAR_AV
REAR_AV
C910
100pF
50V
C941
25V
D908
5.6V
REAR_AV
R921
470K
REAR_AV
1uF
REAR_AV
AV_CVBS_DET
R926
1K
R928
0
REAR_AV_R_IN
REAR_AV
C916
100pF
50V
REAR_AV
C940
25V
R909
0
COMP2_R_IN
Copyright © 2010 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
4C
REAR_AV
R927
0
REAR_AV_L_IN
[RD]E-LUG
THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.
5C
COMP2_L_IN
D901
5.6V
5E
PPJ234-01
JK900
REAR_AV
R925
10K
REAR_AV
[RD]E-LUG
COMP2_Pb
R910
0
[RD]CONTACT
4E
+3.3V_NORMAL
REAR_AV
JK902
PPJ233-01
[GN]CONTACT
7B
REAR_AV_CVBS
REAR_AV
C909
47pF
50V
COMP2_Y
[GN]E-LUG
6A
R957
0
D902
5.6V
R961
470K
1uF
C937
100pF
50V
REAR_AV
D907
5.6V
REAR_AV
R920
470K
1uF
REAR_AV
REAR_AV
C915
100pF
50V
EUROBBTV
ETC SUB BOARD I/F
2009.06.18
9
LGE Internal Use Only
+5V_TU
CAN H-NIM/NIM TUNER for EU
L2700
BLM18PG121SN1D
R2738
VERTICAL_NIM
TU2701-*1
TDFR-G155D
BST_CNTL
2
+B1[5V]
3
SCL[A_DEMOD]
6
SDA[A_DEMOD]
7
NC(IF_TP)
8
1
SIF
9
R2742
ISA1530AC1
R2740
2.2K
10K
B
CN
C
R2720
close to TUNER
RF_S/W_CNTL
R2755
10K
C
0
Q2703
2SC3052
C2718
0.01uF
25V
VIDEO
11
2
GND
12
+5V_TU
B
LNA2_CTL/BOSTER_CTL
BST_CNTL
C2704
100pF
50V
1.2V
13
3.3V
14
3
RESET
15
+B1[5V]
Q2700
2SC3052
OPT
SCL[D_DEMOD]
17
4
SDA[D_DEMOD]
18
NC[RF_AGC]
R2700
SYNC
20
5
VALID
21
0
R2724
10K
B
IF_AGC_SEL
OPT
1
R2746
470
R2749
82
3
B
D0
23
6
D1
24
SCL[A_DEMOD]
33
R2726
SDA[A_DEMOD]
33
R2727
+5V_TU
R2758
47
4
FE_TS_VAL_ERR
ISA1530AC1
MCL
22
C2736
0.1uF
16V
FE_TS_ERR
TU_SIF
OPT
AS
5
2
E
E
ERR
19
FE_TS_VAL
+5V_TU
C
+3.3V_TU
IC2702
NL17SZ08DFT2G
C2709
10uF
10V
OPT
C2708
0.1uF
16V
OPT
C2706
0.1uF
16V
2.5V
16
E
OPTION : RF AGC
C2701
0.1uF
16V
NC
10
R2743
4.7K
C
Q2704
SCL0_3.3V
D2
25
D3
26
7
D4
27
SDA0_3.3V
D5
28
D6
29
8
D7
30
SHIELD
9
10
CN_VERTICAL_LGS8G85
11
TU2701-*2
TDFR-C155D
12
RF_S/W_CNTL
1
SIF
NC
C2714
18pF
50V
C2712
18pF
50V
NC(IF_TP)
C2702
0.1uF
R2739
200
R2741
200
close to TUNER
TU_CVBS
E
16V
R2736
0
B
VIDEO
C
+3.3V_TU
Q2702
ISA1530AC1
+3.3V_TU
GND
+1.2V_TU
BST_CNTL
2
+B1[+5V]
3
13
NC[RF_AGC]
4
1.2V
NC_1
5
SCLT
6
14
SDAT
7
3.3V
C2700
100pF
50V
C2703
0.1uF
16V
C2705
100pF
50V
R2723
100K
R2721
100
C2707
0.1uF
16V
SIF
9
15
NC_3
10
+5V_TU
+2.5V_TU
RESET
TUNER_RESET
C2710
0.1uF
16V
NC_2
8
R2702
200
VIDEO
11
GND
12
16
+B2[1.2V]
13
+B3[3.3V]
14
RESET
15
17
NC_4
16
2.5V
R2701
R2712
200
0
C2733
0.1uF
16V
SCL[D_DEMOD]
ATV_OUT
SCL2_3.3V
R2728
33
R2729
33
E
SCL
17
SDA
18
18
ERR
19
SDA[D_DEMOD]
SDA2_3.3V
SYNC
20
19
MCL
22
ERR
D1
24
20
D2
25
SYNC
Q2705
ISA1530AC1
C2713
10pF
50V
C2711
10pF
50V
D0
23
B
C
VALID
21
CN
D3
26
D4
27
21
D5
28
VALID
D7
30
22
MCL
SHIELD
23
CN_HORIZONTAL_LGS8G85
TU2701-*3
TDFR-C135D
24
D0
D1
EU R2757-*1
47
CN R2757
CN R2717
RF_S/W_CNTL
1
BST_CNTL
2
25
+B1[+5V]
3
D2
CN R2716
D3
CN R2711
NC[RF_AGC]
4
NC_1
5
26
SCLT
6
SDAT
7
NC_2
8
27
SIF
9
D4
CN R2709
D5
CN R2708
NC_3
10
VIDEO
11
28
GND
12
+B2[1.2V]
13
+B3[3.3V]
14
29
RESET
15
D6
CN R2707
D7
CN R2710
+B4[2.5V]
16
SCL
17
SDA
18
31
ERR
19
30
CN R2705
SYNC
20
VALID
21
MCL
22
CN R2706
D0
23
SHIELD
D1
24
D2
25
CN R2704
D3
26
D4
27
D5
28
CN R2703
D6
29
CN
R2731-*1
0
R2756-*1
30K
1/16W
5%
1/10W
1%
C2716
D6
29
+3.3V_TU
0
EU R2717-*1
47
0
EU R2716-*1
47
100pF
50V
0
EU R2711-*1
47
0
EU R2709-*1
47
0
EU R2708-*1
47
0
EU R2707-*1
47
FE_TS_VAL
CN
R2713-*1
56K
FE_TS_DATA[0-7]
FE_TS_DATA_CLK
1/8W
1%
FE_TS_DATA[0]
1% 22K
IC2701
MP2212DN
L2703
CIC21J501NE
FE_TS_SYNC
EU
R2713
75K
1/8W
1%
FB
EU
R2756
18K
EU
R2731
FE_TS_ERR
Close to IC
1
8
2
7
EN/SYNC
1%
R1
+1.2V_TU
10K
R2732
POWER_ON/OFF2_2
L2704
3.6uH
R2
GND
IN
3A
SW_2
NR8040T3R6N
3
SW_1
6
C2730
22uF
10V
FE_TS_DATA[1]
BS
0
EU R2710-*1
47
0
EU R2705-*1
47
0
EU R2706-*1
47
0
EU R2704-*1
47
0
EU R2703-*1
47
0
C2715
22uF
10V
FE_TS_DATA[2]
4
VCC
5
C2720
0.1uF
16V
C2731
0.1uF
C2735
22uF
10V
FE_TS_DATA[3]
R2719
0
R2718
FE_TS_DATA[4]
10
1/10W
1%
FE_TS_DATA[5]
C2717
1uF
10V
Vout=0.8*(1+R1/R2)
FE_TS_DATA[6]
FE_TS_DATA[7]
D7
0
30
Close to the tuner
EU_HORIZONTAL_NIM_T2
EU_VERTICAL_NIM_T2
TU2701-*4
TDFR-G055D
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
SHIELD
TU2701-*5
TDFR-G035D
RF_S/W_CNTL
1
BST_CNTL
2
+B1[5V]
3
NC[RF_AGC]
4
AS
5
SCL[A_DEMOD]
6
SDA[A_DEMOD]
7
NC(IF_TP)
8
SIF
9
NC
10
VIDEO
11
GND
12
1.2V
13
3.3V
14
RESET
15
2.5V
16
SCL[D_DEMOD]
17
SDA[D_DEMOD]
18
ERR
19
SYNC
20
VALID
21
MCL
22
D0
23
D1
24
D2
25
D3
26
D4
27
D5
28
D6
29
D7
31
30
R2722
0
+3.3V_NORMAL
EU
R2725
SHIELD
31
Q2701
E
RF_SWITCH_CTL
AS
5
31
0
NC[RF_AGC]
4
31
R2754
TU2701
TDFR-G135D
RF_S/W_CNTL
1
31
0
HORIZONTAL_NIM
+3.3V_TU
FE_TS_SERIAL
L2702
CIC21J501NE
CN
60mA
+2.5V_TU
+3.3V_TU
RF_S/W_CNTL
BST_CNTL
+B1[5V]
NC[RF_AGC]
NC_1
C2722
0.1uF
16V
C2724
0.1uF
16V
C2734
0.1uF
16V
C2728
22uF
10V
IC2700
AZ2940D-2.5TRE1
SCLT
VIN
SDAT
NC(IF_TP)
NC_2
VIDEO
1
$0.11 3
2
SIF
+5V_TU
+5V_NORMAL
C2719
0.1uF
16V
GND
L2701
+B2[1.2V]
+B3[3.3V]
200mA
BLM18PG121SN1D
RESET
GND
VOUT
R2744
1
C2723
10uF
10V
C2726
0.1uF
16V
+B4[2.5V]
SCL[D_DEMOD]
SDA[D_DEMOD]
ERR
C2721
0.1uF
16V
C2725
0.1uF
16V
C2727
22uF
10V
C2729
22uF
10V
SYNC
VALID
MCL
D0
D1
D2
D3
D4
D5
D6
D7
SHIELD
THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.
27
Tuner ( Full Nim )
Copyright © 2010 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
LGE Internal Use Only
USB2 OPTION
USB / DVR Ready
+3.3V_NORMAL
IC2202
+5V_USB
AP2191SG-13
120-ohm
C2218
SIDE_USB_DM
C2206
1uF
10V
SIDE_USB_DP
L2202
MLB-201209-0120P-N2
NC 8
OUT_2 7
2 IN_1
OUT_1 6
3 IN_2
FLG 5
100uF
16V
C2202
0.1uF
C2203
0.1uF
C2204
0.1uF
C2205
0.1uF
26
RESET_N
0.1uF R2209
100K
OPT
3
25
HS_IND/CFG_SEL1
USBDN2_DP
4
24
SCL/SMBCLK/CFG_SEL0
VDDA33_1
5
23
VDD33
R2210
100K
22
SDA/SMBDATA/NON_REM1
NC_2
7
21
NC_8
20
NC_7
0
NC_6
C2213
/RST_HUB
USB
IC2203
100K OPT
R2211
100K OPT
R2213
100K OPT
R2207 OPT
R2208
OPT
L2203
MLB-201209-0120P-N2
120-ohm
C2219
SCL2_3.3V
SDA2_3.3V
KJA-UB-4-0004
P2202
100uF
16V
NC 8
1 GND
+5V_USB
OUT_2 7
2 IN_1
OUT_1 6
3 IN_2
FLG 5
R2221
4.7K
OPT
4 EN
R2223
2.7K
EAN60921001
C2221
10uF
10V
C2223
0.1uF
USB_CTL2
+3.3V_USB
C2214
4.7uF
5
R2227
/USB_OCD2
040:J6
0
USB_DM2
USB_DP2
D2202
CDS3C05HDMI1
5.6V
D2204
CDS3C05HDMI1
5.6V
THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.
/USB_OCD2
USB_CTL2
1uF
10V
C2209
/USB_OCD1
USB_CTL1
+3.3V_NORMAL
+3.3V_USB
4
0.1uF
R2206
100K
R2205
100K
0
R2204
100K
18
NC_5
17
OCS2_N
15
16
PRTPWR2
C2211
0.1uF
VDD33CR
13
14
VDD18
OCS1_N
12
PRTPWR1
TEST
C2215
0.1uF
OPT
USB DOWN STREAM
VDDA33_2
11
19
10
9
D2203
CDS3C05HDMI1
5.6V
AP2191SG-13
6
NC_4
R2214
0
R2212
NC_1
8
2
4
5
VBUS_DET
USBDN2_DM
IC2201
D2201
CDS3C05HDMI1
5.6V
C2212
27
2
USB2512A_AEZG
3
1
THERMAL
37
100K
R2203
SUSP_IND/LOCAL_PWR/NON_REM0
VDDA33_3
29
USBUP_DP
USBUP_DM
30
31
XTAL2
XTAL1/CLKIN
32
VDD18PLL
1
USB_DP1
+3.3V_USB
28
1/10W 1%
33
35
RBIAS
VDD33PLL
X2201
24MHz
USBDN1_DP
NC_3
C2222
0.1uF
/USB_OCD1
0
USB_DM1
1
C2201
1uF
10V
C2220
10uF
10V
USB_CTL1
2
USB_DP2
R2226
2.7K
3
USB_DM2
R2202
1M 1%
34
R2201
12K
C2208
15pF
C2210
15pF
0.1uF
C2207
USB_DP1
36
VSS
USBDN1_DM
USB_DM1
+3.3V_USB
4 EN
KJA-UB-4-0004
P2201
USB DOWN STREAM
+3.3V_USB
R2220
4.7K
OPT
EAN60921001
R2225
+3.3V_NORMAL
L2201
BLM18PG121SN1D
1 GND
40
USB
Copyright © 2010 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
LGE Internal Use Only
+5V_NORMAL
+12V
+3.3V_NORMAL
R4126
10K
20
19
18
17
16
FIX-TER
15
[GN]GND
14
10
[GN]G
SC1_CVBS_IN
[GN]C_DET
8
[BL]B
C4113
47pF
50V
EU
R4115
62
R4123
0
SELECT
EU
C
R4133
390
EU
R4136
47K
EU
Q4105
2SC3052
C
SYNC_IN
B
EU
SYNC_GND2
SYNC_GND1
RGB_IO
D4102
5.6V
OPT
R4112
75
D4106
30V
OPT
Rf
C4114
100uF
16V
12
R4168 0
D2B_OUT
EU
11
G_OUT
D2B_IN
[RD]R
9
G_GND
[WH]L_IN
8
ID
D4103
30V
OPT
EU
R4104
75
1%
D4104
30V
OPT
R4101
75
1%
5
2
4
3
7
[RD]R_IN
6
Selece = Low
[RD]MONO
5
4
JK4101
3
R4108
0
EU
30V
EU
2
1
EU
D4112
B_OUT
SC1_B
AUDIO_L_IN
D4110
30V
OPT
B_GND
SC1_ID
OPT
D4111
30V
EU
R4127
15K
EU
+12V
R4130
3.9K
R4102
75
1%
AUDIO_L_OUT
C4105
25V
AUDIO_R_IN
1uF
OPT
OPT
R4141
68K
R4142
68K
C4122
33pF
AUDIO_GND
R4116
0
C4123
10uF
16V
OPT
5.6K
2
R4176
10K EU
3
EU
C4120
0.1uF
16V
SCART1_Rout_P
R4113
0
002:C6
4
5
EU
R4150
33K
EU
R4144
2
13
3
12
4
11
5
10
6
9
7
8
14
13
12
6
11
10
9
+12V
1uF
C4111
100pF
50V
OPT
R4139
68K
EU
C4128
R4100
470K
14
R4147
EU
5.6K
R4143
5.6K
1
OPT
R4140
68K
R4145
1K
EU
7
33pF
8
R4177
10K EU
DTV/MNT_R_OUT
EU
[SCART2 PIN 8]
EU_SCART [OPT]
+12V
C4121
33pF
L4100
BLM18PG121SN1D
R4105
0
EU
DTV/MNT_L_OUT
EU
R4156
10K
EU
R4160
EU 0
R4157
0
R4152
EU
4.7K
D4105
5.6V
OPT
C
EU
Q4111
2SC3052
B
EU
12K
EU
C4100
1000pF
50V
EU
B
SC_RE1
R4154
1K
DTV/MNT_L_OUT
R4107
0
D4100
5.6V
OPT
E
Q4106
2SC3052
041:F3;041:G2
1/16W
5%
EU
C4101
1000pF
50V
EU
C4108
4700pF
50V
EU
R4151
2K
1/16W
RT1P141C-T112
Q4109
EU
SCART1_MUTE
3
C
EU
Q4108
2SC3052
EU
DTV/MNT_R_OUT
EU
B
C4125
6800pF
50V
041:F4;041:G2
C4107
4700pF
50V
DTV/MNT_R_OUT
EU
Q4110
2SC3052
EU
EU
E
C
EU
1/16W
5%
C4124
10uF
16V
OPT
EU
L4101
BLM18PG121SN1D
R4159
EU
EU
EU
EU
5.6K R4148
EU
SC1_R_IN
D4108
5.6V
OPT
1
C4127
33pF
SCART1_Lout_P
C4112
100pF
50V
C4104
25V
EU
EU
R4149
33K
C4126 EU
6800pF
50V
SCART1_Lout_N
R4103
470K
D4109
5.6V
OPT
AUDIO_R_OUT
PSC008-01
JK4100
R4155
1K
IC4100
LM324D
R4146
1K
DTV/MNT_L_OUT
SCART1_Rout_N
SC_RE2
==> A = B0
EU_SCART [OPT]
REC_8
R4128
0
SC1_L_IN
CN
DTV/MNT_V_OUT
Audio Out Amp
SC1_G
13
PPJ-230-01
B0
R4131
0
OPT
R4111
75
1%
EU
4
ATV_OUT
GND
Selece = High ==> A = B1
SC1_FB
6
5
B1
EU
R4137
15K
EU
R4134
180
Rg
EU
SC1_R
RGB_GND
A
1
EU
EU
R4138
0
Gain=1+Rf/Rg
R4122
22
R_OUT
6
VCC
EU
C4117
47uF
16V
E
EU
R4132
390
EU
SYNC_OUT
IC4101
NLASB3157DFT2G
EU
C4119
0.1uF
16V
B
C4115
220pF
50V
OPT
AV_DET
R_GND
10
7
EU
COM_GND
13
9
DTV_ATV_SELECT
EU
C4118
0.1uF
16V
75
R4178
1%
21
EU
L4105
EU
R4135
470
EU
E
ISA1530AC1
Q4104
EU
EU
R4164
12
22
11
C4116
0.1uF
16V
D4101
30V
OPT
R6166
0
CN
D4107
5.6V
OPT
EU
R4163
10K
EU
C4134
0.1uF
16V
SCART1_DET
R4129
1K
EU
R4153
1
EU
2
C4130
0.1uF
Q4107
REC_8
For Frequency Response
2SC3052
2K
1/16W
E
EARPHONE BLOCK
+3.3V_NORMAL
EARPHONE AMP
L4102
10uH
C4140
10uF
10V
C4142
0.1uF
16V
R4119
0
1/16W
16
HP_ROUT_N
C4138
1uF
10V
INR-
THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.
Copyright © 2010 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
R4171
OPT
R4169
OPT
R300
4.7K
R4170
4.7K
HP_ROUT_P
VDD
EN
13
12
11
2
IC4102
TPA6132A2
10
3
4
9
EAN60724701
5
6
7
HP_LOUT
HPVDD
C4143
2.2uF
10V
R4172
100K
OPT
R4109
4.7K
C
CPP
PGND
C4144
2.2uF
10V
Q4117
2SC3052
B
OPT
R4174
0
R4175
1K
SIDE_HP_MUTE
E
CPN
8
HPVSS
INR+
14
G1
INL+
C4137
1uF
10V
HP_LOUT_P
15
L4104
BG2012B080TF
C4146
0.22uF
16V
+3.3V_NORMAL
1
OUTR
INL-
C4136
1uF
10V
G0
C4135
1uF
10V
HP_LOUT_N
SGND
OUTL
C4139
1uF Close to the IC
10V
R4173
0
L4103
BG2012B080TF
HP_ROUT
C4141
2.2uF
10V
1/16W
C4145
0.22uF
16V
EUROBBTV
ETC SUB BOARD I/F
2009.06.18
41
LGE Internal Use Only
+3.3V_NORMAL
G
BLUETOOTH
S
C1108
1uF
BCM BT MODULER1886 BCM BT MODULE
R1887
47K
47K
R1888
4.7K B
BT_ON/OFF
BCM BT MODULE
C
500
L1899
OPT
D
BCM BT MODULE
Q1801
RTR030P02
BLUETOOTH FOR BCM
10
R1889
BCM BT MODULE
BCM BT MODULE
E
2SC3052
Q1800
BCM BT MODULE
11
10
BCM BT MODULE
C1899
22uF
10V
R1896
27
9
BT_DM
8
7
6
5
D1899
CDS3C05HDMI1
5.6V
BCM BT MODULE
BCM BT MODULE
R1897
27
BT_DP
D1898
CDS3C05HDMI1BCM BT MODULE
5.6V
BCM BT MODULE
R1898
0
BT_RESET
4
BCM BT MODULE
3
R1899
0
VREG_CTRL
2
BCM BT MODULE
1
12507WR-10L
P1895
BCM BT MODULE
THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.
43
Bluetooth
Copyright © 2010 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
LGE Internal Use Only
CI POWER ENABLE CONTROL
+5V_NORMAL
Q4501
RSR025P03
R4512
10K
OPT
AR4515
10K
CI_A[0]
+5V_CI_Vs
D
C4509
4.7uF
16V
22K
0.1uF
16V
CI CONTROL BUFFER
R4514
C4506
S
C4510
0.1uF
16V
C4508
47uF
16V
G
CI_A[1]
CI_A[2]
R4526
CI_A[3]
/CI_CE1
016:T13;016:AJ2
/CI_CE2
VCC
O0
O1
O2
/CI_WE
016:H12
O3
/CI_IOWR
016:T12
O4
016:G13
/CI_OE
016:T13
/CI_IORD
O5
O6
O7
20
1
19
2
18
3
17
4
16
5
15
6
14
7
13
8
12
9
11
10
AR4517
10K
10K
R4503
16V
0.1uF
C4500
IC4500
MC74LCX541DTR2G
OE2
016:G13;016:AJ2
2.2K
D3.3V
D3.3V
CI_5V_CTL
CI_A[5]
/CI_SEL 007:H5
007:H7
CI_A[6]
D0
EBI_CS
007:E7;007:E6;016:AL23
D1
R4513
10K
B
CI_A[4]
OE1
CI_A[7]
007:C2;007:E5
CI_A[8]
D3
EBI_WE
D4
Q4500
2SC3052
E
AR4501
10K
D2
NAND_WEb
[GP27]
C
007:E6
CI_A[9]
007:C3;007:E6
NAND_REb
D5
CI_A[10]
007:C2;007:E6
NAND_ALE
CI_A[11]
D6
D7
AR4504
10K
GND
CI_A[12]
CI_A[13]
EBI_RW
IC4501
74LVC245A
CI_A[0-13]
016:F16CI_D[0-7]
007:E7;016:C13
DIR
1
20
2
19
3
18
4
17
5
16
6
15
7
14
0.1uF
16V
007:E6
C4507
D3.3V
EBI_CS
007:E7;007:E6;016:K26
VCC
NAND_DATA[0-7]
CI_D[0]
A0
CI_D[1]
A1
CI_D[2]
A2
CI_D[3]
A3
CI_D[4]
A4
CI_D[5]
A5
CI_D[6]
A6
CI_D[7]
A7
GND
016:AG22 CI_D[0-7]
8
13
9
12
10
11
OE
NAND_DATA[0]
B0
B1
NAND_DATA[1]
B2
NAND_DATA[2]
B3
NAND_DATA[3]
B4
NAND_DATA[4]
B5
NAND_DATA[5]
B6
NAND_DATA[6]
B7
NAND_DATA[7]
+5V_CI_Vs
CI_D[3]
AR4511
33
CI_D[4]
CI_D[5]
R4510
100
CI_OUTDATA[7]
42
/CI_CE2
9
43
/CI_VS1
CI_A[11]
10
44
/CI_IORD
016:H24
CI_A[9]
11
45
/CI_IOWR
016:H25
CI_A[8]
12
46
CI_A[13]
13
47
FE_TS_DATA[0]
CI_A[14]
14
48
FE_TS_DATA[1]
15
49
16
50
17
51
R4505
18
52
R4507 100
0
19
53
OPT
20
54
FE_TS_DATA[5]
21
55
FE_TS_DATA[6]
CI_A[7]
22
56
FE_TS_DATA[7]
58
25
59
CI_A[3]
26
60
CI_A[2]
27
61
CI_A[1]
28
62
CI_A[0]
29
AR4513
33
016:AJ3
[GP41] /CI_IOIS16
R4504
100
47
R4511
R4506 016:AL9
100
/CI_INPACK
0
007:G6;016:AJ2
CI_MOD_RESET [GP49]
/CI_WAIT 007:E6;016:AJ3
DVB-CI PULL-UP (Near CI Slot)
CI_OUTCLK
CI_OUTSTART
63
64
31
65
32
66
33
67
CI_OUTDATA[1]
34
68
CI_OUTDATA[2]
69
33
CI_OUTVALID
R4508
30
G1
AR4505
External Demod.
+5V_NORMAL
AR4514 33
CI_OUTDATA[0]
CI_OUTDATA[3]
G2
/CI_IOIS16
/CI_IREQ
/CI_VS1
/CI_WAIT
CI_OUTCLK
AR4520 33
/CI_CD2
0.1uF
C4504
R4509
100
[GP38]
007:H5;016:AJ2
AR4519
33
10K
57
24
FE_TS_DATA[4]
10K
23
CI_A[4]
C4503
0.1uF
R4524
OPT
CI_A[6]
CI_A[5]
FE_TS_DATA[2]
FE_TS_DATA[3]
AR4516 33
R4525
C4502
0.1uF
33
AR4506
FE_TS_DATA[0-7]
10K
R4500
33
/CI_INPACK
10K
47
016:O9
R4523
OPT
/CI_IREQ
[GP39]
007:H5;016:AJ3
AR4512
016:H25;016:AJ2
[GP26] 016:AJ3
R4522
/CI_WE
AR4509
33
R4502
16V
CI_A[12]
47
0.1uF
/CI_OE
C4501
CI_A[10]
10K
8
DVB-CI PULL-DOWN (Near CI Slot)
CI_OUTDATA[6]
R4520
41
CI_OUTDATA[5]
10K
40
7
CI_OUTCLK,CI_OUTDATA[0-7],CI_OUTSTART,CI_OUTVALID
CI_OUTDATA[4]
R4521
6
AR4502 33
10K
39
R4519
OPT
38
5
22K
37
4
R4518
33
AR4518
R4501
36
3
10K
47
/CI_CE1
35
2
10K
CI_A[0-14]
1
R4517
CI_D[2]
007:H6;016:AJ3
10K
AR4507
33
CI_D[0]
CI_D[1]
/CI_CD1
C4505
0.1uF
R4516
CI_D[7]
P4500
10067972-000LF
R4515
CI_D[6]
/CI_CD1
/CI_CD2
/CI_CE1
/CI_CE2
FE_TS_SYNC
FE_TS_VAL_ERR
CI_MOD_RESET
FE_TS_DATA_CLK
THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.
Copyright © 2010 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
EUROBBTV
CI
2009.06.18
45
LGE Internal Use Only
Mini LVDS
0 NON_GIP
0 NON_GIP
0 NON_GIP
0 NON_GIP
0 NON_GIP
0 NON_GIP
R7407
R7408
R7410
R7411
P7401
104060-6017
R7406
[LEFT FFC Connector]
(60Pin Mini-LVDS)
R7405
[Right FFC Connector]
(60Pin Mini-LVDS)
MINI_LVDS
P7400
104060-6017
MINI_LVDS
1
GND
2
GMA1
3
GMA3
GMA3
4
GMA4
GMA4
5
GMA6
GMA6
GMA1
6
GMA7
GMA7
7
GMA9
GMA9
8
GMA10
GMA10
9
GMA12
GMA12
10
GMA13
GMA13
11
GMA15
GMA15
12
GMA16
GMA16
13
GMA18
GMA18
14
GND
15
OPT_N
16
H_CONV
VST_IN
18
POL
POL
19
SOE
SOE
20
GND
21
LV0+
RXD1-
22
LV0-
RXD1+
23
LV1+
RXD0-
24
LV1-
RXD0+
25
LV2+
RXC4-
26
LV2-
RXC4+
27
LVCLK+
RXC3-
28
LVCLK-
RXC3+
29
LV3+
30
LV3-
RXC2+
31
LV4+
RXC1-
32
LV4-
Z_OUT
3
CLK1
CLK1
4
CLK2
CLK2
5
CLK3
CLK3
R7414
6
CLK4
CLK4
R7415
7
CLK5
CLK5
8
CLK6
R7412
0 MINI_LVDS
CLK6
9
VGI_N
VGI_N
VGI_P
VGI_P
11
VGH_ODD
VDD_ODD
12
VGH_EVEN
13
VSS
14
VST
R7402
15
GND
3.3K
MINI_LVDS
16
VCOM_FB
VCOMRFB
17
VCOM_IN
VCOMR
18
GND
19
VDD
20
VDD
21
HALF_VDD
22
HALF_VDD
23
GND
24
VCC
25
VCC
26
GND
27
RV0+
RXA1-
28
RV0-
RXA1+
29
RV1+
RXA0-
30
RV1-
RXA0+
31
RV2+
RXB4-
32
RV2-
RXB4+
33
RVCLK+
RXB3-
34
RVCLK-
RXB3+
35
RV3+
RXB2-
36
RV3-
RXB2+
RXB1-
VCC_LCM
GSP/GVST_I
VCC_LCM
C7400
0.1uF
16V
MINI_LVDS
C7402
0.01uF
50V
MINI_LVDS
VDD_LCM
To reduce
Audible Noise
HVDD
RXC2-
GND
2
10
H_CONV
17
1
2012
C7401
10uF
16V
MINI_LVDS
RXC1+
C7403
1uF
50V
C7404
0.1uF
50V
MINI_LVDS
R7416
R7417
R7418
0 GIP
R7419
MINI_LVDS
HVDD
VCC_LCM
C7405
0.1uF
16V
MINI_LVDS
LV5-
RXC0+
35
GND
37
RV4+
36
VCC
38
RV4-
37
VCC
39
RV5+
RXB0-
38
GND
40
RV5-
RXB0+
39
HALF_VDD
41
GND
40
HALF_VDD
42
SOE
SOE
41
VDD
43
POL
POL
42
VDD
44
VST_IN
GSP/GVST_I
R7413
43
GND
45
H_CONV
H_CONV
44
VCOM_IN
46
OPT_N
3.3K
MINI_LVDS
VCOML
45
VCOM_FB
VCOMLFB
47
GND
46
GND
48
GMA18
GMA18
47
VST
49
GMA16
GMA16
48
VSS
50
GMA15
GMA15
51
GMA13
52
GMA12
GMA12
53
GMA10
GMA10
54
GMA9
55
GMA7
GMA7
56
GMA6
GMA6
57
GMA4
GMA4
58
GMA3
GMA3
59
GMA1
GMA1
60
GND
VST
0 GIP
49
VGH_EVEN
50
VGH_ODD
VDD_ODD
51
VGI_P
VGI_P
VGI_N
53
CLK6
CLK6
54
CLK5
CLK5
55
CLK4
CLK4
56
CLK3
57
CLK2
58
CLK1
CLK1
59
Z_OUT
Z_OUT
GND
0 NON_GIP
VDD_EVEN
52
60
R7403
VGI_N
VCC_LCM
CLK3
R7400
0 GIP
CLK2
R7404
3.3K
NON_GIP
C7408
0.1uF
50V
MINI_LVDS
C7406
1uF
50V
34
R7401
0 NON_GIP
0 NON_GIP
VDD_LCM
RXC0-
VGL
(-5V)
VGL
(-5V)
To reduce
Audible Noise
LV5+
VGL_I
0 NON_GIP
0 NON_GIP
GSC/GCLK3_I
GOE/GCLK1_I
VST
33
MINI_LVDS
0 NON_GIP
0 NON_GIP
VGL_I
VDD_EVEN
R7409
VGH_M
(+25V)
Z_OUT
C7409
10uF
16V
MINI_LVDS
C7407
0.01uF
50V
MINI_LVDS
RXB1+
VCC_LCM
GMA13
GMA9
61
.
61
.
THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.
Copyright © 2010 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
COMMON
URSA3 120Hz MINI_LVDS
09/10/xx
74
LGE Internal Use Only
LVDS
[51Pin LVDS Connector]
(For FHD 60/120Hz)
[41Pin LVDS Connector]
(For FHD 120Hz)
PANEL_VCC
L7700
500
FHD_120Hz
P7700
TF05-51S
FHD_120Hz
C7700
10uF
25V
OPT
1
C7701
1000pF
50V
C7702
0.1uF
50V
P7701
TF05-41S
FHD_120Hz
2
3
1
4
2
5
6
7
8
9
10
R7700
0
NON_LGD_22
R7701
0
NON_LGD_22
3
RXD4-
4
RXD4+
5
RXD3-
6
RXD3+
7
8
RXDCK-
11
RXA4-
9
RXDCK+
12
RXA4+
10
13
RXA3-
11
14
RXA3+
12
RXD2+
15
RXD2-
13
RXD1-
16
RXACK-
14
RXD1+
17
RXACK+
15
RXD0-
16
RXD0+
18
19
RXA2-
17
20
RXA2+
18
21
RXA1-
19
RXC4-
22
RXA1+
20
RXC4+
23
RXA0-
21
RXC3-
24
RXA0+
22
RXC3+
25
23
BIT_SEL
26
27
R7710
10K
8BIT
RXB4-
10BIT
OPEN
24
RXCCK-
8BIT
GND
25
RXCCK+
28
RXB4+
26
29
RXB3-
27
RXC2-
30
RXB3+
28
RXC2+
31
29
RXC1-
32
RXBCK-
30
RXC1+
33
RXBCK+
31
RXC0-
32
RXC0+
34
35
RXB2-
33
36
RXB2+
34
37
RXB1-
35
38
RXB1+
39
RXB0-
40
41
42
43
44
36
R7708-*1 0
RXB0+
NON_SCAN
R7702
0
R7706
0
LD60_SCAN
R7707
0
FHD_OPC
R7708
0
LD60_SCAN
R7709
0
FHD_OPC
47
48
R7703
33
240Hz
R7704
33
240Hz
R7705
33
240Hz
38
SCAN_BLK2
39
+3.3V_NORMAL
OPC_EN
40
SCAN_BLK1/OPC_OUT
41
R7711
PWM_DIM
45
46
37
FHD_OPC
FRC_RESET
SCL3_3.3V
3.3K
JEIDA
42
R7712
10K
VESA
SDA3_3.3V
49
LVDS_SEL
HIGH
50
JEIDA
GND(NC) VESA
51
52
TP7700
THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.
OPC_OUT
35
URSA3 120Hz LVDS
Copyright © 2010 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
LGE Internal Use Only
FROM LIPS & POWER B/D
GND
8
GND
3.5V
9
10
3.5V
3.5V
11
12
3.5V
GND
13
14
GND
GND
15
16
GND/V-sync
12V
17
18
INV ON
12V
19
20
A.DIM
12V
21
22
P.DIM1
23
24
Err OUT
10K
R8053
47K
OPT
R8075
10K
R8067
1K
PD_+3.5V
1%
1%
3
2
NON_PD_+3.5V
R8074
100
RESET
R8054
5.6K
1%
1%
POWER 24V
R8062-*1
4.3K 1%
POWER 20V
R8062
5.1K 5%
GND
R2
SS
C8026
0.1uF
PGND_1
1
14
2
3
ERROR_OUT
13
12
R8045
FB
PGND_2
L8009
2uH
IC8001
C8069
0.1uF
4
11
5
10
6
9
SW_2
470K
1%
20K
R1
MAX 2.3A
A1.2V
D1.2V
R8060
R8048
POWER_ON/OFF2_2
L8013
910K
1%
1%
+3.3V_NORMAL
+12V
ESD
R8045-*1
100K
0
NON_ESD
R8043 R8046
EN/SYNC
MAX 3.1A
POWER_ON/OFF2_1
L8011
BLM18PG121SN1D
R2
L8006
BS
7
8
C8036
0.1uF
POK
R8040
VCC
100K
R8041
EN
C8037
22uF
10V
R8042
0
10
MP2208DL-LF-Z
C8041
22uF
10V
FB
C8045
0.1uF
16V
C8043
22uF
10V
C8051
0.1uF
50V
C8052
22uF
25V
COMP
C8032
0.1uF
C8029
22uF
16V
C8033
1uF
10V
6
4
IC8005
7
LX
AOZ1024DI
5
R8058
20K
C8054
2200pF
50V
R8069
27K
MLB-201209-0120P-N2
NC
IN_2
D3.3V
L8016
CIC21J501NE
L8015
3.6uH
VIN
IN_1
+3.3V_NORMAL
10K
CIC21J501NE
1%
AGND
SW_1
C8057 C8059
22uF 22uF
10V
10V
C8067
10uF
10V
C8063
0.1uF
16V
C8064
0.1uF
16V
C8035
22uF
Vout=0.8*(1+R1/R2)
D
Q8004
AO3407A
S
R8010
10K
C8013
4.7uF
50V
PANEL_VCC
G
R8011
1.8K
OPT
C8015
1uF
25V
C
Q8003
2SC3052
B
C
R8008
22K
Q8001
2SC3052
C8022
0.1uF
50V
E
BCM DDR 1.8V
Max 1100 mA
A2.5V
+3.3V_NORMAL
1:AK10
E
+3.5V_ST
A2.5V
D1.8V
IC8004
SC4215ISTRT
+5V_USB
BST
+12V
1
2
+5V_USB
L8001
500
LX
MAX 1500mA
Placed on SMD-TOP
PGND
C IN
C8002
10uF
25V
SW_2
C8007
0.1uF
BST
7
3
3A
4
6
5
OPT
C8016
100pF
50V
C8014
1uF
50V
VCC
EN/SYNC
POWER_ON/OFF2_1
R8013
10K
R8006
22
R1
R8012
10K
FB
1%
2
GND
R8016
33K
8
OPT
C8019
100pF
50V
C8020
22uF
10V
C8023
0.1uF
16V
C8025
0.1uF
16V
C8031
22uF
10V
SGND
3
4
5
10
3A
500
L8014
R8059
10K
9
8
7
6
RUN
10K
R8052
1
8
2
7
NC_1
EN
VOUT : 2.533V
GND
R8073
18K R2
1%
ADJ
R8072
39K R1
1%
POWER_ON/OFF1
VREF
C8042
0.01uF
25V
COMP
FB
C8039
3300pF
50V
SS
C8038
0.01uF
25V
R8051
6.8K
OPT
50V
100pF
C8044
R2
R8056
10K
1/10W
1%
C8053
10uF
16V
R1
R8057
3
6
4
5
VO
VIN
C8055
0.1uF
OPT
C8056
0.1uF
NC_2
NC_3
C8058
10uF
16V
C8061
10uF
16V
C8062
0.1uF
Placed on SMD-TOP
10K
1%
C8048
22uF
10V
C8050
0.1uF
Vout=0.8*(1+R1/R2)
1%
SW_1
1
R8017
6.2K
IN
NR8040T3R6N
IC8002
MP2108DQ
VIN
IC8000
MP8706EN-C247-LF-Z
L8012
3.6uH
Replaced Part
C8034
0.01uF
25V
CIC21J501NE
L8008
Vout=0.9*(1+R1/R2)
500
L8017
PANEL_CTL
VCC
1%
OPC_OUT
C8027
0.1uF
R8001
47K
B
ESD
D8000
5.6V
EP
R8034
0
HD_OPC
PANEL_POWER
OPT
R8002
10K
NCP803SN293
R8070
4.7K
R8033
0
SCAN_BLK1/OPC_OUT
SCAN/FHD_OPC
C8021
1uF
25V
OPT
+12V
R8003
22K
OPT
C8046
100pF
50V
POWER 20V
R8061
24K 1%
R8044
PWM_DIM
R8025
0
LGD
C8010
10uF
25V
OPT
not to RESET at 8kV ESD
IC8008
POWER 24V
R8061-*1
24K 1%
OPT
R8080
14K 1%
1%
0
C8017
0.1uF
OPT
GND
C8009
0.1uF
50V
R8079
100K
+24V
+3.5V_ST
C8049
0.1uF
16V
R8071
10K
C8012
1uF
25V
OPT
0
R8022
+3.5V_ST
C8008
0.01uF
25V
C8066
22uF
10V
BCM core 1.2V volt
A_DIM
R8027
0
PWM_NON_OPC
R8024
0
AUO/SHARP
L8000
CIC21J501NE
C8047
22uF
10V
R1
OPT
Err_out INV_ON PWM_DIM
24
ESD
C8065
0.1uF
16V
0
A_DIM_LGD
R8035
0 +3.3V_NORMAL
PWM_DIM
COMP
5
R8055
10K
SCAN
SCAN_BLK2
A-DIM
4
Vout=0.8*(1+R1/R2)
R8031 0
LGD_IOP
Err_out Err_out
NC
POWER_DET
GND
3.9K
R8066
PWM_DIM PWM_DIM
R8081
100
RESET
2
22
2
1
1
V4:VBR-A
V5:NC
3
R8039
10K
OPT
R8029
CMO 0
INV_ON
FB
INV_CTL
Q8005
2SC3052
AUO R8030
R8020
NON_SCAN_PSU
0
POWER_ON/OFF2_2
EN
6
12K
2200pF
R8049
C8040
R8032
10K
B
E
R8021
AUO
2A
3
R8050
10K
C8030
10uF
25V
C8028
10uF
25V
LX_1
3
20
A-DIM
7
VCC
PGND
INV_ON
C
R8023
OPT
SHARP
INV_ON
18
2
IC8007
NCP803SN293
1
R8018
100
R8084
0
VIN
C8068
0.1uF
16V AGND
+3.3V_NORMAL
R8026
1K
NON_CMO
R8019
100
SCAN_PSU
AUO
8
AGND
CMO(09)
1
Power_DET
L8010
3.6uH
LX_2
3.9K
C8011
0.1uF
16V
OPT
R8085
0
SCAN_LIPS
P8001
400Hz_MO_SCLK/42_47_LOCAL DIMMING
R8077
0
M2_SCLK
R8028
0
MO_SCLK
400Hz_MO_SCLK
OPT
R8037
4.7K
LGD
PGND
V_SYNC
6.8K
R8009
0
0
R8007
25
SMAW200-H24S2
0
PIN No
0
CMO
<OS MODULE PIN MAP>
L8007
CIC21J501NE
+5V_NORMAL
+3.5V_ST
R8068
100K
NR8040T3R6N
R8082
400Hz_VSYNC
SLIM_32~52
NON_SCAN_LIPS
400Hz_MD_MDSI/42_47_LOCAL DIMMING
R8076
0
M2_MOSI
MO_MOSI
C8005
0.1uF
50V
400Hz_MD_MDSI
R8005
0
C8003
0.1uF
50V
C8001
100uF
25V
GND/P.DIM2
IC8003
AOZ1072AI
R_VS
400Hz_VSYNC
R8036
0
L_VS
MAX 350mA
OPT
R8047
+12V
C8024
68uF
35V
C8018
0.1uF
50V
+12V
R8064-*1
27K
24V
6
7
400Hz_VSYNC/42_47_LOCAL DIMMING
R8078
0
ST_3.5V-->3.5V
+3.5V_ST
PD_+3.5V
1%
4
5
GND
C8006
0.1uF
16V
L8002
MLB-201209-0120P-N2
L8005
MLB-201209-0120P-N2
0
R8083
C8004
0.1uF
16V
24V
GND
L8003
MLB-201209-0120P-N2
C8000
100uF
16V
2
SCAN_PSU
+3.5V_ST
PWR ON 1
24V
3
15
E
+5V_NORMAL
NON_PD_+3.5V
R8064
5.1K
NORMAL_26~52
P8000
FW20020-24S
2
Q8000
2SC3052
R8014
B
+12V
12V-->3.58V
+24V
LD650/LD750
R8015
0
C
R8000
10K
RL_ON
3
1
SHARP
R8004
4.7K
15V-->3.6V
20V-->3.5V
24V-->3.48V
R8063
12K
Q8002
PD_+12V
1%
RT1P141C-T112
1/16W
5%
L_VS
R_VS
MO_SCLK
M2_SCLK
MO_MOSI
M2_MOSI
THERMAL
+3.5V_ST
R2
L8004
3.6uH
+5V_USB
NR8040T3R6N
Vout=(1+R1/R2)*0.8
THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.
Copyright © 2010 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
BCM (EUROBBTV)
POWER
15
LGE Internal Use Only
FLMD0
GND
10K
MICOM_DOWNLOAD
32.768KHz
R8175
P123/XT1
P124/XT2/EXCLKS
RESET
P40
P41
P120/INTP0/EXLVI
43
42
41
40
39
38
37
8
OCD1B
22
R8104 10K
+3.5V_ST
10K
R8105
10K
10K
R8107
10K
22
P60/SCL0
1
R8128
22
P61/SDA0
2
P62/EXSCL0
3
P63
4
NEC_EEPROM_SCL
NEC_ISP_Tx
NEC_EEPROM_SDA
OPT
R8126
NEC_ISP_Rx
10K
R8106
R8129
22
P33/TI51/TO51/INTP4
5
R8130
22
P75
6
R8131
22
P74
7
HDMI_CEC
OCD1A
POWER_ON/OFF2_1
OCD1B
AMP_MUTE
+3.5V_ST
R8188
22
34
P01/TI010/TO00
R8189
10K
33
P130
R8192
32
P20/ANI0
R8194
22
31
ANI1/P21
R8195
22
30
ANI2/P22
R8196
22
22
WIRELESS_SW_CTRL
ANI3/P23
R8190
22
28
ANI4/P24
R8193
22
MODEL1_OPT_3
MODEL1_OPT_2
POWER_ON/OFF1
22
P71/KR1
10
27
ANI5/P25
R8135
22
P70/KR0
11
26
ANI6/P26
12
25
ANI7/P27
P32/INTP3/OCD1B
FLASH_WP
MICOM_DOWNLOAD
R8134
22
RL_ON
SCART1_MUTE
29
R8191
22
SIDE_HP_MUTE
KEY2
KEY1
NON_M-REMOTE
TOUCH_KEY
31
PDP/3D
LCD/OLED
THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.
LCD
PDP
OLED
3D
MODEL_OPT_0
0
0
1
1
MODEL_OPT_3
0
1
0
1
LOW
LOW_SMALL
TBD
HIGH
MODEL_OPT_1
0
0
1
1
MODEL_OPT_2
0
1
0
1
AVSS
C8107 1uF
P10/SCK10/TXD0
22
R8179
AVREF
P11/SL10/RXD0
22
R8177
P12/SO10
P13/TXD6
P14/RXD6
P15/TOH0
P16/TOH1/INTP5
P17/TI50/TO50
P30/INTP1
TACT_KEY
22
30
MODEL_OPT_3
R8176
MODEL_OPT_2
FOR ATSC Assy
SCART1_MUTE
TP8100
R8181
10K
OPT
R8182
10K
OPT
10K
OPT
NEC_TXD
LCD/PDP
R8124
10K
PWM_LED
R8121
10K
TACT_KEY
R8112
10K
LCD/OLED
R8110
10K
MODEL1_OPT_3
+3.5V_ST
+3.5V_ST
R8183
NEC_RXD
OPC
NEC_ISP_Tx
PWM_LED
POWER_ON/OFF2_2
LOGO_BUZZ
NEC_ISP_Rx
11
22
MODEL_OPT_1
R8145
LCD/PDP
IR
OLED/3D
LED_R/BUZZ
LOW
8
MODEL1_OPT_1
MODEL1_OPT_2
Copyright © 2010 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
HIGH
MODEL_OPT_0
TACT_KEY
OLED/3D
R8123
10K
LOGO_BUZZ
R8120
10K
MODEL1_OPT_0
22
100
100
PIN NO.
R8144
100
R8103
R8101
MODEL OPTION
PIN NAME
OCD1A
R8102
TOUCH_KEY
R8111
10K
+3.5V_ST
POWER_DET
NEC_EEPROM_SDA
PDP/3D
R8109
10K
OPC_EN
P00/TI000
9
LED_B/LG_LOGO
R8114
MICOM MODEL OPTION
PANEL_CTL
35
8
P31/INTP2/OCD1A
5
22
AMP_RESET_N
22
P72/KR2
22 NON_M-REMOTE
NEC_EEPROM_SCL
22
4
NEC_MICOM
R8142
5
R8117
0.1uF
4
6
C8100
6
7
R8122 4.7K
3
UPD78F0513AGA-GAM-AX
36
R8187
8
R8125 4.7K
R8100
47K
3
IC8101
13
M24C16-WMN6T
7
Q8100
2SC3052
E
P140/PCL/INTP6
P73/KR3
R8136
OCD1B
2
EDID_WP
C
B
22
MODEL1_OPT_1
IC8100
8
20K
1/16W
1%
22
INV_CTL
EEPROM for Micom
1
R8186
R8133
SOC_RESET
2
3
R8132
MODEL1_OPT_0
1
1
4
24
+3.5V_ST
R8127
23
SCL1_3.3V
SDA1_3.3V
R8108
2
FLMD0
12
22
R8119
11
13
14
9
10
R8178
22
OCD1A
21
R8118
NEC_ISP_Rx
15
7
20
22
6
19
R8116
NEC_ISP_Tx
18
22
C8108
0.1uF
1/16W
1%
FLMD0
44
22
R8115
17
R8113
16
5
SW8100
JTP-1127WEM
R8185
20K
P122/X2/EXCLK/OCD0B
45
0.1uF
MICOM_RESET
C8104
4
47K
P121/X1/OCD0A
3
R8184
REGC
46
+3.5V_ST
1
2
22
VSS
47
C8103
0.1uF
22
VDD
48
GND
for Debugger
+3.5V_ST
P8100
R8180
4.7M
+3.5V_ST
12505WS-12A00
+3.5V_ST
X8101
OPT
WIRELESS_PWR_EN
C8106
C8105
R8139
10K
MICOM_RESET
0
R8138
WIRELESS_DETECT
27pF
R8146
22pF
10MHz
X8100
0
R8143
47K
50V
15pF
C8102
OPT
50V
15pF
C8101
R8140
10Mhz Crystal Ready
+3.5V_ST
GP2_Saturn7M
MICOM
Ver. 1.4
5
LGE Internal Use Only
+3.5V_ST
IR & KEY
EYEQ
R8225
100
NEC_EEPROM_SCL
D8204
CDS3C05HDMI1
5.6V
R8213
10K
1%
R8211
10K
1%
L8200
BLM18PG121SN1D
R8209
100
1
EYEQ
R8226
100
KEY1
L8201
BLM18PG121SN1D
R8210
100
P8200
12507WR-12L
C8213
1000pF
50V
OPT
D8201
5.6V
AMOTECH
KEY2
C8206
0.1uF
2
NEC_EEPROM_SDA
D8205
CDS3C05HDMI1
5.6V
C8214
1000pF
50V
OPT
C8207
0.1uF
D8200
5.6V
AMOTECH
3
4
+3.5V_ST
+3.5V_ST
5
L8202
BLM18PG121SN1D
+3.5V_ST
R8202
47K
R8200
22
6
+3.5V_ST
R8204
47K
IR
Q8200
2SC3052
C8208
0.1uF
16V
C8209
1000pF
50V
R8227
LED_B/LG_LOGO
B
E
R8205
47K
C
7
TACT_KEY
R8203
10K
C
1.5K
10K
R8287
LD650/LD750
R8206
3.3K
OPT
8
R8224
100
9
B
Q8201
2SC3052
E
+3.5V_ST
COMMERCIAL
R8201
0
10
L8203
BLM18PG121SN1D
R8276
R8218
47K
R8216 COMMERCIAL
10K
IR_OUT
COMMERCIAL
C
Q8202
2SC3052
COMMERCIAL_EU
11
+3.5V_ST
R8214
47K
R8207 COMMERCIAL_EU
22
OPT
D8206
5.6V
AMOTECH
C8212
100pF
50V
+3.3V_NORMAL
C8210
0.1uF
16V
LED_R/BUZZ
C8211
1000pF
50V
1.5K
B
E
COMMERCIAL_EU
12
OPT
R8280
10K
13
R8220
47K
C
ETHERNET CONNECT
B
Q8204
2SC3052
COMMERCIAL
COMMERCIAL
E
A2.5V
L8204
JK8200
CIC21J501NE
XRJV-01V-D12-180
R8212
0
COMMERCIAL_US
R8283
0
Zener Diode is
close to wafer
R8284
0
R8217
10K
C
E
WIRELESS
5.6V
5
OPT
C8222
10pF
50V
B
E
6
EPHY_RDN
R8221
47K
C
Q8205
2SC3052
WIRELESS
C8216
1000pF
50V
R8286
0
B
WIRELESS
5.6V
Q8203
2SC3052
WIRELESS
D8209
WIRELESS
4
OPT
C8221
10pF
50V
R8219
47K
WIRELESS
D8212
EPHY_RDP
3
OPT
C8220
10pF
50V
D8208
R8208
22
IR_PASS
R8285
0
5.6V
EPHY_TDN
+3.5V_ST
R8215
47K
WIRELESS
2
5.6V
D8207
OPT
C8218
10pF
50V
+3.5V_ST
WIRELESS
1
EPHY_TDP
7
C8217
1000pF
8
D3.3V
R8281
510
R8282
510
D2
5.6V
D3
5.6V
D4
D8211
D8210
EPHY_LINK
EPHY_ACTIVITY
D1
9
RS232C
10
+3.5V_ST
5
9
OPT
IR_OUT
4
R8279
0
R8277
100
8
3
C8200 0.33uF
IC8200
C1+
V+
16
2
15
3
14
2
D8202
CDS3C30GTH
30V
VCC
6
D8203
CDS3C30GTH
30V
1
GND
+3.5V_ST
C8202
0.1uF
C1-
C2+
C8203
0.1uF
C2-
VC8204
0.1uF
1
7
R8278
100
C8205
0.1uF
MAX3232CDR
C8201
0.1uF
Trace impedance : 100 ohm differenctial impedance to GND plane
5 mils trace width with 7 mils air gap on P/N pair.
Adjacent TX/RX differential pairs should be separated by more than
15 mils to each other
DOUT2
4
13
5
12
6
7
11
10
SPG09-DB-009
DOUT1
RIN1
P8201
R8222
4.7K
OPT
R8223
4.7K
OPT
ROUT1
R8273 0
DIN1
R8274 0
BCM_RXD1
NEC_RXD
DIN2
R8272 0
BCM_TXD1
RIN2
8
9
ROUT2
R8275 0
NEC_TXD
EAN41348201
THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.
Copyright © 2010 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
LGE Internal Use Only
* HDMI CEC
E
E
13
CKCK-_HDMI1
CK_GND
CK+
CK+_HDMI1
D0-
9
D0-_HDMI1
D0_GND
8
12
11
JK830310
9
8
D0+
7
7
D0+_HDMI1
D1-
6
6
D1-_HDMI1
D1_GND
5
D1+
4
4
D1+_HDMI1
D2-
3
3
D2-_HDMI1
D2_GND
2
2
D2+
1
1
D2+_HDMI1
DDC_CLK
NC
CE_REMOTE
R8318
0
DDC_SDA_4
R8326
22K
DDC_SCL_4
GND
JP8307
D8312
CEC_REMOTE
MMBD301LT1G
CK-_HDMI4
CK_GND
HDMI_CEC
CEC_REMOTE
GND
CK+
CK+_HDMI4
D0D0-_HDMI4
D0_GND
D0+
D0+_HDMI4
D1D1-_HDMI4
D1_GND
D1+
D1+_HDMI4
D2-
+3.3V_HDMI
D2-_HDMI4
D2_GND
D2+
D2+_HDMI4
GND
UI_HW_PORT1
GND
D8311
5.5V
ESD
JP8306
CK-
KJA-ET-0-0032
YKF45-7058V
R8317
0
SIDE_HDMI_PORT4
C8311
14
CEC_REMOTE
DDC_DATA
C8310
0.1uF
GND
GND
C8309
0.1uF
15
JP8305
C8324
0.1uF
+3.5V_ST
C8308
0.1uF
R8308
0
NC
CE_REMOTE
5V_HDMI_4
C
1K
5V
C8307
0.1uF
DDC_SCL_1
5V_HPD4
B
R8349
27K
16
C
+3.3V_HDMI
L8300
BLM18PG121SN1D
C8305
0.1uF
17
JP8304
DDC_CLK
11
JK830210
5
DDC_SDA_1
B
R8321
4.7K
0.1uF
EAG59023302
12
D8305
5.5V
OPT
HDMI_HPD_4
KRC104S
Q8307
G
18
R8307
0
DDC_DATA
E
KRC104S
Q8306
R8316
HP_DET
C
GND
GND
GND
20
5V_HDMI_1
19
15
13
GND
5V_HPD1
1K
5V
16
14
C
B
EAG42463001
17
D8308
5.5V
ESD
D
B
S
Q8308
BSS83
R8302
HP_DET
19
18
E
KRC104S
Q8302
+3.3V_NORMAL
JACK_GND
HDMI_HPD_1
B
R8311
4.7K
5.6V
ESD
GND
20
KRC104S
Q8305
5.6V
D8314
CDS3C05HDMI1
SHIELD
GND
ESD
D8313
CDS3C05HDMI1
D8302
5.5V
OPT
33
33
33
33
R8331
R8332
R8333
R8334
5V_HDMI_1
D1_GND
47K
C8302
0.1uF
16V
DDC_SDA_4
DDC_SCL_4
OPT
R8328
DDC_SCL_3
D2+_HDMI2
3
2
1
DDC_SDA_4
HDMI_HPD_4
CK+_HDMI4
CK-_HDMI4
DDC_SCL_4
D0+_HDMI4
D0-_HDMI4
D1+_HDMI4
D1-_HDMI4
D2-_HDMI4
0
OPT
RXD_HPD
RXD_5V
RXD_DDC_DAT
RXD_DDC_CLK
RXD_C-
RXD_C+
VDDH[3V3]_7
RXD_D0-
RXD_D0+
VSS_10
RXD_D1-
RXD_D1+
VDDH[3V3]_8
RXD_D2+
RXD_D2-
76
77
78
79
80
81
82
83
84
85
86
87
88
89
RXC_C-
61
RXC_DDC_CLK
RXA_D0-
16
60
RXC_DDC_DAT
RXA_D0+
17
59
RXC_5V
VSS_3
18
58
RXC_HPD
57
CEC
D1-_HDMI1
19
RXA_D1+
20
56
VSS_7
D1+_HDMI1
VDDH[3V3]_2
21
55
VDDS[3V3]
RXA_D2-
22
I2C_SCL
I2C_SDA
PD
R8336 0 TEST2
VDDDC[1V8]_4
VSS_6
CDEC_DDC
RXB_D2+
RXB_D2-
RXB_D1+
RXB_D1-
VSS_5
RXB_D0+
RXB_D0-
RXB_C+
RXB_C-
VDDDC[1V8]_2
0
VDDH[3V3]_4
C8300
0.1uF
VDDH[3V3]_3
DDC_SDA_3
DDC_CLK
RXB_DDC_CLK
R8327
D8304
5.5V
OPT
JP8302
RXB_5V
C
R8305
0
D0+_HDMI3
D0-_HDMI3
CK+_HDMI3
CK-_HDMI3
DDC_SCL_3
DDC_SDA_3
HDMI_HPD_3
Ready for TDA19997
+3.3V_HDMI
R8346
0
OPT
OPT
R8347
4.7K
OPT
C8315
0.1uF
50
49
48
RXE_DDC_CLK
47
51
46
25
45
AUX_5V
44
RXE_DDC_DAT
43
INT_N/MUTE
52
42
53
24
41
23
40
54
RXA_D2+
VDDH[1V8]_1
5V_HDMI_3
D1+_HDMI3
D1-_HDMI3
R8345
0
OPT
CDEC_STBY
4.7K
R8348
0 OPT
R8343
DDC_SCL_3
R8306
0
NC
JP8303
GND
C8313
0.1uF
16V
CE_REMOTE
CEC_REMOTE
CKCK-_HDMI3
CK_GND
5V_HDMI_2
+1.8V_HDMI
CK+
C8314
0.1uF
16V
CK+_HDMI3
C8301
0.1uF
16V
C8303
0.1uF
16V
C8304
0.1uF
16V
D0+
D0+_HDMI3
R8340
22
D0-_HDMI3
D0_GND
R8338 22
C8306
0.1uF
16V
D0-
R8337
0
D1D1-_HDMI3
D1_GND
D1+
D1+_HDMI3
D2D2-_HDMI3
D2_GND
D2+
HDMI2
D2+_HDMI3
SDA2_3.3V
4
90
62
15
D2+_HDMI3
D2-_HDMI3
SCL2_3.3V
5
VDDDC[1V8]_3
14
RXA_D1-
D2-_HDMI1
D2+_HDMI1
C8317
0.1uF
16V
D2-_HDMI2
D2+_HDMI2
6
VSS_11
RXA_C+
VDDH[3V3]_1
D1+_HDMI2
7
91
RXC_C+
D1-_HDMI2
8
92
63
D0+_HDMI2
9
OUT_D2+
13
D0-_HDMI2
11
JK830110
OUT_D2-
RXA_C-
CK+_HDMI2
EAG59023302
12
VDDO[1V8]
VDDH[3V3]_5
DDC_SCL_1
CK-_HDMI1
DDC_SDA_2
13
93
RXC_D0-
64
DDC_SCL_2
CK-_HDMI2
14
94
RXC_D0+
65
12
HDMI_HPD_2
15
95
66
IC8300
TDA19997
11
+5V_NORMAL
16
OUT_D1+
VSS_8
9
GND
DDC_DATA
OUT_D1-
RXC_D1-
67
8
1K
5V
96
RXC_D1+
68
7
RXA_HPD
10
5V_HPD3
B
69
VSS_2
VDDDC[1V8]_1
39
C
KRC104S
Q8301
R8301
HP_DET
VDDH[3V3]_6
26
GND
20
RXC_D2-
70
VSS_4
SHIELD
B
R8310
4.7K
RXC_D2+
71
6
RXA_5V
CK+_HDMI1
HDMI_HPD_3
KRC104S
Q8304
72
5
RXA_DDC_CLK
E
E
4
RXA_DDC_DAT
D0-_HDMI1
GND
VDDO[3V3]
OUT_DDC_DAT
DDC_SDA_1
D0+_HDMI1
D8301
5.5V
OPT
5V_HDMI_3
12K
OUT_DDC_CLK
38
EDID Pull-up
UI_HW_PORT3
GND
VSS_9
37
D2+
VDDH[1V8]_2
R8344
R12K
73
75
36
DDC_SDA_3
74
3
35
47K
R8323
2
34
R8320
47K
1
33
D2-_HDMI2
R8315
VSS_1
OUT_C-
32
D1+_HDMI2
D2D2_GND
R8313
47K
C8323
0.1uF
16V
HDMI3
Place close
to
TDA9996
OUT_C+
31
D1+
C8318
0.1uF
16V
C8316
0.1uF
16V
HDMI1
D8310
D1-_HDMI2
97
5V_HPD4
5V_HPD3
D8307
30
D0+_HDMI2
D1-
29
D0+
VSS_12
D0_GND
0
17
D2+_HDMI4
R8339
33
+5V_NORMAL
5V_HDMI_4
OUT_D0+
+5V_NORMAL
5V_HDMI_3
D0-_HDMI2
98
CK+_HDMI2
99
CK+
D0-
HDMI_3
YKF45-7058V
18
HDMI_RX2+
HDMI_RX2-
HDMI_RX1+
HDMI_RX1-
HDMI_RX0+
33
R8330
CK-_HDMI2
CK_GND
HDMI_HPD_1
19
HDMI_RX0-
HDMI_CLK-
HDMI_CLK+
HDMI_SCL
A1
A2
A1
CK-
RXB_DDC_DAT
1
+1.8V_HDMI
OPT
2
0.1uF
CEC_REMOTE
28
4
3
DDC_SCL_2
27
5
DDC_SDA_2
GND
TEST1
6
CE_REMOTE
JP8301
RXB_HPD
7
DDC_SCL_2
R8304
0
HDMI_3
NC
R8335
0
8
DDC_SDA_1
DDC_SCL_1
DDC_CLK
OUT_D0-
9
DDC_SDA_2
R8324
1.8K
47K
HDMI_3
C8312
0.1uF
16V
100
11
JK830010
JP8300
R8322
R8319
47K
HDMI_3
47K
A1
EAG59023302
12
DDC_DATA
R8314
R8312
47K
D8303
5.5V
OPT
A2
13
HDMI_3
R8303
0
0.1uF
C8321
5V_HDMI_4
0.1uF
C8322
C
14
GND
0.1uF
C8320
R8325
1.8K
C
A1
15
+5V_NORMAL
HDMI_3
D8309
1K
5V
A2
17
16
5V_HPD2
5V_HPD1
D8306
5V_HDMI_2
C
18
C
B
R8329
HP_DET
19
GND
E
HDMI_3
KRC104S
Q8300
C8319
C
HDMI_3 GND
R8300
20
HDMI_HPD_2
B
R8309 HDMI_3
5V_HPD2
4.7K
A2
SHIELD
HDMI_3
KRC104S
Q8303
C
D8300
5.5V
OPT
+5V_NORMAL
5V_HDMI_2
+5V_NORMAL
5V_HDMI_1
E
HDMI_SDA
HDMI4
YKF45-7058V
GND
UI_HW_PORT2
THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.
Copyright © 2010 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
BCM (EUROBBTV)
LEE GI YOUNG
HDMI
2009.06.18
8
LGE Internal Use Only
RGB PC
A0
E2 3
D2A
VSS 4
5
SDA
R8405
22
2.7K
6
SCL
R8420
10K
R8422
100
OPT
RGB_DDC_SCL
R8415
22
RGB_DDC_SDA
22
+3.3V_NORMAL
OPT
D8408
CDS3C05HDMI1
5.6V
OPT
R8424
10K
1K
R8425
L8408 60-ohm
DSUB_B
DSUB_DET
RGB_BEAD
L8409 60-ohm
DSUB_G
OPT
0
R8423
GND
Fiber Optic
1
10
4
3
2
JK8400
JST1223-001
JP8401
JP8402
VCC
2
VINPUT
3
R8400
1K
SPDIF_OUT
C8400
0.1uF
16V
4
JP8400
Copyright © 2010 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
SPG09-DB-010
P8400
RGB_0OHM
+3.3V_NORMAL
THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.
5
9
8
7
6
L8410-*1 0
1
RGB_0OHM
RGB IN
16
RGB_0OHM
L8409-*1 0
OPT
C8409
D8411
100pF
5.6V
50V
ADMC5M03200L_AMODIODE
SHILED
DDC_CLOCK
V_SYNC
SYNC_GND
DDC_GND
15
H_SYNC
NC
BCM Reference
D8402 D8404 D8405
30V
30V
30V
L8408-*1 0
GND_1
R8407
75
14
R8404
75
BLUE_GND
RGB_BEAD
R8403
75
BLUE
RGB_BEAD
L8410 60-ohm
DSUB_R
D8400
30V
OPT
EDID_WP
R8416
OPT
D8410
CDS3C05HDMI1
5.6V
C8403
22pF
50V
R8406
22
BCM Reference
7
WC
RGB_EDID_ST
C8402
22pF
50V
8
VCC
0IMMR00014A
D8403
ADUC30S03010L_AMODIODE
30V
7
Q2
D8401
ADUC30S03010L_AMODIODE
30V
GND
8
R8421
0
E1 2
13
9
D2B
DDC_DATA
6
10
E0 1
GREEN
Q1
5
IC8401
M24C02-RMN6T
Q3
12
D1B
A2
RGB_EDID_RENESAS
R8414
11
C
SDA
R8417
0
4
5
RED
R8402
22
4
GREEN_GND
D1A
RGB_VSYNC
D3A
SCL
DEV
VSS
2.7K
12
6
D8409
ENKMC2838-T112
A1
GND_2
3
3
WP
RED_GND
RGB_HSYNC
Q0
C8401
0.1uF
+5V_NORMAL
VCC
11
R8401
22
D3B
7
R8413
13
8
2
C8406
18pF 50V
14
2
A2
D0B
1
C8405
18pF 50V
1
A1
VCC
C8404
0.1uF
16V
D0A
IC8401-*1
R1EX24002ASAS0A
+5V_NORMAL
IC8400
74F08D
FIX_POLE
RGB AUDIO IN
JK8401
PEJ027-01
3
E_SPRING
6A
T_TERMINAL1
7A
B_TERMINAL1
C8407
PC_R_IN
4
R_SPRING
5
T_SPRING
7B
B_TERMINAL2
6B
T_TERMINAL2
D8406
AMOTECH
5.6V
R8411
470K
1uF
25V
R8418
0
C8408
PC_L_IN
D8407
AMOTECH
5.6V
R8412
470K
1uF
25V
R8419
0
EUROBBTV
ETC SUB BOARD I/F
2009.06.18
9
LGE Internal Use Only
(New Item Developmen H:9.2mm)
SIDE_AV
SIDE_AV
R8503
SIDE_AV_CVBS
D8503
5A
[YL]E-LUG
4A
[YL]O-SPRING
3A
[YL]CONTACT
4B
[WH]O-SPRING
3C
4C
5.5V
SIDE_AV
[RD]O-SPRING
[RD]E-LUG
C8503
47pF
50V
R8502
2.7K
SIDE_AV
R8504
C8500
100pF
50V
SIDE_AV
1K
SIDE_AV
SIDE_AV
D8501
5.6V
5C
0
SIDE_AV
SIDE_AV_DET
D8500
5.6V
[RD]CONTACT
+3.3V_NORMAL
SIDE_AV
SIDE_AV
R8505
SIDE_AV_L_IN
R8500
470K
SIDE_AV
25V 1uF
C8501
SIDE_AV
0
C8504
100pF
SIDE_AV
SIDE_AV
R8506
PPJ235-01
SIDE_AV_R_IN
JK8500
SIDE_AV
D8502
5.6V
SIDE_AV
R8501
470K
SIDE_AV
SIDE_AV
25V 1uF
C8502
0
C8505
100pF
SIDE_AV
THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.
SIDE_AV
Copyright © 2010 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
LGE Internal Use Only
WIRELESS READY MODEL
JK8700
KJA-PH-3-0168
Wireless power
VCC[24V/20V/17V]_1
VCC[24V/20V/17V]_2
VCC[24V/20V/17V]_3
VCC[24V/20V/17V]_4
VCC[24V/20V/17V]_5
+24V
VCC[24V/20V/17V]_6
DETECT
+3.3V_NORMAL
R8704
22K
C8700
0.1uF
50V
INTERRUPT
C8701
2.2uF
TP8700
GND_1
R8714
10K
S
RESET
G
R8705
2.2K
Q8701
R8713
AO3407A
D
TP8701
1K
GND_2
WIRELESS_DETECT
L8700
I2C_SCL
R8702
10K
WIRELESS_PWR_EN
C
MLB-201209-0120P-N2
B
WIRELESS_SCL
I2C_SDA
WIRELESS_SDA
Q8700
GND_3
C8702
0.01uF
50V
E
C8704
10uF
35V
C8705
10uF
WIRELESS_RX
35V
UART_RX
UART_TX
WIRELESS_TX
GND_4
IR
IR_PASS
GND_5
GND_6
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
SHIELD
+3.5V_ST
NON_WIRELESS
0
R8703
WIRELESS
R8707
0
IC8700
MC14053BDR2G
WIRELESS
R8700
WIRELESS_DL_RX
0
Y1
WIRELESS_TX
1
WIRELESS
16
VDD
RS232C & Wireless
C8703
15
3
14
Y
X
BCM_TXD1
BCM_RXD1
R8708
Z
Z0
INH
R8701
0
VEE
4
13
5
12
6
11
7
10
8
9
X1
0.1uF
0
WIRELESS
WIRELESS_DL_TX
WIRELESS_SW_CTRL
SELECT PIN
STATUS
WIRELESS_RX
X0
R8706
0 NON_WIRELESS
+3.5V_ST
HIGH
X1/Y1/Z1
WIRELESS Dongle connect --> WIRELESS RS232
LOW
X0/Y0/Z0
WIRELESS Dongle Dis_con --> S7 RS232
BCM_RX
A
OPT
Z1
2
B
4.7K
R8711
Y0
BCM_TX
THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.
C
47K
R8712
VSS
OPT
WIRELESS
WIRELESS_SW_CTRL
12
WIRELESS
Copyright © 2010 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
LGE Internal Use Only
+24V_AMP
+24V
L8803
MLB-201209-0120P-N2
C8827
0.1uF
50V
+1.8V_AMP
+3.3V_NORMAL
CCFL = 20V
IC8800
IN
3 Vd=1.4V 1
R8800
1
AP1117E18G-13
ADJ/GND
Edge_LED 32~47 Inch = 20V
120 mA
2
C8800
0.1uF
16V
OUT
55 Inch & IOP Module = 24V
C8803
0.1uF
16V
C8802
10uF
10V
+24V_AMP
SPK_L+
D8800
1N4148W
100V
OPT
EMI
R8809
3.3
C8819
22000pF
50V
AUD_LRCK
AUD_SCK
SDA1_3.3V
SCL1_3.3V
R8802
PVDD1B_2
PVDD1B_1
OUT1B_2
OUT1B_1
PGND1B_2
PGND1B_1
BST1B
VDR1B
48
47
46
45
44
43
PVDD1A_1
49
PVDD1A_2
OUT1A_1
OUT1A_2
PGND1A_1
51
50
52
53
PGND1A_2
PGND2A_2
38
PGND2A_1
6
37
OUT2A_2
CLK_I
7
36
OUT2A_1
VDD_IO
8
35
PVDD2A_2
34
PVDD2A_1
33
PVDD2B_2
32
PVDD2B_1
C8810
1000pF
50V
DGND_PLL
9
R8806
AGND_PLL
10
LF
11
IC8801
EAN60969601
NTP-7000
4.7K
SPEAKER_L
C8839
0.47uF
50V
C8842
0.1uF
50V
15uH
R8817
12
R8821
4.7K
SPK_R+
C8830
22000pF
D8802
1N4148W
100V
OPT
50V
R8814
12
R8818
12
L8804
AD-9060
2S
2F
1S
C8838
390pF
50V
D8803
1N4148W
100V
OPT
R8815
12
1F
15uH
R8816
12
C8840
0.47uF
50V
C8843
R8822
0.1uF
50V
4.7K
C8844
R8823
0.1uF
50V
4.7K
SPEAKER_R
SPK_R-
28
+24V_AMP
PGND2B_1
27
BST2B
26
VDR2B
25
/FAULT
MONITOR2
MONITOR1
MONITOR0
SCL
SDA
BCK
WCK
SDATA
C8818
0.1uF
16V
24
PGND2B_2
23
29
22
14
21
GND
20
OUT2B_1
19
30
18
13
17
31
DVDD_PLL
16
12
OUT2B_2
C8807
0.1uF
16V
R8813
12
C8837
390pF
50V
AVDD_PLL
OPT
C8815
10uF
10V
R8801
54
EP_PAD
39
+1.8V_AMP
AUD_LRCH
C8828
25V1uF
5
15
OPT
C8805
10uF
10V
1F
C8836
390pF
50V
D8801
1N4148W
100V
OPT
GND_IO
3.3K
C8804
0.1uF
16V
4
AD
THERMAL
57
3
DGND_2
OPT
C8801
10uF
10V
100pF
50V
BST2A
DGND_1
L8801
C8806
VDR2A
40
2
C8811
0.1uF
BLM18PG121SN1D
BLM18PG121SN1D
L8800
NC
41
1
+1.8V_AMP
2F
1S
R8820
C8825
1uF
25V
42
BST1A
VDR1A
25V /RESET
C8816
1uF
55
56
C8808
1000pF
50V
AUD_MASTER_CLK
2S
C8841
0.1uF
50V
SPK_L-
L8802
AMP_RESET_N
L8805
AD-9060
C8823
22000pF
50V
DVDD
BLM18PG121SN1D
+3.3V_NORMAL
+1.8V_AMP
C8824
0.1uF
50V
C8820
0.1uF
50V
C8835
390pF
50V
EMI
C8832
0.01uF
50V
C8826
10uF
35V
R8819
12
R8812
12
C8822
1uF
25V
C8831
C8833
0.1uF
50V
0.1uF
50V
C8834
10uF
35V
C8829
22000pF
50V
100
R8807
0
100
R8803
100
R8804
100
R8805
100
POWER_DET
C8821
1000pF
50V
OPT
+3.5V_ST
C8809
33pF
50V
C8812
33pF
50V
C8813
47pF
50V
EMI
C8814
47pF
50V
EMI
C8817
47pF
50V
EMI
R8808
100
WAFER-ANGLE
R8810
10K
R8824
0
C
B
Q8800
2SC3052
R8811
SPK_L+
4
AMP_MUTE
R8825
0
10K
E
SPK_L-
3
R8826
0
SPK_R+
2
R8827
0
SPK_R-
1
P8800
THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.
Copyright © 2010 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
BCM (EUROBBTV)
KIM JONG HYUN
NTP7000
2009.06.18
38
LGE Internal Use Only
+1.5V_MEMC
D1.5V_DDR3
D1.5V_DDR3
DDR3 1.5V By CAP - Place these Caps near Memory
0.1uF
0.1uF
C8930
0.1uF
C8929
0.1uF
C8928
0.1uF
C8927
0.1uF
C8926
0.1uF
C8925
0.1uF
C8924
0.1uF
C8922
0.1uF
C8923
0.1uF
C8921
C8920
+3.3V_MEMC
Close to DDR Power Pin
+12V
PGND
L8902
1
1000pF
C8910
0.1uF
MVREFCA
FB
POWER_ON/OFF2_2
EN
6
4
COMP
5
C8944
0.1uF
16V
OPT
C8940
100pF
50V
9.1K
2200pF
R8925
C8937
OPT
Vout=0.8*(1+R1/R2)
C8942
22uF
10V
R1
1%
3
R8928
10K
C8934
10uF
25V
1%
LX_1
7
2A
R8935
10K
R8919
1K 1%
1%
R8920
1K
1000pF
0.1uF
C8903
C8932
10uF
25V
MVREFDQ
C8909
R8900
1K 1%
1%
R8904
1K
C8901
2
AGND
R8933
27K
NR8040T3R6N
VIN
OPT
L8905
3.6uH
LX_2
8
CIC21J501NE
D1.5V_DDR3
R8934
4.7K
D1.5V_DDR3
+3.3V_MEMC
IC8903
AOZ1072AI
1%
0.1uF
0.1uF
C8919
0.1uF
C8918
0.1uF
C8917
C8916
0.1uF
0.1uF
C8915
0.1uF
C8914
C8913
C8904
0.1uF
16V
10uF
C8902
10uF
10V
C8908
L8900
R2
AR8900
FRC_DQL[5]
DDR3_DQL[5]
FRC_DQL[7]
DDR3_DQL[7]
FRC_DQL[3]
DDR3_DQL[3]
FRC_DQL[1]
DDR3_DQL[1]
10
IC8900
H5TQ1G63BFR-12C
AR8901
DDR3_A[0-12]
M8
10
A1
DDR3_DQL[2]
FRC_DQL[6]
DDR3_DQL[6]
DDR3_DQL[4]
VREFDQ
A5
L8
ZQ
240
1%
10
AR8903
D9
FRC_DQU[1]
DDR3_DQU[1]
G7
FRC_DQU[5]
DDR3_DQU[5]
K2
FRC_DQU[3]
DDR3_DQU[3]
K8
10
N1
R8909
N9
DDR3_DMU
R1
10
R8910
A8
R9
VDD_1
A9
VDD_2
A10/AP
VDD_3
A11
VDD_4
A12/BC
VDD_5
A13
VDD_6
VDD_7
VDD_9
A8
C1
R8914
C9
DDR3_DML
10
D2
D1.5V_DDR3
R8911
FRC_DQSU
DDR3_DQSU
F1
H2
10
R8912
FRC_DQSUB
E9
H9
DDR3_DQSUB
VDDQ_2
FRC_DQU[6]
DDR3_DQU[6]
FRC_DQU[0]
DDR3_DQU[0]
FRC_DQU[4]
DDR3_DQU[4]
J9
L1
L9
T7
CK
VDDQ_4
CKE
VDDQ_5
CS
VDDQ_7
ODT
VDDQ_8
RAS
VDDQ_9
CAS
NC_2
B3
DDR3_A[3]
E1
FRC_A[5]
DDR3_A[5]
G8
DDR3_A[7]
J2
DDR3_RESETB
J8
10
M1
M9
P1
AR8905
P9
DDR3_CASB
T1
FRC_ODT
DDR3_ODT
T9
FRC_WEB
DDR3_WEB
R7
DDR3_A[11]
N7
DDR3_A[12]
DDR3_RASB
D1
D8
E2
E8
R8916
F9
DDR3_MCLK
10
R8917
G1
G9
DDR3_MCLKB
IN
N8
M3
K7
ADJ/GND
DDR3_BA1
DDR3_MCLK
K9
K1
J3
K3
L3
C8935
10uF
16V
DDR3_BA2
C8946
0.1uF
16V
C8938
22uF
R8929
56
DDR3_MCLKB
1%
DDR3_CKE
DDR3_ODT
DDR3_RASB
DDR3_CASB
DDR3_WEB
D1.5V_DDR3
R8923
10K
G3
VSS_2
DQSU
VSS_3
B7
E7
DML
D3
DMU
VSS_6
VSS_7
DQL0
VSS_8
DQL1
VSS_9
DQL2
VSS_10
DQL3
VSS_11
DQL4
VSS_12
DQL5
DDR3_DQSL
DDR3_DQSLB
DDR3_DQSU
DDR3_DQSUB
DDR3_DML
DDR3_DMU
E3
DDR3_DQL[0]
F7
DDR3_DQL[1]
F2
DDR3_DQL[2]
F8
DDR3_DQL[3]
H3
DDR3_DQL[4]
H8
DDR3_DQL[5]
G2
DDR3_DQL[6]
H7
DDR3_DQL[7]
D7
DDR3_DQU[0]
C3
DDR3_DQU[1]
C8
DDR3_DQU[2]
C2
DDR3_DQU[3]
A7
DDR3_DQU[4]
A2
DDR3_DQU[5]
B8
DDR3_DQU[6]
A3
DDR3_DQU[7]
DDR3_DQL[0-7]
URSA3 CORE 1.26V
DQL7
+12V
VSSQ_1
VSSQ_2
DQU0
VSSQ_3
DQU1
VSSQ_4
DQU2
VSSQ_5
DQU3
VSSQ_6
DQU4
VSSQ_7
DQU5
VSSQ_8
DQU6
VSSQ_9
DQU7
+1.26V_MEMC
IC8902
AOZ1072AI
PGND
1
8
2
7
L8904
3.6uH
LX_2
NR8040T3R6N
VIN
AGND
DDR3_DQU[0-7]
R8918
OUT
DDR3_BA0
10
C8931
10uF
25V
C8933
10uF
25V
3
2A
6
LX_1
EN
POWER_ON/OFF2_1
R8926
10K
FB
4
DDR3_CKE
FRC_CKE
1074 mA
T3
C7
VSS_5
IC8901
AP1117EG-13
DDR3_RESETB
DQL6
B9
10
FRC_MCLKB
DDR3_A[10]
F3
DQSL
DQSU
B1
R8915
FRC_MCLK
DDR3_A[9]
L7
T2
VSS_1
VSS_4
DDR3_A[8]
R3
+1.5V_MEMC
+3.3V_MEMC
RESET
NC_4
DDR3_BA0
10
FRC_RASB
DDR3_A[7]
T8
NC_3
NC_6
FRC_A[7]
FRC_BA0
R2
WE
NC_1
A9
FRC_CASB
DDR3_A[6]
DQSL
AR8906
FRC_DDR3_RESETB
DDR3_A[5]
R8
URSA3 DDR3 1.5V
L2
VDDQ_6
10
FRC_A[3]
DDR3_A[4]
P2
J7
CK
VDDQ_3
J1
DDR3_DQU[2]
P8
M2
BA0
VDDQ_1
10
AR8904
FRC_DQU[2]
DDR3_A[3]
BA2
A1
DDR3_DQSLB
10
DDR3_A[2]
N2
M7
BA1
R8913
P3
A15
VDD_8
DDR3_DQSL
10
FRC_DML
A6
A7
B2
DDR3_DQU[7]
FRC_DQSLB
A3
A4
R8921
FRC_DQU[7]
FRC_DQSL
A2
H1
DDR3_A[1]
5
COMP
R1
C8941
22uF
10V
C8943
0.1uF
16V
OPT
C8939
100pF
50V
6.2K
3300pF
R8924
C8936
10
1%
FRC_DQL[2]
FRC_DQL[4]
MVREFDQ
DDR3_A[0]
P7
R8930
3.3K
DDR3_DQL[0]
N3
1%
AR8902
FRC_DQL[0]
FRC_DMU
A0
R8936
1
VREFCA
R8931
3.9K
MVREFCA
1%
DDR3_BA2
270
R8927
DDR3_A[0]
FRC_BA2
L8903
CIC21J501NE
FRC_A[0]
L8901
DDR3_A[2]
150
DDR3_A[9]
FRC_A[2]
OPT
R8922
FRC_A[9]
DDR3_A[8]
DDR3_A[6]
FRC_A[4]
DDR3_A[4]
FRC_BA1
Vout=0.8*(1+R1/R2)
1%
R8932
12K
AR8908
FRC_A[8]
FRC_A[6]
R2
DDR3_BA1
10
AR8907
DDR3_A[10]
FRC_A[10]
DDR3_A[12]
FRC_A[12]
FRC_A[1]
DDR3_A[1]
DDR3_A[11]
FRC_A[11]
10
THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.
Copyright © 2010 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
COMMON
URSA3 DDR & Power
2009.09.11
89
LGE Internal Use Only
C9039
22pF
X9000
22pF
HIGH
FRC OPTION LOW
NON_MIRROR MIRROR
K14
GIP
NON_GIP
C9019
10uF
C9029
0.1uF
C9024
10uF
C9032
0.1uF
FRC_A[3]
G2
FRC_A[4]
R4
FRC_A[5]
G1
FRC_A[6]
U5
FRC_A[7]
F3
FRC_A[8]
T5
FRC_A[9]
F1
FRC_A[10]
R6
FRC_A[11]
R5
FRC_A[12]
U4
FRC_BA1
E1
FRC_BA2
C9005
0.1uF
C9020
10uF
C9025
10uF
C9030
0.1uF
C9033
0.1uF
C9034
0.1uF
C9035
0.1uF
FRC_MCLK
U2
T4
FRC_CKE
J1
H3
FRC_CASB
H1
FRC_WEB
L9001
CIC21J501NE
C9016
0.1uF
C9021
0.1uF
FRC_DDR3_RESETB
C9026
0.1uF
N2
N3
L9002
CIC21J501NE
C13
M14
REXT
RESET
SPI_DO
N13
N14
P13
N12
SPI_DI
SPI_CZ
SPI_CK
R8
U13
SOFT_RST_R
SOFT_RST_L
T9
T12
PLL_LOCK_R
PLL_LOCK_L
U9
R11
U10
U12
R12
OP_SYNC_R
OP_SYNC_L
LTD_DE_R
LTD_DE_L
LTD_DA1_R
LTD_DA1_L
U11
R10
T11
R9
LTD_DA0_R
D5
D4
E4
GPIO[9]
GPIO[8]
GPIO[10]
E13
F14
G13
H14
J13
K14
D3
GPIO[5]
GPIO[4]
GPIO[3]
GPIO[2]
GPIO[1]
GPIO[0]
XTALI
B9
XTALO
A9
RO4N
A5
B5
RO4P
RO3N
C6
RO3P
A7
C5
RO2N
RO2P
B7
RO1N
C7
C8
RO1P
RO0N
B8
A8
RO0P
ROCKN
B6
A6
ROCKP
RE4N
A1
RE4P
B1
C2
RE3N
RE3P
A3
B3
C1
RE2N
RE2P
RE1N
C4
C3
RE1P
RE0N
B4
A4
B2
URSA3_GIP URSA3_NON_GIP
R9053
R9052
4.7K
4.7K
DDR3_A10/DDR2_A11
A4P/RV5+
DDR3_A11/DDR2_A4
A4M/RV5-
K3
C9027
0.1uF
C9031
0.1uF
VDDC
L9003
CIC21J501NE
B0M/RV6-
DDR3_BA1/DDR2_ODT
B1P/RV7+
DDR3_BA2/DDR2_A12
B1M/RV7B2P/RV8+
DDR3_MCLK/DDR2_MCLK
B2M/RV8-
DDR3_MCLKZ/DDR2_MCLKZ
BCKP/WPWM
BCKM/OPT_P
B3P/OPT_N
DDR3_ODT/DDR2_BA1
B3M/FLK
DDR3_RASZ/DDR2_WEZ
B4P/GCLK6
DDR3_CASZ/DDR2_CKE
B4M/GLCK5
IC9001
R3
FRC_DQL[2]
K1
FRC_DQL[3]
T1
FRC_DQL[4]
J2
FRC_DQL[5]
T3
FRC_DQL[6]
J3
FRC_DQL[7]
T2
FRC_DQU[0]
P2
FRC_DQU[1]
L3
FRC_DQU[2]
R1
FRC_DQU[3]
L1
FRC_DQU[4]
P1
FRC_DQU[5]
L2
FRC_DQU[6]
P3
FRC_DQU[7]
M1
C0P/LV0+
C0M/LV0-
LGE7378A[FRC_TCON_URSA3]
DDR2_DQS0/DDR3_DQS0
C1P/LV1+
C1M/LV1C2P/LV2+
C2M/LV2-
URSA3
DDR2_DQSB0/DDR3_DQSB0
CCKP/LV3+
CCKM/LV3C3P/LV4+
DDR2_DQ7/DDR3_DQM0
C3M/LV4-
DDR2_DQ11/DDR3_DQM1
C4P/LV5+
DDR2_DQ6/DDR3_DQ0
D0P/LV6+
DDR2_DQ1/DDR3_DQ2
D0M/LV6-
DDR2_DQ2/DDR3_DQ3
D1P/LV7+
DDR2_DQ4/DDR3_DQ4
D1M/LV7-
DDR2_NC/DDR3_DQ5
D2P/LV8+
DDR2_DQ3/DDR3_DQ6
D2M/LV8-
DDR2_DQ5/DDR3_DQ7
DCKP/GOE
DCKM/GSC/GCLK3
DDR2_DQ8/DDR3_DQ8
D3P/GSP_R
DDR2_DQ14/DDR3_DQ9
D3M/GSP
DDR2_DQ13/DDR3_DQ10
D4P/SOE
DDR2_DQ12/DDR3_DQ11
D4M/POL
DDR2_DQ15/DDR3_DQ12
GCLK4
DDR2_DQ10/DDR3_DQ14
GCLK2
RXBCK+
A16
RXBCK-
A17
RXB3+
B17
RXB3-
C16
RXB4+
C17
RXB4RXA0+
D17
RXA0-
D15
RXA1+
E15
RXA1-
F16
RXA2+
F17
RXA2-
F15
RXACK+
G15
RXACK-
G17
RXA3+
G16
RXA3-
H16
RXA4+
H17
RXA4RXC0+
J15
RXC0-
J17
RXC1+
J16
RXC1-
K16
RXC2+
K17
RXC2-
K15
RXCCK+
L15
RXCCK-
L17
RXC3+
L16
RXC3-
M16
RXC4+
M17
RXC4RXD0+
N15
RXD0-
N17
RXD1+
N16
RXD1-
P15
RXD2+
R15
RXD2-
R17
RXDCK+
R16
RXDCK-
T16
RXD3+
T17
RXD3-
T15
RXD4+
U17
RXD4GCLK4
P17
GCLK2
D1
I2CS_SDA
URSA3_SDA
D2
I2CS_SCL
C9023
0.1uF
URSA3_SCL
P14
FRC_PWM1
B13
DVDD_DDR[1.26V]
LPLL_FBCLK
LPLL_OUTCLK
U16
A13
R9043
OPT
V_SYNC
0
VB1_TEST
TESTPIN
D11
+3.3V_MEMC
1K
F10
L13
D11
C11
B11
B12
C11
B12
B11
B10
A11
A12
B10
A12
A11
A10
VSS_27
A10
P6
VSS_26
VSS_25
N4
VSS_24
M9
L11
VSS_23
VSS_22
L10
VSS_20
VSS_19
VSS_21
L9
K11
K10
K9
VSS_18
VSS_16
VSS_17
K8
K7
J11
VSS_15
VSS_14
J10
VSS_12
VSS_11
VSS_13
J9
J8
J7
VSS_9
VSS_8
VSS_10
J4
H9
H11
H10
VSS_7
VSS_5
VSS_4
VSS_6
H8
H7
G10
VSS_3
G9
VSS_2
G8
C12
VSS_1
VDDP_5
C10
VDDP_4
VDDP_3
VDDP_2
K6
M11
M10
VDDP_1
K5
G11
VDDC_8
VDDC_7
J6
VDDC_6
H6
VDDC_4
VDDC_3
VDDC_5
H5
G7
G6
VDDC_2
G5
VDDC_1
F7
F6
E17
VDD_ODD
VDD_EVEN
LPLL_REFIN
E16
J5
AVDD_PLL_2
F12
F11
AVDD_PLL_1
AVDD_MEMPLL
M6
AVDD_LVDS_4
AVDD_LVDS_3
K12
J12
AVDD_LVDS_2
AVDD_LVDS_1
H12
F8
12505WS-04A00
G12
I2CM_SCL2_R
P9000
AVDD_DDR_6
I2CM_SDA2_R
AVDD_DDR_5
I2CM_SCL2_L
AVDD_DDR_4
P9
N10
I2CM_SDA2_L
AVDD_DDR_3
100
100
FRC_PWM0
R14
PWM1
I2CM_SCL
AVDD_1
R9015
R9016
I2CM_SDA
M8
R9014
N8
M7
P7
L8
D9
100
AVDD_DDR_2
100
100
L7
R9012
R9013
PWM0
L6
C9
AVDD_DDR_1
100
L5
R9011
AVDD_2
C9018
0.1uF
F9
C9015
0.1uF
B16
P16
DDR2_DQ9/DDR3_DQ13
DDR2_DQM0/DDR3_NC
C9012
0.1uF
RXB2-
M15
DDR2_DQ0/DDR3_DQ1
M2
C9008
10uF
RXB2+
B15
C4M/LV5-
DDR2_DQM1/DDR3_DQ15
FRC_DQU[0-7]
C9003
10uF
RXB1-
A15
H15
K2
FRC_DQL[1]
RXB1+
C15
D16
B0P/RV6+
DDR3_BA0/DDR2_BA2
R2
FRC_DQL[0-7]
+1.26V_MEMC
A3M/RV4-
DDR2_DQSB1/DDR3_DQSB1
FRC_DQL[0]
AVDD_DDR
C9022
0.1uF
DDR3_A9/DDR2_A9
DDR2_DQS1/DDR3_DQS1
FRC_DMU
C9017
0.1uF
A3P/RV4+
N1
FRC_DML
C9014
0.1uF
ACKM/RV3-
DDR3_A8/DDR2_A2
DDR3_RESET/DDR2_A3
FRC_DQSUB
C9011
0.1uF
ACKP/R3+
DDR3_A7/DDR2_A5
M3
FRC_DQSL
C9007
10uF
DDR3_A6/DDR2_A0
F2
FRC_DQSU
C9002
10uF
A2M/RV2-
DDR3_WEZ/DDR2_BA0
FRC_DQSLB
+1.5V_MEMC
A2P/RV2+
DDR3_A5/DDR2_A10
RXB0-
C14
1
22
R9003
URSA3_SDA
R9040
AVDD
22
R9007
AVDD_DDR
AVDD_LVDS
VDDC
AVDD_PLL
VDDP
0
SCL3_3.3V
3
R9008
GVDD_EVEN
22
SDA3_3.3V
4
OPT
5
URSA3_SCL
URSA3_SDA
22
R9009
OPT
22
R9010
SCL1_3.3V
SDA1_3.3V
FRC_CONF0
FRC_CONF1
AVDD_MEMPLL
FRC_PWM1
FRC_PWM0
1K
R9004
SCAN_BLK2
VDDC
L9007
CIC21J501NE
LD_SCAN
R9038
100
FRC_PWM1
LD_SCAN
R9039
100
FRC_PWM0
R9045
22
URSA3_SCL
GVDD_ODD
2
R9048
C9013
0.1uF
DDR3_A4/DDR2_CASZ
RXB0+
A14
R9050
C9010
0.1uF
A1M/RLV1-
H2
FRC_RASB
C9006
10uF
DDR3_A3/DDR2_A1
DDR3_CKE/DDR2_RASZ
FRC_ODT
VDDP
C9001
10uF
A1P/RV1+
U1
FRC_MCLKB
+3.3V_MEMC
A0M/RV0-
DDR3_A12/DDR2_A8
L9006
CIC21J501NE
C9000
10uF
DDR3_A2/DDR2_A7
B14
A0P/RV0+
G3
FRC_BA0
L9000
CIC21J501NE
T6
AVDD_LVDS
+3.3V_MEMC
DDR3_A1/DDR2_A6
R9049 OPT 1K
AVDD_MEMPLL
820
R9051 OPT 1K
+3.3V_MEMC
DDR3_A0/DDR2_NC
4
1K
C9009
0.1uF
E3
2
3
R9044
OPT
R9046
C9004
10uF
U6
FRC_A[2]
1
1K
L9005
CIC21J501NE
E2
FRC_A[1]
SW9000
JTP-1127WEM
R9047 OPT1K
+3.3V_MEMC
L9004
CIC21J501NE
FRC_A[0]
DPM_A
1K
AVDD
RE0P
A2
+3.3V_MEMC
RECKN
RECKP
FRC_A[0-12]
AVDD_PLL
+3.3V_MEMC
R9037
0
MINI_LVDS
FRC_CONF0
R9041
T10
DIO
EAN35097301
T14
5
4
URSA3_FLASH_WINBOND_OLD
LTD_CLK_L
GND
100
CLK
T13
6
S_M_PIF_FC
WP
HOLD
S_M_PIF_DA1
3
R9028
VCC
S_M_PIF_DA0
7
R13
8
2
U15
1
100
DO
U14
R9022
CS
URSA3_FLASH_MACRONIX
S_M_PIF_CS
FRC_SPI_CK
FRC_SPI_DI
S_M_PIF_CLK
10
EAN61009401
URSA3_LVDS URSA3_MINI_LVDS
R9036
R9035
4.7K
4.7K
R9006
100
T7
SI
R9027
100
IC9000-*2
W25X40VSSIG
T8
10
U7
R9005
M_S_PIF_FC
5
4
R9021
SCLK
M_S_PIF_CS
6
M_S_PIF_DA1
7
3
M_S_PIF_CLK_2
GND
2
U8
WP#
100
10K
URSA3_NON_MIRROR
R9034
4.7K
R9002
HOLD#
100
SO
100
R7
R9026
100
R9032
10
VCC
F4
R9001
8
1
D7
CS#
GPIO[13]
10
R9030 URSA3
0
FRC_SPI_DO
R9000
M_S_PIF_CLK_1
100
100
R9020
URSA3_FLASH_WINBOND_NEW
FRC_SPI_CZ
GPIO[14]
DI[IO0]
5
4
R9025
GPIO[12]
0.1uF
C9028
IC9000
MX25L4005CM2I-12G
100
CLK
R9019
GND
URSA3_MIRROR
R9033
4.7K
R9024
HOLD
FRC_CONF1
6
R9031
7
3
100
WP
H_CONV
2
R9018
DO[IO1]
+3.3V_MEMC
100
VCC
FRC_CONF0
8
URSA3_SCANNING_OFF URSA3_SCANNING_ON
R9055
R9054
4.7K
4.7K
R9023
100
1
LTD_DA0_L
R9017
IC9000-*1
W25X40BVSSIG
CS
FRC_SPI_CK
+3.3V_MEMC
100
R9042
NON_LD
FRC_RESET
SCAN_ON
LD
FRC_SPI_DO
SCAN_OFF
FRC_SPI_CZ
FRC_SPI_DI
1M
URSA3_LOCAL_DIMMING URSA3_NON_LOCAL_DIMMING
R9057
R9056
4.7K
4.7K
R9029
MINI_LVDS
LVDS
T10
R10
R9
U10
12MHz
LTD_CLK_R
LVDS_TX_0_DATA4_N
LVDS_TX_0_DATA4_P
LVDS_TX_0_DATA3_N
LVDS_TX_0_DATA3_P
LVDS_TX_0_DATA2_N
LVDS_TX_0_DATA2_P
LVDS_TX_0_DATA1_N
LVDS_TX_0_DATA1_P
LVDS_TX_0_DATA0_N
LVDS_TX_0_DATA0_P
LVDS_TX_0_CLK_N
LVDS_TX_0_CLK_P
LVDS_TX_1_DATA4_N
LVDS_TX_1_DATA3_N
LVDS_TX_1_DATA3_P
LVDS_TX_1_DATA4_P
LVDS_TX_1_DATA2_N
LVDS_TX_1_DATA2_P
LVDS_TX_1_DATA1_N
LVDS_TX_1_DATA0_P
LVDS_TX_1_DATA1_P
LVDS_TX_1_DATA0_N
LVDS_TX_1_CLK_N
LVDS_TX_1_CLK_P
Serial Flash
C9038
SCAN_BLK1/OPC_OUT
C9037
0.1uF
THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.
Copyright © 2010 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
COMMON
URSA3 (NO L.D.)
Separate DVDD_DDR Power
I2C ADR: GPIO1: HI:B8 LOW:B4
CHIP_CONF: {GPIO8, PWM1, PWM0}
CHIP_CONF= 3 d5: boot from internal SRAM
CHIP_CONF= 3 d6: boot from EEPROM
CHIP_CONF= 3 d7: boot from SPI Flash
C9036
10uF
2009.09.11
90
LGE Internal Use Only
[LEVEL Shift Block]
D9103
MMSD4148T1G
[POWER Block]
VCC_LCM
(+3.3V)
R9108
100
GIP
CHECK Value!!
R9156
150K
1%
TCON_42_FHD
R9165
18K
1%
OPT
To reduce
Audible noise
C9138
C9134
OPT
0.1uF
50V
To reduce
Audible noise
C9139
R9157
75K
1%
33K TCON_42_FHD
NON_GIP
DISCHG
R9148
510 NON_GIP
C9125
68pF
VDD_LCM
(+16V)
C9126 0.047uF
VGH_FB
AGND
CRST
PGOOD
COMP
FB1
SW0
SW1
LX1
LX1
PGND
40
39
38
37
36
35
34
33
32
31
EN2
28
VL
4
27
DEL2
NON_GIP
FBP
GPGND
IC9103
26
EN1
6
MAX17113ETL+
MINI_LVDS
25
FSEL
24
VIN
DEV
23
IN2
22
IN2
EAN60924401
21
OUT
7
8
9
10
11K
1%
TCON_42_FHD
R9148-*1
R9133-*1 R9134-*1
200
200
NON_GIP NON_GIP
GCLK2_I
0
GIP
R9155-*1
GOE/GCLK1_I
R9158
0
GIP
0
GIP
CLK2
VGL
(-5V)
R9114 R9115
OPT
10
OPT
GIP
C9107
1uF
50V
GIP
R9116
10
GIP
VGL_FB
R9111
10
GIP
VCC_LCM
(+3.3V)
C9123
1uF
10V
REF
R9135
3.6K
VGH
(+25V)
TCON_42_FHD
R9144 1%
C9118
10uF
16V
27K
VGL
(-5V)
VGL_FB
R9145
360
R9171
R9194
0
360
OPT
C9147
1uF
50V
R9173
1K
C9152
1uF
10V
PANEL_VCC
(+12V)
C9155
22uF
25V
C9162
22uF
25V
R9174
OPT
C9124
1uF
50V
R9149
0
OPT
R9151
0
C9127
C
150K
TCON_42_FHD
AC
A
C9137
0.1uF
50V
GIP
0.1uF
50V
L9101
22UH
2.8A
D9105
MBRA340T3G
40V
C9151
0.1uF
50V
C9149
22uF
10V
C9146
150pF
50V
C9154
OPT
R9181
5.1K
C9137-*1
2200pF
50V
NON_GIP
D9102
KDS226
1%
C9140
REF
R9110
22
GIP
C9104
1uF
50V
GIP
R9180
VCC_LCM
(+3.3V)
FLK
R9105
22
GIP
PANEL_VCC
(+12V)
R9167
0
NON_GIP
CLK1
C9101 VGH
0.22uF
(+25V)
50V
GIP
560pF
50V
NON_GIP
C9143
0.1uF
50V
C9144
0.1uF
50V
R9131
1/8W
C9145-*1
1000pF
50V
GIP
EN2
5
20
220K 1%
TCON_42_FHD
Value should
be checked
VGH_FB
29
3
LX2
R9133 R9134
10
10
GIP
GIP
2
GND2
19
56K 1%
TCON_42_FHD
R9130
DRVP
SRC
0 GIP
GON
0 GIP
R9155
DRN
510 NON_GIP MODE
NON_GIP
DLP
LX2
R9154
R9150
18
0.47uF
25V
BST
AC
17
A
FB2
C9117
1uF
50V
PGND
16
C9122
C
0
30
DEL1
C9116
1uF
50V
1
15
CLK4
CLK3
R9129
THR
R9153
0
NON_GIP
9.1K
C9148
22uF
25V
2.8A
C9145
2.2
REF
18K
Y2
Y1
GON2
GOFF
A1
A2
18K
CLK5
MINI_LVDS
C9112
4.7uF
50V
10K
GIP
14
Y3
R9124 R9125
1000pF
50V
GIP
R9182
L9102
22UH
R9169
FBN
15
CLK6
14
EAN60987201
13
16
7
12
DEV
A3
11
6
Y4
8
A4
VST
R9168
13
17
Y5
MBRA340T3G
12
Y6
D9101
KDS226
R9132
MBRA340T3G
D9104
11
18
EN2
100V
OPT
4.7uF/50V(3216)
D9106
CTL
19
Y7
VDD_ODD
VDD_EVEN
TH9000
Y8
47k-ohm
5
GIP
Y9
20
C9128
R9147
VGH
2.7K
NON_GIP (+25V)
VGH_M
R9152
0
(+25V)
NON_GIP
R9147-*1
0
GIP
D9100
MMSD4148T1G
VGH
(+25V)
GIP
NCP18WB473F10RB
GND
RE
IC9101
MAX17119DS
21
C9136
C9153
100uF
25V
C9150
1uF
50V
C9142
1uF
50V
C9141
47uF
25V
1uF 50V
27pF 50V
NON_GIP
R9146
33K
NON_GIP
YDCHG
22
23
FLK3
4
10
GCLK4_I
GSC/GCLK3_I
FLK2
3
A6
A5
GCLK5_I
FLK1
A7
9
GCLK6_I
THERMAL
29
GON1
GSP/GVST_I
24
2
25
1
A8
26
A9
27
28
GVDD_ODD_I
GVDD_EVEN_I
C9128-*1
470pF
50V
NON_GIP
R9113
10K
GIP
VSENSE
EP[VGOFF]
VDD_LCM
(+16V)
R9166
15K
1%
TCON_42_FHD
AGND
FLK
R9168-*1
C9135
OPT
DRVN
R9109
3K
GIP
C9102
OPT
OPT
VDD_LCM
(+16V)
EN2
100V
* Voltage Target
VDD_LCM =
16.25V
VGH
=
28.50V
VGL
=
-5.35V
1uF
50V
R9170
DPM
EN2
10
[P-GAMMA Block]
R9172
GMA16
SCL3_3.3V
GMA15
1K
VDD_LCM
(+16V)
Signal Name Change
R9103
33
R9118
10K
OPT
3
EN
4
SW_1
SW_2
PG
13
14
16
VIN_2
DEV
IC9102
12
GND_2
11
GND_1
TPS62110RSAR 10
MINI_LVDS
9
R9196
R9123
1M
NON_GIP
0
C9114
22uF
16V
C9115
10uF
16V
R9193
6.2K
OPT
R9161
0
R9195
6.2K
OPT
FB
AGND
0
R9162
0
TCON_42_FHD
P9100
VCOM_FB0
12505WS-03A00
R9141
0
2
SDA3_3.3V
3
VCOMR
0
R9179
DPM
C9160
15pF
50V
OPT
POL
0
R9164
0
C9120
15pF
50V
GVDD_EVEN
GVDD_EVEN_I
GIP
C9133
15pF
50V
R9120
7.5K
OPT
R9138
R9107
DPM_A
0
R9137
1K
R9106
GVDD_ODD_I
C9132
15pF
50V
TCON_42_FHD
4
C9159
15pF
50V
OPT
R9163
0
GVDD_ODD
R9119
20K
R9102
GCLK6_I
GIP
VGL_I
0
OPT
RXD4SCL3_3.3V
R9178
0
R9142
PANEL_VCC
1
C9158
15pF
50V
RXA4+
C9131
15pF
50V
NON_GIP
C9111
1uF
50V
MMSD4148T1G
GIP
OPT
GSC/GCLK3_I
RXDCK-
VGL
(-5V)
R9128
200K
TCON_42_FHD
GCLK5_I
RXA4-
VGI_N
R2
R9127
150K
GOE/GCLK1_I
C9130
15pF
50V
NON_GIP
R9140
GIP
EAN60985901
R9177
0
RXDCK+
VGL
(-5V)
R9122
10
100V
C9157
15pF
50V
R9197
3.3K
NON_GIP
VGI_P
GIP
GIP
D9107
GCLK4_I
GIP
OPT
R9139
Vo = 1.153*(1+R1/R2)
24K
GCLK4
VCC_LCM
(+3.3V)
DISCHG
EN2
OPT
R9176
0
GSP_R
8
C9110
1uF
25V
R9160
0
C9156
15pF
50V
NON_GIP
R1
C9113
R9126
510K
22pF
TCON_42_FHD 50V
VINA
47K
OPT
2
7
R9117
1
VIN_1
LBI
C9105
0.1uF
50V
PGND_1
6
VDD_LCM
(+16V)
C9109
10uF
25V
15
PGND_2
R9121
0
GIP
GCLK2_I
C9129
15pF
50V
NON_GIP
RXD3+
VGH
(+25V)
5
C9108
10uF
25V
For P-Gamma Data Download
1%
GCLK2
GIP
MINI_LVDS
LBO
VCOM_FB
AVDD_AMP
C9103
0.1uF
50V
GSP/GVST_I
RXD3-
C9119
15pF
50V
NON_GIP
HVDD
DEV
10uF/25V(3216) MINI_LVDS
MINI_LVDS
1%
R9101
1K
OPT
GMA4
VCOMLFB
VCOMRFB
GMA2
GMA7
GMA6
GMA3
R9104
1K
TCON_42_FHD
VCOM_FB0
11
PANEL_VCC
(+12V)
GMA12
SYNC
DEV
GMA3
6.8uH/1.8A
(6x6x2mm)
L9100
6.8uH
BLM18PG121SN1D
L9103
5
12
VDD_LCM
(+16V)
GMA13
OPT
NC_2
AVDD_2
16
17
GMA8
GMA7
18
GMA4
MINI_LVDS
FLK
10 NON_GIP
10
VCOM
GMA5
IC9100
13
MAX9668ETP+
9
4
GMA6
14
R9175
0
R9159
0
R9136
RXA3-
MINI_LVDS
GMA1
3
AGND_AMP
R9143
3.3K
GIP
10
1/8W
1uF
50V
15
THERMAL
21
NC_1
DVDD
19
2
6
VCOM
1
A0
8
C9100
0.1uF
50V
SDA
7
33
AVDD_1
R9100
SCL
EP[GND]
SDA3_3.3V
R9112
C9106
20
VCC_LCM
(+3.3V)
1uF/50V(2012)
VCC_LCM
(+3.3V)
[HVDD Block]
To reduce
Audible noise
BLM18PG121SN1D
L9104
Slave Address : 0xE8h
(AO Pin - GND)
SOE
RXD4+
0
C9121
15pF
50V
VCOML
VCOM
0
THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.
Copyright © 2010 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
COMMON
T-Con (NO L.D.)
09/09/10
91
LGE Internal Use Only
32_FHD
VGH
R9129-*1
22K
1%
TCON_32_FHD
VGL
R9130-*1
220K
1%
TCON_32_FHD
R9131-*1
11K
1%
TCON_32_FHD
VDD
R9156-*1
150K
1%
TCON_32_FHD
R9157-*1
27K
1%
TCON_32_FHD
VGH
R9144-*1
51K
1%
TCON_32_FHD
R9129-*2
47K
1%
TCON_37_FHD
R9145-*1
270K
1%
TCON_32_FHD
R9131-*2
12K
1%
TCON_37_FHD
R9166-*1
24K
1%
TCON_32_FHD
R9126-*1
510K
1%
TCON_32_FHD
R9127-*1
150K
1%
TCON_32_FHD
R9128-*1
200K
1%
TCON_32_FHD
91 or 95
Sheet
VDD
HVDD
R9156-*2
910K
1%
TCON_37_FHD
R9165-*2
470K
1%
TCON_37_FHD
R9157-*2
56K
1%
TCON_37_FHD
R9166-*2
56K
1%
TCON_37_FHD
R9126-*2
470K
1%
TCON_37_FHD
R9128 OPEN
R9127-*2
91K
1%
TCON_37_FHD
91 or 95
Sheet
HVDD
91 or 95
Sheet
VCOM FEED BACK
R9104-*2
1K
1%
TCON_37_FHD
91 or 95
Sheet
55_FHD
VGL
R9130-*3
220K
1%
TCON_47_FHD
R9131-*3
11K
1%
TCON_47_FHD
VDD
VGH
R9144-*3
51K
1%
TCON_47_FHD
R9129-*4
510K
1%
TCON_55_FHD
R9145-*3
270K
1%
TCON_47_FHD
R9131-*4
27K
1%
TCON_55_FHD
HVDD
R9165 OPEN
R9166-*3
20K
1%
TCON_47_FHD
R9127-*3
150K
1%
TCON_47_FHD
R9156-*4
150K
1%
TCON_55_FHD
R9128-*3
220K
1%
TCON_47_FHD
R9104-*3
1K
1%
TCON_47_FHD
R9102-*3
1K
1%
TCON_47_FHD
THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.
Copyright © 2010 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
VGL
R9130-*4
68K
1%
TCON_55_FHD
R9157-*4
75K
1%
TCON_55_FHD
R9144-*4
27K
1%
TCON_55_FHD
R9145-*4
150K
1%
TCON_55_FHD
HVDD
VDD
R9126-*3
510K
1%
TCON_47_FHD
VCOM FEED BACK
R9101-*3
1K
1%
TCON_47_FHD
VGL
TCON_37_FHD
R9102-*2
1.5K
5%
TCON_37_FHD
VGH
R9157-*3
75K
1%
TCON_47_FHD
91 or 95
Sheet
R9144-*2
20K
1%
TCON_37_FHD
R9145-*2
150K
1%
R9101-*2
1K
1%
TCON_37_FHD
R9104-*1
1K
1%
TCON_32_FHD
47_FHD
R9156-*3
180K
1%
TCON_47_FHD
R9130-*2
220K
1%
TCON_37_FHD
VCOM FEED BACK
R9102-*1
1K
1%
TCON_32_FHD
R9129-*3
51K
1%
TCON_47_FHD
VGH
VGL
VDD
HVDD
R9165 OPEN
VCOM FEED BACK
R9101-*1
1K
1%
TCON_32_FHD
42_FHD
37_FHD
R9165 OPEN
R9166-*4
15K
1%
TCON_55_FHD
R9126-*4
180K
1%
TCON_55_FHD
R9127-*4
68K
1%
TCON_55_FHD
R9128-*4
56K
1%
TCON_55_FHD
VCOM FEED BACK
R9101 OPEN
R9104 OPEN
R9102-*4
0
5%
TCON_55_FHD
Common
T-Con Power Option
09/12/15
98
LGE Internal Use Only