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SAM4E-EK User Guide
SAM4E-EK Evaluation Kit
42067B−SAM4E−04/2013
Table of Contents
1. Introduction .......................................................................................... 3 1.1 Scope ….. .......................................................................................................... 3 1.2 User guide ......................................................................................................... 3 1.3 References and applicable documents ............................................................. 3 2. Kit Contents ......................................................................................... 4 2.1 Deliverables ...................................................................................................... 4 2.2 Electrostatic warning ......................................................................................... 5 3. Power Up ............................................................................................. 6 3.1 Power up the board ........................................................................................... 6 3.2 Source code and technical support ................................................................... 6 4. Board Description ................................................................................ 7 4.1 Board overview ................................................................................................. 7 4.2 Features list ...................................................................................................... 8 4.3 Function blocks ................................................................................................. 9 4.3.1 Processor............................................................................................ 9 4.3.2 Memory …. ......................................................................................... 9 4.3.3 Clock circuitry ................................................................................... 10 4.3.4 Reset circuitry ................................................................................... 10 4.3.5 Power supply and management ....................................................... 11 4.3.6 UART ….. ......................................................................................... 12 4.3.7 USART ….......................................................................................... 12 4.3.8 RS485 …… ...................................................................................... 13 4.3.9 Ethernet MAC 10/100 (EMAC).......................................................... 13 4.3.10 CAN …….......................................................................................... 14 4.3.11 Display interface ............................................................................... 14 4.3.11.1 LCD module .................................................................... 14 4.3.11.2 Backlight control.............................................................. 15 4.3.12 Touch screen interface ..................................................................... 16 4.3.13 JTAG/ICE.......................................................................................... 16 4.3.14 Audio Interface .................................................................................. 17 4.3.15 USB device ....................................................................................... 17 4.3.16 Analog interface ................................................................................ 18 4.3.16.1 Analog reference............................................................. 18 4.3.16.2 Analog input .................................................................... 18 4.3.16.3 Analog output .................................................................. 19 4.3.17 QTouch elements ............................................................................. 20 4.3.18 LEDs …….......................................................................................... 20 4.3.19 SD/MMC card ................................................................................... 21 4.3.20 ZigBee ……. ..................................................................................... 21 4.3.21 PIO expansion .................................................................................. 21 5. Configuration ...................................................................................... 23 5.1 PIO usage ....................................................................................................... 23 5.2 Jumpers .......................................................................................................... 26 6. Schematics ........................................................................................ 27 7. Revision History ................................................................................. 36 SAM4E-EK User Guide
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1.
Introduction
1.1
Scope
This user guide introduces the SAM4E-EK Evaluation Kit (SAM4E-EK) and describes its development and debugging
capabilities.
Figure 1-1. Atmel SAM4E-EK board.
1.2
User guide
This guide gives details on how the Atmel® SAM4E-EK has been designed. It is made up of six chapters:
•
•
•
•
•
•
1.3
Chapter 1 includes references, applicable documents, acronyms and abbreviations
Chapter 2 describes the kit contents, its main features
Chapter 3 provides instructions to power up the SAM4E-EK and describes how to use it
Chapter 4 describes the hardware resources including default jumper and switch settings and the schematics
Chapter 5 provides all the board schematics
Chapter 6 provides troubleshooting instructions
References and applicable documents
Table 1-1.
References and applicable documents.
Reference
Title
Comment
Lit. no.: 11157
SAM4E datasheet
www.atmel.com
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2.
Kit Contents
2.1
Deliverables
The Atmel SAM4E-EK toolkit contains the following items:
•
•
•
•
•
•
•
An Atmel SAM4E-EK board
Power supply
Universal input AC/DC power supply with US, Europe and UK plug adapters
One USB cable
One serial RS232 cable
One Ethernet cross cable
A welcome letter
Figure 2-1. Unpacked SAM4E-EK.
Unpack and inspect the kit carefully. Contact your local Atmel distributor if you have issues concerning the contents of
the kit.
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2.2
Electrostatic warning
The Atmel SAM4E-EK board is shipped in a protective anti-static bag. The board must not be subjected to high
electrostatic potentials. A grounding strap or similar protective device should be worn when handling the board. Avoid
touching the components or any other metallic element of the board.
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3.
Power Up
3.1
Power up the board
Unpack the board taking care to avoid electrostatic discharge. Unpack the power supply, select the right power plug
adapter corresponding to that of your country, and insert it into the power supply.
Connect the power supply DC connector to the board and plug the power supply to an AC power socket.
The board LCD should light up and display a welcome page. Then click or touch the icons displayed on the screen and
enjoy the demo.
3.2
Source code and technical support
After boot up, you can run some sample code or your own application on the development kit. You can download
sample code and get technical support from the Atmel web site: http://www.atmel.com.
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4.
Board Description
4.1
Board overview
This chapter introduces the Atmel SAM4E-EK Evaluation Kit design. It introduces system-level concepts, such as power
distribution, memory, and interface assignments.
The SAM4E-EK board is based on the integration of an ARM® Cortex™-M4 processor with on-board NAND Flash and a
set of popular peripherals. It is designed to provide a high performance processor evaluation solution with high flexibility
for various kinds of applications.
Figure 4-1. SAM4E-EK block diagram.
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4.2
Features list
The list of the main board components and interfaces:
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
SAM4E16 chip BGA144 package with optional socket footprint
12MHz crystal
32.768kHz crystal
Optional SMB connector for external system clock input
NAND Flash
2.8 inch TFT color LCD display with touch panel and backlight
UART port with RS232 driver
USART port with RS232 driver multiplexed with RS485 function with driver
CAN port with driver
Mono/stereo headphone jack output
One Ethernet physical transceiver layer with RJ45 connector
SD/MMC interface
Reset button: NRST
User buttons: WAKU, TAMP, Scroll-up, Scroll-down
QTouch® buttons: Left, Right and Slider
Full Speed USB device port
JTAG/ICE port
On-board power regulation
Three user LEDs
Power LED
BNC connector for ADC input
BNC connector for DAC output
User potentiometer connected to the ADC input
ZigBee® connector
PIO connection interfaces (PIOA, PIOC and PIOD with 32-bit, PIOB with 16-bit, PIOE with 6-bit)
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4.3
Function blocks
4.3.1
Processor
The Atmel SAM4E-EK is equipped with a SAM4E16 device in BGA144 package.
4.3.2
Memory
The SAM4E16 chip embeds:
•
•
•
1024kB of embedded Flash
128kB of embedded SRAM
16kB of ROM with embedded boot loader routines (UART, USB) and In-Application Programming functions
(IAP) routines
The SAM4E16 features an External Bus Interface (EBI) that permits interfacing to a broad range of external memories
and virtually to any parallel peripheral.
The SAM4E-EK board is equipped with one NAND Flash MT29F2G08ABAEA on the EBI. This can change to other type
of flash by setting the Static Memory Controller.
Figure 4-2. NAND-Flash.
+3V3
R125
47K
+3V3
NAND FLASH
R126
47K
16
17
8
18
PC17
PC16
PC9
PC10
J37-2
9
PC14
PC18 R131
+3V3
R132
7
19
0R
47K
R133
DNP
1
2
3
4
5
6
10
11
14
15
20
21
22
23
24
25
26
MN10
MT29F2G08ABAEA
CLE
ALE
RE
WE
CE
R/B
WP
N.C1
N.C2
N.C3
N.C4
N.C5
N.C6
N.C7
N.C8
N.C9
N.C10
N.C11
N.C12
N.C13
N.C14
N.C15
N.C16
N.C17
I/O0
I/O1
I/O2
I/O3
I/O4
I/O5
I/O6
I/O7
N.C28
N.C27
N.C26
N.C25
N.C24
N.C23
PRE
N.C22
N.C21
N.C20
N.C19
N.C18
VCC
VCC
VSS
VSS
29
30
31
32
41
42
43
44
PC0
PC1
PC2
PC3
PC4
PC5
PC6
PC7
48
47
46
45
40
39
38
35
34
33
28
27
+3V3
37
12
36
13
C93
100nF
C92
100nF
C94
1uF
NCS0 chip select signal is used for NAND Flash chip selection. Furthermore, a dedicated jumper can disconnect it from
the on-board memories, thereby letting NCS0 free for other custom purposes.
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4.3.3
Clock circuitry
The clock generator of a SAM4E16 microcontroller is composed of:
•
•
•
A low-power 32.768Hz Slow Clock Oscillator with bypass mode
•
•
A 80 to 240MHz PLL (PLLB) providing a clock for the USB Full Speed Controller
A 3 to 20MHz Crystal Oscillator, which can be bypassed (12MHz needed in case of USB)
A factory programmed fast internal RC Oscillator. Three output frequencies can be selected: 4 (default value),
8 or 12MHz
An 80 to 240MHz programmable PLL (PLLA), capable to provide the clock MCK to the processor and to the
peripherals. The input frequency of PLLA is from 3 to 32MHz
The SAM4E-EK board is equipped with one 12MHz crystal, optional Piezoelectric Ceramic Resonator 12MHz (Murata
ref. CSTCE12M0G15L99-R0), one 32.768Hz crystal and an external clock input connector.
Figure 4-3. External clock source.
C22
18pF
R3
Y1
C27
0R
PA7
32.768 kHz
18pF
R4
0R
PA8
J2
SMB
2
4
1
3
5
R5
DNP
R6
49.9R 1%
R7
DNP
15pF
R8
0R
PB9
0R
PB8
3
4
Y2
2
C31
R12
4.3.4
2
3
1
1
C28
15pF
Y3
12MHz
R11
DNP
Reset circuitry
On-board NRST button BP1 provides an external reset control of the SAM4E16.
The NRST pin is bidirectional. It is handled by the on-chip reset controller. It can be driven low to provide a reset signal
out to the external components. Conversely, it can be asserted low from the outside to reset the microcontroller Core
and the peripherals. The NRST pin integrates a permanent pull-up resistor of 100kΩ to VDDIO.
On the SAM4E-EK board, the NRST signal is connected to the LCD module and JTAG port.
Note:
At power-on, the NRST signal is asserted with default duration of two clock cycles. That duration may not be
sufficient to correctly reset any other system or board devices connected to that signal. First, in your custom
application, you need to check for these device’s datasheets about reset duration requirements. Then, you need to
set an appropriate configuration in the NRST Manager. This is done through the ERSTL field in the RSTC_MR
register. The NRST duration is thereby configurable between 60μs and 2s, whether it is subsequently activated by
a software reset or a user reset. Refer to the SAM4E16 datasheet for in-depth information.
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Power supply and management
The Atmel SAM4E-EK board is supplied with an external 5V DC block through input J1. It is protected by a PolyZen
diode (MN2) and an LC combinatory filter (MN3). The PolyZen is used in the event of an incorrect power supply
connection.
The adjustable LDO regulator MN4 is used for the 3.3V rail main supply. It powers all the 3.3V components on the
board.
Figure 4-4. Power block.
J1
MN2
Power Jack 2.1mm
ZEN056V130A24LS
1
1
3
2
1
MN3
BNX002-01
2
C23
100nF
2
3
+ C24
22uF
SV
CV
SG CG1
CG2
CG3
+5V
3
4
5
6
+ C25
22uF
+ C26
220uF-ELE-16V
MN4
MIC29302
SD
VOUT
GND2
1
VIN
GND1
2
ADJ
+3V3
4
5
R9
169K 1%
+ C29
C30
100uF-TAN-6.3V 100nF
6
+5V
3
4.3.5
R10
102K 1%
The SAM4E16 product has different types of power supply pins:
•
VDDIN pin:
Power for the internal voltage regulator, ADC, DAC, and analog comparator power supplies.
The voltage ranges from 1.6V to 3.6V.
•
VDDIO pins:
Power for the Peripherals I/O lines.
The voltage ranges from 1.62V to 3.6V.
•
VDDOUT pin:
Output of the internal voltage regulator.
•
VDDCORE pins:
Power for the core, including the processor, embedded memories, and peripherals.
The voltage ranges from 1.08V to 1.32V.
•
VDDPLL pin:
Power for the PLL A, PLL B and 12MHz oscillator.
The voltage ranges from 1.08V to 1.32V.
Note: VDDPLL should be decoupled and filtered from VDDCORE.
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4.3.6
UART
The Universal Asynchronous Receiver Transmitter features a two-pin UART that can be used for communication and
trace purposes. It offers an ideal channel for in-situ programming solutions. This UART is associated with two PDC
channels to reduce the processor time on packet handling.
This two-pin UART (TXD and RXD only) is buffered through an RS232 Transceiver MN6 and brought to the DB9 male
connector J7.
Figure 4-5. UART.
DBGU
MN7
ADM3202
16
C54
100nF
+3V3
+3V3
R58
100K
PA10
PA9
6
C56
100nF
R59
100K
R60
0R
R62
0R
TP4
15
11
12
10
9
C1+
V+
C1-
V-
C2+
GND
1
4
J7
1
6
2
7
3
8
4
9
5
C57
100nF
5
C2-
T1IN
R1OUT
T2IN
R2OUT
C53
100nF
3
14
13
7
8
T1OUT
R1IN
T2OUT
R2IN
TP5
10
UTXD0
URXD0
2
C55
100nF
VCC
11
+3V3
FGND
USART
The Universal Synchronous/Asynchronous Receiver Transmitter (USART) provides one full duplex universal
synchronous/asynchronous serial link. The data frame format is extensively configurable (data length, parity, number of
stop bits) to support a broad range of serial communication standards. The USART is also associated with PDC
channels for TX/RX data access.
To avoid any electrical conflict, the RS232 and RS485 transceiver are isolated from the receiving line PA21.
•
•
Chose RS485 channel: Close 1-2 pins on JP11 and set PA23 to high level
Chose RS232 channel: Close 2-3 pins on JP11 and set PA23 to low level
Figure 4-6. USART.
USART1
C45
100nF
C44
100nF
1
21
C48
100nF
R38
47K
+3V3
TXD1
RXD1
RTS1
CTS1
23
19
PA23
R37
0R
5
PA22
PA21_232
PA24
PA25
R39
R40
R41
R42
R43
0R
0R
0R
0R
47K
7
10
8
11
9
12
+3V3
VCC
C1+
V+
C1C2+
V-
GND
C2C3+
6
C46
100nF
20
2
C47
100nF
4
24
J5
EN
T1IN
R1OUT
T2IN
R2OUT
T3IN
R3OUT
C3T1OUT
R1IN
T2OUT
R2IN
T3OUT
R3IN
22
18
15
17
14
16
13
1
6
2
7
3
8
4
9
5
C49
100nF
SD
R44
0R
PA21_485
FGND
JP11
2
PA21
PA21_232
11
C43
4.7uF
MN5
ADM3312EARU
10
3
1
+3V3
3
4.3.7
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4.3.8
RS485
As noticed above the USART1 is shared with the RS485 port, connected to the transceiver MN6 and output to the 3point connector J6. The design includes selectable jumpers for RS485 bus termination resistors selection (JP10, JP12,
and JP13).
Figure 4-7. RS485.
+3V3
+3V3
RS 485
R46
10K
RXD1
PA21_485
CTS1
RTS1
TXD1
1
R47
0R
PA25
R48
0R
2
PA24
R49
0R
3
PA22
R50
0R
4
R45
DNP
MN6
ADM3485ARZ
RO
VCC
RE
GND
JP10
+3V3
8
C52
100nF
5
1
DE
J6
2
DI
6
7
A
B
3
R51
120R
JP12
JP13
FGND
DNP
R52
Ethernet MAC 10/100 (EMAC)
The EMAC module implements a 10/100 Ethernet MAC compatible with the IEEE® 802.3 standard using an address
checker, statistics and control registers, receive and transmit blocks, and a DMA interface.
The Atmel SAM4E-EK is equipped with a MICREL KSZ8051MNL 10/100 Mbps Fast Ethernet Physical Layer
transceiver. It contains the entire physical layer functions of 100BASE-TX as defined by IEEE 802.3u.
The Ethernet interface provides MII for 100Base-TX or 10Base-TX. The MII interfaces are capable of both 10Mb/s and
100Mb/s data rates as described in the IEEE 802.3u standard. The Ethernet interface integrates an RJ45 connector
with an embedded transformer, and two status LEDs.
Figure 4-8. Ethernet block.
GND_ETH
PD[0..31]
PD14
PD0
PD1
PD16
PD15
PD3
PD2
PD12
PD11
PD6
PD5
PD7
PD4
PD10
PD13
E1_RXCK
E1_TXCK
E1_TXEN
E1_TX3
E1_TX2
E1_TX1
E1_TX0
E1_RX3
E1_RX2
E1_RX1
E1_RX0
E1_RXER
E1_RXDV
E1_CRS
E1_COL
R84
R85
R86
R87
R88
R89
R90
R91
R92
R93
R94
R96
R98
R99
R100
19
22
23
27
26
25
24
13
14
15
16
20
18
29
28
RXC
TXC
TXEN
TXD3
TXD2
TXD1
TXD0
RXD3
RXD2
RXD1
RXD0
RXER
RXDV
CRS
COL
22R
22R
22R
22R
22R
22R
22R
22R
22R
22R
22R
22R
22R
22R
22R
C76
100nF
MN9
RXC/B-CAST_OFF
TXC
TXEN
TXD3
TXD2
TXD1
TXD0
RXD3/PHY AD0
RXD2/PHY AD1
RXD1/PHY AD2
RXD0/DUPLEX
RXER/ISO
RXDV/CONFIG2
CRS/CONFIG1
COL/CONFIG0
TXP
+3V3
22R
22R
22R
+3V3
8
7
6
5
E1_MDC R103
E1_MDIO R104
INT_ETH1 R105
8
7
6
5
PD8
PD9
PD28
4.7K
4.7K
L5
220ohm at 100MHz
1
2
RR4
4.7k
12
11
21
E1_AVDDT
3
C81
10uF
1
2
3
4
RR3
4.7k
R101
R102
+3V3
C82
TXM
RXP
RXM
GND
PADDLE
MDC
MDIO
INTRP/NAND
6
TXM
2 TD-
TX-
2
RXP
3 RD+
RX+
3
4
RXM
RX-
6
VDDIO
2
1
33
C77
2.2uF
C79
100nF
C78
100nF
10
LED0/NWAY EN
LED1/SPEED
32
7 NC
8
R106
R110
6.49K
470R
8
ETH1_XO
9
ETH1_XI
R107
4.7K
R108
4.7K
1nF
470R
4
5
75
R109
7
8
FGND
9
10
12
11
30
31
RESET
FGND
RJ45 ETHERNET CONNECTOR
4
2
R112
ETH1_XI
22pF
1
C85
0R
3
At the De-Assertion of Reset:
PHY ADD[2:0]:001
CONFIG[2:0]:000,Mode:MII
Duplex Mode:Half Duplex
Isolate Mode:Disable
Speed Mode:100Mbps
Nw ay Auto-Negotiation:Enable
0R
75
+3V3
GND_ETH
ETH PHY
FGND
75 75
100nF
NRST
R111
5 CT
6 RD-
VDDA_3V3
XI
1
5
+3V3
REXT
TX+
4 CT
13
14
C83
10uF
VDD_1V2
XO
C84
J20
J00-0061
1 TD+
TXP
CT_RX
100nF
17
7
CT_TX
KSZ8051MNL
1
2
3
4
4.3.9
Y4
25MHz
GND_ETH
C86
22pF
ETH1_XO
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4.3.10 CAN
The CAN controller provides all the features required to implement the serial communication protocol CAN defined by
Robert Bosch GmbH, the CAN specification as referred to by ISO/11898A (2.0 Part A and 2.0 Part B) for high speeds
and ISO/11519-2 for low speeds. The CAN Controller is able to handle all types of frames (Data, Remote, Error and
Overload) and achieves a bit rate of 1Mbit/sec.
The Atmel SAM4E has two CAN Controller with eight Mailboxes.
SAM4E-EK connects the CAN0 and CAN1 bus to the CAN transceiver SN65HVD234 (MN11 and MN12).
The extension connector (J13 and J14) type is RJ12 female socket.
Figure 4-9. CAN block.
+3V3
R134
10K
PE0
PB2
PE1
PB3
(CANTX0RS) R135
J37-6
(CANTX0)
(CANRX0EN) R138
(CANRX0)
0R
R139
J13
MN11
8 Rs
1 D
0R
5 EN
0R
4 R
R140
10K
1
2 GND
JP28
CANH 7
2
3
CANL 6
R137
120R
4
5
6
+3V3
1
2
CAN RJ12
3
4
5
6
VCC 3
SN65HVD234
+ C95
10uF
C96
100nF
CAN0
+3V3
R141
10K
PE2
PC15
PE3
PC12
J14
(CANTX1RS) R142
0R
MN12
8 Rs
(CANTX1)
0R
1 D
R143
(CANRX1EN) R149
(CANRX1)
R150
0R
5 EN
0R
4 R
R151
10K
2 GND
SN65HVD234
1
JP29
CANH 7
2
3
CANL 6
R148
120R
4
5
6
+3V3
1
2
CAN RJ12
3
4
5
6
VCC 3
+ C98
10uF
C99
100nF
CAN1
4.3.11 Display interface
The SAM4E-EK carries a TFT transmissive LCD module with touch panel, FTM280C34D. Its integrated driver IC is
ILI9325. The LCD display area is 2.8 inches diagonally measured, with a native resolution of 240 x 320 dots.
4.3.11.1 LCD module
The LCD module gets reset from the NRST signal. As explained, this NRST is shared with the JTAG port and the pushbutton BP1. The LCD chip select signal is connected to NCS1; the jumper JP8 can disconnect it so that this PIO line is
available for other custom usage.
The SAM4E16 communicates with the LCD through PIOC where an 8-bit parallel “8080-like” protocol data bus has to
be implemented in software.
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Figure 4-10. LCD block.
+3V3
PD[0..31]
4.7k
DNP
8
RR1 7
DNP 6
4.7k 5
8
RR2 7
DNP 6
4.7k 5
4.7k
DNP
PA[0..31]
C32
PC[0..31]
10uF
R14
LCD_DB0
1
2
3
4
1
2
3
4
LCD_DB4
LCD_DB2
LCD_DB3
LCD_DB1
LCD_DB8
LCD_DB6
LCD_DB7
LCD_DB5
R15
LCD_DB9
C33
100nF
PC7
PC6
PC5
PC4
PC3
PC2
PC1
PC0
R13
47K
LCD_DB17
LCD_DB16
LCD_DB15
LCD_DB14
LCD_DB13
LCD_DB12
LCD_DB11
LCD_DB10
LCD_DB9
LCD_DB8
LCD_DB7
LCD_DB6
LCD_DB5
LCD_DB4
LCD_DB3
LCD_DB2
LCD_DB1
LCD_DB0
+3V3
PC11
PC8
PC19
R16
10K
C34
100nF
PD18
JP8
NRST
NRST
LED_A
R18
0R
The part is placed as
close as possible to J4
LED_K1
LED_K2
LED_K3
LED_K4
Y _UP
Y _DOWN
X_RIGHT
X_LEFT
3
4
5
1
R17
4.7K
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
J3
FH26-39S-0.3SHW
Z7
VDD
DB17
DB16
DB15
DB14
DB13
DB12
DB11
DB10
DB9
DB8
DB7
DB6
DB5
DB4
DB3
DB2
DB1
DB0
VDD
RD
WR
RS
CS
RESET
IM0
IM1
GND
LED-A
LEDK1
LEDK2
LEDK3
LEDK4
Y+
YX+
XNC
GND
PIN 39
PINs
on
BOT
FTM280C34D
PIN 1
Six slots on PCB for LCD shield
D1
2
NOT POPULATED
LCD
DNP
TVS, SOT23-5
4.3.11.2 Backlight control
The LCD backlight is made of four integrated white chip-LEDs arranged in parallel. These are driven by an AAT3155
charge pump, MN15. The AAT3155 is controlled by PC13; the 0Ω resistor R24 is mounted in series on this line, which
permits to use it for other custom purposes. In that case, the pull-up resistor R20 maintains the charge pump
permanently enabled by default.
On the anode drive line, a 0Ω resistor R18 is implemented in series for an optional current limitation.
Figure 4-11. Backlight control.
+3V3
PC13
R24
0R
R20
47K
10
C35
1uF
+3V3
FB1
9
11
5
BN03K314S300R
C38
4.7uF
4
MN15
AAT3155ITP-T1
C1+
C1EN/SET
IN
GND
C2+
C2OUTCP
D1
D2
D3
D4
7
6
C36
1uF
TP1
8
LED_A
3
2
1
12
LED_K1
LED_K2
LED_K3
LED_K4
C37
1uF
LCD BACKLIGHT
SAM4E-EK User Guide
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15
4.3.12 Touch screen interface
The LCD module integrates a 4-wire touch panel controlled by MN16 (ADS7843) which is a slave device on the
SAM4E16 SPI bus. The controller sends back the measurement information about the X and Y positions as a pressure
is applied to the touch panel. The touch panel can be used with either a stylus or a finger.
The ADS7843 touch panel controller connects to the SPI interface via the NPCS0 control signal. Two interrupt signals
are connected and provide events information back to the microcontroller: PenIrq and Busy.
PenIrq (PA16) is shared with ZigBee signal ZIGB_MISC.
Busy (PA17) is shared with ZigBee signal ZIGB_IRQ.
Therefore, if using a ZigBee interface in concurrence with the Touch Screen controller, take care not to have both
drivers enabled at the same time on either PA16 or PA17.
Note:
Figure 4-12. Touch panel control.
+3V3
2
3
4
5
X_RIGHT
Y _UP
X_LEFT
Y _DOWN
TP2
XP
YP
XM
YM
DCLK
DIN
DOUT
CS
BUSY
PENIRQ
TP3
7
8
R27
100K
R19
100K
MN16
ADS7843E
IN3
IN4
VREF
VCC1
VCC2
R28
100K
AGND_TP
GND
16
14
12
15
PA14
PA13
PA12
+3V3
JP9
PA11
13
11
R22
0R
9
1
10
R25
0R
R21
100K
PA17
R23 0R
+3V3
L2
C39
100nF
6
LCD TOUCH SCREEN
C40
100nF
PA16
C41
100nF
10uH-150mA
R26
1R
C42
4.7uF
R29
0R
AGND_TP
4.3.13 JTAG/ICE
A standard 20-pin JTAG/ICE connector is implemented on the Atmel SAM4E-EK for the connection of a compatible
ARM JTAG emulator interface, such as the SAM-ICE™ from Segger.
Note that the NRST signal is connected to BP1 system button and is also used to reset the LCD module. The 0Ω
resistor R61 may be removed in order to isolate the JTAG port from this system reset signal.
Figure 4-13. JTAG interface.
ICE INTERFACE
+3V3
R53
100K
R54
100K
R55
100K
R56
100K
R57
100K
PB4
PB6
PB7
PB5
NRST
R61
0R
1
3
5
7
9
11
13
15
17
19
J8
HE10 20PTS
VTref
Vsupply
nTRST
GND1
TDI
GND2
TMS
GND3
TCK
GND4
RTCK
GND5
TDO
GND6
nSRST
GND7
DBGRQ GND8
DBGACK GND9
2
4
6
8
10
12
14
16
18
20
SAM4E-EK User Guide
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16
4.3.14 Audio Interface
The Atmel SAM4E-EK evaluation kit supports mono/stereo audio driven by a TPA0223 audio amplifier connected to two
DAC channels of the microcontroller.
The TPA0223 is a 2W mono Bridge-Tied-Load (BTL) amplifier designed to drive speakers with as low as 4Ω
impedance. The amplifier can be reconfigured on the fly to drive two stereo Single-Ended (SE) signals into head
phones.
Figure 4-14. Headphone output.
1
2
AUDIO OUT
+5V
JP14
3
PB13
+ C60
10uF
C59
1uF
C63
AGND
0.47uF
DAC0
JP15
TP6
Test Pad SQ-40TH
C64
JP16
0.47uF
C58
C61
100nF
1K
R64
5
LO/MO-
33K
R66
47K
0.47uF R67
33K
R71
47K
SHUTD0WN
33K
BY PASS
1
9
10
RIN
AGND
C62
J10
5 Phonejack Stereo 3.5
4
3
2
1
220uF-TAN-6.3V
R63
R65
R72
6
RO/MO+
+
VDD
1K
220uF-TAN-6.3V
AGND
MONO-IN
7
ST/MN
LIN
2
4
R68
100K
R70
100K
C65
VDD_AMP
100K
C66
1uF
JP17
AGND
R73
R69
0.47uF
8
GND
11
PAD
AUDIO_OUTL C67
3
+
1
2
+3V3
MN8
TPA0223DGQ
FB2
BN03K314S300R VDD_AMP
J9
AGND
AGND
0R
AGND
3
AGND
JP18
PB14
1
2
Using a readily available 1/8-in. (3.5mm) stereo headphone jack, the control switch (pin4 and pin5 in J10) is closed
when no plug is inserted. When closed, a 100kΩ/1kΩ divider pulls the ST/MN input low. When a jack plug is inserted,
the 1kΩ resistor is disconnected and the ST/MN input is pulled high. The mono speaker (J9 connector) is also
physically disconnected from the RO/MO+ output so that no sound is heard from the speaker while the headphones are
inserted.
When works as stereo mode make sure JP15, JP16, and JP17 are disconnected.
4.3.15 USB device
The SAM4E16 UDP port is compliant with the Universal Serial Bus (USB) rev 2.0 Full Speed device specification. J11 is
a micro B-type receptacle for USB device.
Both 27Ω resistors R82 and R83 build up 90Ω differential impedance together with the (embedded) 6Ω output
impedance of the SAM4E16 full speed channel drivers.
R80 and R81 build up a divider bridge from VBUS +5V to implement plug-in detection (5V level gets lowered to a PIO
compatible 3.3V level) through PC21.
SAM4E-EK User Guide
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17
Figure 4-15. USB.
USB
PC21
R80
47K
R81
68K
D+
ID
G
11
7
6
5
D-
4
RV1
V5.5MLA0603
USB Micro B
3
1
FGND
5V
2
J11
TBD
10
8
9
RV2
V5.5MLA0603
C75
10pF
FGND
PB10
R82
27R
PB11
R83
27R
4.3.16 Analog interface
4.3.16.1 Analog reference
The 3.0V voltage reference is based on a LM4040 (Precision Micropower Shunt Voltage Reference).
This ADVREF level can be set as 3.0V or 3.3V via the jumper JP3.
Figure 4-16. Analog Vref.
+5V
1
+3V3
JP3
2
C13
C14
100nF 1uF
R1
2.2K
3
ADVREF
MN1
LM4040AIM3X-3.0
4.3.16.2 Analog input
•
The BNC connector CN2 is connected to the AEF0_AD4 or AFE1_AD0 (selected by JP40) as a single external
analog input
•
The BNC connectors CN3, CN4 are connected to AFE0_AD10 and AFE0_AD11 as a differential external
analog input. A low pass filter is optional by close 1-2 pins of JP21, JP22, JP24, and JP25
•
Each BNC input has an on-board 50Ω resistor termination that can be applied by closing jumper JP20, JP23 or
JP26
•
A 10kΩ potentiometer (VR1) is also connected to the AFE0_AD5 implement an easy access to ADC
programming and debugging (or implement an analog user control like display brightness, volume, etc.)
SAM4E-EK User Guide
42067B−SAM4E−04/2013
18
Figure 4-17. ADC/AFE input.
ADC / AFE
+3V3
3
Potentiometer
Clockwise 2-->3
VR1
10K VR
2
(AFE0_AD5)
PB1
PB0
(AFE0_AD4)
PB2
(AFE1_AD0, need open JP41)
1
1
C68
10nF
CN2
2
BNC
JP40
3
JP20
C70
10nF
CN3
JP21
JP22
2
C72
R77
49.9R
1
CN4
600R
220uH
JP25
2
3
JP26
R78
680pF
PC31
(AFE0_AD11)
3
JP24
2
BNC
C74
4.7nF DNP
C73
680pF
L4
(AFE0_AD10)
1
JP23
L3 220uH
1
C71
4.7nF DNP
PC30
2
1
BNC
3
3
R76
49.9R
R79
49.9R
4.3.16.3 Analog output
The BNC connector CN1 is connected to the DAC port PB14 and provides an external analog output. An on-board 50Ω
resistor termination can be enabled by closing jumper JP21. A filter can be implemented on this output channel by
replacing R74 and C69 with appropriate resistor and capacitor values, depending on the application requirements.
3
Figure 4-18. DAC output.
JP18
PB14
R74
0R
JP19
C69
2
1
CN1
BNC
DAC1
2.2uF
R75
49.9R
SAM4E-EK User Guide
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19
4.3.17 QTouch elements
QTouch keys consist in a series of sensors formed by the association of a copper area and the capacitive effect of
human fingers approaching it.
Keys
The Atmel SAM4E-EK implements two individual capacitive touch keys (RIGHT, LEFT).
Slider
A group of channels forms a Slider. A Slider is composed of eight channels for a QTouch acquisition method. Such a
sensor is used to detect a linear finger displacement on a sensitive area. A typical implementation is volume control.
Figure 4-19. QT_Slider.
S1
MN17
10K 25
RST
+3V3
PAD
GPIO1
GPIO2
GPIO3
R124 R122 R123
2.2K
2.2K
23
24
7
21
22
I2C_A0
I2C_A1
Y 0A
Y 0B
VREF
VSS
VSS
1K
1K
1K
1K
1K
1K
1K
K1
29
28
1
2
SMP
X6
X5
X4
K2
X3
X2
QKEY QKEY
SDA
SCL
CHANGE
Y 1A
Y 1B
8
4
18
R114
R115
R116
R118
R119
R120
R121
2
10K
PA3
PA4
PE4
6
5
15
14
13
12
11
10
1
1uF 100nF100nFR117
X7
X6
X5
X4
X3
X2
X1
X0
26
19
R127
1K
R128
1K
X1
X0
2
C88 C87 C89
VDD
VDD
VDD
1
3
16
17
Slider
+3V3 FB3
BN03K314S300R
Y0
27
20
R129 R130
9 1M
C90
4.7nF
C91
4.7nF
Qtouch
1M
AT42QT2160
4.3.18 LEDs
There are three LEDs on the SAM4E-EK board:
•
•
A blue LED (D2), amber LED (D3) and a green LED (D4), which are user defined and controlled by the GPIO
A red LED (D5), which is a power LED indicating that the 3.3V power rail is active. It is also controlled by the
GPIO and can be treated as a user LED as well. The only difference with the two others is that it is controlled
through a MOS transistor. By default, the PIO line is disabled; a pull-up resistor controls the MOS to light the
LED when the power is ON
Figure 4-20. LEDs.
LEDS
+3V3
TIMER
PA0
R154
470R
PWM
PD20
R157
470R
D3
LED Amber
PWM
PD21
R158
470R
D4
LED Green
POWER
PD22
D2
LED Blue
R159
100K
1
2
3
R160
470R
D5
LED Red
IRLML2502Q1
SAM4E-EK User Guide
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20
4.3.19 SD/MMC card
The Atmel SAM4E-EK has a high-speed 4-bit multimedia MMC interface, which is connected to a 4-bit SD/MMC micro
card slot featuring a card detection switch.
Figure 4-21. SD card.
+3V3
VDD_MCI
4
3
2
1
2
SD POWER CTRL
R161
0R
DNP
1
R30
10K
PD23
R31
10K
3
Q2
IRLML6402
J4
TF01A
5
6
7
8
VDD_MCI
SD CARD
RA1
68Kx4
R162
4.7k
PA26
PA27
PA28
R33
R32
0R
0R
PA29
R34
0R
PA30
PA31
R35
R36
0R
0R
1
2
3
4
5
6
7
8
10
9
PA6
+ C50
10uF
DAT2
DAT3
CMD
VCC
CLK
VSS
DAT0
DAT1
Sh1
Sh2
Sh3
11
12
13
GND
CD
C51
100nF
4.3.20 ZigBee
The SAM4E-EK has a 10-pin male connector for the RZ600 ZigBee module.
Note:
0Ω resistors have been implemented in series with the PIO lines that are used elsewhere in the design, thereby
enabling their individual disconnection, should a conflict occur in your application.
Figure 4-22. ZigBee interface.
ZB_RSTN
IRQ_ZBEE
SPIO_NPCS3#
MISO
PA18 R152
PA17 R155
PA5
PA12
0R
0R
1
3
5
7
9
J19
HE10 5x2
2
4
6
8
10
R153
R156
0R
0R
C100
18pF
PA16
PA15
PA13
PA14
C101
2.2nF
MISC_ZBEE
SLP_TR
MOSI
JP36
SPCK
+3V3
C102
2.2uF
ZIGBEE
4.3.21 PIO expansion
The SAM4E-EK product features three PIO controllers, PIOA, PIOB, PIOC and PIOD, which are multiplexed with the
I/O lines of the embedded peripherals. Each PIO Controller controls up to 32 lines (15 for PIOB and 6 for PIOE).
Expansion ports J15, J16, J17 and J18 provide PIO lines access for customer usage.
SAM4E-EK User Guide
42067B−SAM4E−04/2013
21
Figure 4-23. PIO expansion.
PE[0..5]
PB[0..14]
PA[0..31]
PC[0..31]
PD[0..31]
PD0
PD1
PD2
PD3
PD4
PD5
PD6
PD7
PD8
PD9
PD10
PD11
PD12
PD13
PD14
PD15
+3V3
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
J15
PIO D
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
1
PD16
PD17
PD18
PD19
PD20
PD21
PD22
PD23
PD24
PD25
PD26
PD27
PD28
PD29
PD30
PD31
PC0
PC1
PC2
PC3
PC4
PC5
PC6
PC7
PC8
PC9
PC10
PC11
PC12
PC13
PC14
PC15
+3V3
+3V3
+3V3
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
J16
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
PIO C
JP33
+5V
3
1
PC16
PC17
PC18
PC19
PC20
PC21
PC22
PC23
PC24
PC25
PC26
PC27
PC28
PC29
PC30
PC31
PA0
PA1
PA2
PA3
PA4
PA5
PA6
PA9
PA10
PA11
PA12
PA13
PA14
PA15
+3V3
+3V3
+3V3
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
J17
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
PIO A
JP34
+5V
3
1
PA16
PA17
PA18
PA19
PA20
PA21
PA22
PA23
PA24
PA25
PA26
PA27
PA28
PA29
PA30
PA31
PB0
PB1
PB2
PB3
PB4
PB5
PB6
PB7
PB12
PB13
PB14
+3V3
+3V3
+3V3
2
JP32
+5V
3
2
+3V3
2
1
2
JP31
+5V
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
3
J18
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
PE0
PE1
PE2
PE3
PE4
PE5
+3V3
PIO B & PIO E
SAM4E-EK User Guide
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22
5.
Configuration
This chapter describes the PIO usage, the jumpers, the test points and the solder drops of an Atmel SAM4E-EK board.
5.1
PIO usage
Table 5-1.
PIO Port A pin assignments and signal descriptions.
IO line
Peripheral A
Peripheral B
Peripheral C
Extra function
PA0
PA1
PA2
PA3
PA4
PA5
PA6
PA7
PA8
PA9
PA10
PA11
PA12
PWMH0
PWMH1
PWMH2
TWD0
TWCK0
TIOA0
TIOB0
A17
A18
DATRG
WKUP0
WKUP1
WKUP2
URXD0
UTXD0
NPCS0
MISO
NPCS3
TCLK0
NPCS3
PCK0
PWMH3
AFE0_ADTRG
NPCS1
NPCS2
PWMH0
PWMH1
PA13
MOSI
PWMH2
PA14
SPCK
PWMH3
URXD1
UTXD1
PWMFI0
WKUP3
WKUP4
WKUP5
WKUP6
WKUP7
WKUP8
PA15
PA16
TIOA1
TIOB1
PWML3
PWML2
WKUP14/PIODCEN1
WKUP15/PIODCEN2
PA17
PA18
PA19
PA20
PA21
PA22
PA23
PA24
PA25
PA26
PA27
PA28
PA29
PA30
PA31
PCK1
PCK2
PWML0
PWML1
PCK1
NPCS3
PWMH0
PWMH1
PWMH2
TIOA2
TIOB2
TCLK1
TCLK2
NPCS2
PCK2
PWMH3
A14
A15
A16
AFE0_AD0
AFE0_AD1
AFE0_AD2/WKUP9
AFE0_AD3/WKUP10
AFE1_AD2
AFE1_AD3
PIODCCLK
PIODC0
PIODC1
PIODC2
PIODC3
PIODC4
PIODC5
WKUP11/PIODC6
PIODC7
RXD1
TXD1
SCK1
RTS1
CTS1
DCD1
DTR1
DSR1
RI1
PWML2
NPCS1
NCS2
A19
A20
A23
MCDA2
MCDA3
MCCDA
MCCK
MCDA0
MCDA1
SYSIO and
GPIO
XIN32
XOUT32
Comments
LED_TIMER (Blue)
BUTTON_SCROLL-UP
BUTTON_SCROLL-DOWN
QTouch_SDA
QTouch_SCL
ZIGB_SEL#, SPI FLASH_CS#
SD_CD
XIN32
XOUT32
DBGU_ROUT
DBGU_TIN
TOUCH_CS#
TOUCH_DOUT, ZIGB_MISO,
SPI FLASH_SO
TOUCH_DIN, ZIGB_MOSI,
SPI FLASH_SI
TOUCH_DCLK, ZIGB_SCLK,
SPI FLASH_SCK
ZIGB_SLP_TR
TOUCH_PENIRQ#,
ZIGB_MISC
TOUCH_BUZY, ZIGB_IRQ
ZIGB_RST#
BUTTON_WAKU
BUTTON_TAMP
RS232_RXD, RS485_RXD
RS232_TXD, RS485_TXD
RS232_EN#
RS232_RTS, RS485_DE
RS232_CTS, RS485_RE#
SD_DAT2
SD_DAT3
SD_CMD
SD_CLK
SD_DAT0
SD_DAT1
SAM4E-EK User Guide
42067B−SAM4E−04/2013
23
Table 5-2.
PIO Port B pin assignments and signal descriptions.
IO line
Peripheral A
PB0
PB1
PB2
PB3
PB4
PB5
PB6
PB7
PB8
PB9
PB10
PB11
PB12
PB13
PB14
PWMH0
PWMH1
CANTX0
CANRX0
TWD1
TWCK1
NCPS2
PCK2
PWMH2
PWML0
PWML1
PWML2
NPCS1
PCK0
PWMH3
Table 5-3.
Peripheral B
Peripheral C
Extra function
SYSIO and GPIO
RXD0
TXD0
CTS0
RTS0
AFE0_AD4/RTCOUT0
AFE0_AD5/RTCOUT1
AFE1_AD0/WKUP12
AFE1_AD1
TDI
TDO/TRACESWO
TMS/SWDIO
TCK/SWCLK
XOUT
XIN
DDP
DDM
ERASE
WKUP13
SCK0
DAC0
DAC1
Comments
AFE0_BNC
ADC_Potentiometer
CAN0_D, AFE1_BNC
CAN0_R
JTAG_TDI
JTAG_TDO
JTAG_TMS
JTAG_TCK
XOUT
XIN
USB_D+
USB_DERASE
AUDIO_RIN
AUDIO_LIN,
DAC1_BNC
PIO Port C pin assignments and signal descriptions.
IO line
Peripheral A
Peripheral B
PC0
PC1
PC2
PC3
PC4
PC5
PC6
PC7
PC8
PC9
PC10
PC11
PC12
PC13
PC14
PC15
PC16
PC17
PC18
PC19
PC20
PC21
PC22
PC23
PC24
PC25
PC26
PC27
D0
D1
D2
D3
D4
D5
D6
D7
NWE
NANDOE
NANDWE
NRD
NCS3
NWAIT
NCS0
NCS1
A21/NANDALE
A22/NANDCLE
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
PWML0
PWML1
PWML2
PWML3
NPCS1
TIOA6
TIOB6
TCLK6
TIOA7
TIOB7
TCLK7
TIOA8
TIOB8
PWML0
TCLK8
PWML1
PWMH0
PWMH1
PWMH2
PWMH3
PWML3
TIOA3
TIOB3
TCLK3
TIOA4
TIOB4
Peripheral C
Peripheral D
Extra
function
AFE0_AD14
AFE1_AD4
AFE1_AD5
AFE1_AD6
AFE1_AD7
CANRX1
AFE0_AD8
AFE0_AD6
CANTX1
AFE0_AD7
SYSIO
and GPIO
Comments
NAND_D0/LCD_DB10
NAND_D1/LCD_DB11
NAND_D2/LCD_DB12
NAND_D3/LCD_DB13
NAND_D4/LCD_DB14
NAND_D5/LCD_DB15
NAND_D6/LCD_DB16
NAND_D7/LCD_DB17
LCD_WR
NAND_OE#
NAND_WE#
LCD_RD
CAN1_R
LCDBL_EN/SET
NAND_CE#
CAN1_D
NAND_ALE
NAND_CLE
NAND_R/B#
LCD_RS
USB_VBUS
AFE0_AD12
AFE0_AD13
SAM4E-EK User Guide
42067B−SAM4E−04/2013
24
PC28
PC29
PC30
PC31
Table 5-4.
A10
A11
A12
A13
Peripheral A
PD0
PD1
PD2
PD3
PD4
PD5
PD6
PD7
PD8
PD9
PD10
PD11
PD12
PD13
PD14
PD15
PD16
PD17
PD18
PD19
PD20
PD21
PD22
PD23
PD24
PD25
PD26
PD27
PD28
PD29
PD30
PD31
GTXCK/GREFCK
GTXEN
GTX0
GTX1
GCRSDV/GRXDV
GRX0
GRX1
GRXER
GMDC
GMDIO
GCRS
GRX2
GRX3
GCOL
GRXCK
GTX2
GTX3
GTXER
NCS1
NCS3
PWMH0
PWMH1
PWMH2
PWMH3
PWML0
PWML1
PWML2
PWML3
IO line
PE0
PE1
PE2
PE3
PE4
AFE0_AD9
AFE0_AD10
AFE0_AD11
AFE0_BNC
AFE0_BNC
PIO Port D pin assignments and signal descriptions.
IO line
Table 5-5.
TCLK4
TIOA5
TIOB5
TCLK5
Peripheral B
Peripheral C
Peripheral D
Extra
function
SYSIO
and GPIO
Comments
MII_TXCK
MII_TXEN
MII_TX0
MII_TX1
MII_RXDV
MII_RX0
MII_RX1
MII_RXER
ETH_MDC
ETH_MDIO
MII_CRS
MII_RX2
MII_RX3
MII_COL
MII_RXCK
MII_TX2
MII_TX3
LCD_CS
LED_PWM (Amber)
LED_PWM (Green)
LED_PWR (RED)
SD_PWR_CTL
ETH_INTR
PIO Port E pin assignments and signal descriptions.
Peripheral A
Peripheral B
Peripheral C
Peripheral D
Extra
function
SYSIO
and GPIO
Comments
CAN0_Rs
CAN0_EN
CAN1_Rs
CAN1_EN
QTouch_CHANGE#
SAM4E-EK User Guide
42067B−SAM4E−04/2013
25
5.2
Jumpers
The Atmel SAM4E-EK board jumpers are essentially used for two main purposes: functional selection or current
measurement. Details are given below.
Table 5-6.
2 pin jumpers setting.
Name
Signal
Close
Open
J37-1
J37-2
J37-3
J37-4
J37-5
J37-6
JP7
JP9
JP8
J39-1
J39-2
J39-3
J39-4
JP15
JP16
JP17
JP19, JP20, JP23
SPI FLASH_CS (NPCS3)
NAND_CE# (NCS0)
VDDCORE
VDDIO
VDDIN
CANTX0
ERASE
TOUCH_CS# (NPCS0)
LCD_CS (NCS1)
BUTTON_SCROLL-UP
BUTTON_SCROLL-DOWN
BUTTON_TAMP
BUTTON_WAKU
PB13(DAC) to MONO-IN (Audio)
PB14(DAC) to MONO-IN (Audio)
Audio_ST/MN#
BNC input 50Ω match resister
Connect (default)
Connect (default)
Connect (default)
Connect (default)
Connect (default)
CANTX0 can use
Erase internal flash
Connect (default)
Connect (default)
Connect (default)
Connect (default)
Connect (default)
Connect (default)
Connect (default)
Connect (default)
Force mono mode
Use
Disconnect
Disconnect
Disconnect
Disconnect
Disconnect
AFE1_AD0 can use
Default
Disconnect
Disconnect
Disconnect
Disconnect
Disconnect
Disconnect
Disconnect (default)
Disconnect (default)
No force (default)
No use (default)
Name
Signal
1-2 close
2-3 close
JP11
JP3
JP14
JP18
JP31, JP32, JP33, JP34
JP21, JP22, JP24, JP25
JP40
PA21
ADVREF
Audio power
DAC_PB14
PIOA/B/C/D-CONN-power
AFE0_AD10/AD11
ADC BNC input
RS485-RX
3.3V (default)
5V (default)
To CN1 (BNC)
5V
Use filter(default)
To AFE0_AD4
RS232-RX
3.0V
3.3V
To Audio_LIN (default)
3.3V
Bypass filter
To AFE1_AD0
SAM4E-EK User Guide
42067B−SAM4E−04/2013
26
6.
Schematics
This chapter contains the following schematics:
•
•
•
•
•
•
•
•
Block diagram
Microcontroller
TFT-LCD and touch
COM and SD card and JTAG
Audio and USB
Ethernet
QTouch, CAN and Flash memories
I/O Peripheral
SAM4E-EK User Guide
42067B−SAM4E−04/2013
27
A
B
C
5
5 V Input
POWER SUPPLY
(3.3V)
Sheet 6
ETHERNET(100M)
Sheet 3
BACK LIGHT
2.8"
240x320
TFT
LCD INTERFACE
TOUCH SCREEN
Sheet 5
ADC(AFE)/ DAC
AUDIO Out (DAC)
FS USB (Divce)
Sheet 2
PHONE
JACK
BNC
POT
4
POWER
4
PIO A, B, C
3
Sheet 2
ATMEL
Cortex-M4 ARM Processor
SAM4E (BGA144)
3
PIO A, B, C
2
2
QTOUCH
Sheet 8
PIO A, B, C
Extension
LEDs, Buttons
ZIGBEE
INTERFACE
Sheet 4
ICE(JTAG)
USART1
DBGU
HSMCI
Sheet 7
CAN0 / 1
SPI FLASH
NAND FLASH
RJ12
HE 10 RS232 / 485 Micro SD
HE 10
A
1/1
INIT EDIT
MODIF.
SCALE
REV
1
XX
DES.
DATE
1
1
8
REV.
A
DATE
SHEET
VER.
23-OCT-12 XXX XX-XXX-XX
This agreement is our property. Reproduction and publication without our written authorization shall expose offender to legal proceedings.
TOP
SAM4E-EK
HE 14
D
5
A
B
C
D
Figure 6-1. Block diagram.
SAM4E-EK User Guide
42067B−SAM4E−04/2013
28
A
B
C
D
AT91SAM4E-BGA144
AT91SAM4E-BGA144
AT91SAM4E-BGA144
PIOD
U1B
PIOC
5
PD0
PD1
PD2
PD3
PD4
PD5
PD6
PD7
PD8
PD9
PD10
PD11
PD12
PD13
PD14
PD15
PD16
PD17
PD18
PD19
PD20
PD21
PD22
PD23
PD24
PD25
PD26
PD27
PD28
PD29
PD30
PD31
PC0
PC1
PC2
PC3
PC4
PC5
PC6
PC7
PC8
PC9
PC10
PC11
PC12
PC13
PC14
PC15
PC16
PC17
PC18
PC19
PC20
PC21
PC22
PC23
PC24
PC25
PC26
PC27
PC28
PC29
PC30
PC31
U1D
D4
B5
A5
B7
D6
D7
A8
B8
E9
D9
C12
E11
G10
G9
H10
A11
K11
L11
M10
M9
K9
H9
M8
M7
M6
M5
L6
J6
K10
D10
M1
D3
E4
J4
K4
L3
J5
L8
K7
M4
J12
G11
F10
F11
F4
G2
E10
G1
D11
B12
B10
D8
A9
A7
C7
C6
B6
C5
F2
E2
L12
F3
F1
E1
C11
D12
E12
F12
K12
M11
B9
L2
M2
M12
L9
J9
L10
M3
K6
L5
K5
J1
H2
H1
H3
K2
K3
L4
L7
K8
J8
J10
C9
A6
A10
C8
PD0
PD1
PD2
PD3
PD4
PD5
PD6
PD7
PD8
PD9
PD10
PD11
PD12
PD13
PD14
PD15
PD16
PD17
PD18
PD19
PD20
PD21
PD22
PD23
PD24
PD25
PD26
PD27
PD28
PD29
PD30
PD31
PC0
PC1
PC2
PC3
PC4
PC5
PC6
PC7
PC8
PC9
PC10
PC11
PC12
PC13
PC14
PC15
PC16
PC17
PC18
PC19
PC20
PC21
PC22
PC23
PC24
PC25
PC26
PC27
PC28
PC29
PC30
PC31
PA0
PA1
PA2
PA3
PA4
PA5
PA6
PA7
PA8
PA9
PA10
PA11
PA12
PA13
PA14
PA15
PA16
PA17
PA18
PA19
PA20
PA21
PA22
PA23
PA24
PA25
PA26
PA27
PA28
PA29
PA30
PA31
PD[0..31]
PC[0..31]
PA[0..31]
4
+5V
+3V3
1
2
C18
2.2uF
SD
VIN
L1
J37-3
ADJ
VOUT
5
4
56uH
C23
100nF
C19
22uF
2.2R
R2
VDDIN
J37-5
+ C24
22uF
R10
102K 1%
CV
3
4
5
6
+3V3
10UF
3
C4
C5
C6
C10 C11 C12
+ C25
22uF
+ C26
220uF-ELE-16V
+5V
NRST
PE[0..5]
PB[0..14]
10uF 100nF100nF100nF100nF
C8
C9
2
4
1
3
5
H12
NRST
J2
SMB
C2
A1
B1
E3
K1
L1
H4
G3
J2
J3
A12
C10
J11
F9
A3
A2
B4
A4
G12
B2
C4
J7
H8
E8
H5
G8
E7
F8
H7
H6
PE0
PE1
PE2
PE3
PE4
PE5
PB0
PB1
PB2
PB3
PB4
PB5
PB6
PB7
PB8
PB9
PB10
PB11
PB12
PB13
PB14
100nF100nF100nF100nF100nF
10uF
C1
C3
C2
VDDIO
VDDCORE
+ C29
C30
100uF-TAN-6.3V 100nF
SG CG1
CG2
CG3
SV
MN3
BNX002-01
R9
169K 1%
2
1
BGA-144 socket
SUP1
100nF
C17
VDDPLL
VDDCORE
VDDIO
J37-4
MN2
ZEN056V130A24LS
3
MN4
MIC29302
1
VDDOUT
J1
Power Jack 2.1mm
1
2
3
PA0
PA1
PA2
PA3
PA4
PA5
PA6
PA7
PA8
PA9
PA10
PA11
PA12
PA13
PA14
PA15
PA16
PA17
PA18
PA19
PA20
PA21
PA22
PA23
PA24
PA25
PA26
PA27
PA28
PA29
PA30
PA31
2
PIOA
GND1
3
GND2
6
3
U1C
2
R5
C27
C22
R6
49.9R 1%
NRST
PE0
PE1
PE2
PE3
PE4
PE5
3
0R
Y2
R12
R7
0R
32.768 kHz
R4
DNP
18pF
Y1
18pF
PB0
PB1
PB2
PB3
PB4/TDI
PB5/TDO/TRACESWO
PB6/TMS/SWDIO
PB7/TCK/SWCLK
PB8/XOUT
PB9/XIN
PB10/DDM
PB11/DDP
PB12/ERASE
PB13
PB14
R3
SAM4E
F7
G7
E5
E6
G6
G5
G4
F6
F5
B11
H11
C1
C3
D2
D1
D5
B3
C31
C28
SAM4E-EK
DNP
DNP
PA8
PA7
GNDCORE
GNDCORE
GNDCORE
GNDCORE
GNDIO
GNDIO
GNDIO
GNDIO
GNDIO
JTAGSEL
TEST
VDDIN
VDDOUT
GNDANA
ADVREF
GNDPLL
VDDPLL
C21
VDDIN
15pF
15pF
A
0R
0R
1/1
INIT EDIT
MODIF.
SCALE
REV
R11
Y3
12MHz
R8
100nF 10uF
C20
C14
100nF 1uF
C13
100nF
C7
VDDPLL
1
C16
XX
DES.
(ERASE)
JP6
JP5
1
+3V3
+3V3
DATE
DATE
SHEET
2
8
VER.
REV.
A
23-OCT-12 XXX XX-XXX-XX
PB8
PB9
PB12
100nF 2.2uF
R1
2.2K
JP7
+5V
LM4040AIM3X-3.0
VDDOUT
C15
JP3
2
MN1
+3V3
This agreement is our property. Reproduction and publication without our written authorization shall expose offender to legal proceedings.
AT91SAM4E-BGA144
VDDCORE
VDDCORE
VDDCORE
VDDCORE
VDDIO
VDDIO
VDDIO
VDDIO
VDDIO
2
1
2
4
1
4
5
2
3
1
3
U1A
A
B
C
D
Figure 6-2. Microcontroller.
SAM4E-EK User Guide
42067B−SAM4E−04/2013
29
A
B
C
5
RR2
DNP
4.7k
RR1
DNP
4.7k
+3V3
4.7k
8
7
6
5
8
7
6
5
4.7k
R20
47K
+3V3
C38
4.7uF
C35
1uF
NOT POPULATED
BN03K314S300R
R24
0R
NRST
R17
4.7K
R16
10K
+3V3
4
5
9
11
10
The part is placed as
close as possible to J4
LCD_DB9
LCD_DB4
LCD_DB2
LCD_DB3
LCD_DB1
LCD_DB8
LCD_DB6
LCD_DB7
LCD_DB5
1
2
3
4
1
2
3
4
R15
LCD_DB0
R14
FB1
PC13
DNP
DNP
LED_A
D1
D2
D3
D4
OUTCP
C2-
C2+
3
2
1
12
8
6
7
4
LED_K1
LED_K2
LED_K3
LED_K4
LED_A
C36
1uF
TP1
NRST
R13
47K
LED_K1
LED_K2
LED_K3
LED_K4
Y_UP
Y_DOWN
X_RIGHT
X_LEFT
TVS, SOT23-5
DNP
D1
0R
LCD_DB17
LCD_DB16
LCD_DB15
LCD_DB14
LCD_DB13
LCD_DB12
LCD_DB11
LCD_DB10
LCD_DB9
LCD_DB8
LCD_DB7
LCD_DB6
LCD_DB5
LCD_DB4
LCD_DB3
LCD_DB2
LCD_DB1
LCD_DB0
C34
100nF
LCD BACKLIGHT
GND
IN
C1EN/SET
C1+
R18
JP8
C33
100nF
+3V3
U2
AAT3155ITP-T1
PD18
PC11
PC8
PC19
PC7
PC6
PC5
PC4
PC3
PC2
PC1
PC0
10uF
1
PC[0..31]
C32
5
PA[0..31]
4
PD[0..31]
3
4
2
D
5
C37
1uF
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
LCD
VDD
DB17
DB16
DB15
DB14
DB13
DB12
DB11
DB10
DB9
DB8
DB7
DB6
DB5
DB4
DB3
DB2
DB1
DB0
VDD
RD
WR
RS
CS
RESET
IM0
IM1
GND
LED-A
LEDK1
LEDK2
LEDK3
LEDK4
Y+
YX+
XNC
GND
J3
FH26-39S-0.3SHW
3
3
R27
100K
TP3
AGND_TP
TP2
7
8
2
3
4
5
IN3
IN4
XP
YP
XM
YM
DCLK
DIN
DOUT
CS
GND
VREF
VCC1
VCC2
BUSY
PENIRQ
U3
ADS7843E
6
9
1
10
13
11
16
14
12
15
PA14
PA13
PA12
2
LCD TOUCH SCREEN
R28
100K
X_RIGHT
Y_UP
X_LEFT
Y_DOWN
FTM280C34D
Z7
0R
0R
C40
100nF
JP9
TFT LCD
C42
4.7uF
R26
1R
L2
R21
100K
+3V3
SAM4E-EK
C41
100nF
PA17
PA11
PA16
1/1
DES.
XX
+3V3
INIT EDIT
MODIF.
SCALE
REV
A
R29
0R
10uH-150mA
R23 0R
1
DATE
1
DATE
SHEET
3
8
VER.
REV.
A
23-OCT-12 XXX XX-XXX-XX
This agreement is our property. Reproduction and publication without our written authorization shall expose offender to legal proceedings.
AGND_TP
C39
100nF
R25
R22
R19
100K
+3V3
Six slots on PCB for LCD shield
PIN 1
PINs
on
BOT
PIN 39
2
A
B
C
D
Figure 6-3. TFT-LCD and touch.
SAM4E-EK User Guide
42067B−SAM4E−04/2013
30
A
B
C
D
NRST
PA[0..31]
PB[0..14]
5
UTXD0
URXD0
TXD1
RXD1
RTS1
CTS1
NRST
PA10
PA9
TP4
R58
100K
+3V3
0R
TP5
0R
R60
C55
100nF
C45
100nF
R62
R59
100K
+3V3
+3V3
0R
0R
0R
0R
47K
R39
R40
R41
R42
R43
PA22
PA21_232
PA24
PA25
+3V3
0R
R37
PA23
+3V3
R38
47K
C43
4.7uF
+3V3
C56
100nF
C54
100nF
C48
100nF
C44
100nF
7
10
8
11
9
12
5
19
23
21
1
3
11
12
10
9
15
6
2
16
4
T1IN
R1OUT
T2IN
R2OUT
GND
V-
V+
VCC
MN7
ADM3202
C3-
C2C3+
C1C2+
C1+
C1-
T1OUT
R1IN
T2OUT
R2IN
C2-
C2+
R44
14
13
7
8
5
4
3
1
PA21_232
PA21
PA21_485
18
15
17
14
16
13
22
4
24
20
2
6
C1+
T1OUT
R1IN
T2OUT
R2IN
T3OUT
R3IN
DBGU
T1IN
R1OUT
T2IN
R2OUT
T3IN
R3OUT
EN
SD
GND
V-
V+
VCC
MN5
ADM3312EARU
USART1
C57
100nF
C53
100nF
0R
C49
100nF
C47
100nF
C46
100nF
1
3
JP11
2
VDD_MCI
R161
0R
DNP
J7
FGND
1
6
2
7
3
8
4
9
5
FGND
1
6
2
7
3
8
4
9
5
J5
10
3
1
R34
R35
R36
PA29
PA30
PA31
R47
R48
R49
R50
PA21_485
PA25
PA24
PA22
CTS1
RTS1
TXD1
PA6
R33
R32
PA26
PA27
PA28
RXD1
R162
4.7k
PD23
SD POWER CTRL
Q2
IRLML6402
+3V3
0R
0R
0R
0R
0R
0R
0R
0R
0R
PB5
NRST
PB4
PB6
PB7
2
R46
10K
+3V3
2
R53
100K
4
3
2
1
R31
10K
DI
DE
RE
VCC
A
B
GND
R54
100K
RO
MN6
ADM3485ARZ
RS 485
R30
10K
4
3
2
1
R61
R55
100K
6
7
5
8
JP12
+3V3
1
3
5
7
9
11
13
15
17
19
GND
CD
DAT2
DAT3
CMD
VCC
CLK
VSS
DAT0
DAT1
FGND
3
2
1
Sh1
Sh2
Sh3
J6
11
12
13
1/1
INIT EDIT
MODIF.
SCALE
REV
A
VTref
Vsupply
nTRST
GND1
TDI
GND2
TMS
GND3
TCK
GND4
RTCK
GND5
TDO
GND6
nSRST
GND7
DBGRQ GND8
DBGACK GND9
J8
HE10 20PTS
DES.
XX
2
4
6
8
10
12
14
16
18
20
DATE
1
DATE
SHEET
4
8
VER.
REV.
A
23-OCT-12 XXX XX-XXX-XX
ICE INTERFACE
DNP
R52
JP13
JP10
R45
DNP
+3V3
10
9
1
2
3
4
5
6
7
8
J4
TF01A
SD CARD
1
This agreement is our property. Reproduction and publication without our written authorization shall expose offender to legal proceedings.
COM & SD Card & JTAG
SAM4E-EK
0R
R57
100K
R51
120R
C52
100nF
+3V3
C51
100nF
VDD_MCI
+ C50
10uF
RA1
68Kx4
R56
100K
5
6
7
8
3
11
4
10
2
3
11
5
A
B
C
D
Figure 6-4. COM and SD card and JTAG.
SAM4E-EK User Guide
42067B−SAM4E−04/2013
31
A
B
C
1
CN1
BNC
0.47uF
R82
R83
27R
27R
68K
R81
FGND
JP16
47K
PB11
5
JP15
C64
C69
10
8
9
C75
10pF
RV1
V5.5MLA0603
2.2uF
G
ID
D+
D-
4
ST/MN
LO/MO-
RO/MO+
8
0R
R70
2
4
R68
FGND
RV2
V5.5MLA0603
11
7
6
PB14
C62
C65
AGND
R64
R63
C58
7
10
6
R73
AGND
GND
BYPASS
SHUTD0WN
AGND
DAC1
LIN
MONO-IN
RIN
VDD
USB Micro B
USB
JP18
9
1
5
3
5V
J11
TBD
2
33K
R72
R74
0R
47K
R71
47K
33K
33K
R66
R65
0.47uF R67
AGND
C61
100nF
VDD_AMP
+ C60
10uF
FB2
BN03K314S300R
R80
R75
49.9R
JP19
C59
1uF
PB10
PC21
0.47uF
TP6
Test Pad SQ-40TH
C63
AUDIO_OUTL C67
DAC0
PB13
+3V3
2
JP14
1
D
MN8
TPA0223DGQ
2
3
4
PAD
11
+
AGND
100K
100K
AGND
JP17
R69
AGND
220uF-TAN-6.3V
1K
1K
220uF-TAN-6.3V
0.47uF
+
+5V
3
1
2
J9
3
AGND
C66
1uF
VDD_AMP
100K
J10
5 Phonejack Stereo 3.5
4
3
2
1
3
BNC
BNC
CN4
CN3
BNC
CN2
JP20
2
C74
4.7nF DNP
2
R79
49.9R
JP26
R77
49.9R
JP23
C70
10nF
C68
10nF
2
Potentiometer
Clockwise 2-->3
R76
49.9R
C71
4.7nF DNP
VR1
10K VR
+3V3
3
1
AUDIO OUT
4
JP40
2
JP24
2
L4
R78
JP25
2
600R
A
SCALE
REV
1/1
DES.
XX
PC31
PC30
1
DATE
1
DATE
SHEET
5
8
VER.
REV.
A
23-OCT-12 XXX XX-XXX-XX
(AFE0_AD11)
(AFE0_AD10)
This agreement is our property. Reproduction and publication without our written authorization shall expose offender to legal proceedings.
Audio & USB
SAM4E-EK
220uH
C73
680pF
680pF
2
C72
JP22
2
INIT EDIT
MODIF.
(AFE1_AD0, need open JP41)
PB2
L3 220uH
(AFE0_AD4)
(AFE0_AD5)
PB0
PB1
PB[0..14]
PC[0..31]
JP21
ADC / AFE
1
3
3
1
5
3
1
1
3
3
1
1
3
5
A
B
C
D
Figure 6-5. Audio and USB.
SAM4E-EK User Guide
42067B−SAM4E−04/2013
32
A
B
5
R84
R85
R86
R87
R88
R89
R90
R91
R92
R93
R94
R96
R98
R99
R100
+3V3
E1_MDC R103
E1_MDIO R104
INT_ETH1 R105
E1_RXCK
E1_TXCK
E1_TXEN
E1_TX3
E1_TX2
E1_TX1
E1_TX0
E1_RX3
E1_RX2
E1_RX1
E1_RX0
E1_RXER
E1_RXDV
E1_CRS
E1_COL
RR3
4.7k
22R
22R
22R
22R
22R
22R
22R
22R
22R
22R
22R
22R
22R
22R
22R
22R
22R
22R
At the De-Assertion of Reset:
PHY ADD[2:0]:001
CONFIG[2:0]:000,Mode:MII
Duplex Mode:Half Duplex
Isolate Mode:Disable
Speed Mode:100Mbps
Nway Auto-Negotiation:Enable
PD8
PD9
PD28
PD14
PD0
PD1
PD16
PD15
PD3
PD2
PD12
PD11
PD6
PD5
PD7
PD4
PD10
PD13
NRST
8
7
6
5
1
2
3
4
C
PD[0..31]
8
7
6
5
1
2
3
4
RR4
4.7k
4
+3V3
+3V3
FGND
R111
100nF
0R
C83
10uF
C84
100nF
C82
E1_AVDDT
C81
10uF
4.7K
4.7K
L5
220ohm at 100MHz
1
2
R101
R102
RXC
TXC
TXEN
TXD3
TXD2
TXD1
TXD0
RXD3
RXD2
RXD1
RXD0
RXER
RXDV
CRS
COL
0R
32
17
3
12
11
21
19
22
23
27
26
25
24
13
14
15
16
20
18
29
28
3
XI
XO
REXT
GND
PADDLE
VDD_1V2
RXM
RXP
TXM
TXP
LED0/NWAYEN
LED1/SPEED
ETH PHY
GND_ETH
R112
RESET
VDDIO
VDDA_3V3
MDC
MDIO
INTRP/NAND
KSZ8051MNL
RXC/B-CAST_OFF
TXC
TXEN
TXD3
TXD2
TXD1
TXD0
RXD3/PHYAD0
RXD2/PHYAD1
RXD1/PHYAD2
RXD0/DUPLEX
RXER/ISO
RXDV/CONFIG2
CRS/CONFIG1
COL/CONFIG0
MN9
3
30
31
9
8
10
1
33
6.49K
100nF
C86
C85
22pF
ETH1_XI
ETH1_XO
R106
C79
RXM
4
2.2uF
RXP
5
C77
TXM
6
2
TXP
7
22pF
1
4
4
2
3
4.7K
4.7K
ETH1_XO
Y4
25MHz
ETH1_XI
R108
R107
+3V3
2
GND_ETH
C78
100nF
CT_RX
CT_TX
C76
100nF
GND_ETH
2
470R
470R
75
75
75
FGND
3
6
RX+
RX-
8
7
5
4
2
TX-
1/1
INIT EDIT
MODIF.
SCALE
REV
A
DES.
XX
DATE
1
DATE
SHEET
6
8
VER.
REV.
A
23-OCT-12 XXX XX-XXX-XX
RJ45 ETHERNET CONNECTOR
11
12
1nF
75
1
TX+
This agreement is our property. Reproduction and publication without our written authorization shall expose offender to legal proceedings.
ETH
9
8
7 NC
10
FGND
SAM4E-EK
R109
R110
+3V3
6 RD-
5 CT
3 RD+
2 TD-
4 CT
J20
J00-0061
1 TD+
1
13
14
D
5
A
B
C
D
Figure 6-6. Ethernet.
SAM4E-EK User Guide
42067B−SAM4E−04/2013
33
A
B
C
D
PA3
PA4
PE4
5
8
4
18
21
22
23
24
7
(CANRX0)
PB3
PC12
(CANRX1)
R150
(CANRX1EN) R149
PE3
R143
(CANTX1)
PC15
(CANTX1RS) R142
R139
(CANRX0EN) R138
PE1
PE2
U4
R134
10K
10K
R151
0R
0R
0R
0R
R141
10K
+3V3
10K
R140
0R
0R
0R
+3V3
AT42QT2160
VREF
VSS
VSS
I2C_A0
I2C_A1
SDA
SCL
CHANGE
RST
VDD
VDD
VDD
J37-6
(CANTX0RS) R135
2.2K
25
(CANTX0)
2.2K
10K
PB2
PE0
10K
R124 R122 R123
+3V3
1uF 100nF100nFR117
C88 C87 C89
3
16
17
9 1M
SN65HVD234
2 GND
4 R
5 EN
1 D
MN12
8 Rs
SN65HVD234
2 GND
4 R
5 EN
1 D
1M
R129 R130
27
20
26
19
29
28
1
2
6
5
15
14
13
12
11
10
MN11
8 Rs
SMP
Y1A
Y1B
Y0A
Y0B
PAD
GPIO1
GPIO2
GPIO3
X7
X6
X5
X4
X3
X2
X1
X0
4
4.7nF
4.7nF
VCC 3
CANL 6
CANH 7
VCC 3
CANL 6
CANH 7
C91
C90
1K
1K
1K
1K
1K
1K
1K
K2
1K
1K
+ C98
10uF
+3V3
+ C95
10uF
C99
100nF
R148
120R
JP29
C96
100nF
R137
120R
JP28
J13
6
5
4
3
2
1
J14
6
5
4
3
2
1
CAN1
6
5
4
3
2
1
CAN0
6
5
4
3
2
1
Qtouch
QKEY QKEY
K1
+3V3
R128
R127
R114
R115
R116
R118
R119
R120
R121
1
2
+3V3 FB3
BN03K314S300R
4
1
2
5
CAN RJ12
CAN RJ12
3
3
Y0
X0
X1
X2
X3
X4
X5
X6
S1
+3V3
J37-2
R132
PA5
PA13
PA12
PA14
2
47K
PC18 R131
PC14
PC17
PC16
PC9
PC10
2
R133
DNP
NPCS3
MOSI
MIS0
SPCK
0R
R125
47K
+3V3
J37-1
R145
R146
R147
N.C1
N.C2
N.C3
N.C4
N.C5
N.C6
N.C7
N.C8
N.C9
N.C10
N.C11
N.C12
N.C13
N.C14
N.C15
N.C16
N.C17
R/B
WP
CE
CLE
ALE
RE
WE
SAM4E-EK
R144
470K
1
5
2
6
36
13
37
12
48
47
46
45
40
39
38
35
34
33
28
27
29
30
31
32
41
42
43
44
CS
SI
SO
SCK
4
3
7
8
XX
DES.
DATE
1
DATE
SHEET
7
8
VER.
REV.
A
23-OCT-12 XXX XX-XXX-XX
This agreement is our property. Reproduction and publication without our written authorization shall expose offender to legal proceedings.
1/1
C94
1uF
+3V3
C92
100nF
C97
100nF
+3V3
C93
100nF
PC0
PC1
PC2
PC3
PC4
PC5
PC6
PC7
INIT EDIT
MODIF.
SCALE
REV
A
GND
WP
HOLD
VCC
MN13
AT25DF321A
Qtouch & CAN & Flash
0R
0R
0R
+3V3
VSS
VSS
VCC
VCC
N.C28
N.C27
N.C26
N.C25
N.C24
N.C23
PRE
N.C22
N.C21
N.C20
N.C19
N.C18
I/O0
I/O1
I/O2
I/O3
I/O4
I/O5
I/O6
I/O7
NAND FLASH
MN10
MT29F2G08ABAEA
SPI FLASH
1
2
3
4
5
6
10
11
14
15
20
21
22
23
24
25
26
7
19
9
16
17
8
18
R126
47K
+3V3
PC[0..31]
PA[0..31]
PB[0..14]
PE[0..5]
1
A
B
C
D
Figure 6-7. QTouch, CAN and Flash memories.
SAM4E-EK User Guide
42067B−SAM4E−04/2013
34
Slider
A
B
C
D
5
5
1
2
1
2
1
2
1
2
1
2
BP5
BP4
BP3
BP2
BP1
3
4
3
4
3
4
3
4
3
4
BUTTONS
PD[0..31]
PC[0..31]
PA[0..31]
PB[0..14]
PE[0..5]
+3V3
J39-2
J39-1
J39-3
J39-4
PD0
PD1
PD2
PD3
PD4
PD5
PD6
PD7
PD8
PD9
PD10
PD11
PD12
PD13
PD14
PD15
+5V
J15
JP31
2
PA2
PA1
PA20
PA19
PD16
PD17
PD18
PD19
PD20
PD21
PD22
PD23
PD24
PD25
PD26
PD27
PD28
PD29
PD30
PD31
+3V3
4
SCROLL-DOWN
SCROLL-UP
TAMP
WAKU9
NRST
+3V3
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
3
NRST
PIO D
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
1
4
+3V3
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
1
POWER
PWM
PWM
TIMER
PC0
PC1
PC2
PC3
PC4
PC5
PC6
PC7
PC8
PC9
PC10
PC11
PC12
PC13
PC14
PC15
+5V
2
+3V3
2
PD22
PD21
PD20
PA0
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
3
PIO C
J16
JP32
3
+3V3
3
IRLML2502Q1
1
PC16
PC17
PC18
PC19
PC20
PC21
PC22
PC23
PC24
PC25
PC26
PC27
PC28
PC29
PC30
PC31
3
R160
470R
R158
470R
R157
470R
R154
470R
D5
R159
D4
D3
D2
LEDS
+3V3
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
1
+3V3
+3V3
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
3
PIO A
LED Green
LED Red
2
J17
JP33
LED Amber
LED Blue
100K
PA9
PA10
PA11
PA12
PA13
PA14
PA15
PA0
PA1
PA2
PA3
PA4
PA5
PA6
+5V
+3V3
2
ZB_RSTN
IRQ_ZBEE
SPIO_NPCS3#
MISO
PA16
PA17
PA18
PA19
PA20
PA21
PA22
PA23
PA24
PA25
PA26
PA27
PA28
PA29
PA30
PA31
2
PA18 R152
PA17 R155
PA5
PA12
+3V3
J18
JP34
+3V3
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
3
J19
HE10 5x2
2
4
6
8
10
ZIGBEE
1
3
5
7
9
R153
R156
0R
0R
PE0
PE1
PE2
PE3
PE4
PE5
C100
18pF
PIO B & PIO E
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
1
2
C101
2.2nF
A
1/1
INIT EDIT
MODIF.
SCALE
REV
DES.
XX
C102
2.2uF
DATE
23-OCT-12
1
+3V3
DATE
SHEET
8
8
VER.
REV.
A
XXX XX-XXX-XX
MISC_ZBEE
SLP_TR
MOSI
JP36
SPCK
This agreement is our property. Reproduction and publication without our written authorization shall expose offender to legal proceedings.
I/O Peripheral
SAM4E-EK
HE10
PA16
PA15
PA13
PA14
+3V3
Note:
Pin1 is not on the indentation side
Pin1
0R
0R
PB12
PB13
PB14
PB0
PB1
PB2
PB3
PB4
PB5
PB6
PB7
+5V
1
A
B
C
D
Figure 6-8. I/O Peripheral.
SAM4E-EK User Guide
42067B−SAM4E−04/2013
35
7.
Revision History
Doc. Rev.
Date
Comments
42067B
04/2013
A feature is added to the feature list in Chapter 4.2
Some typos are fixed
42067A
01/2013
Initial document release.
SAM4E-EK User Guide
42067B−SAM4E−04/2013
36
Atmel Corporation
Atmel Asia Limited
Atmel Munich GmbH
Atmel Japan G.K.
1600 Technology Drive
Unit 01-5 & 16, 19F
Business Campus
16F Shin-Osaki Kangyo Bldg.
San Jose, CA 95110
BEA Tower, Millennium City 5
Parkring 4
1-6-4 Osaki, Shinagawa-ku
USA
418 Kwun Tong Road
D-85748 Garching b. Munich
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