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Interrupts
97
processor saves a small portion of the current
execution on the stack and transfers control to the
appropriate interrupt vector. The interrupt vector is
basically just the address of the routine responsible
for handling the specific type interrupt. The exact
interrupt handling procedure is processor specific.
Interrupt Control
The tx_interrupt_control service allows applications
to enable and disable interrupts. The previous
interrupt enable/disable posture is returned by this
service. It is important to mention that interrupt
control only affects the currently executing program
segment. For example, if a thread disables
interrupts, they only remain disabled during
execution of that thread.
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ThreadX Managed
Interrupts
A Non-Maskable Interrupt (NMI) is an interrupt that
cannot be disabled by the hardware. Such an
interrupt may be used by ThreadX applications.
However, the application’s NMI handling routine is
not allowed to use ThreadX context management or
any API services.
ThreadX provides applications with complete
interrupt management. This management includes
saving and restoring the context of the interrupted
execution. In addition, ThreadX allows certain
services to be called from within Interrupt Service
Routines (ISRs). The following is a list of ThreadX
services allowed from application ISRs:
tx_block_allocate
tx_block_pool_info_get
tx_block_pool_prioritize
tx_block_pool_performance_info_get
tx_block_pool_performance_system_info_get
tx_block_release
tx_byte_pool_info_get
tx_byte_pool_performance_info_get
tx_byte_pool_performance_system_info_get
tx_byte_pool_prioritize
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