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Intel® High Definition Audioβ D27:F0
9.3.1.35
Offset 108h: PVCCAP2 – Port VC Capability Register 2
Table 212.
108h: PVCCAP2 – Port VC Capability Register 2
Size: 32 bit
Default: 0000 0000h
Access
PCI Configuration
Bit Range Default
31 :00
0
B:D:F 0:27:0
Access
Acronym
RO
RSVD
Power Well: Core
Offset Start: 108h
Offset End: 10Bh
Description
Reserved
9.3.1.36
Offset 10Ch: PVCCTL – Port VC Control Register
Table 213.
10Ch: PVCCTL – Port VC Control Register
Size: 16 bit
Default: 00000h
Access
PCI Configuration
Bit Range Default
15 :00
0
B:D:F 0:27:0
Access
Acronym
RO
RSVD
Power Well: Core
Offset Start: 10Ch
Offset End: 10Dh
Description
Reserved
9.3.1.37
Offset 10Eh: PVCSTS – Port VC Status Register
Table 214.
10Eh: PVCSTS – Port VC Status Register
Size: 16 bit
Access
PCI Configuration
Bit Range Default
15 :00
0
Default: 0000h
Power Well: Core
B:D:F 0:27:0
Offset Start: 10Eh
Offset End: 10Fh
Access
Acronym
RO
RSVD
Description
Reserved
9.3.1.38
Offset 110h: VC0CAP – VC0 Resource Capability Register
Table 215.
110h: VC0CAP – VC0 Resource Capability Register
Size: 32 bit
Default: 0000 0000h
Access
PCI Configuration
Bit Range Default
31 :00
0
B:D:F 0:27:0
Access
Acronym
RO
RSVD
Intel® Atom™ Processor E6xx Series Datasheet
154
Power Well: Core
Offset Start: 110h
Offset End: 113h
Description
Reserved