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3 .4 .2 .6
Insertion Running Pointer (IRP) (OAH)
The Insertion Running Pointer (IRP) has the same set of instructions as Instruction Set Background Program. To initiate
an insertion the user must first load the IRP with the address of the insertion program. Then bit Cl can be cleared in the
control register.
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The background program can be interrupted by an insertion command.
The insertion program cannot be interrupted by any other insertion command. In this case the
second insertion request will be delayed until the end of the first one.
Insertion program starting just before a minor cycle start will delay this one.
IRP is updated by the on-board processor after executing a BC stop command.
3 .4 .2 .7
Reserved (0CH)
3 .4 .2 .8
LPIQAP (0EH)
3 .4 .2 .9
Reserved (10H)
3 .4 .2 .1 0
HPIQAP (12H)
3 .4 .2 .1 1
Reserved (14H)
3 .4 .2 .1 2
MIQAP (16H)
3 .4 .2 .1 3
Reserved (18H)
3 .4 .2 .1 4
SRQAP (lAH)
3 .4 .2 .1 5
Reserved (lCH)
3 .4 .2 .1 6
RTSTAD (lEH)
3 .4 .2 .1 7
Reserved (20H)
3 .4 .2 .1 8
Reserved (22H)
UM 10974 Rev B
Low priority interrupt queue start address.
High priority interrupt queue start address.
Message interrupt queue start address.
Status report queue start address.
RT simulation table start address.
Contains the address of the RT Simulation Tables,
which defines the RT status when they are simulated.
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