Download MC68SC302 Passive ISDN Protocol Engine User`s Manual

Freescale Semiconductor,Communications
Inc.
Processor (CP)
GCI-OPCODE—GCI Commands and Command Opcodes
When the GCI bit is zero, the commands are as follows:
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OPCODE—Command Opcode
These bits are set by the host to define the specific SCC command. The precise meaning
of each command below depends on the protocol chosen.
00 = STOP TRANSMIT Command
01 = RESTART TRANSMIT Command
10 = ENTER HUNT MODE Command
11 = INITIALIZE RX Command
When GCI is set in conjunction with the opcode bits, the two GCI commands (ABORT REQUEST and TIMEOUT) are generated. The accompanying CH. NUM. bits should be 10,
and FLG should be set.
OPCODE—Command Opcode (GCI Mode Only)
These bits are set by the host to define the specific GCI command.
00 = TRANSMIT ABORT REQUEST; the GCI receiver sends an abort request on the
A bit.
01 = TIMEOUT Command
10 = Reserved
11 = Reserved
Bit 3—Reserved bit; should be set to zero.
CH. NUM.—Channel Number
These bits are set by the host to define the specific SCC channel that the command is to
operate upon.
00 = Reserved
01 = SCC1
10 = SCC2
11 = SCC3
FLG—Command Semaphore Flag
The bit is set by the host and cleared by the CP.
0 = The CP is ready to receive a new command.
1 = The CR contains a command that the CP is currently processing. The CP clears
this bit at the end of command execution. Note that the execution of the STOP
TRANSMIT or RESTART TRANSMIT commands may not affect the TXD pin until
many clocks after the FLG bit is cleared by the CP, due to the transmit FIFO
latency.
MC68SC302 USER’S MANUAL
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