Download Renesas Starter Kit+ for RX71M Code Generator Tutorial Manual
Transcript
RSK+RX71M 4. Code Generation Using the CS+ plug in Select the SCI7 ‘Setting’ sub-tab and configure SCI7 as illustrated in Figure 4-12. Make sure the ‘Start bit edge detection’ is set as ‘Falling edge on RXD7 pin’ and the ‘Bit rate’ is set to 19200 bps. All other settings remain at their defaults. Figure 4-12 SCI7 Asynchronous Setting R20UT3220EG0100 Rev. 1.00 Jan 23, 2015 Page 21 of 53