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ADV7183B TABLE OF CONTENTS Introduction ...................................................................................... 3 Luma Filter .................................................................................. 26 Analog Front End ......................................................................... 3 Chroma Filter.............................................................................. 29 Standard Definition Processor (SDP)........................................ 3 Gain Operation........................................................................... 30 Functional Block Diagram .............................................................. 4 Chroma Transient Improvement (CTI) .................................. 33 Specifications..................................................................................... 5 Digital Noise Reduction (DNR) ............................................... 34 Electrical Characteristics............................................................. 5 Comb Filters................................................................................ 35 Video Specifications..................................................................... 6 AV Code Insertion and Controls ............................................. 37 Timing Specifications .................................................................. 7 Synchronization Output Signals............................................... 39 Analog Specifications................................................................... 7 Sync Processing .......................................................................... 46 Thermal Specifications ................................................................ 8 VBI Data Decode ....................................................................... 47 Timing Diagrams.......................................................................... 8 Pixel Port Configuration ............................................................... 59 Absolute Maximum Ratings............................................................ 9 MPU Port Description................................................................... 60 ESD Caution.................................................................................. 9 Register Accesses ........................................................................ 61 Pin Configuration and Function Descriptions........................... 10 Register Programming............................................................... 61 Analog Front End ........................................................................... 12 I2C Sequencer.............................................................................. 61 Analog Input Muxing ................................................................ 12 IP2PC Register Maps ........................................................................... 62 Global Control Registers ............................................................... 15 IP2PC Register Map Details ........................................................... 66 Power-Save Modes...................................................................... 15 I2C Programming Examples.......................................................... 88 Reset Control .............................................................................. 15 Mode 1 CVBS Input (Composite Video on AIN5)................ 88 Global Pin Control ..................................................................... 16 Mode 2 S-Video Input (Y on AIN1 and C on AIN4) ............ 88 Global Status Registers................................................................... 18 Mode 3 525i/625i YPrPb Input (Y on AIN2, Pr on AIN3, and Pb on AIN6)................................................................................ 89 Identification............................................................................... 18 Status 1 ......................................................................................... 18 Autodetection Result.................................................................. 18 Status 2 ......................................................................................... 18 Status 3 ......................................................................................... 19 Standard Definition Processor (SDP).......................................... 20 SD Luma Path ............................................................................. 20 SD Chroma Path......................................................................... 20 Sync Processing........................................................................... 21 VBI Data Recovery..................................................................... 21 General Setup.............................................................................. 21 Color Controls ............................................................................ 23 Mode 4 CVBS Tuner Input PAL Only on AIN4 .................... 89 PCB Layout Recommendations.................................................... 90 Analog Interface Inputs ............................................................. 90 Power Supply Decoupling ......................................................... 90 PLL ............................................................................................... 90 Digital Outputs (Both Data and Clocks) ................................ 90 Digital Inputs .............................................................................. 91 Antialiasing Filters ..................................................................... 91 Typical Circuit Connection........................................................... 92 Outline Dimensions ....................................................................... 94 Ordering Guide .......................................................................... 94 Clamp Operation........................................................................ 25 REVISION HISTORY 9/04—Revision 0: Initial Version Rev. 0 | Page 2 of 96