Download SIS1100/3100 Standard design Firmware Version 5/6 User Manual

SIS Documentation
SIS1100/3100
PCI to VME
5.6.3 Block transfer Write Direct VME Bus Access
CTL:
CTL:
0x24
0x81
(REQ , WR and BT)
(END and EOT; arbitrary: WR and BT)
Request (from PCI)
Confirmation from SIS3100
Bit 31
Bit 0
SC_PROT
CTL
SP: 01
Bit 31
Bit 0
BE: 0F
address nodifier (with CTL:AM =1 only)
address A63-32 (with CTL:A64 =1 only)
(Start) address A31-0 (4 Byte aligned)
datum 1
datum 2
.......
datum n
SC_PROT
CTL : 0x81
SP: 01
BE: 0F
SC_PROT
CTL: 0x26 ?
SP: 01
---
CTL: 0x27 ?
SP: 01
EC
or in error case
SC_PROT
5.6.4 Block transfer Read Direct VME Bus Access
CTL:
CTL:
CTL:
0x20
0x22
0x81
(REQ and BT)
(CONF and BT; arbitrary: WR and BT)
(END and EOT; arbitrary: WR and BT)
Request (from PCI)
Confirmation from SIS3100
Bit 31
Bit 0
SC_PROT
CTL : 0x20
SP: 01
Bit 31
Bit 0
BE: 0F
address modifier (with CTL:AM =1 only)
address A63-32 (with CTL:A64 =1 only)
(Start) address A31-0 (4 Byte aligned)
BC (byte count; 4-er steps: 4,8, ...)
SC_PROT
CTL: 0x22
SP: 01
---
CTL: 0x81 ?
SP: 01
---
CTL: 0x23 ?
SP: 01
EC
datum 1
datum 2
..
datum n
SC_PROT
or in error case
SC_PROT
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