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3. Product Description 3.1. Overview Acqiris Analyzers are designed to provide superior measurement precision and accuracy. Key acquisition specifications (such as DC accuracy, integral and differential non-linearity) have been optimized to deliver maximum measurement fidelity. Careful circuit layout, custom IC’s and special packaging techniques have all been employed to reduce the overall random and correlated system noise. The use of custom IC’s also dramatically reduces the total number of discrete components required. This has tremendous benefits on reliability and also allows the modules to use a minimal amount of power. The AP series Analyzers are PCI modules that plug directly into any vacant PCI slot in a PC. They are fully programmable over the PCI bus and deliver 2 GS/s (AP240/AP201) and 1 GS/s (AP235/AP101) buffered acquisition performance. An acquired data sequence can be processed and transferred to a host processor over the PCI bus at speeds up to 100 Mbytes/s, while simultaneously acquiring the next data sequence. This explains the use of the term Sustained Sequential Recording (SSR). When appropriately configured, an Analyzer can reliably acquire all incoming triggers up to a rate considerably higher than that achievable by a conventional digitizer. This is particularly useful for the case of constant trigger rates in the kHz range. For complete technical specifications concerning your particular analyzer please refer to the product’s Specifications & Characteristics. In addition, we maintain up-to-date versions of all product data sheets on our web site (www.acqiris.com). The data sheets are available in pdf format and are best viewed using Adobe Acrobat software. If you have trouble accessing our web site, or viewing the data sheets, please contact your nearest sales office. A P235/AP240 BLO CK D IAGRA M Front Panel Signals CH1 Dual C hannel M ezzanine C H1 CH 2 C ross Point Sw itch ADC 1 1 G S/s 8-bit M AC 1 D em ux & M em ory Processing Block C H2 Offset and G ain C ontrol Ditherer 8-bit DAC ADC 2 M U LTI_IO 1 G S/s 8-bit EXT M AC 2 2xFPGA XC2V 3000 24x m em ory D em ux & M em ory CKin Trig Out I/O A CO S M ezzanine C PLD Trigger C ircuit I/O B Synchronizer P1 P2 Internal Reference Clock Clock Synch & Start PLX PCI Interface 100 M B/s PC I B us User Manual: Family of Analyzers Page 27 of 56