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A.1 MAPI-400+100 Interface A.1.1 MAPI0 Interface Assignment A.1.1.1 Assignment of J1/P1 (CO600) connector: Pin MPC pin Signal name 1 3 5 7 9 11 13 15 17 27 29 30 31 32 33 35 36 37 38 39 42 43 44 45 47 48 49 50 51 53 54 55 56 57 C9 A10 B10 A11 D10 C10 B11 D11 C11 D3 A2 E17 D4 D18 C3 A3 D19 D5 D20 B3 F17 C4 E18 A4 C5 F18 B4 E19 B5 A5 A6 C6 C2 B6 AAN51_PQB7 AAN52_PQA0 AAN53_PQA1 AAN54_PQA2 AAN55_PQA3 AAN56_PQA4 AAN57_PQA5 AAN58_PQA6 AAN59_PQA7 A_TPUCH0 A_TPUCH1 MPWM0 A_TPUCH2 MPWM1 A_TPUCH3 A_TPUCH4 MPWM2 A_TPUCH5 MPWM3 A_TPUCH6 MPWM16 A_TPUCH7 MPWM17 A_TPUCH8 A_TPUCH9 MPWM18 A_TPUCH10 MPWM19 A_TPUCH11 A_TPUCH12 A_TPUCH15 A_TPUCH13 A_T2CLK A_TPUCH14 61 M2 /IRQ1B_SGP 62 M1 /IRQ0B_SGP 63 L3 /IRQ3B_SGP 64 M3 /IRQ2B_SGP 65 W18 /IRQ5B_SGP 66 L4 /IRQ4B_SGP MOTOROLA A-28 Description corresponding to data sheet See AAN48_PQB4 Analog input: passed on as a separate signal to the QADC. See AAN52_PQA0 See AAN52_PQA0 See AAN52_PQA0 See AAN52_PQA0 See AAN52_PQA0 See AAN52_PQA0 See AAN52_PQA0 A_TPUCH0 - A_TPUCH15: Time Processor Unit A channel See A_TPUCH0 MPWM0 - MPWM3, MPWM16 - MPWM19: Pulse width modulation See A_TPUCH0 See MPWM0 See A_TPUCH0 See A_TPUCH0 See MPWM0 See A_TPUCH0 See MPWM0 See A_TPUCH0 See MPWM0 See A_TPUCH0 See MPWM0 See A_TPUCH0 See A_TPUCH0 See MPWM0 See A_TPUCH0 See MPWM0 See A_TPUCH0 See A_TPUCH0 See A_TPUCH0 See A_TPUCH0 to clock or gate the timer count register 2 (TCR2) within the TPU. See A_TPUCH0 Interrupt request, SGPIO, reservation: to indicate that the internal core initiated a transfer. Interrupt request, SGPIO Interrupt request, SGPIO, kill reservation, retry: indicates to a master that the cycle is terminated but should be repeated. Interrupt request, SGPIO, cancel reservation: to clear its reservation. Interrupt request, SGPIO, mode clock [1]: sampled at the negation of /PORESET in order to configure the PLL/clock mode. Interrupt request, SGPIO, address type: indicates one of the 16 ”address types”. The address type signals are valid at the rising edge of the clock in which the special transfer start (STS) is asserted. EVB555 Quick Reference
