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The system management pins of both XMC sites are also connected to the backplane
Serial Management Bus. Their addresses are determined by the three Geographic
Address pins generated by the I2C DIP Switch device as shown in the table below.
These are the 7-bit device addresses:
Table 5-33 XMC Geographic Address
XMC_GA[2:0]
I2C Address
000
0x50
001
0x51
010
0x52
011
0x53
100
0x54
101
0x55
110
0x56
111
N/A
The local processor communicates with the BMM via the COM2 port from the
MPC8641D. The BMM serial interface is enabled when the COM2 transceiver is
disabled (using the COM2 Transceiver Enable Bit in Control Register 1).
The BMM is connected to on-board I2C Bus 1, providing access for out-of-band
monitoring of board status information such as on-board voltage rail status or board
temperatures by any other board in the system.
The BMM is programmed using bits in Control Register 1, though programming
may only be performed when the NVRAM Write Enable Link (E18) is fitted.
The BMM is powered from the P3V3_AUX supply, meaning that board
configuration information or BIT status can be read out of the device without
enabling the main +5V power rail. An I2C buffer is sited on the on-board I2C Bus 1 to
allow the BMM to access the Power Manager device and XMC Geographic Address
I2C DIP Switch when the on-board supplies are not powered up.
Publication No. SBC610-0HH/2
Functional Description 71