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74
7
Table 42. AHB Status register
The HWRITE signal of the AHB transaction that caused the error.
6: 3
The HMASTER signal of the AHB transaction that caused the error.
2: 0
The HSIZE signal of the AHB transaction that caused the error
Table 43. AHB Failing address register
31
0
AHB FAILING ADDRESS
31: 0
11.4
The HADDR signal of the AHB transaction that caused the error.
Vendor and device identifiers
The core has vendor identifier 0x01 (Gaisler Research) and device identifier 0x052. For description of
vendor and device identifiers see GRLIB IP Library User’s Manual.
11.5
Configuration options
Table 44 shows the configuration options of the core (VHDL generics).
Table 44. Configuration options
11.6
Generic
Function
Allowed range
Default
pindex
APB slave index
0 - NAHBSLV-1
0
paddr
APB address
0 - 16#FFF#
0
pmask
APB address mask
0 - 16#FFF#
16#FFF#
pirq
Interrupt line driven by the core
0 - 16#FFF#
0
nftslv
Number of FT slaves connected to the cerror vector
1 - NAHBSLV-1
3
Signal descriptions
Table 45 shows the interface signals of the core (VHDL ports).
Table 45. Signal descriptions
Signal name
Field
Type
Function
Active
RST
N/A
Input
Reset
Low
CLK
N/A
Input
Clock
-
AHBMI
*
Input
AHB slave input signals
-
AHBSI
*
Input
AHB slave output signals
-
STATI
CERROR
Input
Correctable Error Signals
High
APBI
*
Input
APB slave input signals
-
APBO
*
Output
APB slave output signals
-
* see GRLIB IP Library User’s Manual
11.7
Library dependencies
Table 46 shows libraries used when instantiating the core (VHDL libraries).
Table 46. Library dependencies
Library
Package
Imported unit(s)
Description
GRLIB
AMBA
Signals
AHB signal definitions
GAISLER
MISC
Component
Component declaration