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APPENDIX I
BASIC 1.2/EXTENDED 1.1 vs COLOR EXTENDED 2.0 DIFFERENCES
SUPER EXTENDED BASIC UNRAVELLED II
ORIGIN:SPECTRAL ASSOC
REVISED:12/26/1999 WALTER K ZYDHEK
BASIC 1.2/EXTENDED 1.1 vs COLOR EXTENDED 2.0 DIFFERENCES
Listed below are all of the sections of code where the Basic 1.2 and Extended Basic 1.1 ROMs differ from the
bottom half of the CoCo 3 ROM. If these changes are made in the Color Basic Unravelled and Extended Basic Unravelled
books, those books can then be used with the new CoCo 3 ROM. The code below is CoCo 3 code.
80C0
* EXBAS WARM START ENTRY POINT
PATCH1
XBWMST
FCB
$FF
SET TO NOT ALLOW A RESET TO WARM START HERE
80E8
8100
8101
811C
811D
8139
L80E8
FCC
FCB
FCC
FCB
FCC
FCB
'EXTENDED COLOR BASIC 2.0'
CR
'COPR. 1982, 1986 BY TANDY '
CR
'UNDER LICENSE FROM MICROSOFT'
CR
813A
PATCH13
FCB
CR,0
8C18
* DLOAD COMMAND
DLOAD
JSR
LA429
CLOSE FILES
8C37
8C39
8C3B
8C3D
8C41
8C43
* PRESSING THE RESET WILL BRING YOU HERE
INT.RSET ORCC #$50
DISABLE IRQ, FIRQ INTERRUPTS
LDA
#MC3+MC1
32K INTERNAL ROM, MMU DISABLED, NON COCO COMPATIBLE
STA
INIT0
CLR
SAM+$1E
JMP
$C000
* FIRQ SERVICING ROUTINE ADDITIONS
CLR
INT.FLAG
SET THE INTERRUPT FLAG TO NOT VALID
CLR
PIA1+3
DISABLE PIA 1. PORT B INTERRUPTS
* NON SELF-STARTING ROM CARTRIDGE INITIALIZATION CODE
LDA
#COCO+MMUEN+MC3+MC2
ENABLE MMU, 16K INTERNAL/16K EXTERNAL ROM
STA
INIT0
ALSO ENABLE STANDARD SCS, CONSTANT RAM AT FE00
CLR
SAM+$1E
FORCE THE ROM MODE
RTS
* PUT A CHARACTER ON THE SCREEN PATCH
PATCH22A
L8C37
PSHS A,B,X
SAVE REGISTERS
LDX
CURPOS
POINT X TO THE CURRENT CHARACTER POSITION
LDB
HRWIDTH
GET THE HI-RES TEXT MODE
LBNE $F7AE
BRANCH IF IN A HI-RES TEXT MODE (ALINK22)
L8C41
LDB
1,S
RESTORE ACCB TO ITS FORMER GLORY
JMP
LA30E
GO BACK TO THE NON HI-RES CHARACTER DISPLAY ROUTINE
8C46
8C48
8C4A
8C4C
8C4F
8C51
8C54
* CLS PATCH
PATCH23A
L8C46
PSHS
TST
BEQ
JMP
L8C4F
PULS
JMP
NOP
A02A
A02C
A02F
A032
A035
A037
A039
A03A
A03C
A03E
A040
A042
A044
A046
A048
A04A
A04C
A04F
A051
A053
A055
* NEW 2.0 INITIALIZATION CODE
LA02A
LDA
#BLOCK7.2
STA
MMUREG+2
LDX
#PIA1
LDD
#$FF34
CLR
1,X
CLR
3,X
DECA
STA
,X
LDA
#$F8
STA
2,X
STB
1,X
STB
3,X
CLR
2,X
LDA
#2
STA
,X
LDA
#$FF34
LDX
#PIA0
CLR
1,X
CLR
3,X
CLR
,X
STA
2,X
8C1B
8C1D
8C1F
8C22
8C25
8C28
8C2B
8C2E
8C30
8C33
8C36
CC
HRWIDTH
L8C4F
$F6AD
CC
LA913
SAVE THE ZERO FLAG
CHECK THE HI-RES TEXT MODE
BRANCH IF NOT IN A HI-RES TEXT MODE
GO DO A HI-RES CLS (ALINK23)
RESTORE THE ZERO FLAG
GO DO A NON HI-RES CLS
* PUT THE 'NORMAL' BLOCK BACK INTO LOGICAL BLOCK 2;
* THE INITIALIZATION CODE AT $C000 USES BLOCK 6.4.
POINT X TO PIA1
*
CLEAR CONTROL REGISTER A ON PIA1
CLEAR CONTROL REGISTER B ON PIA1
A REG NOW HAS $FE
BITS 1-7 ARE OUTPUTS, BIT 0 IS INPUT ON PIA1 SIDE A
=
= BITS 0-2 ARE INPUTS, BITS 3-7 ARE OUTPUTS ON B SIDE
* ENABLE PERIPHERAL REGISTERS, DISABLE PIA1 MPU
* INTERRUPTS AND SET CA2, CB2 AS OUTPUTS
SET 6847 MODE TO ALPHA-NUMERIC
*
* MAKE RS232 OUTPUT MARKING
POINT X TO PIA0
CLEAR PIA0 CONTROL REGISTER A
CLEAR PIA0 CONTROL REGISTER B
SET PIA0 SIDE A TO INPUT
* SET PIA0 SIDE B TO OUTPUT
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