Download lcd-40xz10f_sm4.51 MB

FILE NO.
SERVICE MANUAL
LCD-40XZ10F
LCD TV
PRODUCT CODE No.
1 682 349 55: PAL-BG(TV) DTV
REFERENCE No.:SM0915097
CONTENTS
Safety precautions………………………………………………………………………..… 3
Alignment instructions …………………………….…….………………………………… 5
Method of software upgrading…………………………………………………………….. 11
Working principle analysis of the unit……………………………….………….………….15
Block diagram…………………………………..………………………………….…………18
IC block diagram and instruction…………………………………………………………..……
19
Wiring diagram ……………………………………………………………………………. 23
Troubleshooting guide ………………………………………………………………..…… 24
Schematic diagram………………………………………………………………………… 27
APPENDIX-A: Main assembly list
APPENDIX-B: Exploded View
Assemble & Disassemble the Pedestal Base
Wall mounting instructions
Attention: This service manual is only for service personnel to take reference with. Before
servicing please read the following points carefully.
Safety precautions
1. Instructions
Be sure to switch off the power supply before replacing or welding any components or
inserting/plugging in connection wire Anti static measures to be taken (throughout the entire
production process!):
a) Do not touch here and there by hand at will;
b) Be sure to use anti static electric iron;
c) It’s a must for the welder to wear anti static gloves.
Please refer to the detailed list before replacing components that have special safety requirements.
Do not change the specs and type at will.
2. Points for attention in servicing of LCD
2.1 Screens are different from one model to another and therefore not interchangeable. Be sure to
use the screen of the original model for replacement.
2.2 The operation voltage of LCD screen is 700-825V. Be sure to take proper measures in
protecting yourself and the machine when testing the system in the course of normal operation or
right after the power is switched off. Please do not touch the circuit or the metal part of the module
that is in operation mode. Relevant operation is possible only one minute after the power is
switched off.
2.3 Do not use any adapter that is not identical with the TV set. Otherwise it will cause fire or
damage to the set.
2.4 Never operate the set or do any installation work in bad environment such as wet bathroom,
laundry, kitchen, or nearby fire source, heating equipment and devices or exposure to sunlight etc.
Otherwise bad effect will result.
2.5 If any foreign substance such as water, liquid, metal slices or other matters happens to fall into
the module, be sure to cut the power off immediately and do not move anything on the module lest it
should cause fire or electric shock due to contact with the high voltage or short circuit.
2.6 Should there be smoke, abnormal smell or sound from the module, please shut the power off at
once. Likewise, if the screen is not working after the power is on or in the course of operation, the
power must be cut off immediately and no more operation is allowed under the same condition.
2.7 Do not pull out or plug in the connection wire when the module is in operation or just after the
power is off because in this case relatively high voltage still remains in the capacitor of the driving
circuit. Please wait at least one minute before the pulling out or plugging in the connection wire.
2.8 When operating or installing LCD please don’t subject the LCD components to bending, twisting
or extrusion, collision lest mishap should result.
2.9 As most of the circuitry in LCD TV set is composed of CMOS integrated circuits, it’s necessary
to pay attention to anti statics. Before servicing LCD TV make sure to take anti static measure and
ensure full grounding for all the parts that have to be grounded.
2.10 There are lots of connection wires between parts behind the LCD screen. When servicing or
moving the set please take care not to touch or scratch them. Once they are damaged the screen
would be unable to work and no way to get it repaired.
If the connection wires, connections or components fixed by the thermotropic glue need to
disengage when service, please soak the thermotropic glue into the alcohol and then pull them out
in case of dagmage.
2.11 Special care must be taken in transporting or handling it. Exquisite shock vibration may lead to
breakage of screen glass or damage to driving circuit. Therefore it must be packed in a strong case
before the transportation or handling.
2.12 For the storage make sure to put it in a place where the environment can be controlled so as to
prevent the temperature and humidity from exceeding the limits as specified in the manual. For
prolonged storage, it is necessary to house it in an anti-moisture bag and put them altogether in one
place. The ambient conditions are tabulated as follows:
Temperature
Humidity
Scope for operation
5 ~ +35 oC
Scope for storage
-15~ +45 oC
Scope for operation
20% ~ 80%
Scope for storage
<= 80%
2.13 Display of a fixed picture for a long time may result in appearance of picture residue on the
screen, as commonly called “ghost shadow”. The extent of the residual picture varies with the
maker of LCD screen. This phenomenon doesn’t represent failure. This “ghost shadow” may remain
in the picture for a period of time (several minutes). But when operating it please avoid displaying
still picture in high brightness for a long time.
3. Points for attention during installation
3.1 The front panel of LCD screen is of glass. When installing it please make sure to put it in place.
3.2 For service or installation it’s necessary to use specified screw lest it should damage the screen.
3.3 Be sure to take anti dust measures. Any foreign substance that happens to fall down between
the screen and the glass will affect the receiving and viewing effect
3.4 When dismantling or mounting the protective partition plate that is used for anti vibration and
insulation please take care to keep it in intactness so as to avoid hidden trouble.
3.5 Be sure to protect the cabinet from damage or scratch during service, dismantling or mounting.
Alignment instructions
Test equipment
VG-848 (VGA, YPbPr signal generator)
VG-849 (HDMI digital video signal generator)
CA210 (color analyzer)
1
Alignment flow
1.1 Voltage of power supply test
According to the wiring diagram “9232KE6302JL”, connect power board, digital board, IR board
correctly; then power on and press key “standby” .
a) Test voltage of socket X801 each pin in turn listed as Table 1.
Table 1
X801
Pin1
2
3
Voltage of X801 each pin
4
5
6
7 、8
9 、10
11
12
13
3.2V～
4.9V～
3.4V
5.1V
8.55
Voltage
>2.5 V
0
4.85
V ～
5.35 V
0
4.85
5.35 V
V ～
V～
9.45
0
11.4
V ～
12.6 V
V
b) Test voltage of socket XV03 each pin in turn listed as Table 2.
Table 2
Voltage of XV03 each pin
XV03
Pin1、2
3、4、5
Voltage
23.8 V～25.2 V
0
0
1.2 Adjustment flow chart as Fig.1
Check if DDC、、HDCP KEY and FLASH
have been burned.
combination
adjustment
for
general
assembly
white balance adjustment
Connect to central signal source, check if
Check accessories and packing.
TV functions are normal -omitted channel,
analog parameters control, etc; check if
output of earphone and speaker are
setup before leaving factory
normal.
Input HDMI signal,check if the display is normal;
Input AV/SVIDEO/SCART signal，check if
check if every function is normal –analog
functions of every channel are normal.
parameter control, horizontal/vertical center, etc.
Input high-definition component signal
Input VGA signal，check if the display is normal;
(mode), check if every YPbPr function is
check if every function is normal -analog
normal.
parameter control, horizontal/vertical center, etc.
Fig.1 Adjustment flow chart
2
Alignment instruction
2.1 Unit adjustment
2.1.1
According to the wiring diagram “9232KE5201JL”, connect power board, main board,
IR board, key board correctly; then power on, check if the display is normal.
2.1.2
a)
b)
Using method of factory menu
First press key “SOURCE”，then press number key “2、5、8、0” in turn to enter into initial
factory menu;
Press keys “CH+” and “CH-” can move cursor to each page of initial factory menu, then press
d)
key “OK” can enter into adjustment menu of each page;
Press keys “CH+” and “CH-” can move cursor upwards and downwards within one adjustment
page;
Move cursor to one adjustment item, then press keys “VOL-” and “VOL+” can adjust it;
e)
f)
g)
Press key “MENU” can exit adjustment menu of one page to its superior factory menu;
Press key “EXIT” can exit factory menu at any time;
Press key “OK” can enter into inferior factory menu;
c)
h)
Factory menu item “ADC Calibrate” is used to correct ADC of VGA and Component
channel;
i)
j)
Factory menu item “W/B ADJUST” is used to adjust white balance;
Factory menu item “POWER MODE” is used to set power-on mode, “Standby” means the
set will be in standby state after power-on; “MEM” means the set will be in the state before
the last power-off; “ForceOn” means the set will be working automatically after power-on,
this mode is also used for factory-machine-aging; default setting should be “Standby” mode
unless specified by customer requirement;
k)
Factory menu item “ISP MODE” is used to upgrade unit software from VGA port when the
item is set as “ON” and the set is connected to ISP adjustment equipment; DDC function of
VGA port will be recovered when the item is set as “OFF”; the value of the item can not be
kept in the memory, that is to say the item is reset as “OFF” after power-on again;
l)
Factory menu item “RESET ALL” is used to reset factory menu data and user menu data;
after execute the item, the set will be started up again and the startup guided picture will be
displayed;
m) Factory menu item “FACTORY CHANNEL PRESET” is used to preset factory programs
data; it is necessary to connect to central signal source for DTV searching programs. Now
digital frequency of central signal CH28(529.5 MHz) and CH33(564.5 MHz) are distributed
to Australia programs. Primary preset programs would not be modified along with the
changing of central signals, so please select item DTV in menu Channel to manual search
digital programs, the process will spend about 15s;
n)
Factory menu item “CUSTOM CHANNEL PRESET” : first delete all DTV/ATV programs for
factory adjustment, then preset ATV channel data according to customer order requirements;
please execute the item to clear out all programs for factory adjustment before leaving
factory;
o)
Factory menu item “MST Debug” :default setting “OFF” is used for engineering models
whose RS232 functions can measure up to design specifications; setting “ON” is convenient
for debugging by developing tools; the value of the item can not be kept in the memory, that
is to say the item is reset as “OFF” after power-on again;
p)
Factory menu item “BACKLIGHT” is used to adjust backlight brightness, adjust the item and
test voltage of X801-12# (PWM) to measure up to the maximum PWM voltage in panel
specification;
q)
Factory menu item “SSC ADJUST” is used to adjust expended functions of frequency
content, the software having been preset according to model need not be adjusted again;
r)
Factory menu item “AUDIO Curve” is used to adjust audio curve; without special customer
requirements, the software having been preset according to model need not be adjusted
again;
If the software has been upgraded or EEPROM has data already, please execute item
“RESET ALL” before adjustment for the first time.
ADC calibration
ADC calibration of VGA channel
Switch to VGA channel;
Press key “SOURCE”, then press number keys “2、5、8、0” to enter into initial factory menu;
Move cursor to item “ADC ADJUST” and press key “OK” to enter into interior factory menu;
Input VGA signal (VG-848 Timing:856(1024×768/60 Hz)，Pattern 920 Gray 8 step(H)),
2.1.3
a)
b)
c)
d)
move cursor to item “MODE”，press keys “▲” and “▼” to select item “RGB”, then move
cursor to item “AUTO ADC” and press key “OK” to begin adjustment automatically until
adjustment completion.
ADC calibration of YPbPr channel
a) Switch to YPbPr channel;
b) Press key “SOURCE”，then press number keys “2、5、8、0” to enter into initial factory menu;
c) Move cursor to item “ADC ADJUST” and press key “OK” to enter into interior factory menu;
d) Input YPbPr signal (VG848 Timing 976（720P）,Pattern 918 SMPTE Color Bar), move
cursor to item “MODE”，press keys “▲” and “▼” to select item “YPbPr（HD）”, then move
cursor to item “AUTO ADC” and press key “ENTER” to begin adjustment automatically, a
prompt “success” displayed under “AUTO ADC” means auto-adjustment completed
successfully;
e) Input YPbPr signal (VG848 Timing 968（408I）,Pattern 918 SMPTE Color Bar), move
cursor to item “MODE”，press keys “▲” and “▼” to select item “YPbPr（SD）”, then move
cursor to item “AUTO ADC” and press key “ENTER” to begin adjustment automatically, a
prompt “success” displayed under “AUTO ADC” means auto-adjustment completed
successfully;
2.2 White balance adjustment
Unless specified by customer, default COOL color temperature is 12000K, chromaticity
coordinates is （ 272 、 278 ） ; default Normal color temperature is 9300K, chromaticity
coordinates is（285、293）; default Warm color temperature is 6500K, chromaticity coordinates
is （323、329）.
2.3 White balance adjustment processes
The set should be working above 30 minutes before white balance adjustment for it would be in
a stabler state. Use white balance apparatus CA-210 and switch to any channel have checked.
a) Switch to HDMI channel；
b) Press key “SOURCE”, then press number keys “2、5、8、0” in turn to enter into initial factory
menu;
c)
d)
e)
f)
g)
h)
i)
Move to item “W/B ADJUST” and press key “OK” to enter into interior factory menu;
Input DVI/HDMI signal （VG-848 Timing: 856(1024×768/60 Hz)，Pattern:921 16 step
Gray）, move cursor to item “MODE”, press keys “▲” and “▼” to select item “HDMI1” or
other HDMI channels, then move cursor to item “TEMPERTURE”, press keys “▲” and “▼”
to select item “COOL”;
Adjust items “R GAIN、G GAIN、B GAIN” to set chromaticity coordinates of the 14th step
is （272、278）;
Adjust item “R Offset、G Offset、B Offset” to set chromaticity coordinates of the 4th step is
（272、278）;
During adjustment , make sure that color temperature of bright step is (X=272±10 Y=278±10)
and color temperature of dark step is (X=272±10 Y=278±10);
Then move cursor to item “COPY ALL” to copy white balance data to the other channels
except DTV channel;
Check if color temperature of HDMI NORMAL and WARM meet requirements as below:
bright step: allowable error is ±10, dark step: allowable error is ±10;
otherwise adjust items “R_GAIN /B_GAIN/R_OFF/B_OFF” to meet requirements and then
save data;
j)
k)
l)
Switch to other channels ATV, AV，COMPONENT and D-SUB , check if color temperature of
COOL，NORMAL and WARM meet requirements; otherwise adjust them respectively with
16 step Gray signal and the same adjustment method as HDMI channel’s; exit menu “W/B
ADJUST” after adjustment and the data would be saved automatically;
DTV channel adjustment: switch to DTV channel, input 16 step Gray signal, enter into
factory menu, then begin adjustment followed by steps “e, f, g”;
Adjustment rules for reference as below:
adjust B gun: adjust B gun value downwards , then coordinates of X、Y will rise;
adjust B gun value upwards , then coordinates of X、Y will descent;
adjust R gun will effect the coordinate of X , and effect the value of Lv a little:
adjust R gun value upwards , then coordinate of X will rise;
adjust R gun value downwards , then coordinate of X will descent;
adjust G gun will effect the coordinate of Y , and effect the value of Lv a lot:
adjust G gun value upwards , then coordinate of Y will rise;
adjust G gun value downwards , then coordinate of Y will descent;
note: default color temperature for SANYO customer is Normal; change to picture mode
Dynamic, adjust chromaticity coordinates of color temperature Normal and Cool;
only adjust chromaticity coordinates of color temperature Cool for other customers when
picture mode is Dynamic.
3
Performance check
3.1 TV functions
Connect RF port to central signal source, first enter into menu CHANNEL, then search
programs automatically, check if there is any omitted program, check if the output of speakers is
normal, check if the picture is normal.
3.2 AV/S-Video port
Input AV/S-Video signal respectively, check if the picture, the sound and other functions are
normal;
3.3 VGA port
Input VGA signal from signal generator VG-848 with VGA formats as Table 5 respectively, check
if the display and the sound are normal; if there is any deviation of line or field, enter into main
menu, select and execute items “Picture->Screen->Auto Adjusting” in turn to correct them
automatically.
Table 5
No.
Definition
VGA receiving signal formats
Horizontal
Vertical
Dot-pulse
frequency
frequenvy
frequency
（kHz）
（Hz）
（MHz）
Remark
1
640×480
31.469
59.94
25.175
IBM
2
720×400
31.469
70.086
28.322
IBM
3
640×480
37.861
72.809
31.5
VESA
4
640×480
37.5
75
31.5
VESA
5
800×600
35.156
56.25
36
VESA
6
800×600
37.879
60.317
40
VESA
7
800×600
48.077
72.188
50
VESA
8
800×600
46.875
75
49.5
VESA
9
1024×768
48.363
60.004
65
VESA
10
1024×768
56.476
70.069
75
VESA
11
1024×768
60.023
75.029
78.75
VESA
12
1152×864
67.5
75
108
VESA
13
1280×960
60
60
108
VESA
14
1280×1024
63.98
60.02
108
VESA
15
1280×1024
80
75
135
SXGA
16
1440×900
-
60
-
-
17
1680×1050
-
60
-
-
18
1360×768
47.7
60
85.5
-
3.4 HDMI port
Input HDMI signal from signal generator VG-849 with the formats as Table 4 and Table 5
respectively, check if the display and the sound（32 KHz、44.1 KHz、48 KHz）are normal under
the circumstances of power-on/off, switching channel, switching signal format, etc.
3.5 Other functions check
a) Check if the functions are normal —timing turn-on/off 、 turn-off of sleeping time 、
picture/sound mode、OSD、stereo and digital audio interface, etc.;
b)
c)
d)
Check if audio only digital programs (RADIO) are normal;
For UK models, check if MHEG function of digital programs are normal;
Check if common interface（CI：Common Interface）is normal;
e)
For New Zealand models, check if function of logic channel number (LCN) is normal, check
if function of Over Air Download（OAD）is normal;
f)
For France, UK and Italy models, check if function of logic channel number (LCN) is
normal.
4
User menu setup before leaving factory
Enter into page “LOCK” of user menu, select submenu item “Restore Factory Default” to preset
items before leaving factory as below:
a) Clear out all programs information;
5
b)
c)
Clear out information of parental control (VCHIP);
Default setup of user analog data;
d)
e)
Set Menu Language as English;
Set Power on MODE as Off.
Instruction of factory software burning as Table 6
Table 6
No.
Part No.
Instruction of factory software burning
Part type
Instruction of
Burned
software
before
function
SMT
Burning method
burned
N111
5272564002
EN25Q64-104HIP
FLASH
Yes
with
program
ALL11, write-protect setup,
refer to Note 1 in detail
N108
5272404002
AT24C04
HDMI KEY
Yes
burned with program ALL11
NA04
5272402002
AT24C02
HDMI EDID
Yes
burned with program ALL11
NA05
5272402002
AT24C02
HDMI EDID
Yes
burned with program ALL11
Yes
burned with program ALL11
Yes
burned with program ALL11
HDMI EDID
NA06
5272402002
AT24C02
(supporting
the 3rd HDMI)
N106
5272402002
AT24C02
VGA EDID
Note 1: Write-protect setup method
Enter into burning interface of program ALL-100, select item “Config”, press item “config
Setting”, set item “Protect” as “All Protect”; be sure to select item “Config” before burning
software, and write-protect must be re-set after burning program ALL-100 startup every time.
Note 2: Burning and upgrading software method with burning tool ISP
1） Main board upgrading: connect the cable of burning tool ISP to Debug port（location No. X807）
of main board;
Unit upgrading: connect both VGA ports between burning tool ISP and main board, then enter
into factory menu and set item “ISP Mode” as “ON”;
2） Use on-line burning tool of Mstar, enter into menu “Device”, select item “WP Pin pull to high
during ISP” as Fig. 2; for the normal erasing process, make sure hardware write-protect of Flash
is canceled;
3)
Fig. 2 Write-protect setup
Select menu “Connect”, a dialog “Device Type is EN25Q64” will be displayed as Fig. 3 , that is
Fig. 3 Device EN25Q64 successful connection
If failing to connecting, select the first menu “Device” and select item “EN25Q64” manually, then
press key “Connect”.
4)
Press key “Read”，select burning file (for example MERGE.bin) as Fig. 4.
Fig. 4 Burning file
5)
Select menu “Auto”, then select items “All chip”, “program” and other configuration as Fig. 5
Fig. 5 Burning Configuration
6)
Press key “Run” as Fig. 4 to begin burning software, there are two steps for the process: Erase
and Program
normal burning steps are as follows:
the first step “Erasing…，Flash Status: 03” will be lasting for a moment, otherwise skipping over
means unsuccessful erasing; please confirm process （2） and then burn software again;
the following step “Programming…，Flash Status:00” will be done until a prompt “Pass” is
displayed.
7)
A prompt “Pass” will be displayed beside the key “Run” for successful burning as Fig. 6
Fig. 6
A prompt “Pass” beside the key “Run” for successful burning
8) Need not exit ISP burning interface and only repeat the process 3）and 5）to go on burning
software for other sets.
Note 3: On-line burning and upgrading method from USB port
1） Be sure to format a U disk as FAT32;
2） Copy program file to the U disk with the name “Merge.bin”;
3） Power on, be sure to switch to ATV or DTV channel and not to display OSD interface; insert the U
disk into a USB port, then USB upgrading process will begin automatically;
4） Upgrading processes:
A、Reading data from the U disk:
A prompt “Searching USB” is displayed and an indicating light of U disk is twinkling;
B、Burning Flash:
A prompt “Updating! Please don’t power off!!!” is displayed and an indicating bar is showing
upgrading schedule; the set will be in Standby mode after the burning process completed;
5） Start up the set again, enter into factory menu to verify software version and time parameters;
then execute item “RESET ALL” to complete the whole burning process.
*** Method of burning from USB could not be sure to be suitable for all kinds of U disks, so please try
other U disks if necessary.
Working principle analysis of the unit
1、
PAL/SECAM signal flow
PAL/SECAM signal from antenna is inputted into TUNER FQD1116 which is
an analog-digital-integrative model, the analog RF signal is demodulated by the
TUNER, then CVBS signal and SIF(sound intermediate frequency) signal are
outputted. TUNER FQD1116 is controlled by main chip MSD209（with embedded
CPU) through I2C bus.
TV CVBS signal is inputted into main chip MSD209 directly to be processed
by modules “VIDEO DECODER、DEINTERLACE and SCALER”, then LVDS
signal is outputted to drive LCD panel.
SIF audio signal is inputted into main chip MSD209 directly and processed
by modules of demodulation, pre-amplification, acoustic effect processing and
volume control, then the audio signal are inputted into left and right sound tracks
of earphone amplifier BH3547F to be amplified and then are divided to two
signals, one is outputted to earphone jack, the other is inputted into class D audio
power amplifier R2A15112 to be amplified and then be outputted to speakers.
2、 DVB-T signal flow
DVB-T signal from antenna is inputted into TUNER FQD1116 to be tuned,
RF amplified, IF amplified and SAW FILTER inside, then IF signal is outputted to
demodulating chip CE6353 to be demodulated and then be inputted into main
chip MSD209 with format of standard serial or parallel TS stream for demultiplexing
and decoding.
Video route: demultiplexed video signal is decoded by main chip MSD209
and then digital video signal is outputted; in the end LVDS signal is outputted to
drive LCD panel after a series of digital processes and OSD addition within main
chip MSD209.
Audio route: demultiplexed audio signal is decoded into Dolby AC-3
signal or MPEG multi-sound-track digital audio signal by inner decoder of main
chip MSD209, then one is outputted through SPDIF directly; after the process of
“sub-transform and DAC”, the other is outputted as analog audio signal, the analog
audio signal is inputted into the rear part of main chip MSD209 for acoustic effect
processing and volume control, then inputted into left and right sound tracks of
earphone amplifier BH3547F respectively to be amplified, now the audio signal is
divided into two, one is outputted to earphone jack directly, the other is inputted into
class D audio power amplifier R2A15112 to be amplified and then outputted to speakers.
3、 AV signal flow
After processed by impedance matching, AV video signal is inputted into
main chip MSD209 directly and processed by modules of “VIDEO DECODER、
DEINTERLACE and SCALER”, then LVDS signal is outputted to drive LCD
panel.
AV audio signal is processed by circuits of “voltage divided, impedance
matching and AC coupling”, then inputted into main chip MSD209 directlyfor acoustic
effect processing and volume control, then inputted into left and right sound tracks of
earphone amplifier BH3547F respectively to be
amplified, now the audio signal is divided into two, one is outputted to earphone
jack directly, the other is inputted into class D audio power amplifier R2A15112
to be amplified and then outputted to speakers.
4、 PC/YPbPr signal flow
After processed by impedance matching, PC/YPbPr video signal is inputted
into main chip MSD209 to be processed by modules of “A/D transform, digital
video processing and OSD addition”, then LVDS signal is outputted to drive LCD
panel.
PC/YPbPr audio signal is processed by circuits of “voltage divided,
impedance matching and AC coupling”, then inputted into main chip MSD209 directly
for acoustic effect processing and volume control, afterwards the audio signal is
inputted into left and right sound tracks of earphone amplifier BH3547F directly to be
amplified, now the audio signal is divided into two, one is outputted to earphone jack
directly, the other is inputted into class D audio power amplifier R2A15112 to be
amplified and then outputted to speakers.
5、 HDMI signal flow
HDMI video signal is inputted into main chip MSD209 to be processed by
modules of “digital video processing and OSD addition”, then LVDS signal is
outputted to drive LCD panel.
HDMI audio signal is decoded into Dolby AC-3 signal or MPEG multi-soundtrack digital audio signal by inner decoder of main chip MSD209, then one is
outputted through SPDIF directly; after the process of “sub-transform and DAC”,
the other is outputted as analog audio signal, the analog audio signal is inputted into
the rear part of main chip MSD209 for acoustic effect processing and volume control,
then inputted into left and right sound tracks of earphone amplifier BH3547F
respectively to be amplified, now the audio signal is divided into two, one is outputted
to earphone jack directly, the other is inputted into class D audio power amplifier
R2A15112 to be amplified and then outputted to speakers.
6、 Brief instruction on unit functions
MPEG-2 MP@HL、H.264 Main and High profile up to Leve4.0 Decoding
MPEG、Dolby Digital（AC-3）、AAC Digital Audio Decoding
3D comb filter
Wide-range power supply、low consumed power in standby mode（≤1W）
Class D audio power amplifier with HI-FI acoustic effect output
High quality transformation from interleaved scanning to progressive scanning
Realizing integrative functions really
- build integration
- integrative TUNER（integrating analog with digital）
- integrative searching-program function
- integrative OSD interface
Main parts of the unit：
40 inch LCD panel（1920x1080）
Main chip：MStar MSD209FG-LF
Demodulating chip：Intel CE6353
TUNER：NXP FQD1116ME/IV
DDR：SAMSUNG K4T51163QC-HCF7
Class D audio power amplifier：RENESAS R2A15112
FLASH ：EN25Q64-104HIP
External ports of the unit:
Two groups of Video input and RCA L/R input
One group of S-VIDEO input
Three groups of HDMI input
One group of VGA input
One group of audio input for VGA and DVI（Mini Phone Jack）
Two groups of YPBPR input and RCA L/R input
One group of RF
One group of RS232（Mini Phone Jack）
One group of audio output（Mini Phone Jack）
One group of Video output and RCA L/R output
One group of SPDIF（coaxial）output
One group of USB（for upgrading）
Block diagram
PANEL
LVDS
TUNER
TS
TS
DEMODULATOR
1080P
CE6353
SIF
HP AMP
BH3547
CVBS
HDMI1
HDMI2
MSD209
HDMI1.3 X3
HDMI3
VIDEO SIGNALS
FLASH
8MB
VGA
YPbPr
AUDIO SIGNALS
DDR2 512MbitX2
SV
AV
USB
USB2.0
AV OUT
AMP
R2A15112
IC block diagram and instruction
1、 Main chip MSD209FG-LF:
GENERAL DESCRIPTION
The MSD209FG is a highly integrated controller IC for LCD/PDP DTV applications with
resolutions up to full-HD (1920 x 1080). It is configured with an integrated triple-ADC/PLL,
a multi-standard TV video and audio decoder, a motion adaptive video de-interlacer, a
scaling engine, the MStarACE-3 color engine, an advanced 2D graphics engine, a
transport processor, a high-definition (HD) MPEG video decoder, a 24-bit DSP for MPEG
audio decoding, a DVI/HDCP/HDMI receiver, and a peripheral control unit providing a
variety of HDTV control functions.
For digital TV application, the MSD209FG comprises an MPEG-2 transport processor with
advanced section filtering capability, an MPEG-2 (MP@HL profile) video decoder, an
MPEG layer I and II digital audio decoder with analog audio outputs that are designed to
support existing and future DVB-T programs while handling conditional access.
Furthermore, it is also possible to decode MPEG-4, JPEG, MP3 formats from external
sources such as USB interfaces.
For analog TV, the MSD209FG includes NTSC/PAL/SECAM multi-standard video
decoder comprising a 3-D motion adaptive comb filter and time-based correction, and a
NICAM/A2 audio decoder to support worldwide television standards. The MSD209FG is
also configured with a VBI processor to decode digital information such as Close Caption /
V-chip / teletext / WSS / CGMS-A / VPS. In addition, the MStar advanced LCD TV
processor enhances video quality, motion adaptive de-interlacer, picture quality
adjustment units, and MStarACE-3 color engine.
By integrating peripherals including two USB 2.0 host controllers, UARTs, IR, SPI, I2C,
and PWM, the MSD209FG fulfills all requirements in advanced DTV sets. To further
reduce system costs, the MSD209FG also integrates intelligent power management
control capability for green-mode requirements and spread-spectrum support for EMI
management.
MSD209FG Features：
Analog RGB Compliant Input Ports
Three analog ports support up to 1080P
Supports PC RGB input up to SXGA@75Hz
Supports HDTV RGB/YPbPr/YCbCr
Supports Composite Sync and SOG (Sync-on-Green) separator
Automatic color calibration
VIF Input Support
Multi-standard analog TV receiver applications
Digital low IF architecture
Stepped-gain PGA with 25 dB tuning range and 1 dB tuning resolution
Maximum IF gain of 37 dB
Programmable TOP to accommodate different tuner gain to optimize noise and linearity
performance
DVI/HDCP/HDMI Compliant Input Port
Three DVI/HDCP/HDMI input ports support up to 225MHz @ 1080P 60Hz with 12-bit
deep-color resolution
Single link on-chip DVI 1.0 compliant receiver
High-bandwidth Digital Content Protection (HDCP) 1.1 compliant receiver
High Definition Multimedia Interface (HDMI) 1.3 compliant receiver with CEC (Consumer
Electronics Control) support
Long-cable tolerant robust receiving
High-Performance Scaling Engine
Fully Programmable shrink/zoom capabilities
Nonlinear video scaling supports various
modes including Panorama
Auto-Configuration/Auto-Detection
Auto input signal format and mode detection
Auto-tuning function including phasing, positioning, offset, gain, and jitter detection
Sync Detection for H/V Sync
Video Processing & Conversion
3-D motion adaptive video de-interlacers with edge-oriented adaptive algorithm for
smooth low-angle edges
Automatic 3:2 pull-down & 2:2 pull-down detection and recovery
MStar 3rd Generation Advanced Color Engine (MStarACE-3) automatic picture
enhancement gives:
Brilliant and fresh color
Intensified contrast and details
Vivid skin tone
Sharp edge
Enhanced depth of field perception
Accurate and independent color control
sRGB compliance allows end-user to experience the same colors as viewed on CRTs and
other displays
10-bit internal data processing
Programmable 12-bit RGB gamma CLUT
3-D video noise reduction
MPEG artifact removal including de-blocking and mosquito noise reduction
Frame rate conversion
MFC (Motion Frame Conversion) supports:
Judder-free motion video
Output frame rate 50/60/100/120 f/sec
Up to 60Hz full HD or 120Hz HD panels
Output Interface
Supports up to 10-bit dual LVDS full-HD (1920 x 1080) panel interface
Supports 2 data output formats: Thine & TI data mappings
Compatible with TIA/EIA
With 6/8 bits optional dithered output
Spread spectrum output frequency for EMI suppression
CVBS Video Output
Supports two CVBS bypass output ports
2D Graphics Engine
Point draw, line draw, rectangle draw/fill and text draw
BitBlt and stretch BitBlt
Raster Operation (ROP)
Miscellaneous
DRAM controller to support up to 32-bit DDR2 interface
Supports Common Interface for conditional access
SPI bus for external flash
Two ports of USB 2.0 host controller with the flexibility for connecting external storage
devices
375-ball LFBGA package
Operating at 1.26V (core), 1.9V (DDR2), and 3.3V (I/O and analog)
2、 Digital demodulating chip CE6353
The chip comprises 8MHz bandwidth SAW and supports demodulation of 6MHz,
7MHz and 8MHz, 2K/8K carrier and supports both serial and parallel TS stream
output.
3、 Audio power amplifier RENESAS R2A15112
R2A15112FP is a Digital Power Amplifier IC developed for TV.
R2A15112FP has a maximum power of 15W(typ) × 2ch.
(VD = 24V,THD = 1%, SE) at a 4 Ω load.
It is possible to replace a conventional analog amplifier
with a digital amplifier easily.
●Maximum power out put (No external heat sink)
(note) These apply when the thermal pad is soldered to
the printed-circuit board directly.
Recommended Power Condition
SE operation mode :15Wx2ch(VD=24V,4Ω load,THD+N:1%） BTL operation mode:30Wx1ch(VD=21V,8Ω load,THD+N:10%）
●Highly efficient, low noise, and low distortion
●Popless
●Built-in protection - Overcurrent, overheat, and undervoltage
●Built-in Mute and Standby function
●The gain can be changed to four settings by two terminals.
●Power supply voltage : 11V to 25V
●Speaker Impedance : from 4 to 8Ω
GAIN1
GAIN2
HB1
L
IN1
A
IN2
R
♪♪
HB2
A
Oscillator
Under Voltage
Detection
VD2
PWM
Gen.
ROSC
MUTEL
STBYL
OUT1
VS1
SE/BTL
Selector
CBIAS
CLOCK
VD1
PWM
Gen.
OUT2
VS2
10V
Control
Logic
PROT
Over Current
5V
Detection
Over Temp.
Detection
DVDD
AVCC
VREF
GND
4、 Tuner：FQD1116ME/IV
The FQD1116 belongs to the new family of highly-featured hybrid frontends, which are
designed to meet a wide range of RF applications. The FQD1116 combines the functions
of a DVB-T digital tuner and a multi-standard TV IF demodulation unit for both positive and
negative modulated TV systems. The unit includes a 7 MHz digital SAW filter with an IF
AGC amplifier for connection to the DVB-T channel decoder. The FQD1116 is intended
for CCIR L/L’ (France), B/G, I and D/K systems and DVB-T broadcast.
The frontends have a built-in digital (I2C) PLL tuning system. A DC-DC converter circuit is
built into the FQD1116 to synthesize the tuning voltage required, thus making the frontend
a true 5V device.
♪♪
WIRING DIAGRAM
PANEL
X503
BACKLIGHT
SPEAKER
POWER BOARD
MAIN BOARD
POWER SWITCH
KEY BOARD
IR BOARD
Troubleshooting guide LCD-32XZ10
1．Panel is dark.
Power on main
power supply, check
if the red indicator
light in STANDBY
mode is bright ?
Yes
Press key “POWER” of
remote control or the unit
to power on，check what
color of indicator light is?
No
Check if the voltage
of X801-3# (STB)
on main board is
Red
Blue
inputted 5V ?
Check if the voltage of
X801-13＃ on main board
is high level ?
No
Check if STANDBY
circuits on power
board are normal ?
Yes
No
Check if backlight circuits
on power board and
backlight
board
are
normal ?
Check if circuits about
backlight control on
main board are normal?
Check if the voltage of
X801-1 ＃ on main board
is high level?
Yes
Check if power board
assembly is normal ?
2．Backlight is normal, but there is no picture
Check if operations
of remote control or
keys on the unit are
normal ?
Yes
Check if OSD menu is
displayed
normally
after pressing key
“menu”?
Yes
No
No
Yes
No
Enter有into factory menu ，
initialize EEPROM, then
power off and power on
again, check if there is
picture ?
Yes
Adjust main board again
Change another
main board
Check if there
is noTV
picture of
all channels ?
No
3．There is picture but no sound.
No sound
Check if the voltage
of NV02-4/5/32/33#
is 24V ?
Yes
Check if the voltage Yes
of NV02-10/27# is
high level ?
No
No
Check 24V power supply
circuits on power board and
power supply circuits from
XV03 to NV02 on main board
are normal ?
Check
voltage
if
No
the
of
NS01-F16/H16#
is low level?
Yes
No
Check if circuits from
NS01-F6/H16#
NV02-10/27#
normal?
Check
if
there
is Yes Change
another
sound from
earphones?
NV02
Touch CV04
and
CV05
with probe,
check if there
is sound from
earphones?
Check if
audio
output
Yes circuits
of main
chip are
normal?
No
to
Check if circuits
about earphone
amplifier
are
normal ?
are
Change
another
NS01
B
C
D
E
F
G
H
XM01
PCMCIA-0070210PA8C
+VCC_CARD
17
51
18
52
NS01 E
MSD209FG
22uH
C104
100u
10V
R103
10K
TS_MICLK
TS_MIVAL
TS_MISTRT
+5V_TUNER2
R104
10K
100n
C215
003:D4
75
R108
R279
GND-A 330
R102
10K
R280
330
L103
STBH2012-501PT
R105
C219
10p
R106
PCM_IORD_N/CI_RD/GPIO87
PCM_IOWR_N/CI_WR/GPIO88
PCM_OE_N/GPIO89
PCM_WE_N/GPIO90
PCM_REG_N/CI_CLK/GPIO91
PCM_CE_N/CI_CS/GPIO92
PCM_IRQA_N/CI_INT/GPIO93
PCM_WAIT_N/CI_WACK/GPIO94
PCM_RESET/GPIO95
PCM_CD_N/GPIO96
GND-A
330
TV_SIFP 002:D3;003:C4
330
TV_SIFM 002:D3;003:C4
GND-A
SGMI2012-2R2KT
SGMI2012-2R2KT
L107
L108
TUNER_SCL
TUNER_SDA
R107
0
PCM_A0/CI_A0/GPIO63
PCM_A1/CI_A1/GPIO64
PCM_A2/CI_A2/GPIO65
PCM_A3/CI_A3/GPIO66
PCM_A4/CI_A4/GPIO67
PCM_A5/CI_A5/GPIO68
PCM_A6/CI_A6/GPIO69
PCM_A7/CI_A7/GPIO70
PCM_A8/CI_A8/GPIO71
PCM_A9/CI_A9/GPIO72
PCM_A10/CI_A10/GPIO73
PCM_A11/CI_A11/GPIO74
PCM_A12/CI_A12/GPIO75
PCM_A13/CI_A13/GPIO76
PCM_A14/CI_A14/GPIO77
TV_IF_AGC
TV_FAT_IFP
TV_FAT_IFN
C101
10n
+5V
L104
GND-A
22uH
C102
100u
10V
PCM_D0/CI_D0/GPIO79
PCM_D1/CI_D1/GPIO80
PCM_D2/CI_D2/GPIO81
PCM_D3/CI_D3/GPIO82
PCM_D4/CI_D4/GPIO83
PCM_D5/CI_D5/GPIO84
PCM_D6/CI_D6/GPIO85
PCM_D7/CI_D7/GPIO86
GND-A
+3.3V_DE
GND-D
GND-D
12
15
16
17
18
44
30
+3.3V_DE +1.8V_ADE
42
41
28
29
32
33
34
1K
RJ07
VIN
MICLK
VIN
MOCLK
MDO0
MDO1
MDO2
MDO3
MDO4
MDO5
MDO6
MDO7
MOVAL
MOSTRT
TV_IF_AGC
RJ06
1K
NJ01
CE6353
+1.8V_PDE
GND-A
GND-A
GND-A
+3.3V_DE
21
26
22
61
49
50
51
52
53
56
57
58
48
47
11
GPP3
IRQ
CLK2/GPP0
DATA2/GPP1
INPACK
IOIS
10K
10K
10K
CI_IREQ#
CI_WAIT#
PC_RST
PC_REG#
CI_CE#
0
RM40
0
RM41
RM22
33
RM21
33
CI_CE2#
CI_CD#
0
RM14
+3.3AVDD
A
Vcc
B
4
20
19
46
PC_C_DETECT1#
CI_VS1#
CI_IREQ#
CI_WAIT#
CI_CE1#
PC_REG#
CI_OE#
CI_WE#
CI_IORD#
CI_IOWR#
PC_RST
36
43
16
59
7
61
9
15
44
45
58
CI_DATA[0]
CI_DATA[1]
CI_DATA[2]
CI_DATA[3]
CI_DATA[4]
CI_DATA[5]
CI_DATA[6]
CI_DATA[7]
30
31
32
2
3
4
5
6
CI_ADDR[0]
CI_ADDR[1]
CI_ADDR[2]
CI_ADDR[3]
CI_ADDR[4]
CI_ADDR[5]
CI_ADDR[6]
CI_ADDR[7]
CI_ADDR[8]
CI_ADDR[9]
CI_ADDR[10]
CI_ADDR[11]
29
28
27
26
25
24
23
22
12
11
8
10
TS_MDO[0]
TS_MDO[1]
TS_MDO[2]
TS_MDO[3]
TS_MDO[4]
TS_MDO[5]
TS_MDO[6]
TS_MDO[7]
64
65
66
37
38
39
40
41
TS_MOCLK
TS_MOVAL
TS_MOSTRT
57
62
63
IOIS
CI_CE2#
PC_C_DETECT2#
INPACK
33
42
67
60
1
PC_C_DETECT2#
2
PC_C_DETECT1#
CI_ADDR[12]
CI_ADDR[13]
CI_ADDR[14]
21
13
14
3
Y
GND
GND-D
NM01
SN74LVC1G32DCKR
MCLK(A15)
MVAL(A16)
MISTRT(A17)
CD1
VS1
IREQ
WAIT
CE1
REG
OE
WE
IORD
IOWR
RESET
D0
D1
D2
D3
D4
D5
D6
D7
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
CI_CE1#
CI_DATA[0]
CI_DATA[1]
CI_DATA[2]
CI_DATA[3]
CI_DATA[4]
CI_DATA[5]
CI_DATA[6]
CI_DATA[7]
TS_MICLK
TS_MDI[0]
TS_MDI[1]
TS_MDI[2]
TS_MDI[3]
TS_MDI[4]
TS_MDI[5]
TS_MDI[6]
TS_MDI[7]
TS_MIVAL
TS_MISTRT
1
34
35
68
GND-D
GND-D
MD0(D8)
MD1(D9)
MD2(D10)
MD3(D11)
MD4(D12)
MD5(D13)
MD6(D14)
MD7(D15)
VS2/MCLKO
MOVAL(SPKR)
MOSTRT(STSCHG)
IOIS_16
CE2
CD2
INPACK
A12
A13
A14
GND
GND1
GND2
GND3
GND-D
4.7K
4.7K
0
+3.3AVDD
RJ20 +3.3V_DE
RJ21
+3.3AVDD
RJ22
6
8.2K
RJ23
SDA 003:D2;003:D2;007:C3
GND-D
5
4
9
RJ26
RJ27
100
100
SDA 003:D2;003:D2;007:C3
SCL 003:D2;003:D2;007:C3
Vss
Vss
Vss
Vss
Vss
Vss
Vss
Vss
Vss
Vss
Vss
15p
CJ08
+3.3V_DE
NM02
TPS2211AIDBR
1
RM09
4.7K
2
+3.3AVDD
LM01
STBH2012-221PT
+5V
LM02
STBH2012-221PT
100n
CJ09
3.3V_3
VPPD1
3.3V_4
AVCC_13
5V_5
AVCC_12
5V_6
AVCC_11
13
12
5
10
7
GND
AVPP
GND-D
9
8
OC
12V
CM05
100n
33p
CJ07
CM03
220u
16V
11
6
RM11
100
+VCC_CARD
14
4
CARD_OC
CARD_SHDN#
VPPD0
3
+3.3AVDD
RST_6353
002:D4
GND-D
SHDN
15
VCCD1
RM12
100
RM42
100
16
VCCD0
GND-D
GND-D
GJ01
20.48MHz
33p
CJ06
CARD_3.3VEN
RM10
4.7K
CI_VS1#
RJ08
2.2M
5
CARD_5VEN
RJ28
10K
SCL 003:D2;003:D2;007:C3
RJ33
TS_MICLK
TS_MDI[0]
33 TS_MDI[1]
TS_MDI[2]
TS_MDI[3]
TS_MDI[4]
33 TS_MDI[5]
TS_MDI[6]
TS_MDI[7]
RJ16 TS_MIVAL
RJ17 TS_MISTRT
1
3
8
14
20
25
38
40
46
55
60
0
33
33
RJ15
0
RJ09
TUNER_SDA
RJ32
23
0
24
TUNER_SCL
DATA1
CLK1
RESET
OSCMODE
RJ02
43
35
36
XTI
100
RJ25
1K
1K
RM35
RM36
RM37
+VCC_CARD
SLEEP
XTO
TUNER_SDA
RJ24
RM33
RM34
5
BKERR
STATUS
27
RJ01
33
10K
CI_VS1#
10K PC_C_DETECT1#
10K PC_C_DETECT2#
TS_MICLK
TS_MIVAL
TS_MISTRT
62
PLLVdd
PLL1TEST
PLLGnd
GND-D
4.7K
RJ04
4.7K
RJ03
100
+VCC_CARD
CI_ADDR[0]
RM24 CI_ADDR[1]
CI_ADDR[2]
33
CI_ADDR[3]
CI_ADDR[4]
RM23 CI_ADDR[5]
CI_ADDR[6]
33
CI_ADDR[7]
CI_ADDR[8]
RM16 CI_ADDR[9]
33 CI_ADDR[10]
CI_ADDR[11]
CI_ADDR[12]
RM15 CI_ADDR[13]
33 CI_ADDR[14]
63
10
TUNER_SCL
PCM_D[0]
PCM_D[1]
PCM_D[2]
PCM_D[3]
PCM_D[4]
PCM_D[5]
PCM_D[6]
PCM_D[7]
RM30
RM31
RM32
PC_RST
CI_CD#
4.7K
RM06
22n
CJ03
4
AGC1
AGC2/GPP2
AVdd
AGnd
AGnd
Vdd33
RFLEV
PCM_A[0]
PCM_A[1]
PCM_A[2]
PCM_A[3]
PCM_A[4]
PCM_A[5]
PCM_A[6]
PCM_A[7]
PCM_A[8]
PCM_A[9]
PCM_A[10]
PCM_A[11]
PCM_A[12]
PCM_A[13]
PCM_A[14]
CI_VS1#
+3.3AVDD
CI_DECT
RJ29
10K
RJ05
10K
RM17
RM18
RM19
RM20
RM13
+3.3AVDD
15p
CJ10
+5V
RM25
100
100
100
100
0
GND-D
GND-D
31
TV_FAT_IFN
R11
R10
P9
R9
T9
U9
U8
U7
100
CI_WE#
CI_IOWR#
CI_IORD#
CI_OE#
CI_IORD#
CI_IOWR#
CI_OE#
CI_WE#
PC_REG#
CI_CE#
CI_IREQ#
CI_WAIT#
CJ35
10p
RJ12
0
SADD4
SADD3
SADD2
SADD1
SADD0
SMTEST
CVdd
CVdd
CVdd
CVdd
CVdd
CVdd
Vdd
Vdd
Vdd
Vdd
22p
CJ05
GND-A
CJ02
100n
220
RJ31
7
19
37
39
59
64
2
13
45
54
56p
CJ34
LJ05
39nH
330nH
22p
CJ04
TV_FAT_IFP
V13
U13
T13
R13
V12
U12
T12
R12
U11
V9
T11
T10
U10
V8
V7
33
RM03
1u
CM02
+1.8V_CORE
RJ11
10K
U18
T18
V18
V17
U17
T17
R17
R18
P17
N17
TS_MDO[0]
TS_MDO[1]
TS_MDO[2]
TS_MDO[3]
TS_MDO[4]
TS_MDO[5]
TS_MDO[6]
TS_MDO[7]
33
RM02
CM01
100n
+3.3V_DE
CJ01
100n
220
RJ30
RJ10
10K
TS_PD[0]
TS_PD[1]
TS_PD[2]
TS_PD[3]
TS_PD[4]
TS_PD[5]
TS_PD[6]
TS_PD[7]
TS_MICLK
TS_MIVAL
TS_MISTRT
+VCC_CARD
MDI0(A18)
MDI1(A19)
MDI2(A20)
MDI3(A21)
MDI4(A22)
MDI5(A23)
MDI6(A24)
MDI7(A25)
GND-D
GND-D
CM08
100n
3
V4
U5
U6
R7
R8
T7
T8
V5
TS_MOCLK
TS_MOSTRT
TS_MOVAL
RM01
RM05
RM04
47
48
49
50
53
54
55
56
VCC1
VCC2
VPP1
VPP2
4.7K
RM43
+5V_TUNER2
TS_PCLK 33
TS_PSTRT 33
TS_PVAL 33
TS_MDI[0]
TS_MDI[1]
TS_MDI[2]
TS_MDI[3]
TS_MDI[4]
TS_MDI[5]
TS_MDI[6]
TS_MDI[7]
CM07
100n
AS
ADDRESS
0-0.5V
C0/C1
1-1.5V/OPEN C2/C3
2-3V
C4/C5
4.5-5V
C6/C7
Y7
W5
V6
CM06
100n
GND-D
GND-A
TS0_D0/GPIO29
TS0_D1/GPIO30
TS0_D2/GPIO31
TS0_D3/GPIO32
TS0_D4/GPIO33
TS0_D5/GPIO34
TS0_D6/GPIO35
TS0_D7/GPIO36
TS_MICLK
TS_MISTRT
TS_MIVAL
TS_MDI[0]
4.7K
RM07
MOPLL I2C
ADDRESS
SELECTION
L102
STBH2012-501PT
100n
C217
2.2u
C216
GND-A
TS0_CLK/GPIO39
TS0_SYNC/GPIO38
TS0_VLD/GPIO37
TS0
GND-A
CVBS_TUNER
2
RM52 TS_MOCLK
RM53 TS_MOVAL
RM54 TS_MOSTRT
GND-A
R101
10K
L101
STBH2012-501PT
33
33
33
TS1_CLK/GPIO43
TS1_SYNC/GPIO42
TS1_VLD/GPIO41
TS1_DO/GPIO40
N18
P18
L17
M17
4.7K
RM08
2.2u
C214
GND-A
TS_MICLK
TS_MIVAL
TS_MISTRT
TS1
TS_MDI[0]
TS_MDI[1]
TS_MDI[2]
TS_MDI[3]
TS_MDI[4]
TS_MDI[5]
TS_MDI[6]
TS_MDI[7]
GND-D
10K
RM38
L106
PCMCIA/CI
10K
RM28
+5V_TUNER1
ADDRESS
86/87
84/85
RM44
RM45
RM46
RM47
RM48
RM49
RM50
RM51
10K
RM39
+5V
33
33
33
33
33
33
33
33
10K
RM27
AS_IF
0
5V
19
20
21
22
23
24
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
RF
Ant_Pwr
GND3
NC4
RF_AGC
GND6
VP(TUN)
VT
GND9
NC10
As
SCL
SDA
REF
IF_AGC
DIF1
DIF2
Wout
+5V_IF
2ndIF/Low_DIF1
2ndIF/Low_DIF2
NC
AS_IF
CVBS
FQD1116ME/IV
TS_MDO[0]
TS_MDO[1]
TS_MDO[2]
TS_MDO[3]
TS_MDO[4]
TS_MDO[5]
TS_MDO[6]
TS_MDO[7]
TS_MDI[0]
TS_MDI[1]
TS_MDI[2]
TS_MDI[3]
TS_MDI[4]
TS_MDI[5]
TS_MDI[6]
TS_MDI[7]
10K
RM26
TUNER1
TS_MDI[0]
TS_MDI[1]
TS_MDI[2]
TS_MDI[3]
TS_MDI[4]
TS_MDI[5]
TS_MDI[6]
TS_MDI[7]
IF PART I2C
ADDRESS
SELECTION
10K
RM29
1
CJ36
10p
100n
CM04
A
GND-D
GND-D
GND-D
+1.8V_DE
+1.8V_CORE
GND-D
GND-D
100n
CJ18
100n
CJ16
100n
CJ25
100n
CJ23
100n
CJ21
100n
CJ19
100n
CJ17
100n
CJ15
100n
CJ14
+1.8V_ADE
LJ03
4.7u
CJ13
+1.8V_DE
LJ02
2.2u
CJ11
100n
CJ27
100n
CJ26
100n
CJ24
100n
CJ22
100n
CJ20
GND-D
+1.8V_PDE
LJ01
4.7u
CJ12
+1.8V_DE
+3.3V_DE
TITLE:
DWG NO.
9232KE5201DL
GND-D
TUNER+IF+PCMCIA
6
1.0
REV.
DRAWN BY
APPROVED BY
Sheet 1
to 10
XOCECO
XIAMEN OVERSEAS CHINESE
ELECTRONIC CO., LTD.
B
C
D
E
F
G
H
X103
AV13-06-526
A
AV1
X105
JY-3541L-01-030
R113
10K
VGA_LIN
+3.3VDD
NC3
SCL
R168
200
R169
33
TXD_UPDATE
007:F2
V104
BC847AW
5
VSS
SDA
AV_LIN
R184
10K
AV_RIN
R185
10K
BC847AW
V105
C159
47p
R146
0
GND-D
VCLK: 0=READ ONLY
VGA_B_IN
003:C3
7
2
11
6
1
R277
R122
75
R127
75
NS01 B
MSD209FG
VGA_R_IN
003:C3
Z103
470MHz
AUDIO
SIF_INP
SIF_INM
6 5 4
LINE_IN_0L
LINE_IN_0R
LINE_IN_1L
LINE_IN_1R
LINE_IN_2L
LINE_IN_2R
LINE_IN_3L
LINE_IN_3R
LINE_IN_4L
LINE_IN_4R
LINE_IN_5L
LINE_IN_5R
N101
PESD5V0L5UY
1 2 3
GND-D
1
R117
10K
YUV_RIN
Y2
W2
P5
P6
R3
R4
Y3
Y4
R5
R6
T3
T4
T5
T6
C127
2.2u
100n
C144
TV_SIFP
001:C2;003:C4
100n
C145
TV_SIFM
001:C2;003:C4
C137
2.2u
2.2u
C139
2.2u
2.2u
C140
C141
C132
C133
2.2u
2.2u
C134
C135
2.2u
2.2u
R265
8.2K SCRTR2_FS
Z109
R199
10MHz
10K
SC2_RIN
R200
10K
5
6
7
Z113
10MHz
8
9
R263
2.2K
AV_LIN
AV_RIN
SC2_LIN
SC2_RIN
SC1_LIN
SC1_RIN
VGA_LIN
VGA_RIN
YUV_LIN
YUV_RIN
AV2_LIN
AV2_RIN
2.2u
C131
2.2u
2.2u
GND-D
SC2_FS
007:B3
SC2_FS
SC2_LIN
C142
C143
AV_OUTL
GND-D
N110
PESD5V0L5UY
10
AV_OUTR
GND-D
11
GND-D
GND-D
003:C4
External_CVBS
12
SCART2
GND-D
GND-D
AV2_VIN
3
W1
L1
4
AV_OUTR
0
GND-D
3
GND-D
SC2_VOUT
VGA_G_IN
003:C3
GND-D
R119
75
AV_OUTL
2
3
0
Z102
470MHz
R278
1
SC2_C
SC1_IN_R
SC2_Y/CVBS
R2
12
X108
TJC10S-12A
SC1_IN_L
Z112
10MHz
R198
10K
SC1_RIN
12K
R187
Z101
470MHz
SC2_VOUT
Z111
10MHz
R197
10K
SC1_LIN
GND-D
GND-D
GND-D
3
AV_R_IN
Y
8
0
Z117
470MHz
R276
0
4
Z108
10MHz
75
R204
13
Z116R275
470MHz
Z107
10MHz
47K
R261
2
9
5
C160
47p
12K
R193
14
10
12K
R192
15
W1
ISP_EN
R165
470
6
4
0
R164
470
V103
BC847AW
R150
4.7K
R1
3
R138 GND-D
22K
R149
4.7K
12K
R188
R274
VCLK
R145
4.7K
GND-D
AV_R_IN
47K
R259
R126
22K
7
NC2
33
VCC
2
GND-D
100n
C120
8
NC1
100n
C106
VCC-VGA
X104
HC1038-15F-3.08
D101
MMBD1204
1
R273
75
R167
10K
R160
33
Y2
N106
24LC21A/SN
N103
PESD5V0L5UY
R154
6 5 4
1 2 3
External_CVBS
003:C4
External_CVBS
RXD_UPDATE
007:F2
+5V VCC-VGA
W2
VGA_HSYNC
003:C3
100n
C228
VGA_VSYNC
003:C3
33
1 2 3
33
R141
6 5 4
R140
12K
R183
C119
47p
R155
12K
R137
12K
R121
GND-D
C114
47p
Y1
VGA_RIN
G
12K
R182
R114
10K
R
33
L
1
GND-D
R153
AV2_RIN
R202
10K
GND-D
HJK-3.5-401
X101
232_TXD
007:D4
232_RXD
007:D3
SPI_CZ2
R
R134
0
External_YIN
003:C4
R109
10K
R112
8.2K
10u
C130
100n
C108
PESD5V0L5UY
GND-D
L113
BG2012D151T
100p
C223
SCART1_B
100n
C221
2
GND-D
100p
C224
GND-D
R295
1 3 4 5
100K
R203
1n
C164
47
R196
R191
8.2K
75
R178
TV_OUTL
GND-D
Z106
10MHz
C156
2.2u
1n
C158
TV_OUTR
V106
MMBT3904
TITLE:
DWG NO.
9232KE5201DL
GND-D
GND-D
AUDIO IN/OUT
GND-D
0
1.0
REV.
SCART1_R
R292
75
Z115
10MHz
C162
2.2u
GND-D
GND-D
GND-D
16V
R195
4.7K
GND-D
RCA-103A-OR
X106
100K
R181
R174
10K
OR
GND-D
V107
MMBT3904
GND-D
100n
C157
16V
R179
4.7K
AV_OUTR SC1_ROUT
100K
R157
16V
4.7u
C121
100n
C123
Z105
10MHz
C122
2.2u
R186
10K
SC1_LOUT
47
R180
0
R144
8.2K
R2
SC2_ROUT
R291
75
GND-D
V102
MMBT3904
1n
C126
R142
10K
47
R148
SCART1_G
R143
47K
R147
4.7K
100n
C105
B2
100p
C222
0
R290
75
L112
BG2012D151T
4.7u
C155
+12V
L110
BG2012D151T
R110
47
R132
75
+12V
GND-D
R294
200
Pr_INPUT
003:C3
GND-D
N102
PESD5V0L4UG
GND-D
R293
R175
100n
C149
R190
47K
R172
10K
SPDIF_OUT
R176
47K
100p
C112
008:C3
R177
8.2K
100p
C111
@pinCo
1 3 4 5
MUTE_AMP
Pb_INPUT
003:C3
100n
C163
+5V
0
AV_OUTL
GND-D
R131
75
GND-D
R133
AV_OUTL
GND-D
4.7u
C161
100p
C110
@pinCo
B
R
L111
SGMI2012M1R0KT
@pinCo
G
G1
B1
R1
GND-D
Z104
10MHz
C109
2.2u
+3.3VDD
R269
10K
AV3-14WD
X102
G2
GND-D
V101
MMBT3904
SC2_LOUT
N104
GND-D
GND-D
Y_INPUT
003:C3
100n
C113
External_CIN
003:C4
AV_R_IN
AV_OUTR
16V
0
R135
75
100K
R139
R123
75
1n
C115
G
47
R116
1u
C124
Y
+12V
0
W
L109
BG2012D151T
4.7u
C107
R136
C
G
R128
75
GND-D
R130
GND-D
G
S
GND-D
2
6
GND-D
+12V
G
0
12K
R194
12K
R189
GND-D
V2
N5
N4
U3
X111
HJR-613/PB-1
R129
Z114
10MHz
R
C150
2.2n
Z110
10MHz
X109
RCA-302A-01
GND-D
C148
2.2n
R173
13K
R171
13K
R170
13K
R166
13K
GND-D
C147
2.2n
L
33
GND-D
5
GND-D
001:D5
RST_6353
008:C3
MUTE_AMP
ISP_EN
STANDBY_AMP 008:C1
GND-D
E16
F16
E12
E11
E10
C146
2.2n
R201
10K
R115
4.7K
AU_COM(VIM0)
AUVRM
AUVRP
AUVAG
C226
47p
G16
H16
G15
C138
2.2n
GND-D
AV2_LIN
R111
47K
12K
R299
SC1_LIN
C129
2.2n
PRIM_AUD_OUT_R 008:C5
PRIM_AUD_OUT_L 008:C4
SC1_ROUT
SC1_LOUT
SC2_ROUT
SC2_LOUT
C154
C153
1 2 3
GND-D
F15
E14
2.2u
2.2u
C152
C151
6 5 4
RCA-410A-10
X112
R297
10K
I2S_OUT_MCK/GPIO50
I2S_OUT_WS/GPIO49
I2S_OUT_BCK/GPIO51
I2S_OUT_SD/GPIO52
I2S_OUT_MUTE/LHSYNC2/GPIO13
C225
47p
2.2u
2.2u
100
100
R161
13K
I2S_IN_BCK/GPIO45
I2S_IN_WS/GPIO44
I2S_IN_SD/GPIO46
100
100
100n
C136
100n
C118
SC1_RIN
12K
R298
R2
R2
6
SPDIF_IN/GPIO47
SPDIF_OUT/GPIO48
GND-D
R296
10K
GND-D
5
C117
47p
R152
R151
100n
C128
2
1 2 3
L2
W2
4
YUV_LIN
12K
R125
6 5 4
GND-D
R163
R162
100
100
R159
R158
4.7u
C125
R118
10K
W4
Y6
U4
V3
W3
Y5
R156
13K
12K
R124
R1
LINE_OUT_0R(DACO_R)
LINE_OUT_0L(DACO_L)
LINE_OUT_1R(DACO_S)
LINE_OUT_1L
LINE_OUT_2R
LINE_OUT_2L
C116
47p
4
R1
N105
PESD5V0L5UY
DRAWN BY
GND-D
N109
PESD5V0L4UG
APPROVED BY
Sheet 2
to 10
XOCECO
XIAMEN OVERSEAS CHINESE
ELECTRONIC CO., LTD.
A
B
C
D
E
F
G
H
100K
R267
+3.3VDD
+3.3VDD
A1
SCL
A2
SDA
GND
100n
C213
2
GND-D
3
SPI_CZ2
SPI_CK
SPI_DI
SPI_DO
SPI_CZ1
100 R241
353.24512-00
+3.3VDD
Y8
W8
Y9
W9
Y10
W10
Y11
W11
T14
R14
N15
AO
SCL
100 R242 GND-D
2
WP
A1
SCL
A2
L7
M7
J5
N2
N1
M2
M1
L2
L1
SDA
SDA
G7
G8
H4
H3
H5
H6
C188
C189
C190
C191
C192
C193
C194
1n
47n
47n
47n
C169
C170
C171
C172
470
10
10
10
R229
R207
R208
R209
1n
47n
47n
47n
C166
100n
C173
C174
C175
C176
470
10
10
10
R230
R210
R211
R212
6
10
7
NC6
NC11
GND-D
13
12
11
10
S
GND
8
9
SO/SIO1
W/ACC
GND-D
353.24040-10
GND-D
N115
EN25B32-100HIP
8
1
VCC
CS#
7
2
HOLD#
SO
SCLK
WP#
SI
GND
6
3
4
Pb_INPUT
002:B3
Y_INPUT
002:B3
Pr_INPUT
002:B3
VGA_HSYNC 002:C1
VGA_VSYNC 002:C1
VGA_B_IN 002:B2
VGA_G_IN 002:B2
VGA_R_IN 002:B2
T1
K5
N16
M16
GND-D C208
V112
220u
BC847AW
GND-D
SC1_FS
R248
4.7K
SCART1_B
SCART1_G
SCART1_R
SCART1_B
SCART1_G
SCART1_R
R251
220
GND-D
10V
SCART1_B
SCART1_G
SCART1_R
R252
0
TV_CVBS
R254
75
SC1_FB
R256
0
R266
8.2K
007:B3
SC1_FS
R262
0
R260
75
TV_CVBS#
R232
15K
100n
C200
51
R245
16V
R236
220
MMBT3906LT1
V110
GND-D
N114
1
2
3
4
4
GND-D
GND-D
TV_OUT
R237
75
V108
MMBT3904
5
3
PESD5V0L5UY
GND-D
MMBT3906LT1
V109
6
2
SCART1_FS
FB_SC1
GND-D
C168
10u
1
R283
47K
C227
470u
SC2_VOUT
16V
SCART1_CVBS
SC2_VOUT
R289
75
820
R205
R272
75
100p
C218
GND-D
TV_OUT
10V
GND-D
GND-D
R282
47K
R253
0
1R_OUT
1R_IN
1L_OUT
GND-D
GND-D
1L_IN
1B_IN
1FUN_SEL
GND-D
@pinCo
1G_IN
@pinCo
GND-D
GND-D
1RED_IN
1RGB_SW
GND-D
GND-D
1TV_OUT
1TV_IN
GND-D
SCART1 (CVBS+RGB)IN/TVOUT
TV_CVBS
TV_CVBS#
R247
4.7K
+5V
10u
C198
N3
M6
M5
C204
220u
R281
0
CVBS_TUNER
001:D2
R270
R271
10
10
100n
C187
25V
Y1
W1
AV2_VIN
External_CVBS
SCART1_CVBS
002:G1
4
5
R217
R218
R219
R220
R221
R222
6
10
10
10
10
10
10
7
C181
C182
C183
C184
C185
C186
5
3
8
47n
47n
47n
47n
47n
47n
2
9
M4
P1
M3
R1
P2
R2
GND-D
GND-D
SC1_IN_L
SC1_IN_R
6
10
L114
BG2012D151T
External_YIN 002:B4
External_CIN 002:B5
HJ-2105F
X110
1
11
R215
R216
C220
100n
12
10
10
R285
47K
13
C179
C180
R284
47K
100n
C206
47n
47n
GND-D
K3
K4
PESD5V0L5UY
N113
SC2_C
14
SC2_Y/CVBS
SC2_C
SC2_Y/CVBS
SC2_C
15
10
10
TV_OUTL
TV_OUTR
SC2_Y/CVBS
GND-D
R213
R214
16
C195
C196
C197
C177
C178
17
100n
100n
100n
47n
47n
J3
J4
SCART1_B
SCART1_G
SCART1_R
18
G4
G5
G6
1%
5
NC12
+3.3VDD
C199
2.2u
CVBS_OUT1
CVBS_OUT2
DACSVM
DREXT
NC5
14
SC1_FB
K6
L5
L3
L4
L6
R231
39K
CVBS_OUT
VR12
VR27
TAGC
NC13
WP: H=READ ONLY
R233
R223
R224
R225
R226
R227
R228
470
47
47
47
47
47
47
R234
470
VIF
11
W/ACC
5
R235
75
VIFP
VIFM
NC4
GND-D
GND-D
GND-D
10u
C167
CVBS0
CVBS1P
CVBS2P
CVBS3P
VCOM1
CVBS0P
VCOM0
NC14
5
9
SO/SIO1
NC3
3
GND
8
GND
+5V
CVBS_IN
NC11
S
100 R243
Share VCOM0
Y1(CVBS5P)
C1(CVBS7P)
NC6
SI/SIO0
4
GND-D
12
15
Vcc
GND-D
1n
47n
47n
47n
47n
47n
47n
100n
C165
25V
S-Video
4
NC12
GND-D
SCLK
2
19
Y0(CVBS4P)
C0(CVBS6P)
NC5
7
R288
75
VCLAMP
REFP
REFM
NC13
13
4
R287
75
VSYNC2
SOGIN2
BIN2P
GIN2P
RIN2P
NC4
14
3
5
R286
75
RGB
NC14
5
1%
HSYNC1
VSYNC1
SOGIN1
BIN1P
GIN1P
RIN1P
NC3
6
6
AVDD_DM
REXT
3
SI/SIO0
3
GND-D
10K
R257
Vcc
10K
1
7
HDMI-3_RXC+
HDMI-3_RXCHDMI-3_RX0+
HDMI-3_RX0HDMI-3_RX1+
HDMI-3_RX1HDMI-3_RX2+
HDMI-3_RX2SDA_HDMI-3
SCL_HDMI-3
HOTPLUG_HDMI-3_OUT
R206
390
8
R255
HDMI-1_RXC+
HDMI-1_RXCHDMI-1_RX0+
HDMI-1_RX0TO: PAGE6
HDMI-1_RX1+
HDMI-1_RX1HDMI-1_RX2+
HDMI-1_RX2SDA_HDMI-1
SCL_HDMI-1
HOTPLUG_HDMI-1_OUT
F5
HSYNC0
VSYNC0
SOGIN0
BIN0P
BIN0M
GIN0P
GIN0M
RIN0P
RIN0M
15
Vcc
16
HOLD
2
4
G1
G2
H1
H2
J1
J2
K1
K2
F6
G3
F4
1
SCLK
HOLD
+3.3VDD
N108
+3.3VDD
16
1
24C04
+3.3VDD
N112
EN25B64
N111
EN25B64
+3.3VDD
R258
33
GND-D
C212
22p
4
100n
C210
5
SDA
20
RXCP2
RXCN2
RX0P2
RX0N2
RX1P2
RX1N2
RX2P2
RX2N2
DDCDC_DA
DDCDC_CK
HOTPLUGC
WP
6
SCL
21
2
AO
7
GND-D
100 R240
CEC
006:D4
HDMI_CEC 006:D4
HDMI-2_RXC+
HDMI-2_RXCHDMI-2_RX0+
HDMI-2_RX0HDMI-2_RX1+
HDMI-2_RX1HDMI-2_RX2+
HDMI-2_RX2SDA_HDMI-2
SCL_HDMI-2
HOTPLUG_HDMI-2_OUT
Vcc
2.2K
R264
HDMI
R238
33
EEP_W_EN
007:B2
RA23
0
C202
100n
RXCP0
RXCN0
RX0P0
RX0N0
RX1P0
RX1N0
RX2P0
RX2N0
DDCDA_DA
DDCDA_CK
HOTPLUGA
CEC_PM
W7
E3
C1
C2
D1
D2
E1
E2
F1
F2
E4
E6
E5
R249
0
PM_CEC
CEC/UART_RX1
RXCP1
RXCN1
RX0P1
RX0N1
RX1P1
RX1N1
RX2P1
RX2N1
DDCDB_DA
DDCDB_CK
HOTPLUGB
1
C211
22p
RA24
47K
1
R268
33K
FLASH_WP#
24C512
8
100n
C209
NS01 A
MSD209FG
C201
100n
R244
10K
N107
+3.3VDD
SC2_VOUT
GND-D
GND-D
GND1
GND2
GND3
GND4
1
1
1
1
GND5 GND6
1
1
GND-A GND-A GND-SGND-S
GND-D GND-D
TITLE:
DWG NO.
9232KE5201DL
VIDEO IN/OUT
6
1.0
REV.
DRAWN BY
APPROVED BY
Sheet 3
to 10
XOCECO
XIAMEN OVERSEAS CHINESE
ELECTRONIC CO., LTD.
A
C
D
HYB18TC512160BF-2.5
K3
A-RASZ
K7
L7
A-CASZ
B-CK/DDR2_B-MCLKZ
B-CKN/DDR2_B-MCLK
A_UDQSM
A_UDQSP
A_UDQM
A_MDATA8
A_MDATA9
A_MDATA10
A_MDATA11
A_MDATA12
A_MDATA13
A_MDATA14
A_MDATA15
A18
A19
56
RS08
56
F3
B3
K9
F7
DDR2_1V8
A_LDQSP
A_LDQSM
A_UDQSP
A_UDQSM
RS09
RS10
RS11
RS12
56
56
56
56
E8
B7
A8
A-MVREF
J2
CS08
100n
B8
C8
A10
C7
C10
B7
B11
A11
A7
B10
A8
A_LDQM
A_UDQM
RS07
A-ODT
CS07
2.2u
A_LDQSM
A_LDQSP
A_LDQM
A_MDATA0
A_MDATA1
A_MDATA2
A_MDATA3
A_MDATA4
A_MDATA5
A_MDATA6
A_MDATA7
RS06 RS05
1 K 1% 1 K 1%
A-LDQSM/DDR2_A-UDQS1M
A-LDQSP/DDR2_A-UDQS1P
A_DQM1/DDR2_A-DQM1
SDR_DQ6/DDR2_A-DQ8
SDR_DQ9/DDR2_A-DQ9
SDR_DQ5/DDR2_A-DQ10
SDR_DQ11/DDR2_A-DQ11
SDR_DQ10/DDR2_A-DQ12
SDR_DQ4/DDR2_A-DQ13
SDR_DQ8/DDR2_A-DQ15
SDR_DQ7/DDR2_A-DQ15
A9
B9
C9
B6
A12
A6
B12
C12
C5
C11
C6
A2
E2
L1
R3
R7
R8
A-BA2
GND-D
DDR2_1V8
RS04
1K
A-UDQSN/DDR2_A-LDQS0M
A-UDQSP/DDR2_A-LDQS0P
A-DQM0/DDR2_A-DQM0
SDR_DQ2/DDR2_A-DQ0
SDR_DQ13/DDR2_A-DQ1
SDR_DQ1/DDR2_A-DQ2
SDR_DQ14/DDR2_A-DQ3
SDR_DQ15/DDR2_A-DQ4
SDR_DQ0/DDR2_A-DQ5
SDR_DQ12/DDR_A-DQ6
SDR_DQ3/DDR2_A-DQ7
B_MCLKZ
B_MCLK
WE
RAS
VDD1
VDD2
VDD3
VDD4
VDD5
CAS
LDM
UDM
VDDL
VSSDL
ODT
LDQS
LDQS
VSSQ1
VSSQ2
VSSQ3
VSSQ4
VSSQ5
VSSQ6
VSSQ7
VSSQ8
VSSQ9
VSSQ10
UDQS
UDQS
VREF
NC#A2
NC#E2
NC#L1
NC#R3
NC#R7
NC#R8
VSS1
VSS2
VSS3
VSS4
VSS5
B-A8/DDR2_B-CKE
B-A7/DDR2_B-WEZ
B-A10/DDR2_B-BA0
B-A9/DDR2_B-BA1
DDR2_B-BA2
B-ODT/DDR2_B-RASZ
B-A0/DDR2_B-CASZ
B-A1/DDR2_B-ADR0
B-A11/DDR2_B-ADR1
B-A2/DDR2_B-ADR2
B-CASZ/DDR2_B-ADR3
B-A3/DDR2_B-ADR4
B-BA1/DDR2_B-ADR5
B-A4/DDR2_B-ADR6
B-RASZ/DDR2_B-ADR7
B-A5/DDR2_B-ADR8
B-BA0/DDR2_B-ADR9
B-A12/DDR2_B-ADR10
B-A6/DDR2_B-ADR11
B-WEZ/DDR2_B-ADR12
B-UDQSM/DDR2_B-LDQS0M
B-UDQSP/DDR2_B-LDQS0P
B-DQM0/DDR2_B-DQM0
SDR_DQ18/DDR2_B-DQ0
SDR_DQ29/DDR2_B-DQ1
SDR_DQ17/DDR2_B-DQ2
SDR_DQ30/DDR2_B-DQ3
SDR_DQ31/DDR2_B-DQ4
SDR_DQ16/DDR2_B-DQ5
SDR_DQ28/DDR2_B-DQ6
SDR_DQ19/DDR2_B-DQ7
B-LDQSM/DDR2_B-UDQS1M
B-LDQSP/DDR2_B-UDQS1P
B-DQM1/DDR2_B-DQM1
SDR_DQ22/DDR2_B-DQ8
SDR_DQ25/DDR2_B-DQ9
SDR_DQ21/DDR2_B-DQ10
SDR_DQ27/DDR2_B-DQ11
SDR_DQ26/DDR2_B-DQ12
SDR_DQ20/DDR2_B-DQ13
SDR_DQ24/DDR2_B-DQ14
SDR_DQ23/DDR2_B-DQ15
B_CKE
B_WEZ
B_BA0
B_BA1
B_BA2
B_RASZ
B_CASZ
B_MADR0
B_MADR1
B_MADR2
B_MADR3
B_MADR4
B_MADR5
B_MADR6
B_MADR7
B_MADR8
B_MADR9
B_MADR10
B_MADR11
B_MADR12
E18
E19
E20
B19
H18
B18
H19
H20
A20
G20
B20
B_LDQSM
B_LDQSP
B_LDQM
B_MDATA0
B_MDATA1
B_MDATA2
B_MDATA3
B_MDATA4
B_MDATA5
B_MDATA6
B_MDATA7
D19
D20
F18
C20
F20
C19
G19
G18
C18
F19
D18
B_UDQSM
B_UDQSP
B_UDQM
B_MDATA8
B_MDATA9
B_MDATA10
B_MDATA11
B_MDATA12
B_MDATA13
B_MDATA14
B_MDATA15
CS06
10u
CS03
1n
A_MCLKZ
22
22
56
GND-D
GND-D
GND-D
K3
B-WEZ
K7
B-RASZ
L7
B-CASZ
RS35
56
F3
B3
B_LDQM
B_UDQM
J1
J7
56
RS36
K9
B-ODT
A7
B2
B8
D2
D8
E7
F2
F8
H2
H8
DDR2_1V8
A3
E3
J3
N1
P9
B_LDQSP
B_LDQSM
B_UDQSP
B_UDQSM
F7
E8
56
56
56
56
RS37
RS38
RS39
RS40
B7
A8
J2
A2
E2
L1
R3
R7
R8
B-MVREF
B-BA2
GND-D
CKE
CS
WE
RAS
VDD1
VDD2
VDD3
VDD4
VDD5
CAS
LDM
UDM
VDDL
VSSDL
ODT
LDQS
LDQS
VSSQ1
VSSQ2
VSSQ3
VSSQ4
VSSQ5
VSSQ6
VSSQ7
VSSQ8
VSSQ9
VSSQ10
UDQS
UDQS
VREF
NC#A2
NC#E2
NC#L1
NC#R3
NC#R7
NC#R8
VSS1
VSS2
VSS3
VSS4
VSS5
DDR2_1V8
CS28
100n
GND-D
CS27
100n
L8
A9
C1
C3
C7
C9
E9
G1
G3
G7
G9
CS25
100n
K2
VDDQ1
VDDQ2
VDDQ3
VDDQ4
VDDQ5
VDDQ6
VDDQ7
VDDQ8
VDDQ9
VDDQ10
CK
CK
GND-D
A1
E1
J9
M9
R1
J1
J7
A7
B2
B8
D2
D8
E7
F2
F8
H2
H8
A3
E3
J3
N1
P9
GND-D
RS46
22
A_MCLK
CS05
100n
B_ODT
RS03
1K
J18
D17
J19
E17
K17
B17
A17
C16
F17
D16
G17
B16
H17
D15
J17
A16
K19
J20
C15
K20
K8
J8
GND-D
1%
1%
C17
B-CKE/DDR2_B-ODT
150
B-CKE
A1
E1
J9
M9
R1
E15
B-VREF
RS41
CS26
100n
CS
B_CLKB_CLK+
CS17
100n
B-MDATA15
B-MDATA14
B-MDATA13
B-MDATA12
B-MDATA11
B-MDATA10
B-MDATA9
B-MDATA8
B-MDATA7
B-MDATA6
B-MDATA5
B-MDATA4
B-MDATA3
B-MDATA2
B-MDATA1
B-MDATA0
CS23
100n
GND-D
A-WEZ
CKE
DDR2_1V8
B-MDATA15
B-MDATA14
B-MDATA13
B-MDATA12
B-MDATA11
B-MDATA10
B-MDATA9
B-MDATA8
B-MDATA7
B-MDATA6
B-MDATA5
B-MDATA4
B-MDATA3
B-MDATA2
B-MDATA1
B-MDATA0
CS24
100n
L8
A9
C1
C3
C7
C9
E9
G1
G3
G7
G9
A12
A11
A10/AP
A9
A8
A7
A6
A5
A4
A3
A2
A1
A0
B9
B1
D9
D1
D3
D7
C2
C8
F9
F1
H9
H1
H3
H7
G2
G8
CS22
100n
K2
A-CKE
VDDQ1
VDDQ2
VDDQ3
VDDQ4
VDDQ5
VDDQ6
VDDQ7
VDDQ8
VDDQ9
VDDQ10
CK
CK
DQ15
DQ14
DQ13
DQ12
DQ11
DQ10
DQ9
DQ8
DQ7
DQ6
DQ5
DQ4
DQ3
DQ2
DQ1
DQ0
BA0
BA1
CS20
10u
CS21
100n
K8
J8
CS19
100n
A_CLKA_CLK+
RS33
A_MADR0
A_MADR1
A_MADR2
A_MADR3
A_MADR4
A_MADR5
A_MADR6
A_MADR7
A_MADR8
A_MADR9
A_MADR10
A_MADR11
A_MADR12
R2
P7
M2
P3
P8
P2
N7
N3
N8
N2
M7
M3
M8
B-MADR12
B-MADR11
B-MADR10
B-MADR9
B-MADR8
B-MADR7
B-MADR6
B-MADR5
B-MADR4
B-MADR3
B-MADR2
B-MADR1
B-MADR0
1 K 1% 1 K 1%
CS04
10u
CS02
100n
RS01
1K
CS01
1n
GND-D
L2
L3
B-BA0
B-BA1
A-MDATA15
A-MDATA14
A-MDATA13
A-MDATA12
A-MDATA11
A-MDATA10
A-MDATA9
A-MDATA8
A-MDATA7
A-MDATA6
A-MDATA5
A-MDATA4
A-MDATA3
A-MDATA2
A-MDATA1
A-MDATA0
CS18
2.2u
C3
A15
B3
A13
A3
B14
D6
B13
D5
A14
C14
D4
C13
A_CKE
A_WEZ
A_BA0
A_BA1
A_BA2
A_RASZ
A_CASZ
A-MDATA15
A-MDATA14
A-MDATA13
A-MDATA12
A-MDATA11
A-MDATA10
A-MDATA9
A-MDATA8
A-MDATA7
A-MDATA6
A-MDATA5
A-MDATA4
A-MDATA3
A-MDATA2
A-MDATA1
A-MDATA0
RS34
SDR_AD2/DDR2_ADR0
SDR_AD12/DDR2_A-ADR1
SDR_AD3/DDR2_A-ADR2
A-ODT/DDR2_A-ADR3
SDR_AD4/DDR2_A-ADR4
SDR_BA0/DDR2_A-ADR5
SDR_AD5/DDR2_A-ADR6
SDR_CASN/DDR2_A-ADR7
SDR_AD6/DDR2_A-ADR8
SDR_WEN/DDR2_A-ADR9
SDR_BA1/DDR2_A-AD10
SDR_AD7/DDR2_A-ADR11
SDR_RASN/DDR2_A-ADR12
D11
D3
D9
D10
F14
B4
A4
A12
A11
A10/AP
A9
A8
A7
A6
A5
A4
A3
A2
A1
A0
B9
B1
D9
D1
D3
D7
C2
C8
F9
F1
H9
H1
H3
H7
G2
G8
CS16
100n
SDR_AD9/DDR2_A-CKE
SDR_AD8/DDR2_A-WEZ
SDR_AD11/DDR2_A-BA0
SDR_AD10/DDR2_A-BA1
DDR2_A-BA2
SDR_AD0/DDR2_A-RASZ
SDR_AD1/DDR2_A-CASZ
DQ15
DQ14
DQ13
DQ12
DQ11
DQ10
DQ9
DQ8
DQ7
DQ6
DQ5
DQ4
DQ3
DQ2
DQ1
DQ0
BA0
BA1
100n
CS11
100n
CS12
CS13
100n
CS14
100n
CS15
100n
A-MADR12
A-MADR11
A-MADR10
A-MADR9
A-MADR8
A-MADR7
A-MADR6
A-MADR5
A-MADR4
A-MADR3
A-MADR2
A-MADR1
A-MADR0
1%
A_ODT
R2
P7
M2
P3
P8
P2
N7
N3
N8
N2
M7
M3
M8
CS09
10u
100n
CS10
1%
E13
C4
L2
L3
A-BA0
A-BA1
A_MCLKZ
A_MCLK
RS13
150
A5
B5
SDR_CKE/DDR2_A-ODT
5
H
NS03
NS02
A-MVREF/DDR2_A-MVREF
4
G
HYB18TC512160BF-2.5
A-CKO/DDR2_MCLKZ
A-CKON/DDR2_MCLK
3
F
DDR2_1V8
DDR/SDR
2
E
NS01 C
MSD209FG
RS02
1K
1
B
RS18
A_CLK+
RS19
A_CLK56
A-MADR1
A-MADR10
A-MADR5
A_MADR9
A_MADR12
A_MADR7
A_MADR3
A_MADR0
A_MADR2
A_MADR4
A_MADR6
A-MADR9
A-MADR12
A-MADR7
A-MADR3
A-MADR0
A-MADR2
A-MADR4
A-MADR6
RS21
56
56
56
56
56
56
56
56
56
56
56
56
RS14
A_MDATA11
A_MDATA12
A_MDATA9
A_MDATA14
A_MDATA4
A_MDATA3
A_MDATA1
A_MDATA6
A_MDATA15
A_MDATA8
A_MDATA10
A_MDATA13
A_MDATA7
A_MDATA0
A_MDATA2
A_MDATA5
B_MADR10
B_MADR1
B_MADR3
B_MADR12
B_MADR9
B_MADR7
B_MADR5
B_MADR0
B_MADR2
B_MADR4
B_MADR6
RS47
22
RS48
B-MADR10
B-MADR1
B-MADR3
B-MADR12
B-MADR9
B-MADR7
B-MADR5
B-MADR0
B-MADR2
B-MADR4
B-MADR6
RS49
56
RS50
56
RS22
RS23
RS24
RS25
RS26
RS27
RS28
RS29
RS30
RS31
RS32
A-MADR8
A-MADR11
A-WEZ
A-CKE
A-ODT
A-CASZ
A-RASZ
A-BA0
A-BA1
A-BA2
B_MADR8
B_MADR11
B_WEZ
B_CKE
B_ODT
B_CASZ
B_RASZ
B_BA0
B_BA1
B_BA2
56
56
RS15
56
RS16
RS17
B_CLK-
B_MCLKZ
RS20
A_MADR1
A_MADR10
A_MADR5
A_MADR8
A_MADR11
A_WEZ
A_CKE
A_ODT
A_CASZ
A_RASZ
A_BA0
A_BA1
A_BA2
B_CLK+
B_MCLK
56
A-MDATA11
A-MDATA12
A-MDATA9
A-MDATA14
A-MDATA4
A-MDATA3
A-MDATA1
A-MDATA6
A-MDATA15
A-MDATA8
A-MDATA10
A-MDATA13
A-MDATA7
A-MDATA0
A-MDATA2
A-MDATA5
56
56
56
56
56
56
56
56
56
56
RS42
B_MDATA11
B_MDATA12
B_MDATA9
B_MDATA14
B_MDATA4
B_MDATA3
B_MDATA1
B_MDATA6
B_MDATA15
B_MDATA8
B_MDATA10
B_MDATA13
B_MDATA7
B_MDATA0
B_MDATA2
B_MDATA5
RS51
RS52
RS53
RS54
RS55
RS56
RS57
RS58
RS59
RS60
56
56
RS43
56
RS44
RS45
B-MADR8
B-MADR11
B-WEZ
B-CKE
B-ODT
B-CASZ
B-RASZ
B-BA0
B-BA1
B-BA2
B-MDATA11
B-MDATA12
B-MDATA9
B-MDATA14
B-MDATA4
B-MDATA3
B-MDATA1
B-MDATA6
B-MDATA15
B-MDATA8
B-MDATA10
B-MDATA13
B-MDATA7
B-MDATA0
B-MDATA2
B-MDATA5
56
TITLE:
DWG NO.
9232KE5201DL
DDR2 MEMORY
6
1.0
REV.
DRAWN BY
Sheet 4
APPROVED BY
to 10
XOCECO
XIAMEN OVERSEAS CHINESE
ELECTRONIC CO., LTD.
A
B
C
D
E
F
G
H
R876
10K
N805
MP1410-C019
D801
B140-13-F
L810
+5V_STB
+5V_STB
GND-D
C898
10u
16V
4.7K
GND-D
R877
10K
+5V_STB
GND-D
N804
MP1410-C019
EN
SW
COMP
GND
1%
FOR PDP ONLY
1
D803
B240-13-F
GND-D
3
AVDD_MPLL
D14
AVDD_MEMPLL
AVDD_MEMPLL_3.3V
P7
AVDD_VIF
ADD_VIF_3.3V
P8
AVDD_AUSDM
AVDD_AUSDM
F8
AVDD_OTG
AVDD_OTG
G14
G13
G12
G11
H14
AVDD_DDR_1.8V
AVDD_DDR_1.8V
AVDD_DDR_1.8V
AVDD_DDR_1.8V
AVDD_DDR_1.8V
DDR2_1V8
AVDDL_DVI
G10
GND-D
R822
10K
FB
GND-D
L811
SLF10145T-470M1R4-PF
AVDD_LPLL
N7
AVDD_MPLL_3.3V
VDDC
5
GND-D
GND-D
K18
AVDD_LPLL_3.3V
AVDDL_DVI_1.2V
6
4
AVDD_ADC
H7
J6
J7
K7
AVDD_ADC_3.3V
AVDD_ADC_3.3V
AVDD_ADC_3.3V
AVDD_ADC_3.3V
GND-D
1.5n
C835
IN
N8
N12
P11
P12
VDDP_3.3V
VDDP_3.3V
VDDP_3.3V
VDDP_3.3V
+5V_PANEL
GND-D
2
C897
10u
16V
GND-D
C833
10u
16V
H9
H10
J15
K15
L15
M15
N10
N11
P10
VDDC_1.2V
VDDC_1.2V
VDDC_1.2V
VDDC_1.2V
VDDC_1.2V
VDDC_1.2V
VDDC_1.2V
VDDC_1.2V
VDDC_1.2V
100p
C839
C817
10u
16V
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
7
100n
C837
C830
10u
16V
C406
100n
8
N/C
2
3
C811
100n
10M
R805
1
BS
L809
STPB3216-380PT
100n
C820
G
D
S
47K
R804
SI2315BDS
V802
V801
BC847AW
C823
10n
+12V
15K 4.7n
R824 C831
+5V
C899
100n
200K
R802
C804
1u
R801
10K
16V
2
PWR_ON/OFF
007:C3
R807
47K
R803
2
VDDC
R808
10K
V803
BC847AW
B15
D7
D8
D12
D13
J9
J10
J11
J12
J13
K9
K10
K11
K12
K13
L9
L10
L11
L12
L13
L19
L20
M9
M10
M11
M12
M13
W6
+3.3VDD
1
TJC3S-13A
X801
GND-D
1
1%
GND-D
C802
220u
16V
4.7K
R806
2
10u
C822
16V
100n
C821
C819
10u
GND-D
C801
100n
FB
GND-D
L812
SLF10145T-470M1R4-PF
GND-D
C881
220u
16V
5
3
VDDP
R823
10K
5
GND
GND-D
C807
220u
16V
6
4
6
4
R821
220
C806
100n
GND-D
33.2K
7
COMP
3
D804
B240-13-F
8
+5V
9
SW
7
1.5n
C836
C869
220u
25V
C848
100n
+5V
10
EN
NS01 F
MSD209FG
C405
100n
8
N/C
IN
2
11
100p
C840
BG2012D151T
BS
100n
C838
D802
B140-13-F
+12V
1
15K 4.7n
R825 C832
C824
10n
R820
33K
1
+12V
@xrefL
PWM
12
+5V_STB
10u
C834
+12V
@xrefL
BLK
13
AVDD_DM
P13
AVDD_DM_3.3V
L815
+5V_USB
STPB3216-380PT
(DVI)
GND-D
VDDC
C845
1u
C850
100n
C856
100n
C861
100n
C866
100n
C871
100n
C875
100n
C879
100n
GND-D
AVDDL_DVI
L823
STBH2012-221PT
C855
100n
GND-D
DDR2_1V8
+3.3AVDD
4
AVDD_MEMPLL
L824
STBH2012-221PT
AVDD_ADC
L816
STBH2012-221PT
L817
STBH2012-221PT
AVDD_DM
C853
100n
C841
4.7u
AP1117-ADJ
L813
STPB3216-310PT
OUT
GND-D
C876
100n
C843
4.7u
C849
100n
C854
100n
C859
100n
C864
100n
C877
100n
GND-D
GND-D
AVDD_AUSDM
AVDD_OTG
AVDD_VIF
100n
CJ32
10V
GND-D
GND-D
GND-D
C870
100n
1n
C880
C857
100n
2.2u
C874
C847
100n
2.2u
C862
2.2u
C844
+1.8V_DE
100u
CJ33
100u
CJ31
AVDD_DM
2.2u
C873
+3.3V_PS121
L822
STBH2012-221PT
NJ03
AS1117-1V8
IN
OUT
LJ04
STBH2012-221PT
100n
CJ30
10V
NJ02
AS1117-3V3
IN
OUT
100u
CJ29
10V
VDDP
100u
C809
100n
C805
100n
C808
L804
STBH2012-221PT
100n
CJ28
10V
AVDD_MPLL
L803
STBH2012-221PT
+3.3V_DE
+3.3AVDD
C872
100n
GND-D
AVDD_LPLL
+5V
C868
100n
AVDD_OTG
L821
STBH2012-221PT
1%
5
+3.3VDD
C865
100n
C860
4.7u
AVDD_ADC
2.2u
C852
R819
402
10V
220u
C818
100n
C816
10V
C814
2.2u
L820
AVDD_AUSDM
STBH2012-221PT
1%
GND-D
5271117010
N801
L1117DG-2.5
IN
OUT
C846
100n
AVDD_VIF
L819
STBH2012-221PT
GND-D
100n
C828
IN
ADJ
+5V_STB
C896
100n
VDDP
1n
C851
2.2u
C842
3.3VDDR
100u
C827
L808
STPB3216-310PT
DDR2_1V8
N802
2W M
R813
4.7
2W M
R818
909
L807
STPB3216-310PT
C867
100n
GND-D
AVDD_MPLL
+5V
C863
100n
L818
AVDD_LPLL
STBH2012-221PT
R880
4.7
+5V_STB
C858
100n
2.2u
C895
+3.3VDD
C878
100n
GND-D
AVDD_MEMPLL
L805
STBH2012-221PT
GND-D
GND-D
TITLE:
DWG NO.
9232KE5201DL
POWER
6
1.0
REV.
DRAWN BY
APPROVED BY
Sheet 5
to 10
XOCECO
XIAMEN OVERSEAS CHINESE
ELECTRONIC CO., LTD.
A
B
C
5V_HDMI-3_IN
D
DA03
MMBD1204
E
F
G
H
CA03
100n
WP: H=READ ONLY
RA11
10K
NA03
HOTPLUG_HDMI-3
5
SDA
GND
4
6
SCL
A2
3
7
WP
A1
2
8
Vcc
AO
1
PESD5V0L4UG
2
1
NA06
24C02N-10SI27
RA06
10K
RA04
10K
+5V
3
1
16
17
18
19
4
5
RA12
0
12
13
14
15
SDA_HDMI-3
SCL_HDMI-3
10
11
HDMI-3_RXC-
9
HDMI-3_RXC+
7
6
HDMI-3_RX0+
5
8
HDMI-3_RX0-
HDMI-3_RX1HDMI-3_RX1+
3
4
2
2
HDMI-3_RX2-
1
HDMI-3_RX2+
XA03
HDMI-FIX
+5V
CA01
100n
NA04
24C02N-10SI27
RA07
10K
MMBD1204
DA01
HOTPLUG_HDMI-1
RA03
10K
3
WP: H=READ ONLY
RA01
10K
5V_HDMI-1_IN
NA01
3
1
4
0
18
19
5
2
PESD5V0L4UG
5
SDA
GND
4
6
SCL
A2
3
7
WP
A1
2
8
Vcc
AO
1
15
16
17
RA08
SDA_HDMI-1
SCL_HDMI-1
13
14
RA13
100
003:B1
9
10
11
12
HDMI_CEC
HDMI-1_RXCHDMI-1_RXC+
6
7
8
HDMI-1_RX0HDMI-1_RX0+
4
5
HDMI-1_RX1HDMI-1_RX1+
5V_HDMI-1_IN
+3.3VDD
RA14
1K
1
2
HDMI-1_RX2HDMI-1_RX2+
HOTPLUG_HDMI-1
VA01
BC847AW
XA01
HDMI-FIX
RA17
10K
5V_HDMI-2_IN
17
18
3
1
5
SDA
GND
4
6
SCL
A2
3
7
WP
A1
2
8
Vcc
AO
1
HOTPLUG_HDMI-3
VA03
BC847AW
RA19
10K
003:B2
HOTPLUG_HDMI-2_OUT
+3.3VDD
003:B3
HOTPLUG_HDMI-3_OUT
0
RA10
SDA_HDMI-2
SCL_HDMI-2
HDMI-2_RXCHDMI-2_RXC+
9
10
11
12
13
14
4
19
2
PESD5V0L4UG
5
RA16
1K
NA02
5
RA18
10K
5V_HDMI-3_IN
RA09
10K
RA05
10K
RA02
10K
HOTPLUG_HDMI-2
NA05
24C02N-10SI27
VA02
BC847AW
RA22
10K
HOTPLUG_HDMI-2
CA02
100n
DA02
MMBD1204
+5V
RA21
10K
+3.3VDD
RA15
1K
5V_HDMI-2_IN
16
003:B2
HOTPLUG_HDMI-1_OUT
003:B1
CEC
15
RA20
10K
3
4
TITLE:
7
HDMI-2_RX1HDMI-2_RX1+
DWG NO.
9232KE5201DL
HDMI
6
1
2
3
4
6
HDMI-2_RX0+
5
8
HDMI-2_RX0-
HDMI-2_RX2HDMI-2_RX2+
1.0
REV.
XA02
HDMI-FIX
DRAWN BY
Sheet 6
APPROVED BY
to 10
XOCECO
XIAMEN OVERSEAS CHINESE
ELECTRONIC CO., LTD.
A
B
C
D
E
F
G
H
PANEL_POWER
X401
PHB-2x20-2.0
5V_USB0
FU801
SMD1206P075TF
2
B0_RXE4+
B1_RXE4B2_RXE3+
B3_RXE3B4_RXEC+
B5_RXECB6_RXE2+
B7_RXE2-
KEY
CARD_OC
CI_VS1#
FLASH_WP# 003:H2
SC2_FS 003:G4
SC1_FS 003:G5
R16
P16
T16
U16
T15
R15
R809
1K
4.7K
R866
R405
33
33
W16
Y16
W17
Y17
W18
Y18
W19
Y19
TXOUT4E+
TXOUT4ETXOUT3E+
TXOUT3ETXCLKOUTE+
TXCLKOUTETXOUT2E+
TXOUT2E-
C2+
R1IN
C2-
R1OUT
V-
T1IN
T2OUT
T2IN
R2IN
R2OUT
5
31
34
33
36
35
38
37
40
39
10K
R422
10K
R420
GND-D
29
31
33
35
37
39
GND-D
12
11
9
X402
@2.36X14B
10
8
GND-D
R858
100
GND-D
002:A4
232_RXD
L806
+5V
+5V_USB
STPB3216-380PT
100
002:A4
232_TXD
R859
47K
USB0_SW
007:B4
4.7K
V805
BC847AW
C829
100n
N401
AO4803A
L401
1
STPB3216-380PT
FOR THE 12V POWER PANEL
+12V
D2_8
R838
4.7K
ADJ_PWM
5
G1
SCL +3.3AVDD
5
6
C404
100n
R415
+5V_STB
R408
4.7K
+3.3VDD
+3.3VDD
2
4.7K
R862
100
R846
1K
R849
330
+5V
V808
BC847AW
1
R851
4.7K
LED1
MISC+LVDS
X805
GND-D
GND-D
BLK_ON
GND-D
DWG NO.
9232KE5201DL
100n
C893
10K
R868
GND-D
R830
4.7K
TITLE:
KEY
2
1
X803
GND-D
SDA
R848
GND-D
BC847AW
7.5K
R413
PANEL_ON/OFF
GND-D
V402
V401
BC847AW
SCL
R883
33
0
3
C403
100n
R412
10K
0
1K
R882
33
IR_SYNC
D805
LL4148
D1_5
47K
1u
100u
C826
16V
4
SDA
5
4.7K
R401
B140-13-F
D806
PANEL_POWER
6
R414
C402
1u
C401
R879
33
D1_6
R860
R878
33
D2_7
S1
+5V_STB
GND-D
7
G2
4
+3.3VDD
TJC10S-07A
7
3
L402
STPB3216-380PT
GND-D
8
S2
2
+3.3AVDD
R839
0
5V_USB0
C825
100n
GND-D
+5V_PANEL
4
10K
R829
32
27
R817
10K
R867
R833
1K
C883
4.7u
29
008:C5
6
0
R827
30
25
38
R814
1K
R828
100
20K
R826
27
34
GND-D
@xrefL
PWM
C882
100n
28
SDA 001:D5
SCL 001:D5
33
R417
23
40
3
V806
BC847AW
25
13
2
1
23
26
36
1
X802
24
32
R409
6
21
30
X809
+5V
2
22
R416
33
LVDS_SDA
LVDS_SCL
LVDS_IO1
LVDS_IO2
T1OUT
+3.3VDD
3
19
21
7.5K
R815
TXOUT1E+
TXOUT1ETXOUT0E+
TXOUT0ETXOUT4O+
TXOUT40TXOUT3O+
TXOUT3O-
GND-D
19
17
33
1u
Y20
W20
V19
V20
U19
U20
T19
T20
+5V
17
20
28
C815
TXCLKOUTO+
TXCLKOUTOTXOUT2O+
TXOUT2OTXOUT1O+
TXOUT1OTXOUT0O+
TXOUT0O-
V807
BC847AW
15
18
26
R881
0
@xrefL
BLK
16
24
R407
PANEL_ON/OFF
+5V
R816
R19
R20
P19
P20
N19
N20
M19
M20
5
13
15
18
R406
GND-D
GND-D
008:G5
CARD_5VEN
CARD_3.3VEN
13
16
14
C892
100n
MUTE_PH
LED1
ADJ_PWM
PH_DECT
14
9
11
14
R404
33
TXD_UPDATE
002:E2
R865
W12
Y12
V14
U15
V15
V16
4.7K
R863
GND
6
N808
11
12
RXD_UPDATE
002:D1
R864
R843
0
12
7
10K
R423
100n
C812
10V
SCL 001:D5
SDA 001:D5
USB0_SW 005:D4
BLK_ON
PANEL_ON/OFF
PWR_ON/OFF 005:B2
9
10K
R421
R875
10K
1u
C887
V+
7
F3
N6
P3
P4
+3.3VDD
C894
100n
15
C1-
C890
100n
33
Vcc
2
+3.3VDD
R841
R842
7
10
8
R410
LVDS
R861
16
4
33
33
DEBUG PORT
4
N809
MAX3232CSE
C1+
CARD_SHDN#
USB0_OC
2
GND-D
1
+3.3VDD
8
3
5
10
TXOUT0ETXOUT0E+
TXOUT1ETXOUT1E+
TXOUT2ETXOUT2E+
TXCLKOUTETXCLKOUTE+
TXOUT3ETXOUT3E+
TXOUT4ETXOUT4E+
3
C891
100n
3
W15
Y15
33
R411
?
G0_RXE1+
G1_RXE1G2_RXE0+
G3_RXE0G4_RXO4+
G5_RXO4G6_RXO3+
G6_RXO3-
TXD_UPDATE
P14
P15
E9
4
R857
DP0
DM0
LVSYNC2/GPIO14
R0_RXOC+
R1_RXOCR2_RXO2+
R3_RXO2R4_RXO1+
R5_RXO1R6_RXO0+
R7_RXO0-
33
C889
100n
T2
U2
R403
4.7K
PWM0/GPIO5
PWM1/GPIO6
PWM2/GPIO7
PWM3/GPIO8
PWM4/GPIO160
PWM5/GPIO161
PWM
R836
R837
RXD_UPDATE
UART_TX
0
SAR0/GPIO126
SAR1/GPIO127
SAR2/GPIO128
SAR3/GPIO129
SAR4/GPIO149
SAR5/GPIO150
SAR
33
33
R856
0
GPIO
TCON_EXT0/GPIO16
GPIO_A1/GPIO144
GPIO_A2/GPIO145
GPIO_A3/GPIO146
E8
E7
B1
B2
33
C888
100n
I2C_SCL(DDCR_CLK)
I2C_SDA(DDCR_DAT)
R834
R835
UART_RX
2
I2C
33
33
5
22
GND-D
IR_SYNC
EEP_W_EN 003:D2
A1
A2
6
5
3
UART_RX2/GPIO147
UART_TX2/GPIO148
V10
M18
33
X807
GND-D
SPI_CZ1
SPI_CK
SPI_DI
SPI_DO
3
20
1
W14
Y13
W13
Y14
R402
+5V_STB
GND-D
3
UART
GND-D
4
UART_RX(DDCA_CLK)
UART_TX(DDCA_DAT)
USB3112
X806
1
USB2.0-P1_VBUS
USB2.0-P1_CID
USB2.0-P1_DP
USB2.0-P1_DM
USB2.0
4
R847
1K
USB2.0-P0_DP
USB2.0-P0_DM
C885
20p
R845
4.7K
IRIN
IRIN2/GPIO9
V1
U1
3
GND-D
1K
R832
SPI_CZ1
SPI_CK1
SPI_DI1
SPI_DO1
SPI
1M
R840
12MHz
XTAL_2I
XTAL_2O
APX810-29SAG-7
N807
C884
20p
USB1_OC
INT2/GPIO10
RESET
Vcc
GND
R831
33
L18
C886
1u
V11
INT/PM_CTRL/GPIO4
R844
4.7K
Reset
RESET
GND-D
GND-D
G801
U14
TXOUT0OTXOUT0O+
TXOUT1OTXOUT1O+
TXOUT2OTXOUT2O+
TXCLKOUTOTXCLKOUTO+
TXOUT3OTXOUT3O+
TXOUT40TXOUT4O+
USB INTEFACE
GND-D
100K
R855
F7
HWreset
IR
2
GND-D
TESTPIN
1
6
DM0
DP0
USB1_OC
2
100u
C810
R854
100K
NS01 D
MSD209FG
1
2
4
4
1
100
R418
R850
47K
USB0_OC
+3.3VDD
1
1
1.0
REV.
DRAWN BY
Sheet 7
to 10
GND-D
GND-D
APPROVED BY
XOCECO
XIAMEN OVERSEAS CHINESE
ELECTRONIC CO., LTD.
A
B
C
D
F
G
H
+5V
+12V
RV06
0
RV02
0
100n
CV01
1
E
RV09
10K
DV04
LL4148
RV13
0
GND-D
+24V-AMP
VV03
BC847AW
2
1
OUT1_1
4
5
6
7
8
3
NC3
VD1_4
VD1_5
NC6
NC7
9
10
48
13
NC48
CBIAS
CV02
470u
16V
VS1_47
ROSC
GND49
15
46
VS1_46
AVCC
CV07
10u
RV11
33K
CV11
10u
45
16
GND16
44
NC17
NV02
R2A15112FP
NC18
42
NC19
DVDD
NC20
HB2
NC21
2
3
CV28
1000u
4
CV26 35V
470n
NC40
39
CLOCK
VS2_39
VREF
VS2_38
PROT
NC37
23
GND-S
38
24
OUT2_36
CV23
100n
XV03
LV06
LSDL-035 T J C 3 S - 0 5 A
+24V-AMP
RV16
100K
36
OUT2_35
35
34
NC34
VD2_33
33
VD2_32
32
NC31
31
NC30
30
NC29
29
NC28
28
27
26
25
IN2
GAIN2
CV12
1u
MUTEL
37
GND-D
CV29
100n
1
CV30
1000u
35V
2
CV15
1u
RV05
4.7K
3
4
+24V-AMP
GND-S
5
0
RV14
VV01
BC847AW
100n
CV03
3
CV25 35V
470n
LV03
A7503AY-150M
40
22
MUTE_AMP
002:D4
CV24
10u
41
21
RV01
10K
22uH
NC43
20
+5V
1
43
19
CV09
10u
XV02
TJC3S-04A
CV27
1000u
HB1
18
AMP_R
LV02
A7503AY-150M
NC45
GND-S
17
AMP_L
CV22
100n
47
14
GND-D
2
OUT1_2
DV02
LL4148
NC8
MMBT3906LT1
VV02
NC9
GND-D
IN1
RV04
4.7K
CV14
1u
CV06
100n
11
RV10
6.8K
STBYL
RV08
10K
12
RV07
2.2K
GAIN1
DV01
LL4148
DV03
LL4148
STANDBY_AMP
002:D4
RV03 GND-D
3K
GND-D
GND-S
GND-D
+24V-AMP
CV16
100n
RV15
0
CV17
100n
CV18
100n
CV19
100n
GND-D
GND-S
GND-S
CV04
1u
47u
5
NV01
BH3547F
GND-D
IN2
BIAS
+3.3AVDD
CV20
100u
L
GND
IN1
G2
R
16V
4
3
2
1
OUT1
MUTE
16V
CV21
100u
PRIM_AUD_OUT_R
002:F3
R874
10K
PRIM_AUD_OUT_L
002:F3
AMP_L
6
7
VCC
OUT2
100n
CV10
GND-D
8
100u
CV08
10V
4
CV13
16V
LV01
+5V
AMP_R
5
MUTE_PH
002:D4
PH_DECT
002:D4
ST-113
XV01
GND-D
RV12
100
CV05
1u
HEADPHONE
G5
GND-D
TITLE:
DWG NO.
9232KE5201DL
AUDIO AMP
6
1.0
REV.
DRAWN BY
APPROVED BY
Sheet 8
to 10
XOCECO
XIAMEN OVERSEAS CHINESE
ELECTRONIC CO., LTD.
A
B
C
D
E
F
G
H
1
D[0-7]
2
TP1
D[5]
D[4]
D[3]
D[2]
D[1]
D[0]
D[6]
PAD1
D[7]
5V
X1
RESERVE
LED1
D[0]
LED2
SDA
VOL-
D[1]
7
SCL
GND
+3.3V
6
SDA
GPIO9
20
R10
2K
C6
100n
AVCC
V33
PAD7
1u
C4
C3
10u 5V
D[0-7]
KEY
TP2
L1
BG1608B121
N1
AS1117-3V3
IN
OUT
D[7]
V33
100n
C8
NC
100n
C7
AVCC
R3
0
D[6]
V33
R14
4.7K
DVCC
GPIO10
19
GPIO11
18
GPIO12
17
16
R9
20K
R12
0
GND
LED8
R8
10K
21
R11
1K
AVCC
C5
100p
5V
R
22
R4
100
D[5]
R912
3K
LED7
AVCC
LED5
LED
15
GND
10K
R6
V33
31
10K
R5
DVSS
GPIO4
32
33
GPIO3
34
35
CIN10
AVSS
D[3]
D[4]
1
LED6
R911
1.1K
GPIO2
36
37
ADD1
X903
V901
BC847AW
23
GPIO8
VBIAS
LED4
SCL
24
ADD0
CIN9
3 VCC_5V
GND
4
25
SCLK
CIN8
VSHILD
IR
SDA SDA
26
SDA
10
14
4
2
GND
B
GPIO1
38
8
CIN11
22uF
7
D[2]
5.6K
R13
27
INT#
9
3K
R914
10V
C912
6
CIN7
LED3
5 VCC_3.3V
R913
47
C911
100n
PAD5
PAD6
11
N902
HRM138CB5400
Vout
GND
Vcc
CIN5
CIN6
TJC10S-07AW
LED901
GHZRB703D0
NC
CIN4
GND
SCL
GND
GPIIO7
4
5
PD
GND
28
CIN3
PAD4
CH+
R7
3.3K
29
13
REXT
GPIO6
3
R903
100
4
R901
100K
GND
5V
5
GPIO5
CIN2
CIN12
SCL
CIN1
2
PAD8
CH-
12
SDA
GND
3
30
1
MENU
SDA
12p
C2
VDD
2
R2 NC
0
6
12p
C1
6
SDA
PAD3
5V
D[0-7]
C902
100n
10V
22uF
C901
1
R902
100
2.7K
R905
3
R904
2.7K
N901
ISL29001
SCL
IT7230AFN
N2
+3.3V
INPUT
KEY
R1 NC
0
5
GPIO0
PAD2
4
+3.3V
SCL
CIN0
3
IRQ
GND/THD
V33
POWER
THD1
2
39
GND
40
1
THD0
VCC
VOL+
5
TITLE:
IR + TOUCH KEY
6
IR
KEY
DWG NO.
9232KE5201DL
1.0
REV.
DRAWN BY
APPROVED BY
Sheet 9
to 10
XOCECO
XIAMEN OVERSEAS CHINESE
ELECTRONIC CO., LTD.
Power Board
APPENDIX-A: Main assembly 9240KE5210
NAME
NO.
MAIN COMPONENT AND IT'S NO.
Main board
XI6KE0260110
NS01
NS02 NS03
NJ01
TUNER1
NV02
IR board
XI635KH00200
Key board
XI635KH00201
Power board
XI6KH0072010
Remote control
XI6010900301
RC-903-0A
Panel
XI5203408901
LK400D3LA14
MSD209FG (5270209001)
K4T51163QG-HCF7(5275116301)
CE6353 (5276353001)
FQD1116ME/I V (5524000029)
R2A15112FP (5271511201)
APPENDIX-B: Exploded view (LCD-40XZ10F)
PART LIST OF EXPLODED VIEW
REF.No. DESCRIPION
Pedestal assembly
Standing pole assembly
2
3
Power board assembly
Interface baffle (below)
4
Main board assembly
5
Interface baffle (right)
6
Sound box assembly
7
IR assembly
8
9
Front cabinet
10
Touch key assembly
11
Power switch
Display panel
12
Key bracket
13
Panel holder assembly
14
Back cover
15
1
Note: design and specification are subject to change without notice.
PART LIST
LCD-40XZ10F ver.1.0
REF.No. PARTS No.
1
XI6151225000
2
XI6156110000
3
XI6KH0072010
4
XI5810X72200
5
XI6KE0260110
6
XI5810X72110
7
XI6170834000
8
XI635KH00200
9
XI5Q405200XX
10
XI635KH00201
11
XI5293000056
12
XI5203408901
13
XI58B0043410
14
XI6153279000
15
XI5H4070J0XX
16
XI6010900301
17
XI5944037290
DESCRIPION
Pedestal assembly
Standing pole assembly
Power board assembly
Interface baffle (below)
Main board assembly
Interface baffle (right)
Sound box assembly
IR assembly
Front cabinet
Touch key assembly
Power switch
Display panel
Key bracket
Panel holder assembly
Back cover
Remote control
User manual
Only the parts in above list are used for repairing.
Other parts except the above parts can't be supplied.
Q'TY REMARK
1
1
1
1
1
1
1
1
1
1
1
1 LK400D3LA14
1
1
1
1
1
Assemble & Disassemble the Pedestal Base (Option)
If the stand is provided, please read these instructions thoroughly before attempting this installation.
Safety Precautions:
1. Please read these instructions thoroughly prior to attempting this installation.
2. Be sure to handle this product very carefully when attempting assembly. If you are unsure of
your capability, or the use of tools necessary to complete this activity, refer to a professional
installer or service personnel. The manufacturer is not responsible for any damages or
injuries that occur due to mishandling or improper assembly/installation.
3. When using a table or bench as an aid to assembly, be sure to put a soft cushion or covering to
prevent accidental scratching or damage to the unit's finish.
4. The speaker is not intended to support the weight of this display. Do not move or handle this
product from the speaker; which can cause damage to the display not covered under the
manufacturer's warranty.
To install the stand:
1. Remove the stand from the box and place it on a table or bench.
You must pay attention to the direction of the stand. The wide portion of the stand should go towards
the front of the TV.
2. Lay your TV flat (screen down) on the edge of a table or bench. Make sure that you put down a soft
cushion or cloth so that your TV is not scratched.
3. Put the stand close to the TV back, align the stand with the TV by moving the stand steadily until the
Stand Locators align with the locating grooves on the stand. And align the screw holes on the TV back
with the holes in the stand, then secure the stand to the TV with provided screws.
Locators
Stand
Secure with
four screws
Locating grooves
To remove the stand from the TV, perform these steps in reverse order.
Note
The appearance of this product in these illustrations may differ from your actual product, and is for
comparative purposes only.
WALL MOUNTING INSTRUCTIONS
27
Safety Precautions:
1. Be sure to ask an authorized service personnel to carry out setup.
2. Thoroughly read this instruction before setup and follow the steps below precisely.
3.The wall to be mounted should be made from solid materials. Only use accessories supplied by the manufacturer.
4.Very carefully handle the unit during setup. We are not liable for any damage or injury caused by mishandling or improper installation.
5.Be sure to place the unit on a stable and soft platform which is strong enough to support the unit.
6.Do not uplift the speaker when moving the display. The appearance of the unit may different from the actual ones.
7.Design and specifications are subject to change without notice.
8. Retain these instructions for future reference.
X
Below we will show you how to mount the
Display on the wall using our company’s
wall mounting components.
Wall
Wall
8
Wall Mounting Holder
Wall Mounting Connector
200
Take out these
parts from the
box
(Unit:mm)
Note: All the wall mounting parts are
optional and may be unavailable in
your model.
Expansion Bolt
Wood Screw
Combination Screw
Wall mounting fix-hole center
Fig.1
1. There are three options of wall mounting
holder with different
specifications
:200200,200400,200600. Please check your
wall mounting holder for its specification.
Rear wall mounting hole center
Fig.2
2. Due to the wall mounting fix-groove leaning to the
right side, the whole unit will lean to right side after
installation, please carefully measure the position of
the holes you want to drill, refer to the parameters
on Fig.2 when drilling the holes.
Fig.3a
Fig.3b
3a. Screw 4pcs expansion bolts to fix the
wall mounting holder on the wall.
3b. If your wall is a wooden structure, please
fix the wall mounting holder on the wall
with 16pcs wood screws.
Note: The "X" in Fig.2 represents a data. It may be
200mm or 400mm or 600mm.
Fig.7
Fig.6
Fig.4
4. Use the 4pcs combination screws to fix
the wall mounting connector to the rear
of the display unit.(Caution:the direction
of the connectors should be strictly
confirm to the diagram illustrated above).
Fig.5
5. Put the back of the display unit close to the wall
mounting holder, insert the four wall mounting
connectors into the four calabash-shaped holes on
the wall mounting holder. (Fig.5)
6. Let the display unit slowly slide down to
the end of the calabash-shaped hole.
(Fig.6)
7. Push rightwards carefully until the wall
mounting connectors fully slide into the
right fix-grooves and be sure the mounting
is secure.
8. If you want to dismount the unit do the above steps in reverse order.
Apr. /2010