Download SN8P1919

SN8P1919
8-Bit Micro-Controller with Charge pump Regulator, PGIA, 16-bit ADC
Table of Content
AMENDENT HISTORY................................................................................................................................ 2
11
PRODUCT OVERVIEW......................................................................................................................... 6
1.1
1.2
1.3
1.4
1.5
1.6
1.7
22
SELECTION TABLE......................................................................................................................... 6
MIGRATION TABLE........................................................................................................................ 6
FEATURES ........................................................................................................................................ 7
SYSTEM BLOCK DIAGRAM .......................................................................................................... 8
PIN ASSIGNMENT ........................................................................................................................... 9
PIN DESCRIPTIONS....................................................................................................................... 10
PIN CIRCUIT DIAGRAMS............................................................................................................. 11
CENTRAL PROCESSOR UNIT (CPU) .............................................................................................. 13
2.1
MEMORY MAP............................................................................................................................... 13
2.1.1
PROGRAM MEMORY (ROM) ................................................................................................. 13
2.1.1.1 CHECKSUM CALCULATION........................................................................................... 21
2.1.2
CODE OPTION TABLE ........................................................................................................... 22
2.1.3
DATA MEMORY (RAM)........................................................................................................... 23
2.1.4
SYSTEM REGISTER................................................................................................................. 24
2.1.4.1 SYSTEM REGISTER TABLE ............................................................................................ 24
2.1.4.2 SYSTEM REGISTER DESCRIPTION ............................................................................... 24
2.1.4.3 BIT DEFINITION of SYSTEM REGISTER....................................................................... 25
33
I/O PORT ................................................................................................................................................ 74
I/O PORT MODE ............................................................................................................................. 74
I/O PULL UP REGISTER ................................................................................................................ 75
I/O PORT DATA REGISTER .......................................................................................................... 76
TIMER 0 (T0) ................................................................................................................................... 79
3.1
3.2
3.3
3.4
3.4.1
3.4.2
3.4.3
3.4.4
44
55
OVERVIEW .............................................................................................................................. 79
T0M MODE REGISTER........................................................................................................... 80
T0C COUNTING REGISTER................................................................................................... 81
T0 TIMER OPERATION SEQUENCE ..................................................................................... 82
LCD DRIVER ....................................................................................................................................... 106
4.1
LCDM1 REGISTER....................................................................................................................... 106
4.2
4.3
4.4
OPTION REGISTER DESCRIPTION........................................................................................... 107
LCD TIMING ................................................................................................................................. 109
LCD RAM LOCATION ................................................................................................................. 111
CHARGE-PUMP, PGIA AND ADC .................................................................................................. 112
SONiX TECHNOLOGY CO., LTD
Page 3
Preliminary Version 0.4