Download Vivado Design Suite Reference Guide: Model-Based DSP

Revision History
The following table shows the revision history for this document.
Date
Version
11/18/2015
2015.4
Revision
In the description of the Opmode block, added information about the block
parameters that apply to DSP48E2 slices.
Described the Use STD_LOGIC type for Boolean or 1 bit wide gateways block
parameter for the System Generator block. If your design's Hardware Description
Language (HDL) is VHDL, selecting this option will declare a Boolean or 1-bit port
(Gateway In or Gateway Out) as a STD-LOGIC type.
In the description of the FIR Compiler 7.2 block, added the following Note:
Note: When selecting the Transpose Multiply-Accumulate architecture,
these limitations apply:
°
°
09/30/2015
2015.3
Symmetry is not exploited. If the Coefficient Vector specified on the
Filter Specification tab is detected as symmetric, the Sysgen FIR
Compiler 7.2 block parameters dialog box will not allow you to select
Transpose Multiply Accumulate.
Multiple interleaved channels are not supported.
Added four new blocks to the Xilinx blockset:
• Digital FIR Filter - The Digital FIR Filter block allows you to generate highly
parameterizable, area-efficient, high-performance single channel FIR filters.
• Product - The Product block implements a scalar or complex multiplier.
• Requantize - The Requantize block requantizes and scales its input signals.
• Sine Wave - The Sine Wave block generates a sine wave, using simulation time as
the time source.
Updated information on the System Generator token, adding a description of the
Settings button that appears when you select Hardware Co-Simulation JTAG as
your compilation target. This button opens a dialog box that allows you to use burst
data transfers to speed up JTAG hardware co-simulation.
Described the Optimization Parameter block parameter for the Time Division
Multiplexer block. This block parameter specifies whether the logic should be
implemented in fabric (optimizing for resource usage) or in DSP48E1/DSP48E2
primitives (optimizing for speed).
Described the Operation block parameter for the MultAdd block. The setting of this
block parameter determines whether the block will perform an addition or a
subtraction after multiplication.
Vivado: Designing with System Generator
UG958 (v2015.4) November 18, 2015
www.xilinx.com
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