Download SH7060 E8000 Emulator HS7060EDD81H User`s Manual

3.6 Watchdog Timer (WDT)
The WDT only operates during emulation (GO or STEP command execution), and does not
operate when the emulator is waiting for command input. The timer count stops at a break and
restarts when emulation is resumed.
3.7 Timer Pulse Unit (TPU), Motor Management Timer (MMT), and
Compare Match Timer (CMT)
The TPU, MMT, and CMT operate during the command input wait state as well as during
emulation. Even after the user program has stopped, when a break condition is satisfied after the
user program has been started with a GO command, the TPU, MMT, and CMT continue to
operate. Therefore, the timer pins are valid even when user program execution has stopped. The
user can rewrite the timer registers with the MEMORY command.
3.8 Serial Communication Interface (SCI)
The serial communication interface signals are connected to the user system directly from the
SH7060 on the EV-chip board. Therefore, like the timers, the interface is valid during the
command input wait state as well as emulation. For example, when data is written to the transmit
data register (TDR) using the MEMORY command, after the serial communication interface
output has been prepared, data is output to the TxD pin.
3.9 DMA Controller (DMA)
The DMA operates during the command input wait state as well as during emulation. When a
transfer is requested, the DMA executes a DMA transfer.
3.10 Bus State Controller
The SH7060 wait state controller has a programmable wait mode and a WAIT pin input mode.
The programmable wait mode is valid when the emulation memory or user external memory is
accessed, but input to the user WAIT pin is only valid when user external memory is accessed.
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