Download STD 7000 7507 1/0 Rack Interface Card USER`S MANUAL
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STD 7000 7507 1/0 Rack Interface Card USER'S MANUAL o o o o 7507 1/0 Rack Interface Card USER'S MANUAL o 9/81 ,ae f\ iH , "4,$4.,,"; '''' ;;n:;:S,PJUlffftffiiJIiMJmZ@j@Qa&,JMhL4ALOO*=DlQ,n,rn:CG;UJdtI'-ii;'14@i,......il.MlIiililWiJAM&i______ = 7507 I/O MODULE MOUNTING RACK INTERFACE CARD USER'S MANUAL TAB LEO F SECTION 1 CON TEN T S Product Overview Block Diagram SECTION 2 Functional Description General Purpose Interface SECTION 3 Mapping SECTION 4 Address Decoder Operation Changing the 7507's Port Address SECT I ON 5 7507 Card Environmental Specifications SECTION 6 Electrical Specifications SECTION 7 Mechanical SECTION 8 7507 Operating Subroutine Modules SECTION 9 Maintenance PRO-LOG CORPORATION A FORM NO. 101105 REV 106394 A SHT • I OF 1. PRODUCT DATA SHEET - 7s07 I/O MODULE MOUNTING RACK INTERFACE CARD A. PRODUCT OVERVIEW The 7S07 provides an interface between the STD BUS and the Industry Standard I/O Module t10unting Rack (OPTO-22 Corp. or equivalent). This interface card can control up to 24 AC or DC input or output modules in any combination and position on the I/O Module Mounting Rack. The I/O Module Mounting Rack may be separated from the 7S07 by up to ten feet (3.0Sm) of 50 conductor 'ribbon cable. The 7S07 is also useful as a general purpose TTL interface card. Three 8-bit read/write ports control 24 bidirectional signal lines. In addition, an output port-controlled power source rated at +4.7SV at SOOmA is provided. An LED assembly, visible from the card edge moditors the state of the power source and the three signal lines. Connection to the 7S07 is supplied through a SO-pin card edge connector. Adjacent grounds are provided fo~ each signal line for use in ribbon cable or discrete wire cable assemblies. B. PRODUCT FEATURES Up to 24 I/O Modules per 7S07 Any Type of Module can be Controlled in any Combination and Position Standard I/O Module Bus allows use of Industry Standard Industrial I/O Module Mounting Racks. Low Pass Input Filters for Noisy Industrial Environments Single +SV Operation Socketed ICs C. BLOCK DIAGRAM IIIIODULE RACK flUS STO BUS DATA sue; BUFFf>! 07-01 IOUp· IOfIO· INPUT PORTS r------, 110 BUFFERS o-......---t b---d~-' ~--<lI ~~T ~CODE WR· ~~T -_ RD· ~--a A'·A, ~~--I lylltEMT- DECODE I I IL ..... ______ ll00UU MCK O----------~-----l ~wtA ,.., INnAfACI CAM) PRO-LOG CORPORATION JI A 106394 REV A SHT 2 OF 23 FORM NO. 101105 NTW#MWB q b.- 2. FUNCTIONAL DESCRIPTION The 7507 uses the Industry Standard I/O Module Bus to communicate with the I/O Module Mounting Rack. The bus consists of 24 bidirectional data lines alternated with 24 ground lines, a switched +4.75/500mA power lead and a ground power lead. These signals are routed over up to ten feet (3.0sW of 50 conductor flat cable. Each bidirectional data line controls one I/O module on the I/O Module Mounting Rack., Since the I/O module may be an input or an output device, each signal line must perform as an input or an output. This signal line characteristic is achieved by the circuit shown in the Bidirectional I/O Circuit diagram. (Section 2) The output circuit capability is supplied through an output port register, an open-collector inverting driver, and a pull-up resistor. There are no programming constraints in the output mode; active high data is written to the output port causing an output module on the I/O Module Rack to conduct. Input circuit capability is provided through an inverting input port buffer and a low-pass RC filter. The low-pass filter, combined with the Schmitttrigger characteristic of the input port buffer, removes noise-induced voltage spikes from the input signal. The active condition of any input module (high voltage present), appears as active-high data in the input port. There is one programming constraint in the input mode: active-high data cannot be written to the output port bit that is to be us~d a~ an inp~t port bit. This constraint is required to disable the open-collector output drive for that bit. Note: On system power up the SYSRESET* signal clears the output port and puts the output drivers in the disabled state. Thus programming overhead is not required to select the input mode of operation. The power needed to operate the I/O Module Mounting Rack is supplied by an output port-controlled power source capable of providing 500mA. To disable all input and output modules in the I/O Module Mounting Rack, this power source should be switched off by setting the I/O Module Rack power disable bit. This is useful when performing a test on the 7507. If the I/O Module Rack is disabled, the 7507 may be tested by writing a value to an output port and then reading the value back for verification. A time delay is required before reading the value back to allow for the operation of the input filter. Check the Switching Characteristics table for the correct time delay value. To output power directly from the Vcc of the STD system to the I/O Module Mounting Rack, it is possible to bypass the output port-controlled +4.7V power source by moving the wire jumper from location SA to location SB (see Component Placement diagram). Remove this jumper to disable the I/O Module Mounting Rack supply completely. The state of the I/O Module Mounting Rack current supply is indicated by the bottom LED (on~Vcc = +4.7V, off-+Vcc = +OV) See the Component Placement diagram for LED placement information. (Section 7) PRO-LOG CORPORATION FORM NO. 101905 A REV 106394 A SHT 3 Of 23 GENERAL PURPOSE INTERFACE The 7507 is useful as a general purpose TTL interface card. The ground-· signal-ground of the I/O connectors allows minimum crosstalk between signal lines for flat cable or twisted pair discrete wire cable assemblies for interconnection between systems in electrically noisy environments. Three LEDls are provided for use as general purpose status indicators. These indicators may be accessed by writing the output port bits for module 23 (mod 23"~), modu 1e 22 (mod 22'''>, and modu 1e 21 (mod 2 F~) (on = act i ve ...·h i gh output register data). See the Component Placement diagram for LED placement information. (Section 7) The bidirectional signal lines at the card edge connector are 'active-low on both input and output. The signals are terminated with a lK pull-up resistor. 1----------------1 OUTI'UTOATA OUTI'UT STROlE -.--- o 0 -.- - - - - b ~ I Vcc IllOINOICATOROIIIIIOOll 11100 21 OUT~TS I I 1100 n. _ IL _ _ _ _ _ _ _ _ _ _ _ _ ---1I Vcc --4- . . . ~ ltOIRECTlONAl SIGNAL o ,IYSRE"TO -. . . _ .. _ - - .. ~T~T IUPYIR ~T OATA --4- I TJPlc.I Bidirectional 110 CtrcuH PRO-LOG CORPORATION A REV 106394 A FORM NO. 101905 MAAlIfTMMMM#t4.MA 44A a..... SHT 4 OF 23 3. MAPPING The 24 bidirectional signals are accessed as three 8-bit input/output ports. Note: The 24 position I/O Module Mounting Rack uses all three ports. The 16 position I/O Module Mounting Rack uses two ports. The 8 position rack requires a single input/output port. See the Port Mapping diagram for port assignments for all three configurations. The. I/O Module Mounting Rack power supply uses the same l~bit output-only port for all three I/O Module Rack configurations. With the exception of these differences, the three I/O configurations program identically. The I/O ports of the 7507 are selected by a decoded combination of address lines A7 through AO. The 7507 is shipped with the port assignments shown in the Port Mappping diagram. The user may change the port address assignments by changing jumper wires SW, SX, and SY. Refer to the Component Placement diagram for the position of SW, SX, and SY. (Section 7) 07 PORT 53H-OUTPUT ~I~ / /LED 06 05 04 03 + - - - - - - - - - DON'T 02 01 l-~~---~ CARE - - - - - - - . - - - . ~__- L - - - - - -__- - - - - - -____----------------------~ PORT 53H-INPUT < 4 - - - - - - - - - - - - - D O N ' T CARE - - - - - - - - - . L -_ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _oJ POR r 52H-OUTPUT PORT 52H-INPUT 2 3 I:]: H~ AI PRO-LOG CORPORATION A FORM NO, 101105 8 POSITION 106394 REV A SHT 5 OF 23 4. ADDRESS DECODER OPERATION Refer to the schematic, Document #105391 The 7507 uses four cascaded 74LS42 decoders (U2, U3, U5 and U6) to decode address lines AO-A7. These decoders are enabled only when 10RQ* is active. The WR* signal is used to gate the select strobes from US that control the output ports. The RD* signal is used to gate the select strobes from u6 that control the input ports. CHANGING THE 7507's PORT ADDRESS Refer to the assembly diagram, Document #104392 Locate decoders U2 and U3 (74LS42) adjacent to the STD BUS edge connector. Each decoder device has a dual row of pads which form decoder output select matrices. Make one (and only one) connection to each of the matrices adjacent to U2 and U3. The decoder jumper pad numbering figure shows the numbering of the pads adjacent to the decoder chips on the 7507. Also shown are the jumpers (at X2 and Y4) which produce hexadecimal port addresses 50, 51, 52 and 53, the selections made when the card is shipped. ~D I SY U2 oooo~oo 0 0000 00 0 01t.'3~S. 7 I sx I U3 I OOIO OOO 00 «) 0000 0 012.3'\5b7 I S\~ X: o D~CODER u4 I 1 JUMPER PAD NUMBERING ~D PRO-LOG CORPORATION A REV 106394 A 6 OF 23 SHT FORM NO. 101905 AMMi i WWAMW UtW MPWMWMA4PMMM¢mmw 4@ ¥4 4R' 4 4 ;; # 4 AMP?;? 4 ; (~ The 7507 may respond, to the alternate D/:O address condition which is determined by the state of 10EXP* signal. The 7507 can respond to an I/O address when the I OEXP~'," is low when jumper SW is in the number "0" pos i t ion (the position as shipped)~ The card will respond to an t/Q.address when the 10EXP~'c is high when jumper SW is in the number "1" position. The 10EXP~''" is normally held low by the CPU card. The I/O address mapping and jumper selection table for 4 addresses per card shows where to place jumper straps to obtain any four sequential port addresses in the hexadecimal range OO-FF. Using the lowest of the 2 . . .,digit hexadecimal addresses desired, find the most significant hexadecimal address digit along this vertical axis, and the least significant hex digit on the horizontal axis. For example, port addresses 50, 51, 52, and 53 are obtained by connect~ng jumpers at X2'and Y4. The only restriction that applies in address selection for the 7507 is the lower of the four port addresses (50 as shipped) must occur only at every fourth possible address. For example, the sequence 51, 52, 53 and 54 is not allowed by the decoder. The pad matrices adjacent to U2, U3,and u4 are on 0.10 inch (0.25cm) centers. The jumper wires may be conveniently replaced by wirewrap post if frequent address selection changes are anticipated. (J~ MOlT SIGNIFICANT HEXADDRlIl 0 UAIT IIGNIFICANT . .X ADDIIUI o 11 12 1:I • 15 1I 17 -L,jAI- CID I XO YO XO Yl XO Y2 XO Y3 XO Y4 XO Y5 XO Y6 XO Y7 2 :I Xl YO Xl Yl Xl Y2 Xl Y3 Xl Y4 Xl Y5 Xl Y6 Xl Y7 4 X2 YO )(2 Yl X2 Y2 X2 Y3 Y7 1 I' .ftMIeR _LaCT1ON X.Y !'.. 5 X2 Y4 X2 Y5 X2 VI X2 I X3 YO X3 Vl X3 Y2 X3 Y3 X 7 X3 Y4 X3 Y5 X3 VI X3 Y7 -, A X4 VO X4 Y1 X4 Y2 X4 Y3 AND X4 Y4 X4 Y5 X4 V6 X4 Y7 X5 YO X5 Y1 X5 Y2 X5 Y3 X5 Y4 X5 Y5 X5 Y6 X5 Y7 C D X6 YO X6 Y1 X6 Y2 XI Y3 X6 Y4 X6 Y5 X6 YI XI Y7 , X7 yo X7 Yl X7 V2 X7 Y3 X7 Y4 X7 Y5 X7 VI X7 V7 - E Y l.I I/O Addr... Mapping And-Jumper Selection Table For .. Addr_.. Per Card (JI PRO-LOG CORPORATION A FORM NO. 101105 REV 106394 A SHT 7 Of 23 4~ 5. Zr:,07 CARD ENVIRONMENTAL SPECIFICATIONS ABSOLUTE NON-OPERATING LIHITS RECOMMENDED OPERATING LIHITS PARAMETER MIN Free Air Temperature Humidity TYP MAX MIN MAX UNITS 25 55 -40 75 °c 95 0 95 %RH 0 CD 0 Not Spec i f i ~d - - - - Shock ~ Vibration ~ - Not Specified EMI ~ Not Specified ESD ~ Not Specified - - - CD ;> ? -- ~ ~ Non-condensing relative humidity 40 4~ PRO-LOG CORPOR.ATION A 106394 FORM NO. 101905 = = - i i i.."'.:M. A;g •• A P ,SZ4QW#W#4 an 4 4 q 1$ REV A SHT 8 OF 23 I ELECTRICAL SPECIFICATIONS 6. 7507 1/0 Module Mounting Rack Interface Card Electrical Specifications (- .RECOMMENOF.D OPEnATING LIMITS MNEM. PARAMETER ABSOLUTE NON-OPERATING LIMITS ·MIN. TYP. MAX. MIN. MAX. UNIT - Vee Supply voltage 4.75 5.00 5.25 0.0 7.00 Volt TA Free air temp. 0 25 55 -40 75 °C User Interlace Electrical Characteristics Over Recommended OperaHng limits MNEM. MIN. PARAMETER c~rrent VOL Low level interface voltage (at 10mA IOl Low level interface current (at 0.70V level) VO H High level interface voltage IOH High level interface current (at 2.0V) V EXT Supply \oltage output to module rack --I EXT Supply current output to module rack -- MAX. UNIT .80 Volt 20 mA 5.25 Volt level) 4.75 mA -3.0 -. 4.70 4.45 4.95 Volt 500 mA ~ sro BUS Electrical Characteristics Over Recornmenrled Operating Limits MNEM. Icc TYP. MIN. PARAMETER . Interfac~ TYP. ---~-- supply current- ..... -.- :---. 750 ------- MAX. UNIT 1000 mA STD· BUS input load (See STD BUS Pin list) STD BUS output drive (See, STD BUS Pin, list) -t- ---. 'Includes SOOmA I02J to external I/O Module Mounting Rack I Switching Characteristics Over Recommended Operating Limits MNEM. TpHL TplH TpHL TpLH PARAMETER PROPAGATION TIME . PROPAGI\TION TIME . FROM STD DATA BUS . USERIFC - . TO TYP. USER IFC . STD DATA BUS . PRO-LOG CORPORATION FORM NO. 101105 MIN. MAX. UNIT 25 ~SEC: 75 NSEC. 3 6 15 tJSEC. 3 6 15 j./SEC. A REV 10639 1• A ~ SHT 9 OF 23 7. MECHANICAL Refer to the Component Placement diagram for component placement information. The 7507 meets all STD BUS general mechanical specifications. The 7507 requires one card slot in a standard STD BUS card rack. The input connector clearance requirements vary according to the specific connector used. A 50pin flat cable connector requires clearances of 0.250" on the component and circuit side of the board. Recommended flat cable card edge connectors include 3-M part number 3415-0001 or equivalent. This may be used with a polarizing key 3-M part 3439-0000 or equivalent to avoid incorrect cable hook-up. A complete cable assembly may be obtained from Pro-Log as RC50-6. For discrete wire cable assemblies, a PC board edge connect6r with solder tail connections may be used in conjunction with a cable hood assembly to provide reliable, strain-relieved termination. The recommended 50-pin card edge connector is a Viking part number 3VH25/IJN5. This connector is used with a Viking Hood part number 036-0097-002 or equivalent. These components may be obtained from Pro-Log as CS50. POLY LED ~.~OD 23 MOO 22 MOD 21 CARD DECODE Vo M(,)o..:.L£ RAQ..K YowC:R - PIN 50 :)OOOGC~')OO OOOOC':OOO --".::;;.=-] [-.--~~-~ sw 7 :,-4 ~. COMPONENT SIDE -I 1/0 MODULE BUS CARD EOGe gg CONNECTOR KEY SLOT BETWEEN ---.~t:=_ 1121 AND #26 -~~~~-J ['----- 2.60" PIN2 Component Placement PRO-LOG CORPORATION A 106394 RFV SHTIO Ii.. OF 23 FORM NO. 101905 ==;M*UU;; QUiA ;: ilkill: &##4444441 ',r &S4.n liS": N!4rMiJiCUI0WM_"ijp;y;iGM ; 14Mt.\\.;;," i',·IiM; aTD 7507 EDGE CO~mECTOR PIN LIST PIN NUMBER PIN NUMBER '----OUTPUT (LSTTL ~--O-U-T'--P'--U-T--(-LS-T-T-L-O-RiVE) - - DRIVE) ~i''-PUTilsTTL LOADS) 7Ni>UT(LSTTl LO~.O~ -----.---- r-----:-:- ~..-E_M_O_N._IC __.__~--~--~--I~~-_+--~--~---~~MNEMONIC ~~_l TS . . ~OUNO ·5V _!_ S-t-w 7 ~S 1i r---- ;-- r-s-s r-a-' "07' ~ 06 5'6'tf"2 05 04' 1 ~A 15 S5 14 ---- ~ ~6 A14------- ---- - - '18 r-----------!----~- f--.-. 2~ ~~------- f - - f--- 2 f-:2 ____ ~. fA 10 A9 28 MEMRO-;------ 30 -- - 32 1 5 ~_.I-,:-S:-...;V:...-_ _ _ _ _~ 03 !-9- "s-5--+--':"'-~-=0:":2------~ -!-il 55 01 ~3~T 1 DO '15 ~ --- -,--+-=A:..:7--------I 1 A6 f-- f---t---f--.'----.---~ ..:~ __ r-~~5_ _~ ____ _ ! _~~ 26 A8 f- -RD' 1-- ___ ~_~_C_ ~~._~..!:.~_ ..~ _ _ ~~Q. ~~OUNO _ _ _ __ VC_C::_ f----I--2.... G N O . _~. 6 1 A2 f---. r-:?7 r-- 2 -+--A~'---'-~i9-r--'~-- AO 31 ~:-=---------.I 1 WR' ---!-iI 33!--- r;--·~:..:..R.:....Q-'-----~ ~6 I-js --r-,- '10ExP'---- ME~.-EX-:------'--- ~;CSYNc:_---- ---t--!-~ii 37 A=E_FR __E_S_H_'____--I STAfUSO' --'-,iQ BUSRQ-;-------t---- .--- 39 STATUS l' --rau-:...S·.:...A:·K:...::.·-...:.....-----I 4-2' 4'!--- INTRQ'----·- - f - ,-Nf;;ilRQ-'----- ---- INTAK' t-:is WAITRQ' ~----~8 r:;7-f---~- -SYSRES~----- CPSRESET" - - - f - - -- 254 ~~V---. - - - -=~~~ --t----=-'----.----I CLOCK' OiJT-t--'f>co-------- ~'--r-- 50 49 --1- - ~1 5 G~--- ~--r-53 ~C-I-·------~N-- ~ux 44 43 46 ~.---.--------.- CNTtlL' ., A4 -t....;_-l..:A..:.:3=-_ _ _ _ _-f 23 ~5 AUX GND 15- ~Ux-:V-- 'OIlSignate$ Active Low Level Logic Edge Connector Pin list 8 '3 10 1.-_ _ .._ _ =-_____ ----- 12 :1 50 SO 1'] 16 '3 '5 50 13 18 1: 50 ~3 20 '9 21 50 13 50 50 50 13 so 13 - •.. 5 ~ 6 ------.--.-- a . -----_.. _._----9 3 10 .. 11 _------ 12 25 2J 29 - 50 13 32 31 50 13 15 34 33 50 13 36 35 50 13 16 -------- 38 J7 50 13 _- ...10 -- 13 :<9 50 13 .!1 50 13 44 .!3 50 13 46 .!5 48 -', 50 50 50 .!9 '3 --"3 --- ~A Interf~ce 13 --------- 14 17 18 --------,--- 19 - - -20 ------- 21 -• - - -22~ --• 23 ------ MODULE_RACK POWER Pin List PRO-LOG CORPORATION A FORM NO. 101905 __ .- 26 28 :30 42 User 23 3 -----_.-4 ------_. 13 14 22 24 .------------4--+-- 50 REV 106394 A SH T 11 Of 23 B. 750.7 aPERATING SUBRaUTINE MaDULES This section provides flow diagrams and subroutines to operate your 750.7 card. These may be used intact, or used as models to construct subroutines for a specific application. The subroutines are written in BaBa-family assembly code and will execute on BaBa, BaB5, and zBa processors. The memory addresses selected are compatible with Pro-Logls 7Bal (BaB5A) and 7Ba3 (zBa) processor cards. The 750.7 port addresses used are the address jumper selections made when the 750.7 is shipped. To use these subroutines in systems other than those described above, the memory and/or I/O. port· addresses may require change for compatibility. The flow diagrams presented can be easily translated into the as~embly code used by any microprocessor since they show the steps required to achieve 750.7 operation without reference to a particular microprocessor. The following subroutines are provided for use with the 750.7. REGISTERS CHANGED NAME AND DESCRIPTIaN FLaw DIAGRAM PRaGRAM Page 14 Page lB A B H L Page 15 Page 19 A B H Page 16 Page 20. (750.7) This subroutine sets all outputs to a predefined state. It also initializes all variables used by the other subroutines. A H L (SET A BIT) This routine accepts a hex value in the accumulator which corresponds to the I/O. module to be turned on. If the I/O. module number is out of range, the carry flag will be set. (CLEAR A BIT) 1'1 This routine accepts a hex value in the accumulator which corresponds to the I/O. module to be turned off. I f the I/O. modu 1e number is out of range, the carry flag will be set. • L PRO-LOG CORPORATION A REV 10.6349 A SHT 12 OF FORM NO. 101905 qqgp &&JMM1lfIlI,M,fiI)ifi"*W;:;;Ii,' "';IAM;;; TQUiAP4 M,tiM • t4\ffiP,Ii#M'\' ,#1M ,; 23 continued NAME AND DESCRIPTION REGISTERS CHANGED FLOW DIAGRAM PROGRAM A B H Page 17 Page 21 (BIT CHANGED?) This routine accepts a hex value in the accumulator which corresponds to the I/O module to be tested. If the I/O module number is out of range, the carry flag will be set. It returns with p=o if there were no changes and P=l if the addressed module did change since the last test. The Z flag = 0 if the bit is set and Z=l if the input port is clear .L C D F c_ ~ I • (J~ PRO-LOG CORPORATION FOAM NO. 101805 A 106394 REV A SHT Of 13 23 4~ INITIALIZE 7507 INITIALIZE OUTPUT PORTS INITIALIZE VARIABLES 4D C!~J 7507 INITIALIZATION FLOWCHART 4~ PRO-LOG CORPORATION A REV 106349 A FORM NO. 101905 ti1UlMM#W&Jg;, .:u_n , 4 #M#¥M¥4M4W4M ££A# 4¥A4W. SHT OF 14 23 y SET OUTPUT 50 Y rou;1f~ ~---~ Y SET OUTPUT 52 SET BIT IN MEMORY 7507 BIT SET FLOWCHART PRO-LOG CORPORATION FORM NO. 101905 A 106394 REV SHT15 A OF 23 CLEAR AN OUTPUT BIT WHICH PORT AND BIT CLEAR BIT PORT 50 CLEAR BIT PORT 51 CLEAR BIT PORT 52 SET ERROR CLEAR BIT IN MEMORY 7507 BIT CLEAR FLOWCHART PRO-LOG CORPORATION A REV 106394 A sHTl6 OF 23 FORM NO. 101905 _a_a". tAW $ g, :iHAiMAq qU; 44444¥# ## ¥ .'_IIi\iNi$i44WM=u;i1#AJ##TJ,i !r_". 0EST AN INPUT BIT WHICH PORT AND BIT Y ~~SK OFF BIT] ON PORT 50 Y MASK OFF BIT ON PORT 51 Y MASK OFF BIT ON PORT 52 SET ERROR COMPARE MEMORY AND INPUT PORT N SET FLAG NO CHANGE 7507 BIT TEST FLOWCHART PRO-LOG CORPORATION A REV 106394 A SHT OF 17 23 PROGRAM ASSEMBLY FORM PRO-LOG CORPORATION MNE~,~ONIC H=X.!.DECIMAL L1N= P~GE o ACQ ADR 00 1f-.5T;:;. ~~I 1 (1§.Q1J ___ . MODIFIER L-"D?1 "-L - O't. f---- 5 1)3 6 61". - 7 ~E. L"DAI 9 ])~ 51 B ~E. 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