Download uPD750108 User`s Manual

CHAPTER 5 PERIPHERAL HARDWARE FUNCTIONS
The µPD750108, which is the master microcontroller, outputs a serial clock, and all slave microcontrollers
operate with an external clock.
5.6.7 SBI Mode Operation
The SBI (serial bus interface) is a high-speed serial interface that conforms to the NEC serial bus format.
To allow communication with multiple devices on a single-master and high-speed serial bus using two signal
lines, the SBI has a bus configuration function added to the clock synchronous serial I/O method. So the SBI
can reduce ports and wires on boards when multiple microcontrollers and peripheral ICs are used to configure
a serial bus.
The master can output, on the serial data bus, an address for selecting a device subject to serial
communication, commands directed to the remote device, and data. A slave can identify an address,
commands, and data from received data by hardware. This function simplifies the serial interface control
portion of an application program.
The SBI function is available with devices such as the 75X series, 75XL series, and 78K series 8-/16-bit
single chip microcontrollers.
Figure 5-50 is an example of the SBI system configuration when the CPU with a serial interface conforming
to SBI or peripheral ICs are used.
Figure 5-50. Example of SBI System Configuration
VDD
Master CPU
Slave CPU
µPD750108
µPD750108
SB0, SB1
SB0, SB1
Address 1
SCK
SCK
Slave CPU
SB0, SB1
Address 2
SCK
Slave IC
SB0, SB1
Address N
SCK
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