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SERIAL I/O (HIGH-SPEED UART)
S3C2500 (Preliminary Spec)
14.3.4 HIGH-SPEED UART TRANSMIT BUFFER REGISTER
S3C2500 has a 32-byte Transmit FIFO, and the bottom of FIFO is HUTXBUF. All data to be transmitted are stored
into this register at first in FIFO mode, if next buffer has invalid data, then shifted to next buffer. But in non-FIFO
mode, a new data to transmit will be moved from HUTXBUF to Tx shift register. The High-Speed UART transmit buffer
registers, HUTXBUF, contain an 8-bit data value to be transmitted over the High-Speed UART channel.
Table 14-9. HUTXBUF Registers
Registers
HUTXBUF
Offset Address
R/W
0xF007000C
0xF008000C
W
Description
Reset Value
High-Speed UART transmit buffer register
–
Table 14-10. High-Speed UART Transmit Register Description
Bit Number
[7:0]
Bit Name
Transmit data
Description
This field contains the data to be transmitted over the single channel
High-Speed UART.
When this register is written, the transmit buffer register empty bit in
the status register, HUSTAT[18], should be "1". This is to prevent
overwriting of transmit data that may already be present in the
HUTXBUF.
Whenever the HUTXBUF is written with a new value, the transmit
register empty bit, HUSTAT[18], is automatically cleared to "0".
31
8 7
0
Transmit Data
[7:0] Transmit data for UART
Figure 14-5. High-Speed UART Transmit Buffer Register
14-16