Download MITSUBISHI 16-BIT SINGLE-CHIP MICROCOMPUTER 7700

CENTRAL PROCESSING UNIT (CPU)
2.1 Central processing unit
2.1.8 Direct page register (DPR)
The direct page register is a 16-bit register. The contents of this register indicate the direct page area
which is allocated in bank 016 or in the space across banks 016 and 116. The following addressing modes
use the direct page register.
The contents of the direct page register indicate the base address (the lowest address) of the direct page
area. The space which extends to 256 bytes above that address is specified as a direct page.
The direct page register can contain a value from “000016” to “FFFF16.” When it contains a value equal to
or more than “FF0116,” the direct page area spans the space across banks 016 and 1 16.
When the contents of low-order 8 bits of the direct page register is “0016,” the number of cycles required
to generate an address is 1 cycle smaller than the number when its contents are not “00 16.” Accordingly,
the access efficiency can be enhanced in this case.
This register is cleared to “000016” at reset.
Figure 2.1.4 shows a setting example of the direct page area.
●Addressing modes using direct page register
•Direct
•Direct bit
•Direct indexed X
•Direct indexed Y
•Direct indirect
•Direct indexed X indirect
•Direct indirect indexed Y
•Direct indirect long
•Direct indirect long indexed Y
•Direct bit relative
016
016
FF16
12316
Bank 016
22216
FF1016
FFFF16
1000016
Direct page area when DPR =
“000016”
Direct page area when DPR =
“012316”(Note 1)
Direct page area when DPR =
“FF1016” (Note 2)
1000F16
Bank 116
Notes 1: The number of cycles required to generate an address is 1 cycle smaller when the
low-order 8 bits of the DPR are “0016.”
2: The direct page area spans the space across banks 0 16 and 1 16 when the DPR is
“FF0116” or more.
Fig. 2.1.4 Setting example of direct page area
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7721 Group User’s Manual