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PRELIMINARY 6.19.24 Address at Endpointlist in Memory (ENEDPOINTLIST_ADDR) Access: Read/Write Reset Value: 0 Bit Name 31:11 EPBASE 10:0 RES Description Endpoint list pointer (low) These bits correspond to memory address signals [31:11], respectively. This field references a list of up to 32 queue heads, i.e., one queue head per endpoint and direction. In device mode, this register contains the address of the top of the endpoint list in system memory. Bits [10:0] of this register cannot be modified by the system software and will always return a zero when read.The memory structure referenced by this physical memory pointer is assumed 64-byte. Reserved. Must be written to zero. 6.19.25 TT Status and Control (TTCTRL) Offset: 0x1B00015C Access: Read/Write (writes must be DWord) Reset Value: 0 Bit Name 31 RES 30:24 TTHA 23:0 RES Description Reserved. Must be written to zero. Internal TT hub address representation Used to match against the hub address field in queue head and SITD to determine whether the packet is routed to the internal TT for directly attached FS/LS devices. If the hub address in the queue head or SITD does not match this address, the packet is broadcast on the high speed ports destined for a downstream high speed hub with the address in the queue head or SITD. This register contains parameters needed for internal TT operations. This register is not used in the device controller operation. Reserved. Must be written to zero. 6.19.26 Programmable Burst Size (BURSTSIZE) Offset: 0x1B000160 Access: Read/Write (writes must be DWord) Reset Value: 0 Bit Name 31:16 RES 15:8 TXPBURST Programmable Tx burst length Represents the maximum length of the burst in 32-bit words while moving data from system memory to the USB bus. The default is the constant VUSB_HS_TX_BURST. 7:0 RXPBURST Programmable Rx burst length Represents the maximum length of the burst in 32-bit words while moving data from the USB bus to system memory. The default is the constant VUSB_HS_RX_BURST. 248 248 • • Description Reserved. Must be written to zero. AR9331 802.11n 1x1 2.4 GHz SoC for AP and Router Platforms December 2010 Atheros Communications, Inc. COMPANY CONFIDENTIAL