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5.3 Standard Event Register/5.4 Extended Event Register
Operation of the Standard Event Register
The standard event register is provided for eight
different kinds of event which can occur inside the
instrument. Bit 5 (ESB) of the status byte is set to “1”
when any of the bits in this register becomes “1” (or
when the corresponding bit of the standard event
enable register becomes “1”).
Reading from the Standard Event Register
The contents of the standard event register can be
read by the *ESR command. After completion of the
read-out, the register will be cleared.
Clearing the Standard Event Register
The standard event register is cleared in the following
three cases.
• When the contents of the standard event register
are read using *ESR?
• When the *CLS command is received
• When power is turned ON again
Examples
1. A query error occurs.
2. Bit 2 (QYE) is set to “1”.
3. Bit 5 (ESB) of the status byte is set to “1” if bit 2 of
the standard event enable register is “1”.
It is also possible to check what type of event has
occurred inside the instrument by reading the contents
of the standard event register.
5.4 Extended Event Register
Reading the extended event register tells you whether changes in the condition register (reflecting internal conditions)
have occurred. A filter can be applied which allows you to decide which events are reported to the extended event
register.
FILTer<x>→
Condition register
:STATus:CONDition?
Transition filter
16
15
15
14
14
13
13
12
12
11
11
10
10
9
9
8
8
7
7
6
6
5
5
4
4
3
3
2
2
1
1
0
0
FFT
INI
NSG
0
NGO
SUP
0
MES
ACS
PRN
TST
CAL
TRG
0
RUN
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
:STATus:FILTer<x>
{RISE|FALL|BOTH|NEVer}
Extended event register
:STATus:EESR?
The meaning of each bit of the condition register is as follows.
Bit 0 RUN (Running)
Set to “1” during acquisition.
Bit 2 TRG (Awaiting trigger)
Set to “1” when the unit is awaiting a trigger.
Bit 3 CAL (Calibrating)
Set to “1” during calibration.
Bit 4 TST (Testing)
Set to “1” during self-test.
Bit 5 PRN (Printing)
Set to “1” while the built-in printer is in operation.
Bit 6 ACS (Accessing)
Set to “1” during access of the floppy disk, hard disk, or MO disk.
Bit 7 MES (Measuring)
Set to “1” during automated measurement.
Bit 9 SUP (Set-up)
Set to “1” during auto set-up.
Bit 10 NGO (GO/No-go)
Set to “1” during GO/NO-GO.
Bit 12 NSG (N-Single)
Set to “1” during continuous acquisition when the trigger mode is single (N).
Bit 13 INI (Initializing)
Set to “1” during initialization.
Bit 14 FFT (FFT)
Set to “1” during FFT computation.
The filter is applied to each bit of the condition register seperately, and can be selected from the following. Note that
the numbering of the bits used in the filter setting differs from the actual bit number (1 to 16 vs. 0 to 15).
Rise
The bit of the extended event register becomes “1” when the bit of the condition register changes from “0” to “1”.
Fall
The bit of the extended event register becomes “1” when the bit of the condition register changes from “1” to “0”.
Both
The bit of the extended event register becomes “1” when the bit of the condition register changes from “0” to “1”,
or from “1” to “0”.
Never
The bit of the extended event register is disabled and always “0”.
5-4
IM 701530-11E