Download ML67Q5260 - Digi-Key

FEDL67Q5260-02
ML67Q5260
PIN LIST
PA05
I/O
-
General Purpose Port A5
B3
PA04
I/O
-
General Purpose Port A4
C2
A3
PA03
PA02
I/O
I/O
-
General Purpose Port A3
General Purpose Port A2
A2
PA01
I/O
-
General Purpose Port A1
C3
PA00
I/O
-
General Purpose Port A0
H4
PB11
I/O
-
General Purpose Port B11
G2
PB10
I/O
-
General Purpose Port B10
F3
E4
G1
D8
D5
E8
F8
E5
G8
G7
G3
F4
G5
H8
A8
H5
D1
PB09
PB08
PB07
PB06
PB05
PB04
PB03
PB02
PB01
PB00
DM
DP
PUCTL
TESTF
BSEL1
AFSEL
TESTE
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
A
A
O
A
I
I
I
P
P
P
P
General Purpose Port B09
General Purpose Port B08
General Purpose Port B07
General Purpose Port B06
General Purpose Port B05
General Purpose Port B04
General Purpose Port B03
General Purpose Port B02
General Purpose Port B01
General Purpose Port B00
USB dev DUSB dev D+
USB dev Pull-up Control
FLASH Test Pin
Boot Device Select 1
JTAG Select (ARM/FLASH)
Test Mode Select
SIO Receive Data
SIO Transmit Data
SSIO Communication Clock
SSIO Receive Data
SSIO Transmit Data
SPI Clock for CH1
SPI Slave Select for CH1
SPI Data for CH1
I/O (Master Receive / Slave Transmit)
SPI Data for CH1
I/O (Master Transmit / Slave Receive)
I/O - SPI Clock for CH0
I N SPI Slave Select for CH0
SPI Data for CH0
I/O (Master Receive / Slave Transmit)
SPI Data for CH0
I/O (Master Transmit / Slave Receive )
O - Clock Output (for sensor)
External Interrupt Input ( for USB
I
VBUS)
I
- External Interrupt Input ( for IRQ 28)
I
- External Interrupt Input ( for IRQ 30)
I
- External Interrupt Input ( for FIQ)
O - Smartcard IF Clock
O N Smartcard IF Reset
I/O - Smartcard IF Serial Data
O - Smartcard IF Power Control
O - Smartcard IF Voltage Control 1
O - Smartcard IF Voltage Control 0
O - Smartcard IF Card Detection
-
S
-
PU
PU
PU
PU
PU
PU
-
4mA
4mA
4mA
4mA
4mA
4mA
4mA
4mA
4mA
-
I O I I O L
I I I O H
I I I I I I I I -
-
-
4mA
-
I
-
-
-
4mA
-
I
-
-
-
4mA
4mA
-
I
I
-
-
-
4mA
-
I
-
-
-
4mA
-
I
-
-
-
4mA
-
I
-
S
-
4mA
T
I
-
4mA
4mA
4mA
4mA
4mA
4mA
4mA
4mA
4mA
4mA
4mA
-
-
I I I I I I I I I I I I O L
A I I I -
S S S - PD
- PD
- PD
Initial value
D2
I
O I/O I
O I/O I N
5V Tolerant
Oscillation Pin
Oscillation Pin
System Reset
Built-in ROM Port0 (*2)
JTAG Return Clock
JTAG Test Clock
JTAG Test Mode State
JTAG Test Data In
JTAG Test Data Out
JTAG Test Reset
General Purpose Port A12
General Purpose Port A11
General Purpose Port A10
General Purpose Port A9
General Purpose Port A8
General Purpose Port A7
General Purpose Port A6
Initial direction
N
P
P
N
-
Drive capacity
Polarity
I
O
I
I
O
I
I
I
O
I
I/O
I/O
I/O
I/O
I/O
I/O
I/O
Description
PU/PD(*1)
I/O
XI
XO
RESETN
PR0
RTCK
TCK
TMS
TDI
TDO
NTRST
PA12
PA11
PA10
PA09
PA08
PA07
PA06
Polarity
Pin name
D4
D3
E3
D7
B6
B7
C5
C6
C7
C8
B5
B4
G6
H6
H7
C4
E1
Description
Secondary function
I/O
Pin No.
Primary function
Schmitt
Description
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