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Download PLBv46 PCI Using the ML555 Embedded Development
Transcript
R Introduction Figure 1 is a block diagram of the reference system. X-Ref Target - Figure 1 XPS INTC MicroBlaze™ Processor XPS UARTLITE XPS BRAM CNTR PLBv46 XPS GPIO XPS CENTRAL DMA PLBv46 PCI MPMC X999_01_010308 Figure 1: ML555 PLBv46 PCI Reference System Block Diagram Figure 2 shows the principal interface blocks when transferring data between the PLBv46 PCI Bridge in the XC5VLX50T on the ML555 board and the PLBv46 PCI Bridge in the XC4VFX60 on the ML410 board. X-Ref Target - Figure 2 ML555 - Slot P3 ML410 DDR2 MB DDR2 PLBv46 PCI BRAM PLBv46 PCI PPC BRAM X999_02_010308 Figure 2: Interfacing ML555 PLBv46 PCI with ML410 PLBv46 PCI XAPP999 (v1.0) February 8, 2008 www.xilinx.com 2
