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Download T800-02 CTCSS module Technical Note 566
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0 1 2 V- S1 7 IC10 4070B R12 Figure 17 T800-02 Circuit Diagram (IPN 225-01202-03) Page 21 of 22 ISSUE: 150K R27 C12 10N 10N C5 C1A 8P2 32.768K R DIN C4 1U0 I/OPAD 4018BD C2 100N R14 1K0 IC2 S11 6 11 13 16 Q3 Q4 Q5 +V CLK 14 47 R16 12K R13 1 10 1 2 3 4 5 PE JAM JAM JAM JAM JAM GND 2 3 7 9 12 8 4 Q2 +5V 5 Q1 IC1 PC1 2 OUT 3 PCB PC2 13 IN DET OUT 14 PCA IN - IC9 LM324D + 12 4069UBD IC3 13 150K R29 10N C7 - IC8 LM324D + + - IC8 C14 LM324D 220P 9 10 47N 22N C16 C15 R19 6 390K 5 6K8 R17 8 7 1U0 R30 10K AMENDMENTS: C/N 91/12-1212. C/N 91/04-306. C/N 91/03-118 - CHANGE C12 FROM 47N TO 10N. PILOT RUN UPDATE ORIGINAL C17 10N +5V 16 +V + LM324D IC8 - 820K 680P R31 C36 10N C10 1 LD 4 VCO OUT 10 SF OUT 15 ZENER 2 - DRAWN: CHKD: N.KELLER N.KELLER N.KELLER N.KELLER N.KELLER C29 47U R54 6K8 R53 680 R52 10K +9V R24 1K0 R35 100K R33 100K 680 R25 KHZ IC4P1 IC4P0 P7 P6 P5 P4 P3 P2 P1 P0 APVD: N.KELLER’ N.KELLER N.KELLER N.KELLER N.KELLER 10U C11 327.68 TP1 1 R15 12K R65 6K8 C30 47U IC8 LM324D + M.CLYNE M.HALL M.HALL BP BP BP 14 R23 390K 3 6K8 R22 C3 100P C1A C1B R1 R2 6 7 11 12 VCO PL-1 10 WAY R-ANGLE PLUG IC1 4046BT R70 100K GND INH 8 5 9 VCO IN LIMITER 12 13 C32R64 22N820K 2K7 R26 R20 27K 10N R21 10K C9 C8 SPEECH AND TONE FILTERS C13 10N 150K R28 R18 27K 10N C6 15 1 2 3 4046BT +9V IC3 4069UBD CLOCK SIGNAL GENERATOR (PLL) C1 47P 6 R11 330K 4 X1 4069UBD IC3 5 10M V- POWER PINS & UNUSED GATES 7 V+ +5V 14 C35 100N 4069UBD IC3 3 R32 330K V+ +9V 14 3A 2B 2A 1A A PROTO1 3 I/OPAD 4 5 6 7 8 V- 11 V- 11 IC9 LM324D IC8 LM324D V+ +9V 4 11 20 10 PL-1 9 PL-1 8 PL-1 7 PL-1 6 PL-1 5 PL-1 4 PL-1 3 PL-1 2 PL-1 1 PL-1 Z 16 +V 7 VREF GND 8 10 4069UBD IC3 11 6 INH 11 A 10 B 9 C IC7 4053BD 14 12 X X0 13 X1 2 Y0 1 Y1 5 Z0 15 3 Y Z1 4 +9V I/OPAD MSB 10 1 C18 1U0 C19 1U0 DATE: 30-03-90 29/04/91 19/03/91 3 P0 +V 1U0 C21 100K 100K C39 15N R80 33K CLT2 10 IC5 4569BDW 100K 100K 100K R8 100K C31 10N R61 100K R62 100K +5V ZD 1 CF 7 R48 100K 100K R47 R49 150K 6 5 D2 330K R58 BAV70 2 - 7 10K R50 K C28 10U 10K GND 8 9 15 Q1 Q2 IC6 4018BD 4 Q2 5 Q1 IN D 1 13 - IC9 LM324D + 1M0 R55 14 1M0 R79 S9 4K7 R76 I/OPAD D1 13 12 9 8 6 2 3 BAV70 D1 3 1 BAV70 R57 10K +9V 15 5 4 3 2 1 R GND JAM JAM JAM JAM JAM 8 12 9 7 3 2 12 PE 16 13 11 6 +V Q5 Q4 Q3 14 CLK 10 7 Q0 IC4 4526BDW 2 P3 L CF 4 13 1 Q3 16 +V 11 10 33K R37 4070B IC10 R39 100K +9V C38 S12 R60 2K2 R56 15K R66 15K R67 2K2 +9V 100N C34 100N +5V Q5 BC848 +5V SUPPLY R68 18K R69 10K O R43 R71 0 R78 100K +9V C25 150K 47N + 9 - 220P IC9 LM324D 10 22N C24 C23 8 C27 FILE NAME: 80002L3A DRAWING NO: 225-01202-03 IPN: FILE SHEET OF DATE: 08/05/92 1 1 +9V 680 R45 P S3 S4 S6 S13 S7 I/OPAD I/OPAD I/OPAD I/OPAD I/OPAD I/OPAD (TO T857 KEY LINE INPUT) S8 (TO T855 MUTE INPUT) R44 10U 4K7 CTCSS TONE FILTER C33 22N GATE LOGIC Q1 BC817 Q4 BC857 +9V 150K 10N C22 R42 N ISSUE A TAIT ELECTRONICS NEW ZEALAND R75 68K 2 3 C37 100N I/OPAD 47K R38 TONE LEVEL M R41 RV1 3CW R46 20K 2 150K 1 C26 47K 10U 100K R40 +5V R74 4069UBD 47K IC3 1 1 2 S10 R77 100K +9V R72 1M0 R73 1M0 4070B 4070B IC10 4070B IC10 REVERSE PHASE BURST LOGIC 5 IC10 3 PE O RST INH 12 10 4 5 11 14 P1 P2 6 P0 CLK R9 R10 100K 100K THRESHOLD DETECTOR Q2 BC848 +9V IC9 LM324D + 3 COMMUTATING FILTER +9V +9V 10K R63 Q3 BC848 R51 6 11 12 13 14 P3 P4 P5 P6 P7 15 Q Q6 BC848 5 P2 CLT1 2 4 P1 100K +5V TO +9V LOGIC LEVEL SHIFTER 9 CLK GND 8 16 R1 100K +5V T800 CTCSS C20 1U0 +5V 8X J SINGLE CHANNEL DE-ENCODER TITLE 8 4069UBD IC3 9 SYNCHRONOUSDETECTOR R36 100K R34 100K S2 10BANK SW SW1 LSB I 10 BIT PROGRAMABLE DIVIDER (DIVIDE BY 2 - 1023) R2 V+ H R4 +9V G R3 F R6 4 E R5 9 D R7 C S5 B I/OPAD 21st April 1999 I/OPAD A 0 1 2 3 4 5 6 7 8 9 TN-566
